Memory has been playing a major role in the performance,
scalability and applicability of General Compute systems, and more recently, in realizing Generative
Artificial Intelligence (GenAI) and High-
Performance Computing (HPC) systems that scale to thousands of GPUs, CPUs and special-purpose Accelerators. Embodiments herein disclose efficient
software-defined protocol terminations and protocol translations utilizing Compute Express Link (CXL), including translations between CXL.mem and CXL.cache protocols. Also disclosed are CXL-based systems, Resource Provisioning Units (RPUs), and Memory Fabric Switches enabling dynamic memory
pooling and sharing, host-to-host communication utilizing CXL.mem, CXL.cache and CXL.io, intent-based protocol translations, and optionally seamless interactions between CXL, UALink, NVLink, and / or
Ethernet protocols, utilizing a broad range of
semantics including IO, Cache, and Memory, optimizing memory access and reducing latency. Some embodiments also enable
scalability, flexibility and security in high-performance architectures suited for data centers and next-generation computing environments.