Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

General signal processing board card based on multi-core DSP (digital signal processor)

A digital signal processing and board card technology, applied in the fields of image processing, missile, radar, communication, digital signal processing, and remote sensing, it can solve the problem of small memory capacity, low speed, short transmission distance of upper computer control, and data throughput between processors. Small and other problems, to achieve the effect of enhancing system stability, reducing design cost and shortening design cycle

Inactive Publication Date: 2014-05-14
XIDIAN UNIV
View PDF2 Cites 49 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] 1. Traditional digital signal processing boards require a large number of processor chips to be connected in series in order to achieve stronger processing capabilities. The increase in the number of processor chips will inevitably occupy a larger board area, and the number of processor chips is large Sometimes it is even necessary to design multiple signal processing boards for processing, but the existing digital signal processing system is developing towards miniaturization, the system itself has limited space for signal processing boards, and the availability of traditional digital signal processing boards and practicability can no longer meet the status quo of big data processing
[0005] 2. Traditional digital signal processing boards use Flash, SRAM or SDRAM for memory expansion. Due to the shortcomings of these memories, such as low storage capacity or low transmission rate, they cannot handle large quantities of data in the process of increasing digital signal processing. high speed storage
[0006] 3. Traditional digital signal processing boards use parallel bus or universal serial bus resources to interconnect processors. Due to the low transmission rate of these bus protocols, the data throughput between processors is small and the real-time performance of the system is reduced.
[0007] 4. The upper computer control of traditional digital signal processing boards generally adopts protocol interfaces such as serial port, USB2.0, PCI, and 100M Ethernet. Because these protocols have the disadvantages of slow transmission rate or short transmission distance or both, Real-time playback of data is limited
[0008] 5. The traditional digital signal processing board generally does not consider the compatible pin package between the processor chip and other chips of the same series in the design of the printed circuit board (PCB). If the board card needs to be upgraded, the PCB needs to be redesigned circuit, prolonging the design cycle and increasing the design cost
[0009] 6. Traditional digital signal processing boards generally use custom connectors and custom board sizes, so that they can only be used in specific environments, and their versatility is not high
[0010] To sum up, the traditional digital signal processing boards have large board size, low system stability, small memory capacity and low speed, small data throughput between processors, short transmission distance and low transmission speed for host computer control, and general-purpose boards. The performance is poor, and it can no longer meet the current situation of increasing algorithm complexity and increasing data volume in the process of digital signal processing.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • General signal processing board card based on multi-core DSP (digital signal processor)
  • General signal processing board card based on multi-core DSP (digital signal processor)
  • General signal processing board card based on multi-core DSP (digital signal processor)

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0033] Reference attached figure 1 In this example, an FPGA chip is used as the main control core, and two multi-core DSP chips are used as the main data processing unit. The DSP chips are all interconnected by high-speed serial bus. The peripherals of the DSP chips are also extended with high-speed large-capacity memory and Gigabit Ethernet interface. The entire board uses VPX connectors to connect with the external system; this example can realize fast data transfer. Transmission, storage, processing and playback.

[0034]The FPGA in this example uses the Virtex-6 series chip XC6VLX130T-FF1156, which integrates 128,000 logic units, 1740Kb distributed RAM memory, 9504Kb block RAM memory, 480 digital signal processing logic units (DSP48E1), 600 Input and output (I / O) pins and 20 gigabit transceiver resources are mainly used for high-speed data transmission of general digital signal processing boards and processing of some simple digital signal processing algorithms, such as F...

Embodiment 2

[0054] The overall composition of the general digital signal processing board based on multi-core DSP and the connection mode between the processors are the same as in Embodiment 1, wherein the FPGA chip of this example selects the Virtex-6 series chip XC6VLX240T-FF1156, which integrates 241152 logic units inside , 3650Kb distributed RAM memory, 14976Kb block RAM memory, 768 digital signal processing logic units (DSP48E1), 600 input and output (I / O) pins and 20 gigabit transceiver resources; multi-core DSP chooses TI company The quad-core chip TMS320C6674, the main frequency of each core of this chip is 1.25GHz, and the four cores provide up to 160GMAC fixed-point operation or 80GFLOP floating-point operation per second; the DDR3 chip uses Samsung's K4B2G1646E, and the highest transmission rate of DDR3 is 1600Mb / s, the total storage capacity of four chips is 1GB. This embodiment is compared with embodiment 1, and the internal resource of FPGA chip expands approximately twice ...

Embodiment 3

[0057] The overall composition of the general digital signal processing board based on multi-core DSP and the connection mode between the processors are the same as in Embodiment 1, wherein the FPGA chip of this example selects the Virtex-6 series chip XC6VLX315T-FF1156, which integrates 314880 logic units , 5090Kb distributed RAM memory, 25344Kb block RAM memory, 1344 digital signal processing logic units (DSP48E1), 600 input and output (I / O) pins and 20 gigabit transceiver resources; multi-core DSP chooses TI company The octa-core chip TMS320C6678, the main frequency of each core of this chip is 1.25GHz, and the eight cores provide up to 320GMAC fixed-point operation or 160GFLOP floating-point operation per second; the DDR3 chip uses Samsung's K4B4G1646B, and the highest transmission rate of DDR3 is 1600Mb / s, the total storage capacity of the four chips is 2GB; other aspects of this embodiment, including the overall architecture and interconnection between processors, are th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a general signal processing board card based on a multi-core DSP (digital signal processor). An FPGA (field programmable gate array) serves as a master control core, and two multi-core DSP chips are connected through a high-speed serial bus and supportable to SRIO (serial rapid input / output) and PCIE (peripheral component interconnect express) protocols. Each DSP is connected with an expandable external memory and a gigabit Ethernet interface, and the DSPs are connected mutually through the high-speed serial bus and supportable to Hyperlink, SRIO and PCIE protocols. The FPGA and a VPX connector are mutually connected through a gigabit transceiver and supportable to SRIO, PCIE and Ethernet protocols. Mounting positions of an external memory chip, a DSP chip and an FPGA chip on a printed board of the general signal processing board card are compatible positions allowing placement of other chips in the series respectively and accord with 6U standards in size. The problems of poor universality, small data throughput, low storing rate and low processing speed of existing signal processing board cards are solved, and the general signal processing board card has the advantages of quickness in processing, high storing rate, large data throughput and high universality and can be widely applied to fields of communication, radar, guided missiles, remote sensing, image processing and the like.

Description

technical field [0001] The invention belongs to the technical field of digital signal processing, and mainly relates to a general digital signal processing board design technology based on a single-chip FPGA plus multi-chip multi-core DSP chips for digital signal processing, specifically a multi-core DSP-based general digital signal processing board Card, can be widely used in communications, radar, missiles, remote sensing, image processing and other fields. Background technique [0002] With the continuous development of digital signal processing technology, the complexity of algorithms in communication, radar, image processing and other fields is increasing. Usually, dedicated digital signal processing boards are used in satellite communication, airborne radar, missile-borne radar, and image processing systems. It can be used for data processing in boundary scan, image detection, target recognition, etc., but as the quality and real-time requirements of signal processing ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40
Inventor 全英汇姚鑫东邢孟道李亚超陈杰冉磊肖川江徐炜
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products