239results about How to "Ensure compatibility" patented technology

A novel method of operating repeaters or other hub devices in a local area network, such as one conforming to Ethernet protocol, in which there are a plurality of repeater interfaces of respectively different data rates for communicating with a link partner on a network medium. The methodology comprises determining the data rate of operation of the link partner, and based on that data rate, automatically steering data between the network medium and a selected one of the repeaters. In a preferred embodiment, a network transceiver comprises one or more physical layer devices (PHY), and a plurality of shared data busses corresponding, respectively, to the speeds of operation of the repeaters, for interconnecting the repeaters and one or more of the physical layer devices. A multiplexer interconnects each of the one or more physical layer devices to a selected one of the plurality of busses, and an auto-negotiation unit controls the multiplexer to interconnect the physical layer devices to corresponding busses selected depending on the operating speed of the link partner.

A solid-state image sensor comprises a semiconductor substrate of a first conductivity type having a color pixel region and a black pixel region; a first well of the first conductivity type formed in the color pixel region; a second well of the first conductivity type formed in the black pixel region; a third well of a second conductivity type formed, surrounding the second well and isolating the second well from the rest region of the semiconductor substrate; a color pixel formed in the first well in the color pixel region and including a first photodiode and a first read transistor for reading a signal generated by the first photodiode; and a black pixel formed in the second well in the black pixel region and including a second photodiode and a second read transistor for reading a signal generated by the second photodiode. The first well includes a first buried impurity doped layer of the first conductivity type formed in a bottom thereof in a region where the first read transistor is formed. The second well includes a second buried impurity doped layer of the first conductivity type formed in a bottom thereof in a region where the second photodiode is formed and a region where the second read transistor is formed.