138 results about "Switched fabric" patented technology

A switch including physical ports, virtual switches, and a switch fabric is described. A virtual switch of the virtual switches includes virtual ports corresponding to the physical ports of the switch and is configured to provide a translated routing structure (TRS). The TRS corresponds to a local identifier of a source device coupled with a corresponding physical port and is unique to the source device for the switch. The switch fabric interconnects the physical ports. In some embodiments, the switch is a compute express link (CXL) switch.

A fabric control protocol is described for use within a data center in which a switch fabric provides full mesh interconnectivity such that any of the servers may communicate packet data for a given packet flow to any other of the servers using any of a number of parallel data paths within the data center switch fabric. The fabric control protocol enables spraying of individual packets for a given packet flow across some or all of the multiple parallel data paths in the data center switch fabric and, optionally, reordering of the packets for delivery to the destination. The fabric control protocol may provide end-to-end bandwidth scaling and flow fairness within a single tunnel based on endpoint-controlled requests and grants for flows. In some examples, the fabric control protocol packet structure is carried over an underlying protocol, such as the User Datagram Protocol (UDP).

A new system architecture for servers used in supercomputers uses an on-chip switch fabric with backpressure to improve performance. A server-on-a-chip includes one or more of the on-chip switch fabrics coupling one or more processing cores enabled to respond to the backpressure. Optionally, one or more ports of the on-chip switch fabrics are used to provide (external) ports of the server-on-a-chip to enable seamless communication with other server-on-a-chip instances. Various instances of the server-on-a-chip use the seamless communication to communicate with each other over a single printed circuit board and / or with each other across a plurality of printed circuit boards. Optional smart memory and / or multi-homed memory techniques improve memory efficiency by posting all writes, hiding DRAM maintenance operations (e.g., refresh, scrubbing, error correction and / or error logging), and / or reducing attack vectors, such as via secure booting of encrypted boot images.

A fabric control protocol (FCP) and packet forwarding mechanisms are described that maximize utilization of bandwidth within massive, large-scale data centers having multi-stage data center switch fabric topologies, such as topologies that include a third switching layer formed by super spine switches. Automatic generation of data plane forwarding information referred to as FCP path information enumerates, for each data processing unit (DPU), the available FCP paths. The FCP path information may be based on unique combinations of peak points of the switch fabric for a given DPU with FCP colors assigned to network links that are used to multi-home the DPU to the switch fabric.

An example system comprises a plurality of servers comprising respective network interface cards (NICs) connected by physical links in a physical topology, wherein each NIC of the plurality of NICs comprises an embedded switch and a processing unit coupled to the embedded switch; and an edge services controller configured to program the processing unit of a network interface card of the plurality of network interface cards to: receive, at a first network interface of the NIC, a data packet from a physical device; based on the data packet being received at the first network interface, modify the data packet to generate a modified data packet; and output the modified data packet to the physical device via a second network interface of the NIC.

The invention relates to multi-path routing of a switch fabric. The switching fabric uses traffic congestion information to notify it of timely use of non-minimum routing. An ingress port of a network switch collects traffic congestion information from an egress port of the network switch. The traffic congestion information includes minimum and non-minimum routing congestion metrics for the egress port. A candidate egress port is identified for forwarding the data packet to the destination node. And selecting one of the candidate exit ports according to the traffic congestion information. The selection process is biased to select some candidate egress ports rather than other ports. In particular, a candidate egress port providing non-minimum routing to a destination node and having a high minimum routing congestion metric is not sponsored by a selection process.

An integrated circuit formed on (i) a single semiconductor die or (ii) a plurality semiconductor dies that are integrated into a single package. The integrated circuit may include a communication interface including a serializer / deserializer (SerDes) interface; a fabric adapter communicatively coupled to the communication interface; a plurality of inference engine clusters, each inference engine cluster including a respective memory element and / or memory interface; and a data interconnect communicatively coupling each respective memory element and / or memory interfaces of the plurality of inference engine clusters to the fabric adapter. The fabric adapter may be configured to facilitate remote direct memory access (RDMA) read and write services and / or datagram communication over a cell-based switch fabric to and from the respective memory elements and / or memory interfaces of the plurality of inference engine clusters via the data interconnect.

An integrated circuit formed on (i) a single semiconductor die or (ii) a plurality semiconductor dies that are integrated into a single package. The integrated circuit may include a communication interface including a serializer / deserializer (SerDes) interface; a fabric adapter communicatively coupled to the communication interface; a plurality of inference engine clusters, each inference engine cluster including a respective memory element and / or memory interface; and a data interconnect communicatively coupling each respective memory element and / or memory interfaces of the plurality of inference engine clusters to the fabric adapter. The fabric adapter may be configured to facilitate remote direct memory access (RDMA) read and write services and / or datagram communication over a cell-based switch fabric to and from the respective memory elements and / or memory interfaces of the plurality of inference engine clusters via the data interconnect.

A method for data center switching fabric path emulation in an electronics design automation (EDA) environment includes generating emulated data center traffic. The method further includes, at a path emulation element, modifying the emulated data center traffic to emulate passing of the emulated data center traffic through a data center switching fabric. The method further includes outputting, by the path emulation element, the modified emulated data center traffic to an EDA emulator emulating an electronics design under test. The method further includes receiving and storing a response of electronics design under test to the modified emulated data center traffic.

The present disclosure includes a compute express link (CXL) switch having a switch fabric, that includes a first plurality of electrical ports, each electrical port of the first plurality of electrical ports configured for electrical communication to a host. There are a second plurality of electrical ports and at least one processor communicatively coupled to the first and second pluralities of electrical ports. There is a memory and an optical engine directly coupled to the switch fabric. The optical engine includes a plurality of converters, each converter of the plurality of converters corresponding to one electrical port of the second plurality of electrical ports and configured to at least one of convert an electrical signal to an optical signal or an optical signal to an electrical signal. There are a plurality of optical ports, each optical port of the plurality of optical ports corresponding to one converter of the plurality of converters and configured for optical communication to a device.

A switching fabric uses traffic congestion information to inform its opportunistic use of non-minimal routes. An ingress port of a network switch collects traffic congestion information from the egress ports of the network switch. The traffic congestion information includes minimal and non-minimal route congestion metrics for the egress ports. Candidate egress ports for forwarding a packet to a destination node are identified. One of the candidate egress ports is selected based on the traffic congestion information. The selection process is biased to prefer some candidate egress ports over others. Particularly, the candidate egress ports that provide non-minimal routes to the destination node and have high minimal route congestion metrics are disfavored by the selection process.

The invention discloses a path determination method, device and system, and belongs to the technical field of communication. The method comprises the following steps: after a first controller determines a port group set, determining paths corresponding to each port group in the port group set in parallel, and determining paths corresponding to the port groups of which the corresponding paths are not determined in a part outside the determined paths in a switching network. The port group comprises a first port and a second port of data to be exchanged, and the first port and the second port in different port groups are different; the port group set comprises at least two port groups of which the first ports and the second ports belong to different switching structures; the path corresponding to any port group is the path between the first port and the second port in the port group; moreover, the paths corresponding to different port groups are mutually independent. The problem that the path determination mode of the controller is relatively single can be solved, and the path determination method and device are used for path determination.

An improved multiple-input multiple-output (MIMO) solution is disclosed for customer premises equipment (CPE) in which a set of wireless interfaces (e.g., cellular and WiFi), each with a plurality of antenna ports for MIMO operation, couple to an antenna switch fabric, which is then coupled to a set of antennas. In some examples, the antennas are distributed for maximum isolation and separation in order to improve MIMO channel separation, for example in an approximately spherical arrangement. The antenna switch fabric is instructed to select the optimal antennas based on signal parameter measurements, in order to improve overall performance. Selection of uplink (transmit) versus downlink (receive) antenna sets may be independent and based on different signal parameter measurements (e.g., for frequency division duplexing, FDD).

This application discloses a switching fabric board, a data forwarding method, a switching subrack, and a network system, and belongs to the communication field. The switching fabric board is a first switching fabric board connected to a first network device. The first switching fabric board includes a first connector and a first communication module. The first connector is connected to the first communication module based on a first signal cable. The first communication module is further configured to connect to a second communication module, the second communication module is connected to a first switching chip, the first switching chip has a data forwarding capability, and the second communication module and the first switching chip are configured on a second switching fabric board connected to a second network device.

Techniques described herein can use a hybrid load balancing approach to balance loads on paths in a switch fabric. The switch fabric can deliver synchronization data between processors in a multi-processor cluster, and the synchronization data can load the paths on which it is sent. First paths can be identified in the switch fabric, and first synchronization data can be distributed to the first paths using a first load balancing approach, such as a telemetry assisted load balancing approach. Second paths can be identified in the switch fabric, and second synchronization data can be distributed to the second paths using a second load balancing approach, such as a packet spraying load balancing approach.

An internal Graphics Processing Unit (GPU) / Network Interface Controller (NIC) parallel switch fabric system includes a computing device that is coupled to the plurality of external fabrics. The computing device includes a NIC set that provides access to each of the plurality of external fabrics, and a plurality of GPUs. The computing device also includes an internal switch fabric that is configured to couple each of the plurality of GPUs to the NIC set to provide each of the plurality of GPUs access to each of the plurality of external fabrics.

One method occurs at an impairment test system. The method includes receiving test configuration information for configuring a testing environment comprising an emulated switching fabric environment implemented using at least one switching application-specific integrated circuit (ASIC), wherein the test configuration information includes testing environment target state information; configuring, using the test configuration information, an impairment test session involving a system under test (SUT) and the emulated switching fabric environment; wherein configuring the impairment test session includes configuring at least one impairment controller for impairing the testing environment during the impairment test session; and initiating the impairment test session, wherein initiating the impairment test session includes generating and sending, using at least one traffic generator, test traffic via the emulated switching fabric environment and effecting at least one impairment of the testing environment during the impairment test session using a feedback control loop and the at least one impairment controller.

Techniques are disclosed for overlaying logical switch fabrics upon a physical switch fabric comprising multiple physical switch devices. In one example, a network device determines an overlay network associated with a received packet. The network device determines a logical identifier that is associated with the overlay network. In some examples, the logical identifier corresponds to a color. The network device selects a logical switch fabric that is associated with the logical identifier from a plurality of other logical switch fabrics that are overlaid upon a physical switch fabric comprising a plurality of network switch devices. The network device forwards the received packet to the selected logical switch fabric for transport across the physical switch fabric.

The present disclosure generally relates to improving the efficiency of a network switching fabric. Some aspects of the present disclosure relate to an apparatus that includes: multiple ports configured to interface with multiple hardware accelerators; multiple multiplexers configured to communicate with the ports via multiple input channels; multiple demultiplexers configured to communicate with the ports via multiple output channels; a first router coupled to the multiplexers and the demultiplexers via a set of header channels, the first router configured to route header portions of one or more messages; and a second router coupled to the multiplexers and the demultiplexers via a set of data channels, the second router configured to route data portions of the one or more messages.

The invention discloses a CXL switching structure based on dynamic link prediction, and the structure comprises a flow monitoring unit which is configured to monitor real-time flow data at an input port and an output port of each node; the link prediction unit comprises a data caching module and a link prediction engine, the data caching module is configured to record historical traffic data in unit time, and the link prediction engine is configured to predict the congestion probability of each path according to the historical traffic data by using a decision tree algorithm model; the self-adaptive path control unit is configured to endow the paths with corresponding data transmission weights based on a probability threshold mapping strategy according to the congestion probabilities of the paths and adjust a path mapping table in real time; and the feedback optimization unit is configured to update the decision tree algorithm model according to the historical flow data and the actual congestion result.

The invention discloses a protocol-level deadlock avoiding method and system based on a credit mechanism, and the method comprises the steps: 1, setting NP cache submodules on a plurality of receiving ports in a PCIe switching structure; wherein the plurality of receiving ports are respectively in communication connection with at least one sending port, and the NP cache submodules are in communication connection with the sending ports which are in communication connection with the corresponding receiving ports; 2, constructing a message polling request module, and enabling the message polling request module to be in communication connection with the plurality of NP cache sub-modules, so as to complete the construction of a queue back pressure structure under a credit linkage mechanism; and step 3, carrying out data transmission by using a queue back pressure structure under a credit linkage mechanism. According to the method and the device, the resource utilization rate in a complex scene is effectively improved while the performance of an exchange structure is not influenced, and a deadlock avoiding function of a blocking type message is effectively realized.

A network storage system comprises a first application node, storage nodes, and a switch fabric comprising switches providing data paths. Each data path connects the first application node to a storage node of the plurality of storage nodes. The system further comprises a control plane software agent. The control plane software agent configures the network storage system to receive, via the first application node, a request for storing a file, select a first storage node, initialize a file identifier for the file based on a network topology of the switch fabric and the storage nodes, and store the file on the first storage node. The file identifier describes the first storage node, a storage location in the first storage node, and a first data path of the data paths. The first data path includes a first set of switches connecting the first application node to the first storage node.

The embodiment of the invention relates to EVPN host routing bridging (HRB) and an EVPN cloud native data center. Techniques are described for an EVPN host routing bridge (HRB) and an EVPN cloud native data center with a host routing bridge (HRB). A host computing device of a data center includes one or more containerized user-level applications. The cloud native virtual router is configured to be dynamically deployed by a datacenter application orchestration engine and operable in a user space of the host computing device. The processing circuitry is configured to execute the containerized user-level application and the cloud native virtual router. The cloud native virtual router includes a containerized routing protocol process configured to operate as a control plane, and a data plane for the containerized router. The data plane is configured to operate an Ethernet virtual private network (EVPN) encapsulated / deencapsulated data path of the overlay network for communicating layer 2 (L2) network traffic of the containerized user application over a switching fabric of the data center.

The application discloses a CXL switching structure based on dynamic link prediction, comprising: a traffic monitoring unit configured to monitor real-time traffic data at the input port and the output port of each node; a link prediction unit comprising a data cache module and a link prediction engine, wherein the data cache module is configured to record historical traffic data within a unit time, and the link prediction engine is configured to predict the congestion probability of each path according to the historical traffic data by using a decision tree algorithm model; an adaptive path control unit configured to assign corresponding data transmission weights to each path based on a probability threshold mapping strategy according to the congestion probability of each path, and to adjust a path mapping table in real time; and a feedback optimization unit configured to update the decision tree algorithm model according to the historical traffic data and actual congestion results.

A network device includes one or more dies, wherein each die, of the one or more dies includes one or more packet forwarding components and a switch fabric component. The switch fabric component of a particular die, of the one or more dies, may be connected to the one or more forwarding components of the particular die, and may be configured to provide a switching plane for the one or more packet forwarding components of the particular die. A first die, of the one or more dies, may be connected to the one or more packet forwarding components of a second die of the one or more dies, and may be configured to provide a switching plane for the one or more packet forwarding components of the second die. The switch fabric component may be included in each of the one or more dies and the network device does not include a standalone switch fabric component.

One example method occurs at a testbed transpiler of a network test system. The method comprises: receiving test configuration information associated with a test session for configuring a test infrastructure, wherein the test infrastructure includes a switching fabric emulator comprising at least one switching application-specific integrated circuit (ASIC) or programmable switching chip, wherein the test configuration information includes information for configuring the switching fabric emulator to emulate one or more emulated switches; generating, using input regarding an updated test infrastructure and the test configuration information, updated test configuration information for configuring the updated test infrastructure, wherein generating the updated test configuration information includes transpiling or translating a portion of the test configuration information to generate configuration instructions for configuring a physical or non-emulated testbed element; and providing the updated test configuration information to the updated test infrastructure or a related test configuration manager.

An optical bypass system for interconnecting a plurality of data centers with a regional hub networking node includes an optical switching layer configured to receive a plurality of channels from each of the plurality of data centers, and to switch the plurality of channels from each of the plurality of data centers (1) between one another for optical bypass and (2) to an electrical switching fabric at the regional hub networking node; and a controller configured to (1) configure wavelengths on corresponding optical transceivers for each of the plurality of channels from each of the plurality of data centers, (2) configure wavelength switching in the optical switching layer, and (3) determine packet forwarding between the corresponding optical transceivers.

The invention provides a heterogeneous hybrid programmable switch fabric system and method. The system comprises three stages of target units, namely an ASIC (Application Specific Integrated Circuit) unit, an FPGA (Field Programmable Gate Array) unit and a CPU (Central Processing Unit) unit, which are sequentially arranged according to the processing rate from high to low; the ASIC unit is used for carrying out basic processing on the received data message to generate a data message in a preset format; the FPGA unit is used for receiving the data message from the ASIC unit, processing the received data message according to a rule and generating a data message in a preset format; and the CPU unit is used for receiving the data message from the ASIC unit and / or the FPGA unit, processing the received data message according to a rule and generating a data message in a preset format. According to the invention, diversified data processing requirements can be met.