Time sequence repairing method

Abstract

The invention discloses a time sequence repairing method, which is used for solving the problem of increase in chip design area caused by repair of a time sequence circuit during integrated circuit application by intervening with a clock channel and transferring a part of design problems of a data channel onto the clock channel. The method comprises the following steps of: analyzing the characteristic of a time sequence violating example; analyzing routes in which violating examples exists; when all routes of which start points of the violating examples serve as start points are provided with sufficient build-up time margins and all routes of which start points of the violating examples serve as end points are provided with sufficient build-up time margins, repairing and keeping a time sequence by increasing the clock delays of the start points of the routes; and when all routes of which end points of the violating examples serve as end points are provided with sufficient build-up time margins and all routes of which end points of violating examples serve as start points are provided with sufficient build-up time margins, repairing and keeping a time sequence by decreasing the clock delays of the end points of the routes. In the method disclosed by the invention, different clock delay design modes are selected, so that the circuit complexity of the integrated circuit chip design can be lowered effectively, and the chip design area is reduced.

Description

technical field [0001] The invention relates to a timing repair method, in particular to a timing repair method in integrated circuit layout design. Background technique [0002] Nowadays, multimedia has been widely used in people's daily life. Regardless of mobile phones, TVs, or game consoles, the design of their product chips requires perfect system functions and fast running speed. The speed determines the performance of the product, and the area of ​​the chip design directly determines the production cost. Therefore, on the premise of ensuring the correct function of the product, it is also necessary to ensure a sufficiently fast operating speed and a sufficiently small chip design area. [0003] There are several main factors that determine the operating speed and design area of ​​an integrated circuit chip: production process, code editing style, and implementation process from code to layout. Fixing timing is often one of the most important critical steps in the c...

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a timing repair method to solve the problem of increasing chip design area caused by the repair of sequential circuits in integrated circuit applications

Images