Multi-core DSP (digital signal processor) system-on-chip and data transmission method

Abstract

The embodiment of the invention provides a multi-core DSP (digital signal processor) system-on-chip and a data transmission method. The system comprises a main processor, multiple slave processors and an external memorizer, wherein each main processor and slave processor respectively comprise a processor core, a memorizer-on-chip and a direct memory access (DMA) controller, the main processor controls and accesses the external memorizer through an I / O (input / output) controller, data exchange can be realized among processors through an internet-on-chip, wherein the internet-on-chip is composed of a star network, a loop network and a serial network. The internet-on-chip provided by the embodiment of the invention combines the star network, the loop network and the serial network, so that the internet-on-chip can not only provide streaming data transmission with high bandwidth, but also provide short message transfer with low delay. Besides, the embodiment of the invention simplifies the access arbitration of the external memorizer through the software control of the main processor, reduces the synchronous operations among the multi-core processors through the network data buffer and lowers the complexity of the program design of the multi-core processors.

Description

technical field [0001] The invention relates to the field of digital signal processors, in particular to a multi-core digital processor on-chip system and a data transmission method. Background technique [0002] With the development of digital signal processing algorithms, the requirements for computing performance of digital signal processors are constantly improving, and traditional single-core processors have been difficult to meet the performance requirements of complex signal processing. The method usually adopted at present to improve processing capability is to use multi-core digital signal processors for parallel computing. Multi-core digital signal processors use multiple similar or heterogeneous processor cores or hardware acceleration units to cooperate with each other to shorten computing time by executing computing tasks in parallel. [0003] The multi-core digital signal processor with master-slave structure consists of a master processor and multiple slave p...

AI Technical Summary

Problems solved by technology

However, since the single-layer or multi-layer shared bus adopts hardware arbitrator and global address space allocation, with the increase of processors in the on-chip multi-core processor, the address space becomes larger, the hardware arbiter design is more complicated, and the hardware design overhead increases

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