Semiconductor Package and Method for Fabricating the Same

Abstract

A semiconductor package includes a wiring substrate, a semiconductor chip, and a conductor plate in order to reduce a voltage drop at the central portion of a chip caused by wiring resistance from a peripheral connection pad disposed on the periphery of the chip in the semiconductor package. Central electrode pads for use in ground/power-supply are disposed on the central portion of the chip. The conductor plate for use in ground/power-supply is disposed on the chip such that an insulating layer is disposed therebetween. The central electrode pads on the chip and the conductor plate are connected together by wire bonding through an opening formed in the insulating layer and the conductor plate. An extraction portion of the conductor plate is connected to a power-supply wiring pad on the wiring substrate. The central electrode pads and the conductor plate may also be connected together using gold stud bumps. Preferably, the conductor plate is composed of a multilayer structure of two or more layers, and each conductor plate is used in power-supply wiring or ground wiring.

Description

TECHNICAL FIELD[0001]The present invention relates to a semiconductor package mounted on a circuit board. In particular, the present invention relates to a semiconductor package structure for reducing a voltage drop at a central portion of a semiconductor chip in a ball grid array (BGA) package and to a method for fabricating the same.BACKGROUND ART[0002]Examples of a surface-mount package for a semiconductor chip include BGAs and quad flat packages (QFPs). A BGA is a surface-mount package developed for a large scale integrated circuit (LSI) that has more pins than those in a QFP, which is a flat package that has leads extending in four directions. BGAs are very much used, as semiconductor packages for high-speed devices, in portable machines, such as cellular phones, or personal computers. A BGA package is joined to a mounting board by use of conductive balls (bumps) arranged in an array on its back as external terminals, instead of using a lead frame. Because the entire back surfa...

AI Technical Summary

Benefits of technology

[0013]In accordance with the present invention, electric power can be supplied to the central portion of the chip through a conductor plate having small electric resistance. Therefore, compared with when connections are established only by high resistance wiring, a voltage drop at the central portion of the chip can be more reduced. In addition, the placement of a pad to be arranged

Problems solved by technology

This may cause instabil

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