29 results about "Push–pull output" patented technology

The invention discloses a high-voltage power amplifier with an over-temperature and over-current protection circuit, and relates to the technical field of integrated circuits. The high-voltage operational amplifier comprises a high-voltage operational amplifier core unit and a self-adaptive protection circuit unit, the high-voltage operational amplifier core unit comprises a rail-to-rail input stage, a gain amplification stage and an AB type push-pull output stage which are sequentially cascaded, and the AB type push-pull output stage comprises a PMOS upper power tube and an NMOS lower power tube; the self-adaptive protection circuit unit comprises a PMOS (P-channel Metal Oxide Semiconductor) current-limiting protection circuit, an NMOS (N-channel Metal Oxide Semiconductor) current-limiting protection circuit and an over-temperature protection circuit; the PMOS current-limiting protection circuit is used for generating a high-voltage domain over-current control signal when the power tube on the PMOS is over-current; the NMOS current-limiting protection circuit is used for generating a low-voltage domain overcurrent control signal when the NMOS lower power tube is in overcurrent; the over-temperature protection circuit is used for generating high-voltage domain over-temperature turn-off signals and low-voltage domain over-temperature turn-off signals when the amplifier is over-temperature; and finally, carrying out logic synthesis on the corresponding over-current control signal and the over-temperature turn-off signal to generate a gate clamping signal.

The invention relates to a two-way current smooth switching system and method without crossover distortion and a double-quadrant power supply, and the system comprises a signal setting unit, a dynamic bias ClassAB push-pull output unit, a feedback sampling unit and a control processing unit. According to the dynamic bias ClassAB push-pull output unit, static micro-conduction bias is provided for N-type and P-type power tubes in a push-pull output subunit through an internal bias subunit, and closed-loop control is combined, so that continuous and smooth transition can be realized when system output current is switched at a zero crossing point in the positive and negative directions, and the system stability is improved. And the problems of crossover distortion and switching dead zone existing in the traditional bidirectional power supply are thoroughly eliminated. According to the invention, high-efficiency, high-speed and distortionless bidirectional current output is realized, the system structure is simplified, and the system can be widely applied to the fields of high-precision test power supplies, battery simulators, servo drivers and the like.

The invention provides a software operation synchronization method and system based on a dual-chip architecture, and abandons a traditional mode depending on a UART / SPI / CAN communication protocol or an additional synchronization circuit. Firstly, a unique PWM duty ratio mapping relation with any difference not smaller than 5% is preset for the initial state, the system self-checking state, the OTA upgrading state, the running state, the fault state, the dormancy preparation state and other running states of the double-chip system, and then a chip A and a chip B continuously output PWM signals matched with the current states of the chip A and the chip B through common GPIO pins in a push-pull output mode. Meanwhile, PWM signals of GPIO pins of the opposite side are collected in real time in a bidirectional mode through respective hardware capture units, the duty ratio is analyzed to obtain the state of the opposite side, response operation is executed according to preset logic, synchronization failures caused by communication delay and data frame error codes of a traditional software protocol are effectively avoided, the system stability is guaranteed, meanwhile, a complex protocol stack does not need to be designed, and the cost is reduced. The CPU load rate is reduced, an additional synchronous circuit is omitted, the chip area and power consumption are reduced, and the hardware cost is reduced.

The utility model discloses an AC charging pile CP signal generating circuit, comprising a level conversion module and a push-pull output module, the level conversion module is used for converting a PWM signal output by an IO port of an MCU into a + / -12V CP signal, and the push-pull output module is connected to the level conversion module and is used for driving high and low level switching of the CP signal. The level conversion module comprises a resistor R1, the left end of the resistor R1 is connected with PWM signals output by an IO port of the MCU, the right end of the resistor R1 is connected with base electrodes of triodes Q2 and Q3, emitting electrodes of the triodes Q2 and Q3 are connected and connected with the lower end of a resistor R2 and the upper end of a resistor R3, the lower end of the resistor R2 is connected with the upper end of the resistor R3, the upper end of the resistor R2 is connected with a + 3.3 V power source, the lower end of the resistor R3 is grounded, and the lower end of the resistor R3 is grounded. The circuit provided by the utility model is simple, and the cost is lower.

Disclosed in the present invention are a low-voltage differential signaling device and a low-voltage differential signaling driver. An output circuit of the low-voltage differential signaling driver comprises a first current source and a differential push-pull output circuit, wherein the first current source is connected between a power source end and the differential push-pull output circuit, and the differential push-pull output circuit is connected to a differential output end of the low-voltage differential signaling driver, and is used for generating a first output voltage and a second output voltage on the basis of a first input signal and a second input signal. A turn-off circuit of the low-voltage differential signaling driver is connected to the differential output end of the low-voltage differential signaling driver and is used for turning off the first current source by using a short-circuited power source on the differential output end when the low-voltage differential signaling driver is in a leakage protection state. A first end of a substrate clamping circuit of the low-voltage differential signaling driver is connected to the power source end, and a second end thereof provides a substrate potential to a MOS transistor in the first current source. When the low-voltage differential signaling driver is in the leakage protection state, the substrate clamping circuit is in an off-state in the direction from the second end to the first end, such that effective leakage protection can still be performed on the low-voltage differential signaling driver when the low-voltage differential signaling driver is in a power-off state.

This invention discloses a driving circuit system and adaptive frequency modulation method for an ultrasonic transducer. The driving circuit system, used to adjust the driving frequency of the ultrasonic transducer, includes a microcontroller processing unit, a driving signal enhancement circuit, a push-pull output driving circuit, a high-frequency transformer, an ultrasonic transducer impedance matching circuit, a push-pull output driving current sampling circuit, a high-frequency transformer output voltage sampling circuit, and a power supply circuit. The adaptive frequency modulation method involves the microcontroller processing unit searching for the resonant operating frequency of the ultrasonic transducer under the current operating environment through the driving circuit in the initial state; and adaptively adjusting the ultrasonic transducer to the resonant frequency during operation. This invention achieves adaptive dynamic frequency adjustment of the ultrasonic transducer without manual tuning; furthermore, since the frequency range is F0±FC, the frequency adjustment range is wide; and the hardware technology is simple, with few components and low cost.

The application discloses a low-voltage differential signal device and a driver thereof, wherein the output circuit of the device comprises a first current source and a differential push-pull output circuit, the first current source is connected between a power supply end and the differential push-pull output circuit, the differential push-pull output circuit is connected with a differential output end of the driver, and is used for generating a first output voltage and a second output voltage according to a first input signal and a second input signal; the turn-off circuit is connected with the differential output end of the driver, and is used for turning off the first current source by using a short-circuit power supply on the differential output end when the driver is in a leakage protection state; the first end of the substrate clamping circuit is connected with the power supply end, the second end provides a substrate potential for a MOS tube in the first current source, and when the driver is in the leakage protection state, the substrate clamping circuit is in a turn-off state from the second end to the first end, so that the low-voltage differential signal driver can also be effectively protected from leakage when the low-voltage differential signal driver is in a power-off state.

This invention provides an operational amplifier, chip, and electronic device, comprising: a differential input stage for receiving a differential input signal; a bias generation circuit for generating a bias signal based on the differential input signal; a push-pull output stage for generating an output signal based on the bias signal; a first overload recovery circuit for pulling up the control terminal voltage of the upper transistor of the push-pull output stage when the output signal of the push-pull output stage is greater than a preset upper limit; and a second overload recovery circuit for pulling down the control terminal voltage of the lower transistor of the push-pull output stage when the output signal of the push-pull output stage is less than a preset lower limit. The operational amplifier, chip, and electronic device of this invention accelerate overload recovery through the overload recovery circuit, limiting the overload recovery time to within 100ns, making it suitable for high-speed applications; and maintaining the stability of the operational amplifier loop under both low and high power supply voltage conditions.

The application discloses a voltage detection method and device, terminal equipment and a computer readable storage medium, wherein when the battery module supplies power to the MCU controller, a voltage detection signal is acquired based on the push-pull output end of the MCU controller; the MCU controller supplies power to the reference module based on the voltage detection signal, and an input reference value of the reference module is acquired through the first digital-analog conversion channel of the MCU controller; the voltage value of the battery voltage provided by the battery module is determined according to the input reference value and the register value of the first digital-analog conversion channel; and the pin voltage value corresponding to the second digital-analog conversion channel in the MCU controller is detected according to the voltage value. The push-pull output end in the MCU controller is integrated with a push-pull output unit, so that the leakage current phenomenon is avoided, and the cost and power consumption of voltage detection through the MCU controller are reduced.

This invention relates to the field of gate drive circuit technology and discloses a gate drive circuit with adjustable pull-in / pull current capability, including a first-stage level shift circuit, a second-stage level shift circuit, a signal shaping and enhancement circuit, and a configurable push-pull output circuit. The first-stage level shift circuit generates a clamping voltage rail to limit the signal swing; the second-stage level shift circuit converts the ground potential logic signal into a high-voltage floating signal; the signal shaping and enhancement circuit performs waveform shaping and power amplification on the signal. The configurable push-pull output circuit includes multiple parallel push-pull drive branches, divided into normally-operated basic drive branches and optional drive branches controlled by digital signals. This invention dynamically adjusts the total equivalent channel width of the output stage transistor by changing the number of parallel branches in operation, providing a large current to reduce losses when driving large loads and limiting the current to suppress electromagnetic interference when driving small loads, thus achieving flexible adaptation of drive characteristics to load requirements.

The invention discloses an MOS tube optical isolation driver based on a triode push-pull acceleration circuit, and belongs to the field of power electronic driving. The driver comprises a signal isolation stage, an intermediate driving stage and a push-pull output stage, the signal isolation stage realizes electrical isolation of an input control signal and the power driving circuit through photoelectric coupling; the intermediate driving stage converts a weak signal output by the optocoupler into a high-level driving signal; the push-pull output stage utilizes the current amplification characteristic of a complementary triode to form symmetrical push-pull output. Through the Q2 / Q3 push-pull circuit, the grid charging current is increased to 300mA (provided by Q2), the discharging current is increased to 200mA (provided by Q3), the switching delay is reduced to be smaller than or equal to 400ns and smaller than or equal to 600ns, and the highest switching frequency of 800kHz is supported.

The invention provides an operational amplifier, a chip and electronic equipment, and the operational amplifier comprises a differential input stage which receives a differential input signal; a bias generation circuit generating a bias signal based on the differential input signal; a push-pull output stage generating an output signal based on the bias signal; the first overload recovery circuit pulls up the control end voltage of the upper tube of the push-pull output stage when the output signal of the push-pull output stage is greater than a preset upper limit; and the second overload recovery circuit pulls down the control end voltage of the lower tube of the push-pull output stage when the output signal of the push-pull output stage is smaller than a preset lower limit. According to the operational amplifier, the chip and the electronic equipment, overload recovery is accelerated through the overload recovery circuit, the overload recovery time can be limited within 100 ns, and the operational amplifier, the chip and the electronic equipment are suitable for high-speed application scenes; and the stability of the operational amplifier loop can be maintained under the conditions of low power supply voltage and high power supply voltage.

An RS485 driver control circuit relates to the integrated circuit technology and comprises a three-state inverter, a switch tube push-pull output circuit and a biasing circuit, the switch tube push-pull output circuit comprises a first high-voltage DEMOS tube, a current output end is connected with a reference point Vpx, a first switch tube is arranged between a gate end and the reference point Vpx, and the gate end is connected with a positive push-pull control end; the current input end of the second high-voltage DEMOS tube is connected with the reference point Vpx, the current output end of the second high-voltage DEMOS tube is connected with the bus connecting end, a second switching tube is arranged between the gate end and the reference point Vpx, and the gate end is connected with the positive push-pull input end; the current input end of the third high-voltage DEMOS tube is connected with the bus connecting end, the current output end of the third high-voltage DEMOS tube is connected with the reference point Vnx, a third switching tube is arranged between the gate end and the reference point Vnx, and the gate end is connected with the negative push-pull input end; the current input end of the fourth high-voltage DEMOS tube is connected with the reference point Vnx, the current output end of the fourth high-voltage DEMOS tube is grounded, a fourth switching tube is arranged between the grid end and the reference point Vnx, and the grid end of the fourth high-voltage DEMOS tube is connected with the negative push-pull control end. According to the invention, the data transmission rate and the push-pull output swing are improved.

The invention relates to an operational transconductance amplifier. The improved OTA may include an input circuit arranged to receive a differential voltage input; a load circuit arranged to measure a positive branch current and a negative branch current from the input circuit; a bias circuit arranged to determine a bias voltage based on the negative branch current; a folded current branch circuit arranged to generate an adaptive bias current; and a pass transistor configured to adjust an amount of the adaptive bias current based on the bias voltage; and a push-pull output circuit configured to draw a current based on the adjusted adaptive bias current. The folded current branch circuit may generate an adaptive bias current based on the measured negative branch current. An output circuit may supply a current based on the measured positive branch current. Advantageously, most transistors may have a minimum size.

The application discloses a GPIO module, a single bus communication expansion chip and a communication system, and belongs to the technical field of communication. The GPIO module comprises a GPIO logic circuit, an address decoding circuit and a plurality of IO circuits. A single bus expansion end is arranged in each IO circuit; the address decoding circuit is used for enabling the IO circuit with a matched channel address and channel address signal; the single bus expansion end in the enabled IO circuit is in communication with a single bus data line; the GPIO logic circuit is used for generating an enhanced output control signal according to the level transmitted on the single bus data line when an effective level of a reinforced drive control signal is received and a read-write control signal is a level corresponding to a write instruction; and the enabled IO circuit performs push-pull output on the single bus expansion end in response to the enhanced output control signal. The embodiment of the application can realize the expansion of a single single bus data line to a plurality of single bus expansion ends, and saves the IO resources of a host end.

The invention discloses a battery simulator based on a switching power supply. The battery simulator comprises a switching power supply module, and a push-pull output circuit module, a choke change-over switch circuit module and a current detection and working mode control circuit module which are additionally arranged at the periphery of the switching power supply module. The battery simulator has three working modes through mutual cooperation of the four modules, can automatically switch the working modes according to the current change of a load, can also set constant current or constant voltage output through a program instruction, has the output voltage being positive voltage or negative voltage and the output current being positive current or negative current, and has bidirectional current capability. According to the invention, the switching power supply which can only output current unidirectionally has the capability of bidirectionally outputting current of a battery simulator, meanwhile, the advantages of high energy conversion efficiency and easy heat dissipation design of the switching power supply are maintained, under the constraint of the space volume of an instrument, larger output current can be realized, and meanwhile, the cost and the energy consumption are reduced.

The invention provides a circuit and a device capable of realizing frequency multiplication of a pulse signal, and the circuit comprises a push-pull output sub-circuit, a high-level trigger sub-circuit, and a low-level trigger sub-circuit. The input ends of the high-level trigger sub-circuit and the low-level trigger sub-circuit are used for accessing input signals; the output end of the high-level trigger sub-circuit and the output end of the low-level trigger sub-circuit are connected with the input end of the push-pull output sub-circuit. The high-level trigger sub-circuit is used for controlling the push-pull output sub-circuit to output a pulse signal when the input signal is at a high level, and the low-level trigger sub-circuit is used for controlling the push-pull output sub-circuit to output the pulse signal when the input signal is at a low level. The method has the beneficial effects that the circuit design does not depend on a specific chip assembly, so that the flexibility and independence of the system are enhanced, and the product design is not limited by the influence of technical blockade any more.

This invention discloses a three-stage operational amplifier active network Miller compensation circuit, belonging to the field of electronic circuits, including a first capacitor C. C1 Second capacitor C C2 Third capacitor C L NMOS transistors MN1-MN7 and PMOS transistors MP1-MP8; NMOS transistors MN1-MN4 and PMOS transistors MP1-MP5 constitute the first gain stage of the operational amplifier, which is a folded cascode input structure; NMOS transistor MN5 and PMOS transistor MP6 constitute the second gain stage of the operational amplifier, which is an inverting amplification structure; NMOS transistors MN6 and PMOS transistors MP7-MP8 constitute the third gain stage of the operational amplifier, and NMOS transistor MN7 is a feedforward gain stage. Together, they form a pseudo-Class AB push-pull output structure, which can improve the driving capability of the operational amplifier output for capacitive loads; the first capacitor C C1 Second capacitor C C2 To compensate for the capacitor, NMOS transistor MN2 is an active transconductance feedback compensation stage. This invention compensates based on the transconductance gain stage inherent in the three-stage operational amplifier's structure, eliminating the need for additional components, simplifying logic design, and reducing circuit power consumption. After compensation, the zero point in the left half-plane of the loop is moved to the right half-plane, significantly improving the circuit's phase margin and stability.

The invention discloses a push-pull output circuit with an anti-backflow and anti-pumping function, which relates to the field of electronic circuits and comprises a voltage selection module, an upper output stage, an upper series control unit, a lower output stage, a lower series control unit and a grid setting circuit, the voltage selection module C5 selects higher voltage in VDD and VOUT voltage as HIGH signal output, and selects lower voltage in GND and VOUT voltage as LOW signal output; the M3 of the upper series control unit is connected in series between the grid electrode of the M1 and the preceding-stage driving tube M7, the source electrode of the M4 is connected with an HIGH signal, and the drain electrode is connected with the grid electrode of the M1; the M5 of the lower series control unit is connected in series between the grid electrode of the M2 and the M9, the source electrode of the M6 is connected with a LOW signal, and the drain electrode is connected with the grid electrode of the M2; according to VDD, an enable signal ENP level and a VOUT state, each tube is controlled to be switched on and switched off, data transmission is ensured during normal work, and current backward flowing or backward pumping is blocked during a high resistance state or when a power supply stops supplying power and VOUT is abnormal.

The application relates to the technical field of integrated circuits, in particular to an error amplifier, a power supply chip and an electronic device, wherein the error amplifier comprises a differential amplification stage, a push-pull output stage and a compensation output stage; the differential amplification stage comprises a differential input pair tube and a voltage reduction triode; the voltage reduction triode is arranged at an input end of the differential input pair tube; the differential amplification stage is used for amplifying a differential input; the voltage reduction triode is used for reducing the input voltage of the differential input pair tube so as to improve the input voltage margin of the error amplifier; the push-pull output mode is adopted to increase the bandwidth of the error amplifier; based on the principle of the error amplifier, the push-pull output mode is adopted to increase the bandwidth of the error amplifier; based on the design requirement of a low-voltage and high-threshold voltage circuit, the error amplifier can work normally in the low-voltage and high-threshold voltage circuit, and the structure is simple and easy to realize.

The application provides a driving circuit, a chip and an electronic device. A control port of a logic device in the driving circuit is connected with a first end of a first switch unit and a first end of a second switch unit respectively. A second end of the first switch unit is connected with a driving power supply, and a second end of the second switch unit is grounded. An anti-backflow unit is connected with a third end of the first switch unit and a third end of the second switch unit respectively. A wiring terminal is led out between the anti-backflow unit and the second switch unit, and is used as an output end of the driving circuit. A control signal input end of the anti-backflow unit and a control signal input end of the first switch unit are used for switching the driving circuit to a target driving mode when corresponding control signals are acquired. The target driving mode includes a drain open circuit driving mode and a push-pull output driving mode. The anti-backflow unit is arranged, so that current backflow and a large leakage current are avoided, and the logic device can output correct driving high level.

This invention discloses a high-frequency driving system for power semiconductor devices, comprising: an input signal filtering module, a high-speed driving and isolation processing module, an isolated high-speed push-pull gate driving module, and a gate output and absorption network module, cascaded in sequence. The input signal filtering module performs high-frequency noise suppression, PWM signal shaping, and spike pulse limitation on the PWM signal output by the microcontroller. The high-speed driving and isolation processing module isolates the PWM signal and converts the isolated PWM signal into a high-speed gate driving signal. The isolated high-speed push-pull gate driving module includes an isolated power supply module, a multi-stage decoupling network, and a push-pull output stage. The gate output and absorption network module performs shaping, current limiting, vibration absorption, and high-frequency energy compensation on the gate charging and discharging process of the power semiconductor device. It provides a high-frequency driving circuit for power devices with low parasitic inductance in the driving circuit, strong staged adjustable driving capability, and excellent anti-misoperation capability.

The invention relates to an active interference compensation circuit (35) for an electronic device and a method (60) for operating an active interference compensation circuit (35) for an electronic circuit. The active interference compensation circuit (35) comprises an amplification circuit (36). The amplification circuit (36) includes a push-pull output stage (12) with at least two transistors (14A, 14B) coupled together, wherein an output node (16) is coupled between the transistors (14A, 14B). The output node (16) is coupled to an output (20) of the amplification circuit (36). A bias voltage for the transistors (14A, 14B) of the push-pull output stage (12) is provided using a rubber diode (37), so that the transistors (14A, 14B) of the push-pull output stage (12) are biased.

The invention provides an evaluation unit (100) for evaluating an output signal of a push-pull output of a proximity switch (400), comprising - an electrical circuit (200) with at least one input (430) and a first and second output (531, 532; 541, 542), wherein the input (430) is connectable to the push-pull output of the proximity switch (400), and wherein the electrical circuit (200) is configured to output a signal at the first output (531, 532) when the input (430) is switched to a positive potential, and to output a signal at the second output (541, 542) when the input (430) is switched to ground, and - at least one evaluation logic (310, 320) connected to the first and second outputs of the electrical circuit, which is designed to detect an error condition. Furthermore, the invention provides for a system with a proximity switch and such an evaluation unit.

The application discloses an I2C interface and an interface chip, the I2C interface comprises a push-pull output module and a data interface; the push-pull output module is used for controlling the in-chip data signal of a target chip to be output from the data interface to outside the chip in response to a first configuration signal, and the first configuration signal is used for representing that the I2C interface is configured as a push-pull mode in an I3C mode. The application controls the in-chip data signal of the target chip to be output from the data interface to outside the chip based on the push-pull mode in the I3C mode in response to the first configuration signal through the push-pull output module, so that the I2C interface of the application can be compatible with the push-pull mode in the I3C mode, the communication rate is greatly improved, the application scene of the I2C interface is expanded, and the adaptability is more extensive.

According to the wind power frequency conversion driving signal optimization method provided by the invention, a driving signal at the front end of an FS450R17KE3 type IGBT (Insulated Gate Bipolar Translator) is improved from 5V difference to 15V single end, so that the anti-interference capability of the driving signal is stronger, signal isolation, logic correction and driving enhancement processing are optimized, and the signal driving reliability is improved, so that the stable operation of a frequency converter power module is guaranteed, and the service life of the frequency converter power module is prolonged. The equipment failure rate is reduced. Setting an adapter plate connected with the main control board, and receiving a differential driving signal output by the main control board; in the adapter plate, the differential driving signal is converted into a single-end driving signal with a higher voltage amplitude; transmitting the converted single-ended driving signal to a driving board through a transmission line; in the driving board, isolation, logic correction and push-pull output are sequentially carried out on the received single-end driving signal, and a final driving signal used for controlling the IGBT is generated.

This application belongs to the field of integrated circuit technology and discloses a high-slew rate linear drive amplifier, including a push-pull current input module, a power consumption control module, and a push-pull output module connected in sequence. The push-pull current input module includes a pull-up current transistor, a pull-down current transistor, a first unidirectional path, a second unidirectional path, and a push-pull current branch. The push-pull current branch includes a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, and a second PMOS transistor. The sources of the pull-up current transistor and the pull-down current transistor are connected. The positive terminal of the first unidirectional path is connected to the drain of the pull-up current transistor, and the negative terminal is connected to the drain of the first NMOS transistor. The positive terminal of the second unidirectional path is connected to the drain of the second PMOS transistor, and the negative terminal is connected to the drain of the pull-down current transistor. This application enables each MOS transistor to always operate in the saturation region, avoiding the decrease in slew rate caused by rapid changes in input current.

A radio-frequency and pulsed-radio-frequency switchable power amplifier circuit, comprising: a crystal oscillator circuit, a radio frequency signal amplifier circuit, and a control signal conditioning circuit, wherein the control signal conditioning circuit comprises a radio-frequency and pulsed-radio-frequency switching control circuit and a class-E control signal amplifier circuit, the class-E control signal amplifier circuit being connected to a class-AB power amplifier circuit and a power combining and filtering circuit in sequence; a radio frequency signal is generated by means of a crystal oscillator, and a pulsed radio frequency signal or a radio frequency signal is output by means of adjusting the frequency and duty cycle of a pulse control signal; subsequently, the signal is amplified by means of the class-E power amplifier circuit, and the amplified signal is split by means of a transmission line transformer into a group of class-AB power amplifier circuit control signals having equal amplitudes and a phase difference of 180°; the class-AB power amplifier circuit is formed by two paths that are connected in parallel, each path consisting of four class-AB push-pull output modules, and two radio-frequency MOSFETs in each module forming a class-AB push-pull output; and finally, a power-combining magnetic device performs power combining and filtering output. Quick switching between a radio-frequency mode and a pulsed-radio-frequency mode of a high-power power supply is realized, thereby ensuring stable output in different output modes, and improving the applicability of a high-power radio frequency power supply in complex situations.

The invention discloses an over-current protection system and method for a push-pull output circuit, the system comprises an amplifier output stage circuit, a bias voltage generation circuit and an over-current protection circuit, the amplifier output stage circuit is provided with a transconductance linear ring, output tubes MP1 and MN1, and clamping tubes MP2 and MN2 which are respectively connected in series with the output tubes MP1 and MN1; the bias voltage generating circuit mirrors the current in the bias generator through current sources IP1 and IN1; the overcurrent protection circuit adopts MOS (Metal Oxide Semiconductor) transistors MP3, MP4, MN3 and MN4 which are connected by diodes to form a bias branch; when the output node has a short-circuit fault, the grid-source voltage of the clamping tube changes adaptively, so that the maximum output current of the output tube is reduced to be consistent with the maximum output current of the clamping tube, a current limiting value is formed, and rapid limiting of the output current is realized. Stability and reliability of the push-pull output circuit under extreme working conditions are ensured, safety of the push-pull output circuit is remarkably improved, and the service life of the push-pull output circuit is remarkably prolonged.