196 results about "Digital line" patented technology

The invention relates to the technical field of equipment full-life-cycle management, in particular to an equipment full-life-cycle tracing and management and control system based on digital threads. Comprising a digital thread generation unit which is used for generating a dynamic digital thread penetrating through the whole life cycle of technical improvement purchasing, operation maintenance and decommissioning of equipment; a full life cycle data integration unit; and a business process management and control unit. According to the method, a dynamic digital thread which runs through the whole life cycle of technical improvement purchasing, operation overhaul and decommissioning of equipment is constructed, and a multi-dimensional data anchoring algorithm fused with weighted Bayesian estimation is combined, so that probabilistic association matching between heterogeneous physical data in each stage and a corresponding physical scene is realized; and a unique device identifier is bound to form dynamic association of physical state-data record-time node, so that the problems of fragmentation of data in the whole life cycle of the device and lack of association between the data and a physical scene in the prior art are solved.

The invention provides a cross-system cooperative control method and system based on a digital thread, and the method comprises the steps: building a cross-system interaction architecture, and building real-time data transmission and instruction interaction among a plurality of business systems through a distributed node communication protocol; collecting dynamic operation characteristic data of each service system based on the cross-system interaction architecture, and generating a cross-system cooperative control logic; converting the cross-system cooperative control logic into a standardized control instruction, distributing the standardized control instruction to a corresponding service system, executing real-time cooperative control, and collecting state feedback characteristics in a control process; performing dynamic deviation analysis on the state feedback characteristics to generate cooperative control strategy adjustment parameters; and synchronizing the cooperative control strategy adjustment parameter to each service system through the cross-system interaction architecture. According to the invention, the efficiency of cross-system cooperative control is improved.

The invention discloses a building height extraction method, device and equipment, a medium and a program product, and the method comprises the steps: carrying out the matching positioning of a remote sensing satellite image of a target region through a digital elevation model and a digital orthoimage of the target region; then obtaining the bottom elevation of a target building in the target area through the digital elevation model; according to the bottom elevation, the vector contour of a target building in a digital line map is registered with the digital orthoimage and the remote sensing satellite image after matching and positioning, and the absolute roof elevation of the target building is obtained; and finally, determining the building height of the target building according to the bottom elevation and the absolute roof elevation, thereby realizing accurate registration of the vector contour of the building and improving the automatic extraction accuracy of the building height data of the building.

The invention discloses a multi-agent collaborative short play digital production system, which belongs to the technical field of artificial intelligence, and comprises a data and state management module driven by a digital thread, which uniformly manages and synchronizes data, states and decisions of all production links through a throughout digital thread; the full-process intelligent production module takes an intelligent control center as a core, decomposes and dispatches a complex task to five professional intelligent agents for cooperative execution, and covers a complete production link from script generation, visual preview, video shooting and special effects to intelligent editing and final sound and picture synthesis; the man-machine collaborative evaluation and feedback closed-loop module provides an interactive interface for human experts to supervise, guide and correct key production nodes and records artificial decisions as feedback to form a closed loop of a continuous optimization system; according to the multi-agent collaborative short play digital production system provided by the invention, the digital thread penetrates through multi-agent collaboration, so that data tracing and state synchronization of the whole process of short play production can be realized, challenges such as narrative continuity, cross-modal consistency and physical authenticity are effectively solved, and the quality of generated content and the production efficiency are remarkably improved.

Methods and systems for generating a sharable digital thread orchestration script related to an input digital model on a digital platform are provided. The method includes retrieving a given digital model file of a given digital model; determining characteristic attributes of the given digital model; identifying a predicted digital model similar to the given digital model and a predicted digital thread orchestration script involving the predicted digital model; generating a graph-based representation of the predicted digital thread orchestration script and adding to a training dataset for a machine learning (ML) engine comprising a Graph Neural Network (GNN); receiving a user request indicative of a digital task involving the input digital model; generating, using the ML engine and based on the user request, a graph-based representation of the sharable digital thread orchestration script, wherein the sharable digital thread orchestration script, when executed by the digital platform, implements the digital task.

The invention discloses a dynamic calibration control method for the detection precision of a non-standard automatic testing fixture, and particularly relates to the field of industrial automation and control, which comprises the following steps of: constructing a real-time dynamic error field model of the testing fixture; a distributed optical fiber sensing network and a miniature laser interferometer cooperatively collect real-time detection data and spatial-temporal variation errors under a multi-physics coupling effect, a precision degradation track is predicted based on spatial-temporal variation error data, a pre-compensation signal is generated, and a self-adaptive Kalman filtering algorithm is adopted to generate a precision compensation parameter. Environment temperature, vibration and electromagnetic interference data are monitored in real time, environment disturbance data are generated, a hybrid controller combining nonlinear model predictive control and reinforcement learning is adopted, multi-source data are fused, a calibration instruction is generated through multi-target optimization, and an execution mechanism is driven to achieve online dynamic calibration. And digital threads and transfer learning are integrated to realize full-life-cycle data closed-loop management and continuous optimization.

Methods and systems for generating live digital documents are provided. The method includes receiving a static document file including human-readable data. Then, parsing the static document file into a plurality of subunits. Then, generating a sharable document splice of the static document file. The sharable document splice includes access to a subset of the plurality of subunits, and the access is provided through an Application Programming Interface (API) or Software Development Kit (SDK) endpoint for each subunit in the subset. Then, executing a digital thread script to generate the live digital document from the sharable document splice and an input digital model representation, using API or SDK endpoints in the sharable document splice. The live digital document is configured through the digital thread script to reflect changes in the input digital model representation. Finally, adding execution metadata for the execution of the digital thread script to the live digital document.

The invention relates to the related technical field of equipment life cycle management, in particular to an aviation equipment full life cycle management method and system based on a digital thread. Determining main data of a first digital thread and a first-layer associated test sequence and main data of a second digital thread and a second-layer associated test sequence, mapping the deviation between a physical equipment state and a virtual simulation state, and identifying a performance difference point under a cross-stage data association link; and setting a management strategy for collaborative optimization. The technical problem that the reliability of aeronautical equipment is limited due to the fact that a cross-stage performance difference point equipment performance fluctuation root positioning fuzzy cannot be recognized in real time is solved, first and second digital thread main data and an associated test sequence are constructed, the deviation between physical equipment and a virtual simulation state is accurately mapped, and the reliability of the aeronautical equipment is improved. And a management strategy is set in combination with dual-thread data and performance difference points, and full-life-cycle collaborative optimization is performed, so that the technical effect of equipment reliability is effectively improved.

The invention discloses a road bridge pipeline pre-embedded slotting positioning method and system based on image recognition, and the method comprises the steps: carrying out the image collection of a target construction region through a sensor, sequentially carrying out the distortion correction, scale normalization, graying and image enhancement processing of the collected image, and obtaining a to-be-registered field image; extracting feature points in the reference digital line map and the to-be-registered field image by using an AKAZE algorithm, and mapping pipeline point design coordinates in the reference digital line map into a pixel coordinate system of the to-be-registered field image according to the homography matrix; identifying a to-be-registered field image by adopting a semantic segmentation-based model to obtain an obstacle edge coordinate; and performing overlay analysis on the mapping design pipeline coordinates and the obstacle edge coordinates based on a path planning algorithm, and outputting an optimal grooving path. Construction conflicts caused by neglecting on-site subtle changes in a traditional method are avoided, and the reliability and quality of the pre-embedded project are improved.

The invention discloses a method and a system for generating a power restoration strategy of a power distribution network, which are used for solving the technical problem that safe power restoration cannot be realized even if the topology is connected after the power distribution network fails due to the fact that the existing power restoration strategy generating method of the power distribution network only recovers line connection according to the topological connectivity of the power grid. The method comprises the following steps: acquiring three-phase voltage and current data of a plurality of monitoring points after a fault of the power distribution network, and determining a non-fault power recovery path in the power distribution network according to the three-phase voltage and current data of the plurality of monitoring points; performing reactive power characteristic analysis on the distributed power supply in the non-fault power recovery path to generate a plurality of power distribution network self-healing strategies; and screening the plurality of power distribution network self-healing strategies based on a preset digital line model, and determining a power restoration strategy of the target power distribution network.

A reference blade that allows a user to attach a reference surface to the body of a tape measuring device to allow for integrated measuring and marking / scribing a full line. The tape measuring device may be a digital linear tape measure. The reference blade couples to the body of the tape measure, which both secures the blade to the body as well as allows it to be removably detached and thereafter re-attached to the body at a specific and repeatable working location. The reference blade comes in a variety of sizes, shapes, and geometries and may be stored (in a different mounting state or attached) to the tape measure or externally. The reference blade addresses the need to provide the user with a sufficiently long surface that can be used for marking.

The invention provides a full-life-cycle health management system and method for radar security and protection equipment, belongs to the technical field of equipment monitoring, and solves the technical problems of low equipment health state precision and lack of security and protection maintenance decisions caused by incapability of monitoring the full life cycle of radar equipment in the prior art. The system comprises a data acquisition module used for acquiring and recording full life cycle data of equipment; the digital thread data processing module is used for constructing a time sequence feature sequence and carrying out data association to obtain a digital thread data chain; a health prediction module which carries a CNN time sequence prediction model and carries out health state prediction on the time sequence feature sequence; the full life cycle state management module is used for adjusting life cycle stages of the equipment; and the visual interaction and decision support module is used for displaying the real-time state of the equipment, performing visual analysis and generating a maintenance decision. The method is applied to health monitoring and maintenance decision making of radar security and protection equipment.

Some embodiments include an integrated assembly having a memory array over a substrate. The memory array includes a three-dimensional arrangement of memory cells. A sense amplifier is associated with the substrate and directly below the memory array. A vertically extending digit line passes through the arrangement of memory cells and is coupled with the sense amplifier. Some embodiments include an integrated assembly having a memory bank containing 64 memory data blocks arranged in a 16x4 configuration. Some embodiments include an integrated assembly having a memory bank containing 512 megabytes divided among 64 memory data blocks, each memory data block having 8 megabytes. The 64 memory data blocks are arranged in a configuration having a plurality of rows, each row containing two or more of the memory data blocks.

The application discloses a digital thread driven intelligent management system for a clinical laboratory, which comprises a system body, and the system body is operated through the following method, and the specific method comprises the following steps: obtaining patient historical records and same batch sample data from a pre-established database by collecting current test result data, and obtaining multimodal information containing original images, detection curves and trend deviations; determining potential abnormal patterns by processing the original images and the detection curves through an abnormality detection algorithm according to the multimodal information; if the abnormal patterns are inconsistent with historical comparison results, comparing previous results of the patient through a trend analysis algorithm to judge the trend deviation degree; obtaining critical project specific threshold values according to the trend deviation degree to obtain key clue recognition results; and the application aims to solve the problem that in the prior art, when facing critical value projects, comprehensive verification and rapid release cannot be balanced, resulting in poor quality control and efficiency of the clinical laboratory.

1. The name of the design product: digital online exhibition collection appreciation graphical user interface for electronic equipment. 2. The use of the design product: the design product is used for an electronic device. 3. The design points of the design product: the graphical user interface content displayed in the electronic device. 4. The picture or photo that best indicates the design points: front view. 5. The use of the graphical user interface: the graphical user interface is used for digital online exhibition collection appreciation. 6. The human-computer interaction mode of the graphical user interface: the front view is the main interface of the graphical user interface; clicking the "click to enter" function module in the front view enters the interface change state diagram 1; clicking the "collection appreciation" function module in the interface change state diagram 1 enters the interface change state diagram 2; clicking the "title" function module in the interface change state diagram 2 enters the interface change state diagram 3.

Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and access lines and vertically oriented digit lines having a first source / drain region and a second source drain region separated by a channel region, and gates opposing the channel region formed fully around every surface of the channel region as gate all around (GAA) structures, horizontal oriented access lines coupled to the gates and separated from a channel region by a gate dielectric. The memory cells have horizontally oriented storage nodes coupled to the second source / drain region and vertically oriented digit lines coupled to the first source / drain regions. A vertical body contact is formed in direct electrical contact with a body region of one or more of the horizontally oriented access devices and separate from the first source / drain region and the vertically oriented digit lines by a dielectric.

A method used in forming memory circuitry comprising memory cells comprises forming vertically-alternating insulative tiers and memory-cell tiers. The memory cells individually comprise a horizontal transistor comprising a gate that comprises part of one of a plurality of horizontal conductive access lines that individually directly electrically couple together multiple of the gates of different ones of the horizontal transistors that are in the same memory-cell tier. The access lines extend horizontally from the memory-array region into a connection region. Over a same time period and using the same processing steps, digitlines are formed in the memory-array region that individually directly electrically couple to the horizontal transistors in different ones of the memory-cell tiers and conductive-via constructions are formed in the connection region that individually directly electrically couple to individual of the access lines. Other embodiments, including structure, are disclosed.

Memory circuitry comprises vertically-alternating insulative tiers and memory-cell tiers. Memory cells in the memory cell tiers individually comprise a horizontal transistor having a gate, a capacitor side, and a digitline side. The capacitor is electrically coupled with the horizontal transistor on the capacitor side. A digitline is electrically coupled with the horizontal transistor on the digitline side. The insulative tiers comprise an insulative material that is vertically between immediately-vertically-adjacent of the memory-cell tiers. The insulative material extends laterally beyond the digitline side and the capacitor side of the gates of immediately-vertically-adjacent of the memory cells. The insulative material is vertically thinnest laterally outward of the digitline side of the gates than at the capacitor side of the gates. Methods are disclosed.

Methods and systems for generating digital threads that connect models and software tools for an interconnected digital engineering and certification ecosystem are provided. In one embodiment, a process for generating a software-code-defined digital thread includes receiving a first model representation of a first engineering model, a second model representation of a second engineering model, and an intent input. Determining, using a machine learning (ML) model, one or more model endpoints in the first and the second model representations. Generating, using a script-generating ML model, a platform orchestration script that accomplishes the intent input by connecting the first model representation and the second model representation, using the one or more model endpoints. Finally, storing the platfonn orchestration script as the software-code-defined digital thread. The digital threading of digital engineering models, with and without Al assistance, leads to exponential increases in efficiency of designing, testing, certifying, manufacturing, and operating physical products, allowing physical products to be made at digital speeds.

Methods, systems, and devices for threshold voltage compensation for a memory system sense amplifier are described. A sense amplifier may include a first transistor comprising: a gate terminal coupled with a second digit line, a drain terminal coupled with a first digit line through a first switching component, and a source terminal coupled with a node. The sense amplifier may include a second transistor comprising a source terminal coupled with the node. The sense amplifier may include a first voltage supply configured to be coupled with the node using a third transistor during an amplification phase of a sense operation for the memory cell; and a second voltage supply configured to be coupled with the node through a fourth transistor during a compensation phase of the sense operation.

The invention relates to the technical field of building construction intelligent monitoring, and discloses a BIM-based bridge construction intelligent monitoring system, which comprises a comprehensive intelligent sensing module used for collecting various environmental data and bridge structure data in real time and carrying out preliminary data verification and error processing; the data fusion module is used for fusing various environmental data and bridge structure data by adopting a weighted average method; the intelligent decision support module is used for implementing natural language processing analysis based on the fused data and in combination with a construction site text record to extract an emotion score, generating a decision tree based on the emotion score and a set threshold value, and outputting a construction suggestion; a dynamic digital thread module; a cross-domain collaboration module; and a self-healing sensor network module. According to the method, the data fused by the weighted average method and the emotional score obtained through natural language processing and analysis act together, deep understanding of the construction site is achieved, the emotional state of the construction team can be analyzed, and specific construction suggestions can be generated according to the fused data.

This application is directed to techniques for performing sensing operations. In some examples, a memory device can include a pair of transistors to pre-charge a digit line. A first transistor of the pair of transistors can be coupled with a first node, and a second transistor of the pair of transistors can be coupled with a second node. In some cases, the first node and the second node can be selectively coupled via a transistor. The first transistor and the second transistor can be activated to pre-charge the first node and the second node. In some examples, a pulse can be applied to a capacitor coupled with the second node to transfer charge to the digit line. In some cases, a common-source common-gate transistor can maintain or control a voltage of the digit line to be at or below an upper operating voltage of the memory cell.

Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes. The horizontally oriented access devices having a first source / drain regions and a second source / drain regions separated by channel regions. Gates at the channel regions formed fully around every surface of the channel region as gate-all-around (GAA) structures separated from channel regions by gate dielectrics. The memory cells have horizontally oriented storage nodes connected to the second source / drain regions and digit lines connected to the first source / drain regions.

A system and method of using a multi-zone substrate to perform electromigration testing of integrated circuits in the high-frequency RF domain. Here, the device under test (DUT) is affixed to a single, multi-zone substrate with a high-temperature zone, a transitional thermal isolation zone, to a low-temperature zone. The high-temperature zone has a DUT interface with a localized heater arrangement. The low-temperature zone provides the interface with RF lines or high speed digital lines to the RF test instrumentation. The DUT input and output pins are attached to the high-temperature zone, and the configuration allows both direct current (DC) and RF stressing of the DUT. The high-temperature zone can raise the DUT temperature to 300-450° C. The RF test port and associated test equipment remain at room temperature.

Memory circuitry includes: an insulating material and a vertically alternating level of memory cells, the memory cells individually including: a transistor including first and second source / drain regions, a channel region, and a gate; capacitors including first and second capacitor electrodes and a capacitor insulator, the first capacitor electrodes coupled to the first and second source / drain regions, and the second capacitor electrodes of a plurality of the capacitors coupled to each other; digital lines extending vertically through the vertically alternating tiers, individual ones of the second source / drain regions of individual ones of the transistors being electrically coupled to individual ones of the digital lines; and word lines in individual ones of the memory cell levels, the word lines including the gates of a plurality of the individual transistors, the word lines in a lower one of the memory cell levels have a minimum width greater than a minimum width of the word lines in a higher one of the memory cell levels directly above the lower memory cell level.

A method of forming a microelectronic device comprises forming a microelectronic device structure assembly comprising memory cells, digit lines coupled to the memory cells, contact structures coupled to the digit lines, word lines coupled to the memory cells, additional contact structures coupled to the word lines, and isolation material surrounding the contact structures and the additional contact structures and overlying the memory cells. An additional microelectronic device structure assembly is formed and comprises control logic devices, further contact structures coupled to the control logic devices, and additional isolation material surrounding the further contact structures and overlying the control logic devices. The additional microelectronic device structure assembly is attached to the microelectronic device structure assembly by bonding the additional isolation material to the isolation material and by bonding the further contact structures to the contact structures and the additional contact structures. Microelectronic devices and electronic systems are also described.

A microelectronic device includes a memory array structure and a control circuitry structure overlying and bonded to the memory array structure. The memory array structure includes memory cells, digit lines, and word lines. The control circuitry structure includes a control circuitry region, digit line contact sections, and word line contact sections. The control circuitry region includes sense amplifier sections including sense amplifiers, and sub-word line driver sections including sub-word line drivers. The digit line contact sections are horizontally adjacent to the sense amplifier sections in a first direction and include contact structures coupled to the sense amplifiers and the digit lines. The word line contact sections are horizontally adjacent to the sub-word line driver sections in a second direction orthogonal to the first direction and include additional contact structures coupled to the sub-word line drivers and the word lines. Additional microelectronic devices, memory devices, and electronic systems are also described.

Systems, methods, and apparatus are provided for forming in tier multiplexers in vertical three dimensional (3D) memory. An array of vertically stacked memory cells can include a first isolation region in a storage node region of an array of vertically stacked memory cells, wherein the isolation region is in an uppermost layer of the array of vertically stacked memory cells, and a multiplexer device in a storage node region of the array of vertically stacked memory cells, wherein the multiplexer device is horizontally adjacent to the first isolation region. A digit line contact can be coupled to a first source / drain region of the multiplexer device, and a first digit line can be coupled to a second source / drain region of the multiplexer device.

The present application relates to the technical field of equipment life cycle management, and specifically includes an aviation equipment full life cycle management method and system based on digital threads, the method comprising: acquiring process parameters of each stage, determining first digital thread master data and a first layer of associated test sequences, second digital thread master data and a second layer of associated test sequences, mapping the deviation of the physical equipment state and the virtual simulation state, and identifying the performance difference point under the cross-stage data correlation link; setting a management strategy for collaborative optimization. The technical problem of being unable to identify the cross-stage performance difference point equipment performance fluctuation root cause positioning in real time, causing the reliability of aviation equipment to be limited is solved, the first and second digital thread master data and the associated test sequences are constructed, the deviation of the physical equipment and the virtual simulation state is accurately mapped, the management strategy is set in combination with the double thread data and the performance difference point, and full life cycle collaborative optimization is performed, and the technical effect of effectively improving the equipment reliability is achieved.

Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes. The horizontally oriented access devices having a first source / drain regions and a second source / drain regions separated by channel regions. Gates at the channel regions formed fully around every surface of the channel region as gate-all-around (GAA) structures separated from channel regions by gate dielectrics. The memory cells have horizontally oriented storage nodes connected to the second source / drain regions and digit lines connected to the first source / drain regions.