Semiconductor bonding and layer transfer method

Abstract

The present invention provides a method of coupling substrates together. The method includes providing first and second substrates and then coupling the first and second substrates together. One of the first and second substrates includes devices with an interconnect region positioned thereon and the other substrate carries a device structure.

Description

CROSS REFERENCE TO RELATED APPLICATIONS [0001] This is a continuation-in-part of application Ser. No. 10 / 873,969, entitled “THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURE AND METHOD OF MAKING SAME”, which was filed 21 Jun. 2004 and is incorporated in its entirety herein by reference.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates generally to semiconductors and, more particularly, to forming circuitry using wafer bonding. [0004] 2. Description of the Related Art [0005] Advances in semiconductor manufacturing technology have provided computer chips with integrated circuits that include many millions of active and passive electronic devices, along with the interconnects to provide the desired circuit connections. As is well-known, most integrated circuits include laterally oriented active and passive electronic devices that are carried on a single major surface of a substrate. Active devices typically include transistors and passive de...

AI Technical Summary

Problems solved by technology

However, these laterally oriented devices consume significant amounts of chip area.

As a result, the processor circuit is idle for many cycle times while it accesses the main memory.

Hence, cache memory uses a small amount of fast and expensive memory to allow the processor circuit faster access to information normally stored by a large amount of slower, less-expensive memory.

There are several problems, however, with using 3-D packages and 3-D ICs.

One problem is that the use of wire bonds increases the access time between the processor and memory circuits because the impedance of wire bonds and large contact pads is high.

Similarly, the contact pads in 3-D ICs have correspondingly large capacitances which also increase the access time between the processor and memory circuits.

Another problem is that the use of wire bonds is less reliable because the wire bonds can break and become detached.

Another problem with using 3-D packages and 3-D ICs is cost.

The use of wire bonds is expensive because it is difficult to attach them between the processor and memory circuits

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