16 results about "Process memory" patented technology

Examples provide an apparatus, device, method, computer program and non-transitory machine-readable storage medium including program code for processing memory spill code during compilation of a computer program. The non-transitory machine-readable storage medium includes program code for processing memory spill code during compilation of a computer program, when executed, to cause a machine to perform identifying a plurality of instructions related to scalar memory spill code during compilation of a computer program, and transforming at least a subset of the plurality of instructions into vectorized code.

This application discloses a multi-agent collaboration method, apparatus, electronic device, and storage medium. The method includes, in response to a user-input query, determining the scope of agents to be invoked in a model decision-making stage. This model decision-making stage invokes at least process memory and summary memory. The process memory records the temporal trajectory, type, and triggering conditions of each agent's invocation, while the summary memory simplifies the memory information for each round of interaction. Based on the scope of agents to be invoked, the generated content of each agent is decomposed in a model generation stage, which invokes at least the summary memory. Finally, based on the generated content of each agent, a final output result is obtained. This application achieves a stronger understanding and decomposition capability for user-fuzzy questions, understanding user questions at the memory level, thereby invoking agents not mentioned in the user question and completing multi-agent collaboration.

The invention discloses a server-free remote memory access performance optimization method based on cross-process memory tracking, and belongs to the technical field of computer memory management. The method comprises the following steps: designing a memory state table as a unified perception layer for remote memory access of homologous server-free containers, and realizing cross-process tracking of memory page states among different containers; a memory state table query process is embedded into hardware page table traversal, page state query is completed by hardware acceleration, and extra overhead on a memory access key path is eliminated; the remote memory access is merged and optimized based on the memory state table, cached local memory pages are reused in the container creation stage, the same remote memory access requests are merged in the operation stage, and the page missing exception frequency and the network bandwidth contention are reduced. According to the method, extra overhead caused by remote memory access in a server-free environment is effectively reduced, page missing abnormity and network bandwidth contention in a concurrent scene are greatly reduced, and the running performance and the system expandability of memory-intensive server-free applications are remarkably improved.

The application belongs to the technical field of program analysis, and relates to a real-time memory recovery method and system for process memory and instruction sequence fusion. The method comprises the following steps: establishing an index for memory pages in a process memory dump file to form a memory page index; analyzing an instruction record file to establish a mapping relationship between an instruction ID and a file position and form an instruction index; scanning memory patch files in a specified directory, generating incremental memory checkpoints at specified intervals based on the memory page index, the instruction index and the memory patch files; according to a target instruction ID and a memory address, using the memory checkpoints and incremental data to quickly restore and query the memory state at a target time, and using a multi-level cache mechanism to improve the memory query performance. The application realizes efficient processing and fast query of large process memory dump data, and solves the problems of large memory dump file size, low query efficiency and excessive storage space occupation in the prior art.

The application discloses an API granularity-based shared library deflation method and system, which comprises the following steps: clustering page-aligned dependent clusters by analyzing the function dependence of each exported API offline, and rewriting the binary layout; intercepting API calls by a customized dynamic linker at runtime, dynamically adjusting the code page execution authority in combination with metadata, and activating only the required page of the current API; the scheme can maintain the cross-process memory sharing of the shared library, avoid memory inflation caused by copy-on-write (CoW), reduce the number of available gadgets by more than 90%, and significantly improve the ROP / JOP attack resistance; the system supports multithreading safety, hot API optimization, is compatible with the standard ELF format, does not need to modify the application, is transparent in deployment, and is suitable for Linux high-security and high-density running environments; the application can maintain the cross-process memory sharing advantage of the shared library while significantly reducing the attack surface and memory inflation problem.

This invention discloses a trusted dual-system architecture implementation method based on Trustzone, relating to the fields of information security and trusted computing technology. This architecture deploys a computing subsystem and a protection agent in the REE (Reliable Execution Environment), and a simplified protection system in the TEE (Trusted Execution Environment), achieving secure separation of the two execution environments through hardware isolation mechanisms. During application startup and runtime, the protection agent performs static and dynamic measurements on target files and process memory, and sends the measurement results to the TEE for integrity determination via security monitoring calls. The determination module in the TEE generates determination results based on a pre-stored trusted benchmark library and feeds them back to the protection agent, thereby controlling application execution by allowing, suspending, or terminating it. Simultaneously, the kernel monitor in the TEE periodically verifies the integrity of the REE kernel and the protection agent through a secure timer to prevent high-privilege attacks from bypassing the protection mechanism. This invention achieves decoupling of computing and protection functions without increasing hardware costs, exhibiting good security and versatility.

A method for processing memory commands in a computing system includes: transmitting a plurality of subcommands from a consistency center to a downstream cache subsystem, each subcommand corresponding to a cache line size; receiving at least one of the plurality of subcommands in the downstream cache subsystem; determining, in response to receiving the at least one subcommand, a complete address range of a data block by the downstream cache subsystem; and performing optimized memory operations for the downstream memory subsystem by the downstream cache subsystem.

This application provides a memory data transmission method, apparatus, and terminal device, applicable to the field of data processing technology. The method includes: generating memory data transmission status association information based on memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information; and generating target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information based on the memory data transmission status association information, initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, and initial memory data transmission verification code information, to process memory data transmission. This application effectively matches the real-time requirements of memory data transmission, improving the energy efficiency and stability of memory data transmission.

This invention provides a cross-process video memory over-allocation management method and system for Ascend devices. The method includes taking over the ACL runtime interface through a shared library, reserving the device's virtual address space and returning stable logical addresses during the application memory allocation phase; when an operator execution request arrives, the system dynamically constructs a set of participating addresses and performs on-demand mapping and partial swapping in and out of video memory; when the local process's video memory is insufficient, the system uses a shared memory ledger to communicate with other processes to achieve cross-process video memory quota coordination. This invention achieves unified video memory coordination among multiple independent processes on the same device through a shared memory ledger and inter-process reclamation requests, breaking down process-level video memory resource silos and improving video memory utilization, capacity elasticity, and deployment flexibility in multi-process inference scenarios.

The application relates to a multimedia data playing method and device, computer equipment and a storage medium. The method comprises the following steps: when a sub-process is created by a main process, and a main service communication channel is established between the sub-process and the main process, the main process responds to a playing request of target multimedia data, and based on the main service communication channel, a channel creation instruction corresponding to the playing request and an instance creation instruction are sent to the sub-process; in the sub-process, a playing task communication channel between the main process is created based on the channel creation instruction, and a sub-process playing instance corresponding to the target multimedia data is created based on the instance creation instruction; the sub-process playing instance is started to play the target multimedia data, and the playing control of the main process on the target multimedia data is responded through the playing task communication channel. The method can realize cross-process playing of the target multimedia data, avoid the main process reaching a memory bottleneck, and optimize the process memory.

The application provides a memory persistence method and system, and belongs to the technical field of memory persistence control. The method uses a file mapping mode to process memory data persistence. Part of the content of a file is mapped to memory. Modifications made by a program to the part of the mapped memory can be automatically saved to the file. The scheme is convenient for reading and writing, does not need to introduce a third-party tool, and greatly improves development efficiency.

The application relates to the technical field of data processing, and particularly provides a memory data processing method and device for an operating system under strong electromagnetic interference, wherein the ripple voltage of a power management chip, the bus eye width of a memory controller bus and the memory temperature of DRAM are periodically polled; in each polling cycle, the ripple voltage, the bus eye width and the memory temperature are compared with a preset threshold set, and if any parameter exceeds the threshold, a bit error repair operation and a temporary memory frequency reduction operation are synchronously triggered; through parameter polling and hierarchical error repair, active protection of memory data under strong electromagnetic interference is realized. By adopting an adaptive polling cycle, the power ripple, the bus eye width and the DRAM temperature are collected in real time, error repair and memory frequency reduction are synchronously started, interference diffusion is blocked, the success rate of atomic page replacement repair is improved, the system stability is improved under a strong electromagnetic environment, and the problem of guaranteeing the integrity of memory data under extreme interference is effectively solved.

The present disclosure relates to the technical field of computer, and provides a memory access request processing method, device and equipment to solve the security isolation problem in a multi-user sharing scenario. The method comprises: obtaining a sideband signal in a preset access request to determine an identity identifier of a requestor corresponding to the preset access request; determining a target register domain from a plurality of register domains according to an identity category to which the identity identifier belongs; wherein the plurality of register domains correspond to a plurality of identity categories, and the plurality of register domains are used for configuration management of a plurality of virtual DMA channels; determining an accessible region corresponding to the identity identifier from the target register domain, and processing the preset access request according to the accessible region. By pre-configuring a plurality of identity categories and a plurality of register domains, different access permissions can be allocated to users with different identities, thereby facilitating the simultaneous satisfaction of security requirements between multiple users, and thereby solving the security isolation problem in a multi-user sharing scenario.

This invention discloses a method for implementing full-scene interactive AR smart companionship for ordinary users, belonging to the field of AR smart wearable device application technology. This method is based on a multimodal fusion AR smart companionship unified memory system. Through three major steps—user authorization and basic data collection, full-scene function adaptation and execution, and full-process memory synchronization and adaptive optimization—it provides users with six core functions: scene recall and positioning navigation, personalized life planning, a growable multi-personality AR smart companion, covert safety warnings, life-oriented intelligent assistance, real-scene object recognition, and AR real-time assisted teaching. This invention fills the gap in the market for a full-scene AR companionship solution for the general public. It features full voice interaction, zero learning cost, one-click shutdown of all functions, strict compliance with medical, privacy, and public interest-related laws and regulations, and deep integration with the underlying unified memory system to form a complete patent protection network, significantly improving the practicality and market competitiveness of consumer-grade AR glasses.

The application provides a memory management method, device, equipment and storage medium. The memory management method comprises the following steps: in response to a memory management request for a target application program, determining the target application program corresponding to the memory management request and a to-be-processed memory page corresponding to the target application program; performing compression processing on the to-be-processed memory page to obtain a virtual compressed memory page corresponding to the target application program, and storing the virtual compressed memory in a virtual compressed memory module; determining target migration memory in the virtual compressed memory according to an application grouping identifier and / or an application activity parameter of the target application program; performing memory migration processing on the target migration memory, deleting the target migration memory in the virtual memory module, and obtaining a memory management result. The application program memory is adaptively managed by using the application activity degree and the grouping identifier when the memory is low, the application memory with low activity is completely released, and the memory utilization, the application retention rate and the starting speed are improved.

Embodiments described herein provide a technique to merge partial cache line writes to a cache memory. One embodiment provides a graphics processor comprising a graphics core, a cache coupled with the graphics core, and memory access circuitry to process memory access messages received from the graphics core. The memory access circuitry includes partial cache line write merge circuitry configured to merge a first partial write to a cache line of the cache with a second partial write to the cache line of the cache.