21 results about "Just-in-time compilation" patented technology

The invention is suitable for the technical field of computers, and provides a CPU and GPU cooperative work heterogeneous computing method and platform, and the method comprises the following steps: S1, carrying out the meta-task analysis of an input computing task, extracting the computing feature metadata of the computing task, and predicting the performance of the computing task based on a pre-trained performance prediction model; dynamically deciding execution path planning of the task between the CPU and the GPU; s2, according to the execution path planning, carrying out adaptive resource collaborative configuration; and S3, on the basis of the calculation feature metadata and the current hardware state, through a parameterized kernel template or a just-in-time compilation technology, heterogeneous perception optimized kernel codes are generated. The method effectively solves the problems that a task scheduling strategy is rigid, the bottleneck of memory and data transmission is prominent, calculation kernel optimization is insufficient and is lack of adaptability, and a system is lack of self-evolution and learning ability.

The invention relates to the technical field of national cryptographic algorithm acceleration, and discloses a national cryptographic algorithm acceleration system based on a Numba just-in-time compiling technology. The numerical calculation mode reconstruction module is used for performing numerical calculation mode reconstruction on SM2 elliptic curve scalar multiplication, SM3 message extension round function, SM4 nonlinear transformation and ZUC flow generation logic contained in the national cryptographic algorithm core calculation module by utilizing an LLVM compiling chain of Numba, and converting an interpretively executed Python code into an optimized machine code adaptive to hardware; key function compiling acceleration is achieved through a (at) njit decorator, hot spot operation is dynamically recognized through compiling scheduling, and a differential instruction optimization strategy is loaded; the platform shows multiple technical advantages: on the development efficiency level, by presetting a standardized acceleration module library and an automatic compiling tool chain, the integration complexity of a national cryptographic algorithm is greatly reduced; in the aspect of operation performance, the compilation optimization depth is better than that of a general interpreter acceleration scheme; in the aspect of safety controllability, the mathematical theory basis of the national cryptographic algorithm is completely reserved, and hidden risks possibly introduced by black box type hardware acceleration are avoided.

The invention discloses a real-time compiling interpreter system capable of running on an MCU (Microprogrammed Control Unit), an FPGA (Field Programmable Gate Array), a GPU (Graphics Processing Unit) or a universal CPU (Central Processing Unit), and belongs to the technical field of embedded systems and computer compiling. According to the system, hardware decoupling is achieved through a modular architecture, and C / C + +, Python and LLVM intermediate codes are supported to be converted into unified intermediate byte codes; a byte code interpreter and an instant compiling module are integrated, both quick starting and efficient execution are considered, and starting can be completed within 1 millisecond; an event driving and periodic scheduling mechanism is provided, and the real-time response requirement is met; a segmented memory model and a security policy are adopted, low-power-consumption edge equipment is adapted, and domestic instruction sets such as RISC-V and LoongArch are compatible. The system solves the problems that a traditional embedded system is poor in flexibility, difficult in cross-platform, insufficient in real-time performance and the like, can achieve unified execution of heterogeneous platform codes, is suitable for the fields of industrial control, Internet of Things edge AI and the like, and has remarkable technical progress and industrial value.

The application relates to a standard system for decoupling a training framework and an instant compiler and a working method thereof, the system comprising a standard interface layer for connecting the training framework and the instant compiling component, wherein a compiling standard interface and an executor standard interface are arranged in the standard interface layer; the method comprises the following steps: based on the compiling standard interface, developing a neural network executor, a neural network compiler, a compiling task data structure, a compiling error output data format and a compiling correct output data format respectively; registering a unique identifier of the neural network compiler to the training framework, and accessing the neural network compiler by the training framework through calling the compiling standard interface; and returning an execution result to the training framework by the neural network executor. Compared with the prior art, the application can enable the training framework to access the neural network compiler of different chip manufacturers through one-time adaptation, thereby effectively reducing the adaptation cost between the training framework and the neural network compiler and realizing the rapid access of the training framework and the compiling component.

The invention discloses a tool calling method based on a code form, and the method comprises the steps: 1, packaging the use of a tool into a function form, and formulating a calling document according to the function form; 2, compiling a code logic fragment called by a tool; 3, introducing an error feedback mechanism based on feedback of the instant compiler; and 4, calling the next tool by utilizing the tool response content prompt. According to the method, a code interaction mechanism is constructed, a task is disassembled into a structured code instruction, a code analysis and dynamic execution module is combined, deep fusion of the task planning capacity and the tool function execution capacity of a large language model is achieved, and the tool calling precision and the parameter optimization efficiency are remarkably improved. The framework supports integration of multiple types of tools including a data analysis tool, a professional software interface and an automatic script, and system robustness in a complex task scene is enhanced through a standardized interface protocol and a result feedback mechanism.

The invention provides a cross-language function calling method and device based on just-in-time compiling and a storage medium, and belongs to the technical field of computers. The method comprises the steps of calculating a specialized signature according to a Triton instant compilation function and an incoming parameter during operation based on a first language end; based on the specialized signature and a hash table which is maintained in a cache of the Triton instant compilation function and is from the specialized signature to the CompiledKernel, if the required CompiledKernel is queried, selecting the corresponding CompiledKernel, and if the required CompiledKernel is queried, selecting the corresponding CompiledKernel; otherwise, a Triton compiler is triggered to compile, and the compiled CompiledKernel is placed in the cache of the Triton instant compiling function; and selecting parameters used for calling the required CompieldKernel from the incoming parameters, and calling the corresponding CompieldKernel. The method comprises the following steps of: selecting parameters used for calling the required CompieldKernel from the incoming parameters, and calling the corresponding CompieldKernel. According to the embodiment of the invention, a basic framework required by the triton jit function can be used in the first programming language, so that a developer can develop an operator library realized based on the triton jit function, and a C + + interface is provided. According to the embodiment of the invention, on the basis of keeping a jit operation mechanism of the triton language, the overhead during operation is reduced.

This invention discloses a method for accelerating numerical computation software based on CPU-GPU collaboration. The method divides the program into basic blocks and uses a code analysis module to predict the runtime information of these basic blocks, including whether they are computationally intensive tasks, whether they are easily parallelized, and whether the memory copy time of the computation task is less than the CPU execution time. Based on the analysis results, basic blocks that meet the above conditions are marked as GPU modules, and the rest are CPU modules. GPU modules are compiled into GPU code for execution on the fly. If CPU modules have hotspot code, they are compiled into machine code on the fly for execution; otherwise, they are interpreted. This method employs a CPU-GPU collaborative just-in-time compilation approach, fully utilizing CPU and GPU computing resources, achieving higher execution efficiency than CPU or GPU execution alone. It also leverages the advantages of just-in-time compilation of interpreted languages, significantly improving the performance of numerical computation software.

The application relates to the field of data processing and communication technology, and discloses a standardized implementation method of a dynamic automatic translation device, which comprises the following steps: constructing and analyzing a standard configuration model, generating an attribute dependency matrix, performing loop detection and topological sorting, generating a linear ordered execution sequence, presetting a class code skeleton and a runtime context, extracting a logic code set according to the sequence, applying a code synthesis equation to generate a composite logic source code, calling an instant compiler and an isolated class loader to convert the source code into a dynamic translation instance and perform atomic reference replacement, and feeding device original data into the instance to make the device original data flow in a logical path in a one-way manner in the runtime context to complete translation. Through the conversion of the interpretive execution into the compiled sequential execution, the application eliminates runtime dependency lookup, cooperates with the isolated loading and atomic replacement mechanism, realizes the independent running and smooth hot updating of the device logic, and improves the efficiency and stability of the heterogeneous protocol adaptation.

This invention proposes a hardware-assisted isolated execution method for eBPF programs, comprising: acquiring the eBPF program to be executed; setting all data pages accessed in the eBPF program to non-privileged pages; issuing all memory access instructions in the eBPF program as non-privileged access instructions through just-in-time (JIT) compilation to obtain the program to be executed; running the program to be executed in kernel mode EL1 of the server operating system to obtain the execution result; and during the execution of the program to be executed, the non-memory access instructions in the program to be executed run at the kernel mode EL1 privilege level, and the memory access instructions in the program to be executed are non-privileged access instructions, which are run at the user mode EL0 non-privileged level. By setting the memory of the eBPF program to non-privileged pages, the eBPF program still runs at a privileged level, but is issued with non-privileged memory access instructions. Since the kernel memory is set to privileged pages, the eBPF program cannot access them, thereby ensuring kernel memory safety.

The invention discloses a just-in-time compilation optimization method and device, computer equipment and a readable storage medium, relates to the technical field of computer software, is suitable for the fields of financial science and technology and medical health, and can avoid excessive resource consumption caused by excessive optimization while aggressively optimizing effective hotspot codes to improve performance. The method comprises the steps that a program running environment is started, and target program codes are compiled and run according to an initial compiling strategy; collecting code behavior characteristics and corresponding environment characteristics generated when the target program code is operated, and inputting the code behavior characteristics and the environment characteristics after normalization processing into the hotspot prediction model; a code category corresponding to the target program code is determined based on the hotspot prediction model, when the code category is an effective hotspot code, the initial compilation strategy is optimized according to the environment characteristics, an optimized compilation strategy is obtained, and the code category comprises the effective hotspot code and an invalid high-frequency code; and compiling and running the target program code according to the optimized compiling strategy.

Dynamic trace sizing for tracing just-in-time compilation is provided. A trace of a program is generated during a tracing phase of the just-in-time compilation. The trace of the program is profiled to determine an estimated effective trace size prior to compiling the trace. Additional profiling is performed to determine a garbage collection time and consequently a total execution time of the program based on the estimated effective trace size determined prior to compiling the trace. It is determined whether to continue formation of the trace or trigger termination of the trace based on the garbage collection time of the program. Triggering the termination of the trace dynamically sizes the trace at runtime of the program.

The invention provides a cold start execution method and device, equipment, a medium and a product. The method belongs to the technical field of server-free computing, and comprises the following steps: acquiring a target sandbox under the condition of receiving a target request; the target sandbox comprises a plurality of data modules, the plurality of data modules are used for representing data resources required for executing the target request, and each data module is written through a WASM byte code; the target sandbox carries a WASM microkernel operating system; the microkernel is used for representing only functions necessary for executing a plurality of data modules; performing incremental instant compiling on the plurality of data modules in the target sandbox to obtain a compiling result; under the condition that the system computing resources are larger than a first preset threshold value, the computing resources are allocated to the target sandbox according to the compiling result; and executing the compilation result based on the computing resource to complete the cold boot. The technical problem that no server is used for calculating the delay time of cold start in the prior art is solved.

An apparatus to facilitate incremental just-in-time (JIT) performance refinement for programmable logic device offload is disclosed. The apparatus includes a processor to: initiate multiple just-in-time (JIT) compilation iterations of an application; program a first architecture of a first compilation of the multiple JIT compilation iterations to a programmable logic device and execute the application on the first architecture, wherein the first compilation comprises a faster compilation time amongst the multiple JIT compilation iterations; identify a hotspot; determine that a second compilation of the multiple JIT compilation iterations is complete, wherein the second compilation comprises a slower compilation time than the first compilation; and program a second architecture of the second compilation of the multiple JIT compilation iterations to the programmable logic device and execute the application on the second architecture.

The invention discloses a virtual machine testing method and device, equipment, a storage medium and a program product, and belongs to the field of software testing. The method comprises the steps of obtaining a first test program, wherein the first test program comprises a target statement; determining a first mutation operator corresponding to the target statement from a plurality of mutation operators; based on the first mutation operator, performing mutation processing on the target statement in the first test program to obtain a second test program; and determining a test result of the to-be-tested JVM according to the first operation information when the to-be-tested JVM compiles and executes the second test program. The multiple mutation operators are determined based on the multiple compiling optimization behaviors of the instant compiler in the JVM to be tested, so that the second test program generated after the target statement is subjected to mutation processing through the mutation operators can cover at least one compiling optimization behavior. Therefore, when the to-be-tested JVM compiles and executes the second test program, the compiling defect of the to-be-tested JVM can be quickly and effectively detected.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for caching compilation outputs using optimization profiles. One of the methods includes identifying a computer program; and at each of a plurality of execution stages: identifying an optimization profile that is to be used when compiling the computer program; generating, from the computer program and from the optimization profile, a cache key; determining whether the cache key has an entry in a compilation cache that stores compilation outputs generated by a just-in-time compiler; obtaining, based on whether the cache key is determined to have an entry in the compilation cache, a compilation output that either (i) was previously generated during a prior execution stage or (ii) is newly generated by the just-in-time compiler during the current execution stage; and providing the compilation output for execution of the computer program.

Arrangements for estimation based just-in-time compiling are provided. First and second thresholds may be set by selecting a value of a corresponding cardinality flag. One or more cardinality estimates may be received for each operator of a query, including input, output, and intermediate estimated cardinalities. For each operator, a highest value of the one or more cardinality estimates may be determined. Based on the highest value being less than or equal to the first threshold, the query may be processed initially by an interpreter and subsequently by a compiler. Based on the highest value being between the first and second thresholds, the query may be processed by both by the compiler and the interpreter at the start. Based on the highest value being greater than or equal to the second threshold, the query may be processed initially by the compiler and use of the interpreter may be avoided.

The application relates to the field of national secret algorithm acceleration technology and discloses a national secret algorithm acceleration system based on Numba instant compiling technology, a core algorithm layer is used for reconstructing a numerical calculation mode of SM2 elliptic curve scalar multiplication, SM3 message expansion round function, SM4 nonlinear transformation and ZUC flow generation logic contained in a national secret algorithm core calculation module by using an LLVM compiling chain of Numba, converting Python code of interpretation execution into optimized machine code suitable for hardware adaptation, realizing key function compiling acceleration through an @njit decorator, dynamically identifying hot operation through compiling scheduling and loading a differentiated instruction optimization strategy, and the platform showing multiple technical advantages: in the aspect of development efficiency, the integration complexity of the national secret algorithm is greatly reduced through preset standardized acceleration module library and automatic compiling tool chain; in the aspect of running performance, the compiling optimization depth is superior to that of a general interpreter acceleration scheme; and in the aspect of safety controllability, the mathematical theoretical basis of the national secret algorithm is completely reserved, and hidden risks possibly introduced by black box type hardware acceleration are avoided.

The application provides a cross-language function calling method and device based on instant compilation and a storage medium, and belongs to the technical field of computers. The method comprises the following steps: in a runtime based on a first language end, a specialization signature is calculated according to a Triton instant compilation function and input parameters; based on the specialization signature and a hash table from the specialization signature to a CompiledKernel maintained in a cache of the Triton instant compilation function, if the required CompiledKernel is queried, the corresponding CompiledKernel is selected; otherwise, a Triton compiler is triggered for compilation, and the compiled CompiledKernel is placed in the cache of the Triton instant compilation function; parameters used for calling the required CompieldKernel are selected from the input parameters, and the corresponding CompiledKernel is called. The application embodiment can use the basic framework required by the triton jit function in the first programming language, so that the developer can develop an operator library based on the triton jit function implementation, and a C++ interface is provided. The application embodiment reduces the runtime overhead on the basis of retaining the jit running mechanism of the triton language.

This invention relates to database query execution optimization. Specifically, it describes techniques for optimal execution based on query interpretation translated into a domain-specific language (DSL) using optimizations such as partial evaluation, abstract syntax tree (AST) rewriting, just-in-time (JIT) compilation, dynamic analysis, speculative logic, and Futamura projection. In an embodiment, a database management system (DBMS) hosted on a computer generates a query tree representing a database query, which contains expressions represented by subtrees of the query tree. The DBMS generates a sequence of DSL instructions representing the subtrees. During the execution of the database query, the sequence of DSL instructions is executed to evaluate the expressions. In an embodiment, the AST is generated from the sequence of DSL instructions. In an embodiment, the DSL AST is optimally rewritten based on a runtime feedback loop that includes dynamic profiling information.

A RISC-V emulator format output function implementation method, device and equipment and storage medium are disclosed, and belong to the technical field of emulators. The method comprises the following steps: obtaining a RISC-V source code to be simulated, inputting the RISC-V source code to be simulated into a compiler, and obtaining a first code file translated by the compiler; in the case that a format string of a first printf function includes a string placeholder %s, translating the first code file into a second code file comprises translating the first printf function into an IR form based on a first jump table and a second jump table corresponding to %s in the format string of the first printf function; after the first code file is translated into the second code file, the second code file is executed by using a just-in-time compiler. The method can accurately and effectively implement the printf function in the RISC-V emulator.

The application is suitable for the technical field of computers, and provides a heterogeneous computing method and platform for CPU and GPU to work cooperatively, wherein the method comprises the following steps: step S1: performing meta-task analysis on an input computing task, extracting computing feature metadata thereof, and dynamically deciding execution path planning of the task between CPU and GPU based on a pre-trained performance prediction model; step S2: performing adaptive resource cooperative configuration according to the execution path planning; and step S3: generating heterogeneous-aware optimized kernel code based on the computing feature metadata and a current hardware state through a parameterized kernel template or a just-in-time compilation technology. The application effectively solves the problems of rigid task scheduling strategy, prominent memory and data transmission bottlenecks, insufficient and lack of adaptability of computing kernel optimization, and lack of self-evolution and learning ability of the system.