This invention discloses a
network interface instruction
processing method and apparatus for multi-path
remote memory access, belonging to the field of high-
performance computing. The method includes state maintenance of a multi-path instruction
queue, read request scheduling of the multi-path instruction
queue, on-
chip caching of the multi-path instructions, and network transmission request scheduling of the multi-path instruction
queue. The apparatus includes a state maintenance controller, a read request scheduler, an on-
chip cache device, a network transmission request scheduler, and a computer-readable storage medium. This invention can meet the high-speed
processing requirements of thousands of multi-path
remote memory access instructions, ensuring
fair scheduling and efficient response for all
remote memory accesses. It aims to solve the technical problems of low
throughput, high latency, uneven cache
resource allocation, poor scheduling fairness, and insufficient
quality of service in large-scale node
interconnection scenarios when network interfaces process massive numbers of multi-path
remote memory access instructions.