32 results about "Uniform memory access" patented technology

Examples include techniques associated with mapping system memory physical addresses to isolation domains for uniform memory access (UMA) by a system. Examples include mapping separate system memory physical addresses ranges associated with memory devices communicatively coupled with at least one compute die of the system through an input / output (I / O) die of the system. The separate system memory physical addresses to be mapped to isolation domains and address decoder information is generated to indicate the mapping of the separate system memory physical address ranges to the isolation domains.

Memory pages can be migrated between non-uniform memory access (NUMA) nodes based on entries in a page modification log according to some examples described herein. In one example, a physical processor can detect a request from a virtual machine to access a memory page. The physical processor can then update a page modification log to include an entry indicating the request. A hypervisor supporting the virtual machine can be configured to detect the request based on the entry in the page modification log and, in response to detecting the request, migrate the memory page from a second NUMA node to a destination NUMA node.

Apparatuses, systems, and techniques to store information within one or more non-uniform memory access (NUMA) storages. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause information to be stored within one or more NUMA storages or one or more graphics processor unit (GPU) physical storages based, at least in part, on one or more indicators to be indicated by one or more users of the API.

The present disclosure provides a virtual machine running control method and device, computer equipment and a storage medium, wherein the method comprises: obtaining non-uniform memory access (NUMA) node configuration information of a virtual machine; the NUMA node configuration information is determined according to a host NUMA topology relationship of a host running the virtual machine; the host NUMA topology relationship is used to indicate the distance between a physical central processing unit and a physical memory space in the host; using a virtual machine monitor, converting the NUMA node configuration information into target configuration information in a target format, and configuring the target configuration information as a target start parameter of a child operating system of the virtual machine; using the child operating system, creating each target virtual NUMA node corresponding to the virtual machine according to the target configuration information carried by the target start parameter. The present disclosure can accurately transfer the host NUMA topology relationship to the virtual machine without the help of ACPI.

Some embodiments provide a method for a data message processing device that includes multiple network interfaces associated with at least two different non-uniform memory access (NUMA) nodes. The method receives a data message at a first network interface associated with a particular one of the NUMA nodes. Based on processing of the data message, the method identifies multiple equivalent output options for the data message. Each of the output options is associated with a respective one of the NUMA nodes. The method selects an equivalent output option for the data message that is associated with the particular NUMA node.

The invention discloses an IO full-path memory access optimization system and method based on an NUMA architecture, and the system comprises a file system module, an IO scheduling module, a disk interaction module and a configuration and management module, and the file system module is used for receiving an IO request and obtaining storage pool instance information; transferring the IO request to an IO request processing process for processing, packaging the IO request into a scheduling request, and putting the scheduling request into a scheduling request queue corresponding to a local node; the IO scheduling module is used for an IO scheduling process to obtain a scheduling request, processing the scheduling request, packaging the processed scheduling request into a disk interaction request and putting the disk interaction request into an IO request queue; and the disk interaction module is used for obtaining the disk interaction request from the IO request queue, processing the disk interaction request to obtain an IO processing result, and returning the IO processing result to the upper-layer application program, so that full-path memory localization access from the IO request initiated by the upper-layer application to the final data interaction with the disk and rapid transplantation on different NUMA platforms are realized.

The invention discloses a CPU (central processing unit) isolated operation method based on an isolated scheduling domain under an NUMA (non-uniform memory access) architecture, and relates to the technical field of virtualized computing. A CPU core is divided into the isolated scheduling domain and a common scheduling domain according to an NUMA topological structure and kernel configuration parameters; obtaining a trusted virtual machine label parameter in the trusted virtual machine creation instruction, transmitting the trusted virtual machine label parameter to a kernel module step by step through a virtualization management layer, and writing the trusted virtual machine label parameter into a target process through the kernel module to obtain a target label process; identifying a target label process, when the target label process is the label process in which the label parameters of the trusted virtual machine are written, scheduling the target label process to an isolation scheduling domain, otherwise, scheduling the target label process to a common scheduling domain; and running the target label process. Through the technical scheme, the adaptability of an isolation mechanism and NUMA architecture characteristics can be improved, and then the matching degree of resource allocation and memory access locality is improved.

The invention provides a memory type determination method, device and equipment, and belongs to the field of data processing.The method comprises the steps that a target server and a target running program are determined, the target server adopts a non-uniform memory access architecture, the non-uniform memory access architecture comprises a plurality of nodes, and each node comprises a central processing unit (CPU) and a memory; first access performance of a target CPU executing the target running program in a first simulation scene and second access performance of the target CPU in a second simulation scene are determined, the first simulation scene indicates that the target CPU accesses memories of other nodes, the second simulation scene indicates that the target CPU accesses a memory of a local node, and the target CPU belongs to CPUs included in the multiple nodes; and determining a memory type corresponding to the target running program according to the first access performance and the second access performance, wherein the memory type comprises a small page memory or a large page memory. Therefore, the access performance of the CPU can be improved.

The description relates to dynamic memory management. One example includes an assembly that entails processing elements and memory. A dynamic UMA / NUMA configuration module is configured to facilitate managing a first region of the memory based upon a Uniform Memory Access (UMA) architecture and a second region of the memory based upon a Non-Uniform Memory Access (NUMA) architecture. The dynamic UMA / NUMA configuration module is configured to dynamically adjust ratios of the memory in the first region and the second region based upon workload changes on the processing elements.

The invention relates to the technical field of computers, in particular to a data processing method and device based on bound nodes and a storage medium, and aims to reduce performance overhead caused by cross-node access. The method applied to the virtualized process service comprises the following steps: according to resource use information of each non-uniform memory access NUMA node on a physical machine to which the virtualized process service belongs, screening out one NUMA node from each NUMA node as a target NUMA node; binding a service runtime memory of the virtualized process service to the target NUMA node; and sending the node information of the target NUMA node to the proxy service, so that the proxy service applies for a shared memory from the target NUMA node after receiving the node information of the target NUMA node, and maps the shared memory to the virtualization process service for use, and during data transmission each time, realizing data transmission between the service runtime memory and the shared memory on the target NUMA node.

The embodiment of the invention provides a server resource scheduling method, electronic equipment and a storage medium. The method comprises the following steps: creating and loading a scheduling program in a user mode, and scanning a processor topology to generate a scheduling domain based on a non-uniform memory access node; loading the program into a memory to complete initialization of a kernel scheduler, generating a scheduling callback function and associating the scheduling callback function to realize interaction between a user mode and a kernel mode; kernel load information is obtained in real time and shared to a user mode program, a scheduling decision instruction is determined by the user mode program, and scheduling domain extension and processor frequency adjustment are executed to complete scheduling. The method can improve scheduling flexibility, optimize resource utilization, effectively improve server performance, reduce energy consumption and adapt to a dynamic load scene of a cloud data center.

This application relates to chassis repair and migration in a scale-out NUMA system. One aspect of the application can provide a system and method to replace a failed node with a spare node in a non-uniform memory access (NUMA) system. During operation, in response to determining that a node migration condition is satisfied, the system can initialize a node controller of the spare node such that access to memory local to the spare node is to be handled by the node controller, stall the failed node and the spare node to allow state information of a processor on the failed node to be migrated to a processor on the spare node, and after unstalling the failed node and the spare node, migrate data from the failed node to the spare node while maintaining cache coherency in the NUMA system and the NUMA system remains operational, thereby facilitating continued execution of processes previously executing on the failed node.

The application provides a metadata processing method, device, equipment, storage medium and product. The method comprises the following steps: in response to receiving an operation request for metadata in a distributed file system comprising a plurality of preset directory groups sent by a client device, determining a target directory group storing target metadata according to a storage path of the target metadata in the operation request; the target metadata comprises target directory access metadata and / or target file metadata under a directory thereof, and the target directory group is used for storing the target metadata and parent directory timestamp metadata thereof; for each preset directory group, the data in each preset directory group is stored in a corresponding non-uniform memory access node respectively, a plurality of non-uniform memory access nodes are located in corresponding metadata servers, and the data in each preset directory group comprises preset metadata and parent directory timestamp metadata thereof; performing an operation on the target metadata according to an operation type in the operation request, and updating the parent directory timestamp metadata of the target metadata.

Apparatuses, systems, and methods for controlling cache allocations in a configurable combined private and shared cache in a processor-based system. The processor-based system is configured to receive a cache allocation request to allocate a line in a share cache structure, which may further include a client identification (ID). The cache allocation request and the client ID can be compared to a sub-non-uniform memory access (NUMA) (sub-NUMA) bit mask and a client allocation bit mask to generate a cache allocation vector. The sub-NUMA bit mask may have been programmed to indicate that processing cores associated with a sub-NUMA region are available, whereas processing cores associated with other sub-NUMA regions are not available, and the client allocation bit mask may have been programmed to indicate that processing cores are available. The sub-NUMA bit mask and the client allocation bit mask can be combined to create a cache allocation vector that a cache allocation request to allocate a line serviced by one of processing cores.

Some embodiments provide a novel method for forwarding data messages between first and second host computers. To send, to a first machine of the first host, a second flow from a second machine of the second host in response to a first flow from the first machine, the method identifies from a set of tunnel endpoints (TEPs) of the first host a TEP that is a source TEP of the first flow. The method uses the identified TEP to identify one non-uniform memory access (NUMA) node of a set of NUMA nodes of the first host as the NUMA node associated with the first flow. The method selects, from a subset of TEPs of the first host that is associated with the identified NUMA node, one TEP as a destination TEP of the second flow. The method sends the second flow to the selected TEP of the first host.

The application relates to a graphics processor resource scheduling method and system, computer equipment and a storage medium. The method comprises the following steps: acquiring a plurality of preparation nodes and the node idle bandwidth of each preparation node within a preset time, and acquiring the group average idle bandwidth of each non-uniform memory access group within the preparation node within a preset time; determining a target task and a task type thereof, calculating the node score of each preparation node under different task types, and determining a target node according to the task type and the node score; and selecting a target graphics processor from the target node according to the group average idle bandwidth, so as to execute the target task through the target graphics processor, thereby improving the graphics processor resource utilization rate.

A method and an apparatus for accessing a critical resource, a computer device, and a readable storage medium are provided, to help reduce a quantity of operations for contending for a lock by a thread, and computing resources, and improve performance of an ARM processor. The method for accessing a critical resource includes: selecting a first thread from the first thread and a second thread to contend for a target lock (201), where a first task to be executed by the first thread and a second task to be executed by the second thread correspond to the target lock; and if the first thread obtains the target lock through contention, enabling the first thread to execute the first task, and replace the second thread to execute the second task (202).

Systems and methods are provided for tier management in a memory hierarchical environment. In some embodiments, a method includes accessing, by a first processing, a first page of the first processing in a non-uniform memory access memory of a first tier; and locking, by a first thread, the first page against demotion. The first thread can be a tier management thread of the first processing, and the step of locking the first page can be based on a service level of the first processing.

The invention relates to a read-write request processing method and device, equipment, a storage medium and a program product. The method comprises the following steps: firstly, receiving a read-write request which is sent by a client and carries identification information of a target disk to be accessed, and then determining a target resource pool for processing the read-write request according to the identification information and a preset corresponding relationship, the corresponding relationship is a corresponding relationship between each disk in the storage system and a non-uniform memory access architecture NUMA node corresponding to each disk, and finally, processing the read-write request based on the target resource in the target resource pool. By adopting the method, extra overhead caused by accessing the target disk across the NUMA nodes can be avoided, and the processing performance of read-write request processing is improved.

This invention relates to the field of computer technology, and more particularly to a method, electronic device, and medium for detecting the operational status of a NUMA system. The method includes acquiring the NUMA node to which the GPU used by the process to be processed belongs, the running CPU, the memory-bound NUMA node, and the NUMA node and proportion to which dynamic link libraries are loaded; setting the NUMA node to which the GPU belongs as the target NUMA node; if the NUMA node to which the CPU is bound is not the target NUMA node, then binding the CPU to the target NUMA node; if the memory-bound NUMA node is the target NUMA node, then restricting memory allocation to the target NUMA node; if the dynamic link libraries are not 100% loaded on the target NUMA node, then clearing the memory cache and restarting the process to be processed, ensuring that the dynamic link libraries are 100% loaded on the target NUMA node. This invention improves the efficiency and accuracy of NUMA system operational status detection.

The invention discloses a method and a device for scheduling NUMA fragment resources in a cloud platform. The method comprises the following steps: acquiring a resource demand of a virtual machine for performing cloud platform resource scheduling; calculating unused resources of each node in each host machine, wherein the nodes are nodes meeting a non-consistent memory access mechanism; marking whether each host machine has unused NUMA fragment resources or not according to the unused resources of the nodes in each host machine; according to the degree of meeting the resource demand of the virtual machine, performing NUMA fragment resource sorting on the host machine with the mark to obtain a sorted host machine sequence; and performing NUMA fragment resource scheduling according to the sorted host machine sequence. According to the method, fragment resources can be fully utilized, high-quality resources can be saved, the utilization rate of the fragment resources is maximized as much as possible, and then the purpose of saving the resources is achieved.

A hierarchical scheduling method and system for key-value caches aware of inconsistent memory access, relating to the field of large model inference technology. This application achieves reference counting and countdown mode switching by reusing a single byte metadata field. The key-value cache block status is updated when a request hits or ends its use. During eviction, a score is calculated for reference-counted blocks based on the normalized value of the most recent access timestamp, the affinity coefficient of the inconsistent memory access node, and the reference count. Blocks whose countdown has not reached zero are not included in the eviction candidate. Blocks with zero countdowns are scored based on access time and affinity coefficient, with high-scoring blocks prioritized for eviction and written to the next level of storage. This application solves the problems of existing technologies that fail to distinguish between the shared value of cache blocks and the eviction cost of inconsistent memory access, and are prone to intermittently eviction of high-value blocks due to requests. It improves cache hit rate with low metadata overhead, reduces cross-node recalculation, and increases system throughput.

Aspects of the subject disclosure may include, for example, a computational platform for a communication network, having: a plurality of non-uniform memory access (NUMA) processors; a processing system including a processor; and a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations of: creating a first configuration that dedicates a first set of NUMA processors of the plurality to servicing a first service function of the communication network; creating a first pool of NUMA processors of the plurality having an assigned priority, wherein NUMA processors in the first pool are not members of the first set; and scheduling a computational task for service by the first pool of NUMA processors. Other embodiments are disclosed.

Techniques can include: performing an initial allocation of memory slices for memory pools from a first memory local to a first socket and a second memory local to a second socket, wherein the initial allocation of memory slices from the first and second memories for each memory pool is based, at least in part, on first information denoting corresponding quantities of CPU cores of the first and second sockets that utilize each memory pool; determining second information including corresponding quantities of CPU cores of the first and second sockets that utilize each memory pool; determining changes between corresponding quantities of CPU cores of the first information and the second information for any of the first socket and the second socket for one or more of the memory pools; and performing dynamic redistribution of memory slices of the one or more memory pools based, at least in part, on the changes.

The invention discloses a non-uniform memory access network, a method for realizing data synchronization thereof and a storage device, the non-uniform memory access network at least comprises an arbiter, a beat pipeline register and a storage module which are arranged in one-to-one correspondence, and the non-uniform memory access network has the characteristics of simple structure and strong expandability. According to the structure, beat alignment and stable data transmission of each host request can be realized, and meanwhile, in combination with a synchronization mechanism based on the maximum write delay L-max, whether all write operations are completed or not is effectively judged on the premise of not increasing additional write confirmation overhead, so that the data consistency of the read operation is ensured, and the data transmission efficiency is improved. And the performance and the reliability of the system in a high-concurrency access scene are obviously improved.

The invention relates to an image rendering method and apparatus, an electronic device, a storage medium and a program product. The method comprises the steps of storing target image data corresponding to a to-be-rendered image to a first memory through a graphics processor; acquiring target image data from the first memory through a central processing unit, wherein the graphics processor and the central processing unit support UMA (Uniform Memory Access); rendering the target image data based on first rendering processing through the central processing unit to obtain a first rendered texture; and storing the first rendering texture to the first memory through the central processing unit.

Apparatuses, systems, and techniques to access one or more non-uniform memory access (NUMA) nodes. In at least one embodiment, one or more circuits are to perform an application programming interface (API) to cause one or more NUMA nodes or one or more physical addresses allocated to one or more graphics processing units (GPUs) to be accessed based, at least in part, on one or more indications within the API.

The disclosure provides a virtual machine scheduling method and device, electronic equipment and readable storage medium, and relates to the technical field of virtual machines. The virtual machine scheduling method based on a non-uniform memory access (NUMA) system comprises: generating a NUMA topology of CPUs based on a NUMA node topology in the NUMA system and a CPU list of the NUMA node; configuring a corresponding local access control group (Cgroup) under a specified directory based on the NUMA topology and the CPU list; in response to scheduling information, determining a virtual machine to be scheduled, and performing a balancing scheduling operation for the virtual machine to be scheduled based on the Cgroup, so that the virtual machine accesses local memory. Through the technical scheme of the disclosure, the virtual machine accesses local memory, thereby facilitating reduction of latency caused by access.

Systems and methods for tier management in memory-tiering environments. In some embodiments, a method includes accessing, by a first process, a first page of the first process in a first tier of a non-uniform memory access memory; and locking, by a first thread, the first page against demotion. The first thread may be a tier-management thread of the first process, and the locking of the first page may be based on a service level of the first process.

Examples described herein relate to allocate a first of multiple memory-mapped input / output regions to a first sub-non-uniform memory access cluster and allocate a second of the memory-mapped input / output regions to a second sub-non-uniform memory access cluster. In some examples, the second of the memory-mapped input / output regions can be allocated to a third sub-non-uniform memory access cluster. In some examples, a sub-non-uniform memory access cluster includes a core and a caching agent.