106 results about "Memory sharing" patented technology

The present application relates to the technical field of data storage. Disclosed are a multi-source heterogeneous distributed system, a memory access method and a nonvolatile readable storage medium. The method comprises: a first unified interconnection bus unit receiving, by means of a protocol adaptation interface module, a read request sent by a first device, and setting the cache state of a first memory unit to be an invalid state; sending to a second unified interconnection bus unit of a second device a request message obtained by packaging the read request, the second unified interconnection bus unit reading data from a second memory unit; setting the cache state of the second memory unit to be a shared state, and sending to the first unified interconnection bus unit a response message, the first unified interconnection bus unit storing in the first memory unit data carried by the response message; and setting the cache state of the first memory unit to be a shared state. Thus, deploying a unified interconnection bus unit on each device can achieve a consistent memory communication between the devices, thereby achieving memory sharing, and further improving the performance of the multi-source heterogeneous distributed system.

The invention discloses a cross-host memory sharing method, system and device and a medium, the memory sharing system comprises a master node and a plurality of slave nodes, the memory sharing method is applied to the master node, and the method comprises the steps that a memory application request of a target slave node is received; applying for a target memory in a target memory sharing area according to a memory size requirement corresponding to the request, feeding back memory information of the target memory to a target slave node, so that the target slave node judges a corresponding memory type according to the memory information, and if a process corresponding to the target slave node executes a memory mapping method, sending the target memory to the target slave node. If yes, the target memory can be mapped to the proceeding virtual address space according to the target type and the offset corresponding to the target memory, so that the process can use the distributed target memory. Therefore, it can be guaranteed that when one node writes the memory, other nodes cannot synchronously write the memory, and then the data consistency of the shared memory accessed by multiple hosts is guaranteed.

The invention discloses a system, a server, a method, a medium and a program product for sharing a memory resource pool, and relates to the field of artificial intelligence, a plurality of switching components of a switch are connected with processors of a plurality of computer devices and the memory resource pool, and the plurality of computer devices share memory resources of the memory resource pool through the switch, different memory capacities are allocated according to the requirements of the computer equipment, dynamic allocation and efficient sharing of memory resources are achieved, the memory utilization rate of a whole machine system is improved, the memory access delay of the computer equipment is reduced, the memory sharing consistency of multiple pieces of computer equipment is ensured, and the requirements of multiple computing scenes are met. Therefore, the technical problems that in the prior art, a server cooperative computing method based on the remote direct memory access (RDMA) technology is large in transmission delay, the requirements of various computing scenes cannot be met, the consistency of shared memories of multiple computer devices cannot be guaranteed, and the resource utilization rate is low are solved.

The invention provides a unified memory system based on heterogeneous computing, belongs to the field of parallel computing and artificial intelligence, and realizes memory sharing by constructing a global virtual address space and eliminating explicit data transmission between a host end and an equipment end. The core module comprises: 1) a cache consistency manager, which adopts an adaptive protocol (write broadcast / write invalidation) and a cache directory table (CCDT) to ensure data consistency; 2) an MMU memory management unit which supports dynamic address translation, on-demand distribution and page migration; and 3) an intelligent data migration unit which dynamically migrates the hotspot data to a near-end memory based on the prediction model and reduces the access delay. The architecture is suitable for edge AI applications with high requirements on real-time performance and energy efficiency.

The invention relates to the technical field of memory expansion, and discloses a memory access system and method for a memory pool, the system is connected with PC I e equipment and CXL equipment, the PC I e equipment is used for sending an access request to a host so as to access the CXL memory pool through the host; the CXL equipment is used for sending a read-write command to the CXL switch so as to access the CXL memory pool through the CXL switch, the system comprises a host which is respectively connected with the PC I e equipment and the CXL switch, and the host is used for receiving an access request sent by the PC I e equipment, converting the access request into the read-write command and sending the read-write command to the CXL switch so as to access the CXL memory pool through the CXL switch, cXL equipment and PC I e equipment which are short in memory are expanded through the CXL memory pool, the memory access system of the memory pool can be compatible with the CXL equipment and the PC I e equipment at the same time, unified memory distribution and memory management are provided for the CXL equipment and the PC I e equipment, memory sharing between the CXL equipment and the PC I e equipment is achieved, memories of the CXL equipment and the PC I e equipment are expanded, and therefore the memory access efficiency and the memory utilization rate are improved.

The invention belongs to the technical field of distributed storage, and particularly discloses a CXL shared memory pool page thermal management method, a CXL shared memory pool page thermal management system and a CXL shared memory pool page thermal management program product, the position of a memory block in a shared memory pool can be dynamically adjusted according to the heat value of the memory block through a corresponding hot page scheduling strategy, and the use of memory resources is optimized; through the designed CXL memory sharing pool system, memory resources can be managed more flexibly, the sharing performance and the utilization rate of the memory are improved, and the overhead of data communication and data copying in the distributed parallel computing system is effectively reduced; the redundancy of memory resources can be reduced through a corresponding resource sharing mode, the complexity of a software stack is reduced, and the overall system cost is reduced; and the security among the private memory data is ensured while the data object is ensured to realize zero-copy sharing among the nodes as much as possible, that is, the security and isolation of the data are ensured while the data sharing efficiency is improved.

The invention discloses a class preloading method and device for Java micro-service cold start acceleration, and belongs to the technical field of cloud computing and Java virtual machine optimization. The method comprises the steps of class dependency analysis based on a historical call chain, hierarchical class preloading execution and shared memory snapshot management. The device comprises a class analysis engine, a preloading decision maker and a memory snapshot management and JVM optimization adaptation module. Through intelligent analysis of class popularity, hierarchical preloading and combination of a cross-JVM instance memory sharing technology, the Java micro-service cold start time is reduced from average 4.2 s to 0.8 s, memory occupation is reduced by 45%, compatibility with a standard JVM and a mainstream framework is kept, and the method is suitable for financial transaction, real-time recommendation and other micro-service applications in a Serverless scene.

The invention discloses a production line layout optimization decision support system based on data driving. The system comprises a data acquisition module, a data preprocessing module, a feature analysis module, a layout optimization module and a man-machine interaction module. The data acquisition module establishes a bidirectional data channel with an MES system interface through an Internet of Things sensor, and is used for acquiring equipment state data and production order information in real time; the data preprocessing module is connected with the data acquisition module and is used for receiving the original data stream and executing dynamic cleaning and fusion processing; the feature analysis module interacts with the data preprocessing module through a memory shared database, receives the standardized production feature matrix and outputs a bottleneck analysis result; and the layout optimization module communicates with the feature analysis module through an OPC UA protocol to obtain bottleneck parameters as optimization constraint conditions. The problem that in the prior art, modeling depends on historical data, production fluctuation cannot be responded in real time, and then an optimization scheme lags behind actual requirements is solved.

Disclosed is a system-on-chip SoC, comprising, a host configured to generate job launching, a buffer memory, a producer configured to generate data in response to the job launching and store the generated data in the buffer memory, a consumer configured to read and process the data from the buffer memory in response to the job launching, and a HiveSync monitor configured to exchange at least one ready bit with the producer and the consumer indicating a readiness state of the data in the buffer memory, wherein the ready bit indicates the readiness state of the data divided into specific units.

The invention discloses a memory sharing method, which is applied to realizing memory sharing among computing nodes. In the memory sharing method, the memory access control table is arranged on the communication hardware of the source end node, and the authority of the source end node for accessing the memory of the remote node is recorded in the memory access control table, so that the access of the memory of the remote node is not influenced when the source end node triggers to access the memory of the remote node. The communication hardware queries the memory access control table to determine whether access to the memory of the far-end node can be executed or not, so that the range of accessing the far-end memory by the source-end node is effectively limited, and the security of memory sharing is improved.

The present invention belongs to the field of semiconductor technology, and specifically relates to a chip design method and a chip system. The chip design method includes: integrating a local DRAM controller, a global DRAM controller, and a shared DRAM controller on a processor core, and integrating several processor cores on a logic chip. The DRAM chips are stacked vertically on the logic chip, each global DRAM controller is connected to the shared DRAM storage space, and the shared DRAM controllers are respectively connected to their corresponding private DRAM storage spaces. The present invention directly connects to the shared DRAM storage space through the global DRAM controller, reduces the intermediate links, shortens the data path, and improves the data exchange speed. The shared DRAM controller is directly connected to the private DRAM storage space of each processor core, thereby realizing memory sharing data interaction between the processor cores.

Datacenter workloads demand flexible memory architectures spanning from rack-level to pod-scale deployments. Embodiments herein disclose systems enabling CXL memory semantics over physical layers based on IEEE 802.3 PMA, facilitating memory disaggregation across datacenter fabric infrastructures. The embodiments comprise processing cores with coherent interconnects, MMUs for address translation, and memory channels supporting substantial memory capacities. Resource Provisioning Units (RPUs) translate between CXL data, optionally encapsulated, transmitted via physical layers based on IEEE 802.3 PMA, and CXL requests, enabling external entities to access memory across different physical address spaces. This architecture provides memory pooling using datacenter network infrastructure, supporting intra-rack memory sharing, inter-pod memory access, distributed AI training across datacenter resources, and elastic memory provisioning for cloud-native applications, overcoming physical layer limitations of traditional CXL implementations while maintaining protocol coherency suitable for GenAL, LLM inference, and HPC workloads.

The present application provides a method, system, device, and medium for establishing shared memory between virtual machines, relating to the field of memory sharing technology. The method includes: upon successfully establishing a two-stage address table of an initiating client, sending a memory message to a receiving client and saving its own client physical address to a virtualization platform; in response to the message, initiating a first request to the virtualization platform; in response to the first request, controlling the receiving client to suspend operation and establish a second-stage address table for each physical core on the receiving client based on the client's physical address, if the second-stage address table of each physical core is stored in the same physical space; upon completion of the establishment, controlling the receiving client to resume operation and sending a completion message to the receiving client; in response to the completion message, invoking a corresponding mapping interface to complete the establishment of its own first-stage address table, thereby achieving shared memory establishment. The purpose is to enhance the flexibility of shared memory establishment.

The invention relates to a data processing system with secure memory sharing. A trusted execution environment (TEE) includes a first requester, a first local interconnect, an access controller, and a first memory encryption circuit, and the access controller allows or denies access requests to a shared memory external to the TEE. A normal execution environment (NEE) communicates with the TEE via a set of address lines and a set of data lines, and includes a second requester and a second local interconnect. The first memory encryption circuit encrypts write data before the TEE provides the write data corresponding to an access-allowed request to the shared memory generated by only one of the first requester and the second requester to store in the shared memory. Any write data corresponding to an allowed access request to the shared memory generated by the other of the first requester and the second requester is provided as unencrypted write data to be stored in the shared memory.

If sufficient memory resources are allowed access, components on an IC chip can operate faster or provide higher performance relative to power consumption. However, if each component is provided with its own memory, the chip becomes expensive. In the described implementation, memory is shared among two or more components (110, 114, 116). For example, a processing component (116) may include computing circuitry (206) and memory (106) coupled thereto. A multi-component cache controller (114) is coupled to memory (106). Logic circuitry (202) is coupled to the cache controller (114) and memory (106). The logic circuitry (202) selectively divides memory (106) into multiple memory partitions (108). A first memory partition (108-1) may be allocated to computing circuitry (206) and provide storage for computing circuitry (206). A second memory partition (108-2) may be allocated to the cache controller (114) and provide storage for multiple components (110). The relative capacity of memory partitions is adjustable to accommodate fluctuating demand without having to dedicate separate memory to a component.

The present application relates to the technical field of terminals, discloses a method for accessing a memory, and a device, and can solve the problem that a terminal device having a multi-processor architecture cannot realize scientific and ordered memory access. In the present application, a plurality of processors of the terminal device share a same memory, so that any processor can normally store data, modify or read the stored data, etc. in any usage scenario. Moreover, any processor among the plurality of processors can realize mutual exclusion access to the memory by the plurality of processors on the basis of the obtained situation of whether other processors are accessing the memory, thereby realizing more scientific and ordered memory sharing. The solution in which the plurality of processors of the terminal device share the same memory can also reduce the production costs of the terminal device and provide support for the miniaturization of the terminal device.

The invention provides a memory sharing method and equipment, in a computing cluster, when a first computing node needs to borrow a memory, a request containing a borrowing demand can be sent to a management node, the management node determines a borrowing strategy in a plurality of borrowing strategies according to the borrowing demand, and the borrowing strategy is used for borrowing the memory. The method comprises the steps that firstly, a borrowing strategy is established, information of a second computing node meeting the borrowing requirement is determined according to the borrowing strategy, the information of the second computing node is sent to the first computing node, then, the first computing node determines a third computing node providing borrowing memory for the first computing node according to the information of the second computing node, a borrowing request is sent to the third computing node, and finally, the third computing node provides borrowing memory for the first computing node. And the third computing node provides the memory for the first computing node, so that other nodes borrowed with the memory share the memory with the node needing to borrow the memory, the success rate of memory borrowing is improved, and the flexibility of memory sharing is improved.

The application discloses a multi-agent collaborative reasoning method and system based on memory sharing and conflict resolution, comprising: constructing a hybrid structured memory pool containing a vector database for semantic recall and a graph database for storing logical structure; deploying functionally heterogeneous multi-agent to normalize original multi-source data into observation nodes and write into the graph database; using the graph database trigger mechanism to listen to the writing event, and automatically triggering the reasoning to generate the hypothesis node and establish the deduction edge when matching the preset rule; detecting whether there is a logical conflict for the hypothesis node of the same subject, and triggering dynamic arbitration if there is; the arbitration mechanism calculates the weighted score based on the confidence, data source credibility and context consistency calculated based on KL divergence, and finally outputs the reasoning conclusion and evidence chain path. The application breaks the information island through the hybrid memory pool, realizes the automatic reasoning by using the trigger, and significantly improves the accuracy, logical consistency and explainability of reasoning in complex scenarios.

A high-capacity cache memory is implemented by multiple heterogenous DRAM dies, including a dedicated tag-storage DRAM die architected for low-latency tag-address retrieval and thus rapid hit / miss determination, and one or more capacity-optimized cache-line DRAM dies that render a net cache-line storage capacity orders of magnitude beyond that of state-of-the art SRAM cache implementations. The tag-storage die serves double-duty in some implementations, yielding rapid tag hit / miss determination for cache-line read / write requests while also serving as a high-capacity snoop-filter in a memory-sharing multiprocessor environment.

Provided in the present application are a virtual instance management method based on cloud computing technology, and a cloud management platform. The cloud management platform is used for managing a cloud data center, wherein the cloud data center comprises a plurality of servers that access a high-speed interconnect bus inside the cloud data center. The method comprises: receiving a virtual instance memory creation request that is input by a tenant; in response to the virtual instance memory creation request, selecting a first server from a plurality of servers and sending a first control command to the first server; receiving a first virtual instance memory binding request; and in response to the first virtual instance memory binding request, sending a second control command to the first server to instruct the first server to provide, by means of a high-speed interconnect bus, a virtual instance memory located on the first server to a first virtual instance located on a second server for use. By means of the technical solution, memory sharing across servers for virtual instances can be realized, thereby improving data communication efficiency and memory utilization efficiency.

Embodiments of the present disclosure disclose a method of sharing memory cross operating systems, apparatus, a circuit, a medium, and a device. The method of sharing memory cross operating systems includes: determining a first dynamic buffer area in a first operating system according to a memory sharing message; determining an address identifier corresponding to the first dynamic buffer area; and sending the address identifier to a second operating system, wherein the first operating system and the second operating system are in a same integrated circuit.

The invention relates to an edge system with a dual-processor architecture, which integrates a broadband processor and an enterprise network processor through coordinated function configuration. The service level of the packet flow is divided by the post-provisioning data and the telemetry data, and it is determined whether to transmit the packet by the broadband processor or to selectively perform a high-order function, such as deep packet detection, data encryption, or data compression, by the enterprise network processor. Embodiments include logical coupling of virtual area networks, a signalling mechanism of segment routing / micro identity identification, a transport mechanism of memory sharing and without duplication, and a hybrid coupling combining logical control and data transport entity structures.

The utility model discloses a storage server, relates to the computer field, said storage server includes at least one computing module, central backplane, sharing module, wherein each computing module includes mainboard, mainboard includes central processing unit and memory, sharing module includes the storage equipment that is used for providing the service for at least one computing module, the central processing unit includes the central processing unit and the memory. And each calculation module is connected with the sharing module through the middle backboard.

A multi-stream GPU memory multiplexing method for tensor structure equivalence, after the memory block of a computing stream is released, it is put into a memory sharing pool, the method comprises the following steps: extracting the structure information of a tensor, including dimension, data type and step layout, generating a unique structure identifier based on the structure information of the tensor; constructing and maintaining a mapping table, the mapping table stores a plurality of key-value pairs, the key is a unique structure identifier, and the value is a memory address, the memory block is located in the memory sharing pool; when allocating the memory of the tensor, in combination with the current execution context identifier, query whether there is a memory address in the mapping table that matches the unique structure identifier and is not occupied, if so, adjust the pointer to point to the memory address, and allocate the unoccupied memory to the tensor; if not, apply for a memory address and update the mapping table. The method can reuse a large number of non-overlapping tensor spaces without changing the original network structure and execution logic, and significantly reduces the peak memory occupancy.

The embodiment of the invention provides a memory sharing method and device, electronic equipment, a storage medium and a product, and relates to the technical field of memory management. Allocating a virtual memory area of a corresponding first process to a shared virtual memory space bound with the target shared file; in response to an access request of the first process for the target virtual memory area, determining a target shared virtual memory space corresponding to the target virtual memory area; under the condition that the access request is not sent by the first process for the target virtual memory area for the first time, if a page table entry corresponding to a corresponding target shared virtual memory space exists in a target host address space to which the target shared virtual memory space belongs, responding to the access request based on the page table entry; and otherwise, allocating a physical page to the target shared virtual memory space, and generating a corresponding page table entry in the target host address space. The memory consumption can be reduced.

The invention relates to an AI processor based on storage and calculation integration, three-dimensional integration and memory sharing and a control method of the AI processor. The calculation unit is coupled with the at least one storage unit through a three-dimensional integration technology, and the calculation unit comprises a neural network processing unit which is used for executing neural network correlation calculation; the interface device is arranged on the computing unit and is used for performing communication coupling on the AI processor and external main control equipment; the control module is arranged in the storage unit and used for switching the storage unit between a first working mode and a second working mode, and in the first working mode, the storage unit establishes communication coupling with external main control equipment through the interface device and executes storage operation in response to the read-write request; in the second working mode, the storage unit establishes communication coupling with the neural network processing unit, and responds to a calculation request of the neural network processing unit to assist in executing calculation operation; and the functions of high-performance AI acceleration and general storage are considered through working mode switching and time division multiplexing.

Techniques for managing the memory of computing devices that host multiple VMs by selecting optimally sized pages of virtual memory for programs running in the VMs. Virtual memory has traditionally been divided into pages of a single size (e.g., small, large, or huge) that are then offered to programs running in VMs. These page sizes have different benefits and drawbacks that must be considered when selecting the best page size for virtual memory. For example, small pages increase memory sharing between the VMs, but also result in an execution slowdown. Conversely, large pages improve execution performance by reducing latency in address translations, but limit memory sharing. This disclosure describes using small pages for sharable memory, and using large pages for private memory that cannot be shared. This provides the high performance needed for certain applications by using large pages, but still allows for increased memory sharing using small pages.

The present application discloses a cross-host memory sharing method, system, device and medium. The memory sharing system includes a master node and several slave nodes. The memory sharing method is applied to the master node and relates to the field of memory sharing technology, including: receiving a memory application request from a target slave node; applying for a target memory in a target memory shared area according to the memory size requirement corresponding to the request, feeding back the memory information of the target memory to the target slave node so that the target slave node can determine the corresponding memory type according to the memory information. If the process corresponding to the target slave node executes a memory mapping method, the target memory can be mapped to the virtual address space according to the target type and the offset corresponding to the target memory so that the process can use the allocated target memory. In this way, it can be ensured that when one node writes to the memory, other nodes will not write to the memory synchronously, thereby ensuring the data consistency of multiple hosts accessing the shared memory.

The invention discloses a transaction closed-loop processing method and system based on double-end collaborative hot update and containerization, and the method comprises the steps: carrying out the encryption storage of a script based on a management end, and pushing the encrypted script to a server; after receiving the script based on the server side, executing decryption and real-time compiling, generating an executable instance and storing the executable instance into a pre-compilation instance pool; the instance is automatically released by the JVM when the reference count returns to zero; the server side is deployed in a Kubernetes cluster in a containerization manner, and the capacity is dynamically expanded and shrunk; the method comprises the following steps of: performing closed-loop processing on a service request by the same server instance: completing multi-step operation through a local database transaction; realizing cross-method state transfer by using JVM memory sharing; the call link depth is constantly a preset value and is directly referenced and executed through a memory. According to the method, the management end pushes the script to the server end, the server end compiles in real time, and Kubernetes containerization capacity expansion and contraction are combined, so that service request closed-loop processing is realized, distributed transaction coordination is eliminated through local transaction and memory sharing, and transaction time consumption is reduced.

The invention discloses a telescope real-time control method and system based on a synchronous time service and memory sharing mechanism, the core of the method is to construct a hard real-time, high-synchronization and low-delay distributed control system for a telescope platform, and the method specifically comprises the following steps: constructing a real-time computing platform; constructing a high-precision time synchronization system; constructing a global shared memory network; defining and initializing a shared memory data area; the deterministic control logic based on the unified time reference is realized; and deploying a watchdog and a health monitoring mechanism. The method has a wide application prospect in the field of precise motion control of astronomical telescopes and the like. According to the method, the problems of poor real-time performance and low synchronization precision caused by network delay, clock asynchronization and process scheduling uncertainty of an existing telescope control system are solved.