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EMS memory sharing system, device and method

A memory sharing and memory technology, applied in the field of multi-core processors, can solve problems such as insufficient utilization of memory resources, increased workload of technicians, and unbalanced load, so as to relieve pressure on memory usage, improve utilization rate, and improve reliability. sexual effect

Active Publication Date: 2008-04-09
HUAWEI TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in a multi-core processor system with non-uniform memory access management, the memory resources cannot be fully utilized due to load imbalance between processors.
In the existing technology, in order to make full use of memory resources, technicians often have to modify the application program. The disadvantage of this is that the workload of the technicians is increased, and the effect is not good.

Method used

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  • EMS memory sharing system, device and method
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  • EMS memory sharing system, device and method

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Embodiment Construction

[0071] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments.

[0072] The present invention is based on a multi-core non-uniform memory access platform, and proposes a system, device and method for sharing multiple processor cores or inter-processor memory based on lease that is transparent to users.

[0073] The memory sharing system of the present invention includes multiple nodes (Nodes) having at least one processor core and / or at least one processor. As an implementable manner, as shown in Fig. 1, only two nodes in non-uniform memory access (NUMA) are shown in the figure. The reference number 100 represents node i, and the reference number 200 represents another node j. The operation of the two nodes The memory sharing device 10 of the present invention is used in the system, and the memory sharing device in node j in the figure is not fully shown.

[0074] The node 100 also has an application program 101 an...

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Abstract

The invention discloses a memory shared system and a device, as well as a method in a multi-core NUMA system. The system comprises a plurality of nodes; the operating system of each node comprises a memory shared device, the memory shared device comprises: a memory information collection and processing module, a memory application module, as well as a module establishing a distant end memory dynamic management structure and connected with a communication module. The method comprises the following steps: step S1, when the memory of a front node is deficient, the memory deficiency information is sent to other nodes, the node information of vacant memory in other nodes is collected, then the memory application information is sent to the nodes with vacant memory requesting the use of distant end memory; step S2, after receiving the memory application information, the nodes with vacant memory distributes the distant end memory with the current node, and let the current node dynamically manages and exclusively uses the distant end memory. The invention borrows the distant end vacant memory to accomplish the load leveling of the entire system.

Description

Technical field [0001] The present invention relates to the technical field of multi-core processors, in particular to a system, device and method for realizing memory sharing between nodes in a non-uniform memory access (NUMA) of a multi-core processor system. Background technique [0002] Non-uniform memory access (NUMA) is a method of configuring a cluster of microprocessors in a multi-processor system, so that memory can be shared locally, improving the performance and capabilities of system expansion. [0003] Non-uniform memory access is used in Symmetric Multi-Processing (SMP). A symmetric multiprocessing system is a system that is "closely connected" and "shares everything", in which multiple processors under a single operating system access each other's memory through a common bus or "interconnection" path. One limitation of symmetric multiprocessing is that when the number of microprocessors increases, the shared bus and data path become overloaded and become a performa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/08G06F12/02
Inventor 张翔马捷苗艳超
Owner HUAWEI TECH CO LTD
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