53 results about "Internetworking" patented technology

One embodiment provides a graphics processor comprising a memory interface and a processing cluster array including a plurality of processing resources interconnected via a switched interconnect network, at least one of the plurality of processing resources including a matrix accelerator configured to execute an instruction to perform a multi-dimensional sparse matrix multiply and accumulate operation having input in a sparse microscaling format including merged sparsity and scaling metadata.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for distributing machine learning workloads across hardware accelerators. One of the systems comprises a first plurality of hardware accelerators that are interconnected over a first network and one or more corresponding hosts for the first plurality of hardware accelerators; and a second plurality of hardware accelerators that are interconnected over a second network and one or more corresponding hosts for the second plurality of hardware accelerators, wherein the corresponding hosts for the first and second pluralities of hardware accelerators are connected over a third network. For example, the first and second network can each be a respective Inter-Core Interconnect (ICI) network, while the third network can be a data center network, e.g., an Ethernet network.

Method for transporting packets in a multi-cluster Network on Chip (NoC) interconnect with a transport protocol significantly enhance packet management in complex NoC chip architectures. This approach involves processing a packet within clusters to determine a destination cluster and a destination node, and executing a node lookup for the packet intended for different clusters. This lookup identifies an optimal path for transporting the packet out of the cluster. The multi-cluster NoC interconnect efficiently outlines cluster-to-cluster connections and manages global traffic, incorporating deadlock prevention techniques. Global bridges and boundary bridges facilitate effective traffic management between clusters. Each node includes a programmable path table that dynamically assigns efficient routes. This method significantly improves packet management across multi-cluster NoCs, offering a scalable, efficient, and reliable solution for complex computing environments.

The invention provides a circuit breaker networking system and a communication gateway, and relates to the technical field of low-voltage electric appliances. The system comprises a circuit breaker cluster, a gateway cluster, a cloud service platform and a mobile terminal, the circuit breaker cluster comprises a plurality of circuit breaker devices, and each circuit breaker device is configured with a first target communication chip; the gateway cluster comprises a plurality of communication gateways, and each communication gateway is configured with a second target communication chip; at least a satellite flash communication protocol is integrated in the first target communication chip and the second target communication chip; each communication gateway establishes a network topology with each circuit breaker device through a star flash communication protocol; each communication gateway is also in network interconnection with the cloud service platform through a local area network communication protocol; and the cloud service platform establishes communication connection with the mobile terminal through a network communication protocol. According to the method, a network topology can be established between the circuit breaker cluster and the gateway cluster through a star flash communication protocol, the data transmission efficiency and the transmission distance of circuit breaker equipment are improved, and the network coverage rate and the stability are improved.

1. Name of the designed product: Integrated Application Gateway (CT-HIAG200). 2. Use of the designed product: for network interconnection. 3. Design points of the designed product: in shape. 4. Picture or photo that best indicates the design points: perspective view.

1. The name of the design product: broadcast gateway. 2. The use of the design product: network interconnection for broadcast system. 3. The design points of the design product: in shape. 4. The picture or photo that best shows the design points: perspective view 1.

The application provides a smart device abnormal recovery method and device, an electronic device and a device local area network, and relates to the technical field of smart homes. The smart device abnormal recovery method comprises the following steps: determining that a fault occurs; obtaining black box abstract information of fault state data at a current time; broadcasting an abnormal rescue request in the device local area network; after a network interconnection device detects the broadcast of the abnormal rescue request, the network interconnection device establishes a connection with the smart device, reads the black box abstract information from the smart device; receiving an update package sent by the network interconnection device; the update package corresponds to the black box abstract information; the update package is received from a cloud server after the network interconnection device reports the black box abstract information to the cloud server; and performing an online upgrade operation based on the update package. The application can efficiently and reliably recover the fault of the smart device occurring in the running process.

Small and compact Deep Learning models are required for embedded AI in several domains. In many industrial use-cases, there are requirements to transform already trained models to ensemble embedded systems or re-train those for a given deployment scenario, with limited data for transfer learning. Moreover, the hardware platforms used in embedded application include FPGAs, AI hardware accelerators, System-on-Chips and on-premises computing elements (Fog / Network Edge). These are interconnected through heterogenous bus / network with different capacities. Method of the present disclosure finds how to automatically partition a given DNN into ensemble devices, considering the effect of accuracy—latency power—tradeoff, due to intermediate compression and effect of quantization due to conversion to AI accelerator SDKs. Method of the present disclosure is an iterative approach to obtain a set of partitions by repeatedly refining the partitions and generating a cascaded model for inference and training on ensemble hardware.

A chip architecture and system design for accelerating neural network computation is disclosed. The chip includes a plurality of cores interconnected via a ring-shaped network-on-chip (NoC), each core comprising a 2D mesh of processing elements (PEs) with hierarchical software-and hardware-based schedulers. Each PE includes specialized compute engines, local memory, and dynamic precision conversion logic. The architecture supports flexible instruction dispatch, scalable memory access, and runtime scheduling optimization. The chip can be deployed in chiplet-based configurations, PCIe cards with paired chips, or modular OAM cards with single-chip packaging. Multi-card systems utilize crossbar switch fabrics and direct inter-card links to enable efficient, low-latency communication and high-bandwidth scalability.

A memory chip comprises memory banks, each memory bank including a compute unit. The memory banks are configured to be interconnected through an inter-bank network and perform inter-bank communication, and the compute unit is configured to perform a computation using data transmitted through the inter-bank network.

A programmable logic controller (PLC) for controlling an automated system, in which a large number of control devices are interconnected via a communication network (50), has a first hardware platform (60) on which a first operating system (62), dependent on the hardware platform (60), is installed. The first operating system provides a real-time capable first execution environment (64) for a first control program (66). The PLC also has a virtualization platform (68a) that provides a second execution environment (70) for a second control program (72a). A first control program (66) is executable in the first execution environment (70) and implements a first control functionality with hard real-time requirements. A second control program (72a) is executable in the second execution environment (70) and implements a second control functionality.The first execution environment (60) has access to a first network interface (82, 84). The second execution environment (70) provides a second network interface (82). The first control program (66) and the second control program (72a) exchange data with each other via the first and second network interfaces (82).

The invention relates to the technical field of chip computing network interconnection, in particular to a Mesh and Dragonfly fused chip computing network networking method, which comprises the following steps: firstly, adopting Mesh topology to interconnect computing nodes in a local range to form a POD unit, and enabling POD internal nodes to be only directly connected with adjacent nodes; abstracting a POD edge routing node into an external connection channel as a unique interface of cross-unit communication; then, taking the POD as a basic unit, constructing a switch-free multi-stage Dragonfly topology through an external connection channel, and directly undertaking a cross-group connection function by an edge routing node; a symmetric interconnection rule and a port retention rule are followed in the networking process. Core advantages of the Mesh topology and the Dragonfly topology are fused, low-overhead and efficient communication in the POD is achieved by means of the Mesh topology, global communication delay is reduced through the switchless Dragonfly topology, meanwhile, the excellent multi-level expansion capacity is achieved, the hardware area and power consumption overhead can be reduced, the method is compatible with various computing node types, and multi-field networking requirements are met.

The embodiment of the invention discloses a COE interconnection simulation method and system based on a DPDK and a full user mode protocol stack and a medium. Constructing a user state simulation environment comprising a DPDK driver and a full-user state network protocol stack on at least two network interconnected nodes; encapsulating a memory access request of the CXL protocol into frame data conforming to a predetermined format, and adding network layer and transport layer protocol headers through a full-user-state network protocol stack to form an Ethernet data frame; the Ethernet data frame is submitted to a physical network card for sending through a DPDK interface; receiving an Ethernet data frame from a physical network card through a DPDK interface, stripping protocol heads of a network layer and a transport layer by a full-user-state network protocol stack, and de-encapsulating to obtain CXL protocol data; and performing response processing according to the decapsulated CXL protocol data, generating confirmation information when needed, and sending the confirmation information to an opposite-end node through a full-user-state network protocol stack and a DPDK interface.

The invention discloses a programmable network interconnection core particle, a network interconnection unit and a multi-core particle interconnection structure. The network interconnection core grain comprises a control core, a plurality of processing cores and a plurality of routing nodes corresponding to the processing cores, each processing core is provided with an external interface and a network interface, each network interface is in two-way communication connection with the corresponding routing node, and the routing nodes are actually arranged or virtually arranged into a multi-row and multi-column matrix. The adjacent routing nodes in the same row and the same column are respectively in bidirectional communication connection, so that all the processing cores are connected together to form an information interconnection network channel; and the control core is connected with each routing node, monitors the state of the routing node and controls and switches the transmission direction of the routing node. Communication paths between different interfaces can be freely programmed and adjusted, the interconnection flexibility is high, and maintenance is convenient.

Techniques are described in which storage nodes within a storage cluster are configured to support graph-based storage management. For example, a storage cluster comprises a network and a plurality of computing systems, each interconnected over the network, wherein the plurality of computing systems includes a plurality of storage nodes. The computing system of the plurality of computing systems is configured to allocate a volume of storage within the storage cluster, generate a volume graph of the volume, wherein the volume graph represents one or more functional elements in a data plane of the volume, and manage the volume based on the volume graph.

A network interconnection, for interconnecting a power supply network with a number of power distribution networks, including a power converter station that is connected in use adjacent to an end of a power supply network and is controllable to provide an alternating voltage source. The network interconnection also includes an interconnection bus which extends from the power converter station towards a primary point of interconnection that is connected, in use, with a primary power distribution network and at least one secondary point of interconnection which is connected, in use, with a corresponding secondary power distribution network. The network interconnection additionally includes a power regulator that is electrically connected between the interconnection bus and each secondary point of interconnection. The network interconnection further includes a power flow controller that is arranged in operative communication with the power converter station and each power regulator.

Systems, methods, and network attached storage nodes for secure peer-to-peer file sharing using consistent hashing for distributed ownership data. A plurality of network attached storage nodes may be interconnected by a network and configured for peer-to-peer communication without a centralized server. When a node receives a user data file, it divides the file into data chunks and determines hashes for those data chunks. It uses the chunk hashes to map the data chunks to other nodes for storage. It also sends ownership data for the file that includes an owner identifier, a hash key, the set of chunk hashes.

1. Name of the product in this design: Individual Soldier Gateway. 2. Application of this design: This design is used to achieve network interconnection in scenarios such as forest rescue and post-disaster relief. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: a 3D model.

A chip architecture and system design for accelerating neural network computation is disclosed. The chip includes a plurality of cores interconnected via a ring-shaped network-on-chip (NoC), each core comprising a 2D mesh of processing elements (PEs) with hierarchical software-and hardware-based schedulers. Each PE includes specialized compute engines, local memory, and dynamic precision conversion logic. The architecture supports flexible instruction dispatch, scalable memory access, and runtime scheduling optimization. The chip can be deployed in chiplet-based configurations, PCIe cards with paired chips, or modular OAM cards with single-chip packaging. Multi-card systems utilize crossbar switch fabrics and direct inter-card links to enable efficient, low-latency communication and high-bandwidth scalability.

A system interconnects multiple client devices over a network. A local group of the client devices is located at a live event and a remote group is located remote from the live event. Each client device of the local group is a potential source of a live stream which, when rendered by another client device, causes display of a vantage point of the live event. The system dynamically updates a subscription list to include an indication of any client device of the local group that is actively live streaming and remove an indication of any client device of the local group that terminated live streaming. The system can enable selective access to any live streams of any client device of the updated subscription list and disable access to any live streams of any client device removed from the updated subscription list.

The aim is to provide a method for efficiently managing responses from businesses to questionnaires regarding ESG evaluations. [Solution] In a greenhouse gas emissions management system in which an administrator terminal and multiple business terminals are interconnected via a communication network, a method for managing data related to the ESG evaluation of businesses is provided, wherein the control unit of the administrator terminal refers to the ESG evaluation data of each of the multiple supplier businesses, identifies supplier businesses that fall below a standard value based on the ESG evaluation data, identifies buyer businesses related to the supplier businesses, and sends an alert to the business terminals of buyer businesses among the identified buyer businesses that continue to do business with the supplier businesses.

According to exemplary embodiments of this disclosure, methods, apparatus, and storage media for interconnect evaluation are provided. The method includes: acquiring an interconnect network corresponding to the circuit structure of a target chip, the interconnect network including multiple nodes and multiple interconnects connecting the multiple nodes; and determining a first interconnect lifetime for each of the multiple interconnects based on the steady-state stress of each of the multiple nodes. In this manner, the accuracy, reliability, and efficiency of chip lifetime prediction can be improved.

1. The name of this design product: Gateway (FNR410). 2. Purpose of this design product: Gateway for network interconnection. 3. The key point of the design of this product lies in its shape. 4. The picture or photo that best illustrates the design points: Stereoscopic drawing 1.

The invention discloses a method for capturing and monitoring a high-speed serial bus data packet of a distributed system, which belongs to the field of data transmission monitoring application in a high-performance distributed computing system, and comprises the following steps: S1, traversing all nodes in the system by a master control node, establishing network interconnection topological information, writing in a bus attribute register CT identifier of a monitoring node, and executing the step S2; distributing and recording ID numbers of the monitoring nodes; s2, the monitoring node judges a switching chip port and a path between two nodes to be monitored, and screens a data packet to be monitored; configuring a capture register of the port, determining a packet type and a data packet size between two nodes to be captured, starting capture, and waiting for an event; s3, the monitoring node obtains data to be monitored by reading the content of the buffer area; and the monitoring node obtains the original data and compares the original data with the transmission data for verification. According to the invention, the application requirements in the aspect of data transmission monitoring in a high-performance distributed computing system are met.

A shortest evacuation route system is disclosed. The shortest evacuation route system comprises a plurality of sensing units, each including an evacuation guide light, configured to output and transmit a fire detection signal which is a signal generated by detecting an occurrence of a fire or an amplified signal of a received signal, and a shortest evacuation route generation server. The shortest evacuation route generation server comprises a graph generation unit, a shortest path generation unit, and a network interconnection unit.

A network interconnection, for interconnecting a power supply network with a number of power distribution networks, including a power converter station that is connected in use adjacent to an end of a power supply network and is controllable to provide an alternating voltage source. The network interconnection also includes an interconnection bus which extends from the power converter station towards a primary point of interconnection that is connected, in use, with a primary power distribution network and at least one secondary point of interconnection which is connected, in use, with a corresponding secondary power distribution network. The network interconnection additionally includes a power regulator that is electrically connected between the interconnection bus and each secondary point of interconnection. The network interconnection further includes a power flow controller that is arranged in operative communication with the power converter station and each power regulator.

A computing system includes a distributed computing cluster comprising a plurality of computing nodes interconnected via an interconnection network, wherein the computing nodes in the plurality of computing nodes communicate with each other via message passing via the interconnection network. The computing nodes are configured with a first parameter governing message transmission by the computing nodes via the interconnection network. The computing nodes are configured to accumulate messages for transmission as a group according to the first parameter, and the computing system is configured to limit injection of computing requests into the distributed computing cluster according to a second parameter. A controller is configured to receive at least one predetermined service level requirement and control a value of the second parameter and a value of the first parameter to control the computing throughput of the distributed computing cluster while complying with the at least one service level requirement.

An embodiment uses entanglement and quantum teleportation to build a quantum backbone network. A network interface interconnects packetized quantum networks with entanglement-based quantum backbone networks.

The invention discloses a power amplifier system based on a heterogeneous integration process and a manufacturing method of the power amplifier system. The system comprises an active tube core manufactured by adopting a III-V compound semiconductor process and a passive matching network / interconnection structure manufactured by adopting an integrated passive device (IPD) process, and the active tube core and the passive matching network / interconnection structure are heterogeneously integrated through an advanced interconnection process. According to the invention, the active tube core is manufactured only on expensive GaAs, GaN or other III-V technologies, and the matching network and the interconnection structure are manufactured by adopting a low-cost IPD technology, so that the overall manufacturing cost is greatly reduced. According to the invention, the integration level can be greatly improved. The matching network and the interconnection structure are integrated on the IPD substrate, so that higher integration level can be realized, and the chip area is effectively reduced.