The embodiment of the invention discloses
processing methods, device, equipment and
system for an
IPsec (
Internet Protocol Security) protocol and a computer readable memory medium. The
system comprises an FPGA board card, a host
server and a network card. The FPGA board card and the host
server carry out data communication through PCIE (
Peripheral Component Interconnect Express). The FPGA board card is connected with the network card. The FPGA board card comprises a
data compression / decompression module which is used for compressing to-be-processed data read by slave and host
server memories and decompressing IP data packets sent by the network card, and an
IPsec data processing module which is used for carrying out
IP processing on the data. The
processing methods, the device, the equipment and the systems are simple in design, clear in structure and are convenient for realization.
Hardware acceleration is carried out on
IPsec protocol processing through utilization of the FPGA. A network card structure can be customized through utilization of the FPGA. Through compression of the data, practical data bandwidths can exceed
optical fiber limitation, so network bandwidths are improved. According to task change or increase of data volume, the network card can be changed without changing server hardware, so cost is reduced.