4results about How to "Maximize throughput" patented technology

The application provides a vulnerability repair method and system, and relates to the technical field of network security vulnerability verification and enterprise vulnerability management. The application obtains a task containing a vulnerability identifier, asset information and to-be-verified repair content, processes the task in parallel according to a pipeline split according to business execution steps, and configures a resource pool matching external dependencies for each stage; a stage fingerprint is generated when the task is transferred, a result is reused when a subtask is executed, otherwise the execution is scheduled according to vulnerability harm, asset importance and threat intelligence, and the vulnerability repair is completed according to the verification result. The application solves the problems of low throughput of the existing general pipeline, slow response of high-priority tasks, and easy starvation of low-priority tasks, and achieves the effect of collaborative optimization of throughput improvement, emergency task response acceleration and low-priority task starvation prevention without changing the original business and hardware.

This invention belongs to the field of communication and network control technology. To address the problems of poor adaptability in non-ideal observation environments and the inability of a single optimization objective to meet various differentiated service requirements, and to overcome scheduling failures caused by network jitter or node failures leading to data loss, this invention provides: a time-sensitive network traffic scheduling method based on causal data completion. This method collects real-time traffic data from the current time-sensitive network (TSN) and constructs an irregular observation matrix; it uses a state reconstruction module based on neural Granger causality to complete the missing data in the observation matrix; it extracts robust spatiotemporal features with noise resistance from the completed observation matrix using a variational graph attention network; and it inputs these robust spatiotemporal features into a reinforcement learning decision network based on hierarchical optimization. Under the hard real-time constraint of priority critical time-triggered TT flow, it optimizes the best-effort BE flow transmission efficiency, ultimately generating a gated control list for execution. This invention is primarily applied in design and manufacturing applications.

The invention discloses a cleaning device which comprises a conveying mechanism capable of conveying a target object from a sorting position to a cleaning position and a jacking position in sequence, and the conveying time of conveying the target object from the sorting position to the jacking position is a first used time length; the sorting time of the sorting mechanism for the single target object is a second used time length; the cleaning mechanism is arranged on one side of the sorting mechanism, located above the cleaning position and used for cleaning the target object, and the cleaning time of the target object is the third duration; the jacking mechanism is arranged on the side, away from the sorting mechanism, of the cleaning mechanism and located below the jacking position, the target object is jacked to the target position, and the jacking time is the fourth time duration; the ratio of the first time duration to the second time duration to the third time duration to the fourth time duration ranges from 5: 1: 3: 1 to 6: 1: 4: 1. Through the mode, the collaboration among the functional modules of the cleaning device can be optimized, so that the cleaning efficiency and the operation reliability of the device are improved.

Methods and systems associated with caches are disclosed. One disclosed system includes at least one memory storing at least two data structures. The at least two data structures include a first data structure and a second data structure. The system also includes at least two caches with a first cache which caches the first data structure and a second cache which caches the second data structure. The system also includes a controller communicatively coupled to the at least two caches. The controller separately configures the first cache based on the first data structure and the second cache based on the second data structure. The system also comprises at least one processor communicatively coupled to the at least two caches. The processor accesses each of the at least two data structures using the at least two caches and during the execution of a complex computation.