The invention discloses a
capacitor mismatch error shaping circuit and method suitable for a multi-bit quantization Sigma-
Delta ADC, and belongs to the technical field of integrated circuits, and the
capacitor mismatch error shaping circuit comprises a data weight averaging module which is used for adopting a data weight averaging technology for high-bit quantization code words, and correcting the high-bit quantization code words according to the data weight averaging technology; averaging the mismatch error of the
capacitor corresponding to the high-order quantization
code word to obtain an averaged high-order capacitor; and the mismatch error shaping module is used for taking the averaged high-order
capacitance as a reference, adopting a mismatch error shaping technology, keeping low-order feedback of the current low-order quantization
code word of the lower polar plate of the capacitive digital-to-analog converter during Sigma-
Delta ADC sampling, and realizing subtraction operation between two adjacent low-order quantization code words. According to the invention, the error caused by the mismatch of the CDAC capacitor fed back by the multi-bit quantization Sigma-
Delta ADC can be effectively suppressed, the
linearity of the
system is improved, and the circuit overhead is remarkably reduced.