The invention relates to a dual-mode low dropout
linear regulator and a
chip thereof in the technical field of electronic circuits. The
voltage stabilizer comprises an
operational amplifier, N-type transistors Q1, Q2, PMOS (P-channel
Metal Oxide Semiconductor) transistors PM1, PM2, current sources Ibias1, Ibias2, switches S1, S2, a switch JUMP, resistors R1, R2 and an output
capacitor Co. Heavy-load configuration: controlling the S1 and the switch JUMP to be switched off, and controlling the S2 to be switched on; and
light load configuration: controlling the S1 and the switch JUMP to be switched on, and controlling the S2 to be switched off. Therefore, the Q2 is used for
heavy load configuration, and the load driving capacity is high. According to
light load configuration, Q2 is not used any more, Q1 is selected as a power tube, certain driving capacity is achieved, meanwhile, part of
layout area is saved, different working
modes are switched according to actual application scenes, and stable output
voltage is obtained. Through experimental
simulation, the circuit disclosed by the invention can realize switching of two configurations on the premise of not losing performance functionally, and meanwhile, the Q2 with the largest area in the
voltage follower can be multiplexed, so that area optimization is realized.