Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel comprises a pixel circuit and a light emitting element; the pixel circuit comprises an amplitude modulation sub-circuit and a pulse width modulation sub-circuit; the pixel circuit comprises a first pixel circuit and a second pixel circuit; the light emitting element comprises a first light emitting element and a second light emitting element; the first pixel circuit is used for driving the first light emitting element; the second pixel circuit is used for driving the second light emitting element; the light emitting color of the first light emitting element is different from the light emitting color of the second light emitting element; the first pixel circuit comprises a first target transistor; the second pixel circuit comprises a second target transistor; the functions of the first target transistor and the second target transistor are the same; the width-length ratio of the first target transistor is not equal to the width-length ratio of the second target transistor. According to the embodiment of the application, the driving capability can be considered and the layout design of the pixel circuit is optimized.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and display device. Background Technology

[0002] With the development of display technology, display panels are being used more and more widely, and users are demanding more and more display quality from them. To meet the requirements for higher definition, the resolution of display panels is getting higher and higher.

[0003] To meet the driving requirements of high-resolution display panels, such as micro LED or organic light-emitting diode (OLED) display panels, a pixel circuit combining pulse amplitude modulation (PAM) and pulse width modulation (PWM) is used to control the driving current intensity and duration to control the light-emitting state of the light-emitting element.

[0004] For pixel circuits that combine pulse amplitude modulation (PAM) and pulse width modulation (PWM), optimizing the layout design of the pixel circuit is an important problem for those skilled in the art. Summary of the Invention

[0005] This application provides a display panel and display device that can optimize the layout design of pixel circuits.

[0006] In a first aspect, embodiments of this application provide a display panel, including pixel circuits and light-emitting elements; the pixel circuits include amplitude modulation sub-circuits and pulse width modulation sub-circuits, and the pixel circuits include a first pixel circuit and a second pixel circuit; the light-emitting elements include a first light-emitting element and a second light-emitting element; the first pixel circuit is used to drive the first light-emitting element, and the second pixel circuit is used to drive the second light-emitting element; the light emission color of the first light-emitting element and the light emission color of the second light-emitting element are different; the first pixel circuit includes a first target transistor, and the second pixel circuit includes a second target transistor; the first target transistor and the second target transistor have the same function; the aspect ratio of the first target transistor and the aspect ratio of the second target transistor are not equal.

[0007] Based on the same inventive concept, in a second aspect, embodiments of this application provide a display device including a display panel as described in the first aspect embodiment.

[0008] According to the display panel and display device provided in the embodiments of this application, a first pixel circuit is used to drive a first light-emitting element, and a second pixel circuit is used to drive a second light-emitting element. The transistors with the same function in the first pixel circuit and the second pixel circuit are designed with different sizes. In this way, both driving capability and layout design can be taken into account. For example, for a light-emitting element that requires a large driving capability, the aspect ratio of the target transistor in its pixel circuit can be relatively large, thereby ensuring the driving capability of the light-emitting element that requires a large driving capability. Or, for a light-emitting element that requires a small driving capability, the aspect ratio of the target transistor in its pixel circuit can be reduced, thereby reducing the layout area occupied by the pixel circuit. This can optimize the layout design and is conducive to setting more pixel circuits in a limited area, thereby increasing the pixel density. Attached Figure Description

[0009] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0010] Figure 1 This illustration shows a structural schematic diagram of a display panel provided in an embodiment of this application;

[0011] Figure 2 This illustration shows a schematic diagram of a pixel circuit in a display panel provided in an embodiment of this application;

[0012] Figure 3 This illustration shows another structural diagram of the pixel circuit in the display panel provided in an embodiment of this application;

[0013] Figure 4 This is a schematic diagram of a first pixel circuit in a display panel provided in an embodiment of this application;

[0014] Figure 5 This illustration shows a schematic diagram of a second pixel circuit in a display panel provided in an embodiment of this application;

[0015] Figure 6 This illustration shows another structural diagram of the first pixel circuit in the display panel provided in an embodiment of this application;

[0016] Figure 7 This illustration shows another structural diagram of the second pixel circuit in the display panel provided in an embodiment of this application;

[0017] Figure 8 This illustration shows yet another structural diagram of the first pixel circuit in the display panel provided in an embodiment of this application;

[0018] Figure 9This illustration shows another structural diagram of the second pixel circuit in the display panel provided in an embodiment of this application;

[0019] Figure 10 This illustration shows yet another structural diagram of the pixel circuit in the display panel provided in an embodiment of this application;

[0020] Figure 11 This illustration shows a schematic diagram of a third pixel circuit in a display panel provided in an embodiment of this application;

[0021] Figure 12 This illustration shows another structural diagram of the third pixel circuit in the display panel provided in an embodiment of this application;

[0022] Figure 13 This illustration shows another structural diagram of the third pixel circuit in the display panel provided in an embodiment of this application;

[0023] Figure 14 This illustration shows a schematic diagram of a layout structure of some components in a display panel provided in an embodiment of this application;

[0024] Figure 15 This illustration shows a schematic diagram of a target transistor in a display panel provided in an embodiment of this application;

[0025] Figure 16 This is a schematic diagram of a display device provided in an embodiment of this application.

[0026] Explanation of some figure labels:

[0027] 100. Display panel;

[0028] 10. Pixel circuit; 101. First pixel circuit; 102. Second pixel circuit; 103. Third pixel circuit;

[0029] 20. Light-emitting element; 21. First light-emitting element; 22. Second light-emitting element; 23. Third light-emitting element;

[0030] 11. Amplitude modulation sub-circuit;

[0031] 12. Pulse width modulation sub-circuit;

[0032] 01. First target transistor; 02. Second target transistor; 03. Third target transistor;

[0033] 100. Display device. Detailed Implementation

[0034] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0035] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0036] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0037] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0038] The term "connection" can refer to "electrical connection" or "electrical connection without an intermediate transistor." The term "insulation" can refer to "electrical insulation" or "electrical isolation." The term "drive" can refer to "control" or "operation." The term "part" can refer to "section." The term "pattern" can refer to "component." The term "end" can refer to "end segment" or "end edge." A display panel can be a display device or a module / part of a display device.

[0039] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0040] This application provides a display panel and a display device thereof. The following description, in conjunction with the accompanying drawings, will illustrate various embodiments of the display panel and the display device.

[0041] like Figure 1 As shown, the display panel 100 includes a pixel circuit 10 and a light-emitting element 20. The pixel circuit 10 is connected to the light-emitting element 20, and the pixel circuit 10 is used to drive the light-emitting element 20 to emit light.

[0042] The light-emitting element 20 can be a micro LED or OLED, etc., and can be designed according to the actual situation in specific implementation. Optionally, the light-emitting element 20 can be an inorganic light-emitting element including a first electrode, a second electrode, and an inorganic semiconductor disposed between the first electrode and the second electrode.

[0043] The pixel circuit 10 includes an amplitude modulation sub-circuit 11 and a pulse width modulation sub-circuit 12. The amplitude modulation sub-circuit 11 and the pulse width modulation sub-circuit 12 are connected.

[0044] The pixel circuit 10 generates a drive current under the control of the amplitude modulation sub-circuit 11 and the pulse width modulation sub-circuit 12. The amplitude modulation sub-circuit 11 is used to control the amplitude of the drive current, and the pulse width modulation sub-circuit 12 is used to adjust the pulse width of the voltage applied to the first electrode of the light-emitting element 20.

[0045] The pulse width modulation sub-circuit 12 adjusts the pulse width of the voltage applied to the first electrode of the light-emitting element 20, i.e., it adjusts the actual emission period of the driving current applied to the light-emitting element 20, while maintaining the driving current applied to the light-emitting element at a constant level, to adjust the grayscale or brightness displayed by the light-emitting element, rather than simply adjusting the magnitude of the driving current applied to the light-emitting element. Therefore, the amplitude modulation sub-circuit 11 can provide driving current to the light-emitting element so that the light-emitting element is driven with optimal luminous efficiency, and the pulse width modulation sub-circuit 12 adjusts the emission duty cycle (i.e., the emission period of the light-emitting element) of the light-emitting element to adjust the grayscale or brightness displayed by the light-emitting element.

[0046] The pixel circuit 10 includes a first pixel circuit 101 and a second pixel circuit 102. The light-emitting element 20 includes a first light-emitting element 21 and a second light-emitting element 22. The first pixel circuit 101 drives the first light-emitting element 21, and the second pixel circuit 102 drives the second light-emitting element 22. The light-emitting color of the first light-emitting element 21 is different from the light-emitting color of the second light-emitting element 22. For example, the light-emitting color of the first light-emitting element 21 is any one of red, blue, and green, and the light-emitting color of the second light-emitting element 22 is another one of red, blue, and green.

[0047] like Figure 2 As shown, the first pixel circuit 101 includes a first target transistor 01, and the second pixel circuit 102 includes a second target transistor 02. The first target transistor 01 and the second target transistor 02 have the same function; the aspect ratio of the first target transistor 01 and the aspect ratio of the second target transistor 02 are not equal.

[0048] The equivalent circuit structures of the first pixel circuit and the second pixel circuit can be the same; in other words, the number of devices included in the first pixel circuit and the connection relationship of each device are the same. The differences between the first pixel circuit and the second pixel circuit include: the size of the target transistors that have the same function is different, and they are used to drive light-emitting elements of different colors.

[0049] For a transistor itself, it can be turned on or off. The function of a transistor in a pixel circuit is determined by its connection relationship. From this perspective, the first target transistor 01 and the second target transistor 02 having the same function can include: two transistors with the same connection relationship in the first pixel circuit and the second pixel circuit.

[0050] The components of a pixel circuit include multiple transistors, and different transistors in the same pixel circuit have different functions. Specifically, both the amplitude modulation sub-circuit 11 and the pulse width modulation sub-circuit 12 include transistors. Taking the amplitude modulation sub-circuit 11 as an example, the amplitude modulation sub-circuit 11 includes a driving transistor, a light-emitting control transistor, etc. The function of the driving transistor is to generate a driving current, and the function of the light-emitting control transistor is to control the light-emitting element to emit light.

[0051] It is understandable that when the first target transistor is a transistor in the amplitude modulation sub-circuit of the first pixel circuit, the second target transistor is a transistor in the amplitude modulation sub-circuit of the second pixel circuit; when the first target transistor is a transistor in the pulse width modulation sub-circuit of the first pixel circuit, the second target transistor is a transistor in the pulse width modulation sub-circuit of the second pixel circuit.

[0052] As an example, the first target transistor is the driving transistor of the amplitude modulation sub-circuit of the first pixel circuit, and correspondingly, the second target transistor is the driving transistor of the amplitude modulation sub-circuit of the second pixel circuit.

[0053] As another example, the first target transistor is the driving transistor of the pulse width modulation sub-circuit of the first pixel circuit, and correspondingly, the second target transistor is the driving transistor of the pulse width modulation sub-circuit of the second pixel circuit.

[0054] As another example, the first target transistor is the light-emitting control transistor of the amplitude modulation sub-circuit of the first pixel circuit, and correspondingly, the second target transistor is the light-emitting control transistor of the amplitude modulation sub-circuit of the second pixel circuit.

[0055] It should be noted that in this article, the "width-to-length ratio" of a transistor is the ratio of the transistor's channel length to its channel width.

[0056] The larger the aspect ratio of a transistor, the stronger its driving capability, but the larger the required layout area. The smaller the aspect ratio of a transistor, the smaller the required layout area.

[0057] The first light-emitting element 21 and the second light-emitting element 22 have different characteristics and therefore different driving requirements. For example, the first light-emitting element requires a large driving capability, while the second light-emitting element requires a small driving capability. The aspect ratio of the first target transistor is greater than that of the second target transistor. That is, the aspect ratio of the second target transistor can be reduced. This can optimize the layout design, reduce the layout area occupied by the second pixel circuit, and not affect the driving of the second light-emitting element.

[0058] According to the display panel provided in the embodiments of this application, the first pixel circuit is used to drive the first light-emitting element, and the second pixel circuit is used to drive the second light-emitting element. The transistors with the same function in the first pixel circuit and the second pixel circuit are designed with different sizes. In this way, for light-emitting elements with small driving capabilities, the aspect ratio of the target transistor in its pixel circuit can be reduced, which can optimize the layout design, reduce the layout area occupied by the pixel circuit, and facilitate the setting of more pixel circuits in a limited area, thereby increasing the pixel density, without affecting the driving of the light-emitting element.

[0059] In some examples, the first target transistor is connected in series in the path of the drive current of the first pixel circuit, and the second target transistor is connected in series in the path of the drive current of the second pixel circuit. For example... Figure 3As shown, the pixel circuit includes an amplitude modulation sub-circuit 11 and a pulse width modulation sub-circuit 12. In the first pixel circuit 101, the amplitude modulation sub-circuit 11 and the pulse width modulation sub-circuit 12 are connected to node N1. In the second pixel circuit 102, the amplitude modulation sub-circuit 11 and the pulse width modulation sub-circuit 12 are connected to node N1'. The amplitude modulation sub-circuit 11 is connected to the first power supply terminal PVDD1, and the pulse width modulation sub-circuit 12 is connected to the second power supply terminal PVDD2. Each of the amplitude modulation sub-circuit 11 and the pulse width modulation sub-circuit 12 has its own drive current path. The drive current path of the amplitude modulation sub-circuit 11 refers to the path between the first power supply terminal PVDD1 and the common power supply terminal PVEE. The drive current path of the pulse width modulation sub-circuit 12 in the first pixel circuit 101 refers to the path between the second power supply terminal PVDD2 and node N1. The drive current path of the pulse width modulation sub-circuit 12 in the second pixel circuit 102 refers to the path between the second power supply terminal PVDD2 and node N1'.

[0060] For example, such as Figure 3 As shown, a first target transistor 01(1) is connected in series on the path between the first power supply terminal PVDD1 and the common power supply terminal PVEE of the first pixel circuit 101, and a first second target transistor 02(1) is connected in series on the path between the first power supply terminal PVDD1 and the common power supply terminal PVEE of the second pixel circuit 101. The first target transistor 01(1) and the first second target transistor 02(1) are transistors with the same function, and the width-to-length ratio of the first target transistor 01(1) is different from that of the first second target transistor 02(1).

[0061] For example, a second first target transistor 01(2) is connected in series on the path between the first power supply terminal PVDD1 of the first pixel circuit 101 and node N1, and a second second target transistor 02(2) is connected in series on the path between the second power supply terminal PVDD2 of the second pixel circuit 102 and node N1'. The second first target transistor 01(2) and the second second target transistor 02(2) are transistors with the same function, and the width-to-length ratio of the second first target transistor 01(2) is different from that of the second second target transistor 02(2).

[0062] It should be noted that increasing the width-to-length ratio of any transistor in the drive current path of the amplitude modulation sub-circuit or the pulse width modulation sub-circuit is beneficial to increasing the drive current of the amplitude modulation sub-circuit or the pulse width modulation sub-circuit. Therefore, for light-emitting elements that require a large driving capability, the width-to-length ratio of at least one transistor in the drive current path of the amplitude modulation sub-circuit and / or the pulse width modulation sub-circuit can be increased.

[0063] It should also be noted that the number of first target transistors in this article may be more than one, and similarly, the number of second target transistors may be more than one. The various embodiments mentioned in this article may be combined arbitrarily without contradiction.

[0064] In some embodiments, please refer to Figure 4 and Figure 5 The amplitude modulation sub-circuit 11 of the first pixel circuit 101 includes a first driving transistor T11, the amplitude modulation sub-circuit 11 of the second pixel circuit 102 includes a second driving transistor T11', the pulse width modulation sub-circuit 12 of the first pixel circuit 101 includes a third driving transistor T21, and the pulse width modulation sub-circuit 12 of the second pixel circuit 102 includes a fourth driving transistor T21'. The first driving transistor T11 and the second driving transistor T11' have the same function, and the third driving transistor T21 and the fourth driving transistor T21' have the same function.

[0065] The first target transistor includes a first driving transistor, the second target transistor includes a second driving transistor, and the aspect ratio of the first driving transistor T11 is greater than the aspect ratio of the second driving transistor T11'; and / or, the first target transistor includes a third driving transistor, the second target transistor includes a fourth driving transistor, and the aspect ratio of the third driving transistor T21 is greater than the aspect ratio of the fourth driving transistor T21'.

[0066] As an example, the width-to-length ratio of the first driving transistor T11 is greater than that of the second driving transistor T11', and the width-to-length ratio of the third driving transistor T21 is greater than that of the fourth driving transistor T21'.

[0067] As another example, the width-to-length ratio of the first driving transistor T11 is greater than that of the second driving transistor T11', and the width-to-length ratio of the third driving transistor T21 is equal to that of the fourth driving transistor T21'.

[0068] As another example, the width-to-length ratio of the first driving transistor T11 is equal to that of the second driving transistor T11', and the width-to-length ratio of the third driving transistor T21 is greater than that of the fourth driving transistor T21'.

[0069] Different colored light-emitting elements have different requirements for driving current. The driving current is generated by the driving transistor in the pixel circuit. Therefore, in this embodiment, the aspect ratio of the driving transistor corresponding to the light-emitting elements of different colors is set to be different. This can flexibly match the current requirements of the light-emitting elements of different colors and reduce the layout area required by the driving transistor in the second pixel circuit, thereby optimizing the layout design.

[0070] Understandably, the aspect ratio of the first driving transistor T11 is greater than that of the second driving transistor T11', and the aspect ratio of the third driving transistor T21 is greater than that of the fourth driving transistor T21'. This allows the layout area occupied by the second driving transistor T11' and the fourth driving transistor T21' to be adjusted to a smaller size, which is more conducive to optimizing the layout design.

[0071] In some embodiments, the aspect ratio of the first driving transistor T11 in the first pixel circuit 101 is greater than that of the third driving transistor T21; and / or, the aspect ratio of the second driving transistor T11' is greater than that of the fourth driving transistor T21'.

[0072] As an example, the width-to-length ratio of the first driving transistor T11 is greater than that of the third driving transistor T21, and the width-to-length ratio of the second driving transistor T11' is greater than that of the fourth driving transistor T21'.

[0073] As another example, the width-to-length ratio of the first driving transistor T11 is greater than that of the third driving transistor T21, and the width-to-length ratio of the second driving transistor T11' is equal to that of the fourth driving transistor T21'.

[0074] As another example, the width-to-length ratio of the first driving transistor T11 is equal to that of the third driving transistor T21, and the width-to-length ratio of the second driving transistor T11' is greater than that of the fourth driving transistor T21'.

[0075] The amplitude modulation sub-circuit 11 provides driving current for the light-emitting element to emit light, and the pulse width modulation sub-circuit 12 outputs logic control signals. The driving current of the pulse width modulation sub-circuit 12 is relatively small. Therefore, the width-to-length ratio of the driving transistor in the amplitude modulation sub-circuit 11 is relatively larger than that of the driving transistor in the pulse width modulation sub-circuit 12, so as to ensure the driving capability of the driving transistor in the amplitude modulation sub-circuit 11.

[0076] Understandably, the aspect ratio of the first driving transistor T11 is greater than that of the third driving transistor T21, and the aspect ratio of the second driving transistor T11' is greater than that of the fourth driving transistor T21'. This allows the layout area occupied by the third driving transistor T21 and the fourth driving transistor T21' to be adjusted to a smaller size, which is more conducive to optimizing the layout design.

[0077] Optionally, the aspect ratio of the third driving transistor T21 is smaller than that of the second driving transistor T11'. This ensures the driving capability of the second driving transistor T11' for the second light-emitting element.

[0078] In some embodiments, such as Figure 4 and Figure 5As shown, the amplitude modulation sub-circuit 11 of the first pixel circuit 101 includes a first light-emitting control transistor T12, the amplitude modulation sub-circuit 11 of the second pixel circuit 102 includes a second light-emitting control transistor T12', the pulse width modulation sub-circuit 12 of the first pixel circuit 101 includes a third light-emitting control transistor T22, and the pulse width modulation sub-circuit 12 of the second pixel circuit 102 includes a fourth light-emitting control transistor T22'. The first light-emitting control transistor T12 and the second light-emitting control transistor T12' have the same function, and the third light-emitting control transistor T22 and the fourth light-emitting control transistor T22' have the same function.

[0079] The first target transistor includes a first light-emitting control transistor, the second target transistor includes a second light-emitting control transistor, and the aspect ratio of the first light-emitting control transistor T12 is greater than the aspect ratio of the second light-emitting control transistor T12'; and / or, the first target transistor includes a third light-emitting control transistor, the second target transistor includes a fourth light-emitting control transistor, and the aspect ratio of the third light-emitting control transistor T22 is greater than the aspect ratio of the fourth light-emitting control transistor T22'.

[0080] As an example, the width-to-length ratio of the first light-emitting control transistor T12 is greater than that of the second light-emitting control transistor T12', and the width-to-length ratio of the third light-emitting control transistor T22 is greater than that of the fourth light-emitting control transistor T22'.

[0081] As another example, the width-to-length ratio of the first light-emitting control transistor T12 is greater than that of the second light-emitting control transistor T12', and the width-to-length ratio of the third light-emitting control transistor T22 is equal to that of the fourth light-emitting control transistor T22'.

[0082] As another example, the width-to-length ratio of the first light-emitting control transistor T12 is equal to that of the second light-emitting control transistor T12', and the width-to-length ratio of the third light-emitting control transistor T22 is greater than that of the fourth light-emitting control transistor T22'.

[0083] In the first pixel circuit 101, the first light-emitting control transistor T12 and the first driving transistor T11 are connected in series in the current path of the amplitude modulation sub-circuit, and the third light-emitting control transistor T22 and the third driving transistor T21 are connected in series in the current path of the pulse width modulation sub-circuit.

[0084] In the second pixel circuit 102, the second light-emitting control transistor T12' and the second driving transistor T11' are connected in series in the current path of the amplitude modulation sub-circuit, and the fourth light-emitting control transistor T22' and the fourth driving transistor T21' are connected in series in the current path of the pulse width modulation sub-circuit.

[0085] Different colored light-emitting elements have different requirements for driving current. The driving current must flow through the light-emitting control transistor. Therefore, in this embodiment, the aspect ratio of the light-emitting control transistor corresponding to different colored light-emitting elements is set to be different. This can flexibly match the current requirements of different colored light-emitting elements and reduce the layout area required by the light-emitting control transistor in the second pixel circuit, thereby optimizing the layout design.

[0086] As an example, the aspect ratio of the first driving transistor T11 is greater than that of the second driving transistor T11', and the aspect ratio of the third driving transistor T21 is greater than that of the fourth driving transistor T21', and the aspect ratio of the first light-emitting control transistor T12 is greater than that of the second light-emitting control transistor T12', and the aspect ratio of the third light-emitting control transistor T22 is greater than that of the fourth light-emitting control transistor T22'. This allows for the simultaneous adjustment of the layout area occupied by a greater number of transistors towards a smaller size, which is more conducive to optimizing the layout design.

[0087] For example, such as Figure 4 and Figure 5 As shown, there are two first light-emitting control transistors T12, one labeled T12a and the other labeled T12b; there are two third light-emitting control transistors T22, one labeled T22a and the other labeled T22b; there are two second light-emitting control transistors T12', one labeled T12a' and the other labeled T12b'; and there are two fourth light-emitting control transistors T22', one labeled T22a' and the other labeled T22b'.

[0088] The width-to-length ratio of the first light-emitting control transistor T12 is greater than that of the second light-emitting control transistor T12', including: the width-to-length ratio of transistor T12a is greater than that of transistor T12a', and / or, the width-to-length ratio of transistor T12b is greater than that of transistor T12b'.

[0089] For example, the aspect ratio of the first light-emitting control transistor T12 is greater than that of the second light-emitting control transistor T12', including: the aspect ratio of transistor T12a is greater than that of transistor T12a', and the aspect ratio of transistor T12b is greater than that of transistor T12b'.

[0090] The width-to-length ratio of the third light-emitting control transistor T22 is greater than that of the fourth light-emitting control transistor T22', including: the width-to-length ratio of transistor T22a is greater than that of transistor T22a', and / or, the width-to-length ratio of transistor T22b is greater than that of transistor T22b'.

[0091] For example, the aspect ratio of the third light-emitting control transistor T22 is greater than that of the fourth light-emitting control transistor T22', including: the aspect ratio of transistor T22a is greater than that of transistor T22a', and the aspect ratio of transistor T22b is greater than that of transistor T22b'.

[0092] In some embodiments, when the first pixel circuit 101 and the second pixel circuit 102 include a driving transistor and a light-emitting control transistor, the aspect ratio of the first light-emitting control transistor T12 is greater than the aspect ratio of the first driving transistor T11; and / or, the aspect ratio of the second light-emitting control transistor T12' is greater than the aspect ratio of the second driving transistor T11'; and / or, the aspect ratio of the third light-emitting control transistor T22 is greater than the aspect ratio of the third driving transistor T21; and / or, the aspect ratio of the fourth light-emitting control transistor T22' is greater than the aspect ratio of the fourth driving transistor T21'.

[0093] For example, such as Figure 4 and Figure 5 As shown, the first light-emitting control transistor T12 includes transistors T12a and T12b; the third light-emitting control transistor T22 includes transistors T22a and T22b; the second light-emitting control transistor T12' includes transistors T12a' and T12b'; and the fourth light-emitting control transistor T22' includes transistors T22a' and T22b'.

[0094] The aspect ratio of the first light-emitting control transistor T12 is greater than that of the first driving transistor T11, including: the aspect ratios of transistors T12a and T12b are both greater than that of the first driving transistor T11.

[0095] The width-to-length ratio of the second light-emitting control transistor T12' is greater than that of the second driving transistor T11', including: the width-to-length ratios of transistors T12a' and T12b' are both greater than that of the second driving transistor T11'.

[0096] The aspect ratio of the third light-emitting control transistor T22 is greater than that of the third driving transistor T21, including: the aspect ratios of transistors T22a and T22b are both greater than that of the third driving transistor T21.

[0097] The aspect ratio of the fourth light-emitting control transistor T22' is greater than that of the fourth driving transistor T21', including: the aspect ratios of transistors T22a' and T22b' are both greater than that of the fourth driving transistor T21'.

[0098] In a series of transistors, the smaller the aspect ratio of the transistor, the higher its impedance. A transistor with higher impedance has greater precision in regulating the current, and the driving transistor is used to regulate the magnitude of the current. In the embodiments of this application, in the series-connected driving transistor and light-emitting control transistor, the aspect ratio of the driving transistor is set to be relatively small, which can improve the current regulation precision of the driving transistor while optimizing the layout design.

[0099] In some embodiments, such as Figure 4 and Figure 5 As shown, the first light-emitting control transistor T12 includes a first sub-light-emitting control transistor T12a and a second sub-light-emitting control transistor T12b. The two ends of the first sub-light-emitting control transistor T12a are connected to the first light-emitting element 21 and the second sub-light-emitting control transistor T12b, respectively. The two ends of the second sub-light-emitting control transistor T12b are connected to the first sub-light-emitting control transistor T12a and the first power supply terminal PVDD1, respectively. A first driving transistor T11 is connected between the first sub-light-emitting control transistor T12a and the second sub-light-emitting control transistor T12b. The aspect ratio of the first sub-light-emitting control transistor T12a is greater than that of the second sub-light-emitting control transistor T12b.

[0100] The gates of both the first sub-light-emitting control transistor T12a and the second sub-light-emitting control transistor T12b are connected to the light-emitting control signal PAM_EM, and the gate voltages of the first sub-light-emitting control transistor T12a and the second sub-light-emitting control transistor T12b are the same. The first sub-light-emitting control transistor T12a is closer to the first light-emitting element 21, and the second sub-light-emitting control transistor T12b is closer to the first power supply terminal PVDD1. The source voltage of the first sub-light-emitting control transistor T12a is smaller, so the absolute value of the gate-source voltage difference |Vgs| of the first sub-light-emitting control transistor T12a is small. When the width-to-length ratio of the first sub-light-emitting control transistor T12a is large, both the first sub-light-emitting control transistor T12a and the second sub-light-emitting control transistor T12b can maintain a good conduction state.

[0101] And / or, the second light-emitting control transistor T12' includes a third sub-light-emitting control transistor T12a' and a fourth sub-light-emitting control transistor T12b'. The two ends of the third sub-light-emitting control transistor T12a' are respectively connected to the second light-emitting element 22 and the fourth sub-light-emitting control transistor T12b'. The two ends of the fourth sub-light-emitting control transistor T12b' are respectively connected to the third sub-light-emitting control transistor T12a' and the first power supply terminal PVDD1. A second driving transistor T11' is connected between the third sub-light-emitting control transistor T12a' and the fourth sub-light-emitting control transistor T12b'. The width-to-length ratio of the third sub-light-emitting control transistor T12a' is greater than that of the fourth sub-light-emitting control transistor T12b'.

[0102] The gates of both the third sub-light-emitting control transistor T12a' and the fourth sub-light-emitting control transistor T12b' are connected to the light-emitting control signal PAM_EM, and their gate voltages are the same. The third sub-light-emitting control transistor T12a' is closer to the second light-emitting element 22, and the fourth sub-light-emitting control transistor T12b' is closer to the first power supply terminal PVDD1. The source voltage of the third sub-light-emitting control transistor T12a' is smaller, therefore the absolute value of the gate-source voltage difference |Vgs| of the third sub-light-emitting control transistor T12a' is small. With a large aspect ratio of the third sub-light-emitting control transistor T12a', both the third sub-light-emitting control transistor T12a' and the fourth sub-light-emitting control transistor T12b' can maintain a good conduction state.

[0103] As an example, the width-to-length ratio of the first sub-light-emitting control transistor T12a is greater than that of the second sub-light-emitting control transistor T12b, and the width-to-length ratio of the third sub-light-emitting control transistor T12a' is greater than that of the fourth sub-light-emitting control transistor T12b'.

[0104] As another example, the width-to-length ratio of the first sub-light-emitting control transistor T12a is greater than that of the second sub-light-emitting control transistor T12b, and the width-to-length ratio of the third sub-light-emitting control transistor T12a' is equal to that of the fourth sub-light-emitting control transistor T12b'.

[0105] As an example, the width-to-length ratio of the first sub-light-emitting control transistor T12a is equal to that of the second sub-light-emitting control transistor T12b, and the width-to-length ratio of the third sub-light-emitting control transistor T12a' is greater than that of the fourth sub-light-emitting control transistor T12b'.

[0106] For example, such as Figure 4 and Figure 5 As shown, the third light-emitting control transistor T22 includes a fifth sub-light-emitting control transistor T22a and a sixth sub-light-emitting control transistor T22b, which are connected in series, and a third driving transistor T21 is connected between them. For example, the width-to-length ratio of the fifth sub-light-emitting control transistor T22a is equal to that of the sixth sub-light-emitting control transistor T22b.

[0107] The fourth light-emitting control transistor T22' includes a seventh sub-light-emitting control transistor T22a' and an eighth sub-light-emitting control transistor T22b', which are connected in series, and a fourth driving transistor T21' is connected between them. For example, the width-to-length ratio of the seventh sub-light-emitting control transistor T22a' is equal to that of the eighth sub-light-emitting control transistor T22b'.

[0108] The drive current in the pulse width modulation submodule is relatively small; therefore, the width-to-length ratio of the two light-emitting control transistors in the pulse width modulation submodule can be the same.

[0109] In some embodiments, please refer to Figure 4 and Figure 5 The amplitude modulation sub-circuit 11 of the first pixel circuit 101 includes a first driving transistor T11, and the amplitude modulation sub-circuit 11 of the second pixel circuit 102 includes a second driving transistor T11'. The pulse width modulation sub-circuit 12 of the first pixel circuit 101 includes a third driving transistor T21, and the pulse width modulation sub-circuit 12 of the second pixel circuit 102 includes a fourth driving transistor T21'. The amplitude modulation sub-circuit 11 of the first pixel circuit 101 includes a first light emission control transistor T12, and the amplitude modulation sub-circuit 11 of the second pixel circuit 102 includes a second light emission control transistor T12'.

[0110] Among them, the absolute value of the difference between the width-to-length ratio of the first driving transistor T11 and the width-to-length ratio of the second driving transistor T11' is |ΔA1|, the absolute value of the difference between the width-to-length ratio of the first light-emitting control transistor T12 and the width-to-length ratio of the second light-emitting control transistor T12' is |ΔA2|, and the absolute value of the difference between the width-to-length ratio of the third driving transistor T21 and the width-to-length ratio of the fourth driving transistor T21' is |ΔA3|.

[0111] |ΔA2|>|ΔA1|>|ΔA3|.

[0112] The width-to-length ratio of the first driving transistor T11 is greater than that of the second driving transistor T11', and the width-to-length ratio of the first driving transistor T11 and the width-to-length ratio of the second driving transistor T11' are both positive. The same applies to other transistors, which will not be explained in detail here.

[0113] For example, the first light-emitting control transistor T12 includes a first sub-light-emitting control transistor T12a and a second sub-light-emitting control transistor T12b, and the second light-emitting control transistor T12' includes a third sub-light-emitting control transistor T12a' and a fourth sub-light-emitting control transistor T12b'. The absolute value of the difference between the width-to-length ratio of the first sub-light-emitting control transistor T12a and the width-to-length ratio of the third sub-light-emitting control transistor T12a' is |ΔA21|, and the absolute value of the difference between the width-to-length ratio of the second sub-light-emitting control transistor T12b and the fourth sub-light-emitting control transistor T12b' is |ΔA22|, where |ΔA21| = |ΔA22| = |ΔA2|.

[0114] For example, the third light-emitting control transistor T22 includes a fifth sub-light-emitting control transistor T22a and a sixth sub-light-emitting control transistor T22b, and the fourth light-emitting control transistor T22' includes a seventh sub-light-emitting control transistor T22a' and an eighth sub-light-emitting control transistor T22b'. The absolute value of the difference between the width-to-length ratio of the fifth sub-light-emitting control transistor T22a and the width-to-length ratio of the seventh sub-light-emitting control transistor T22a' is |ΔA23|, and the absolute value of the difference between the width-to-length ratio of the sixth sub-light-emitting control transistor T22b and the width-to-length ratio of the eighth sub-light-emitting control transistor T22b' is |ΔA24|, where |ΔA23| = |ΔA24|.

[0115] For example, |ΔA23| = |ΔA24| > |ΔA3|.

[0116] For example, |ΔA23|=|ΔA24|=|ΔA2|.

[0117] As described above, in the same modulator circuit, the aspect ratio of the light-emitting transistor is greater than that of the driving transistor. In the same pixel circuit, the aspect ratio of the driving transistor in the amplitude modulation circuit is greater than that of the driving transistor in the pulse width modulation circuit. Furthermore, the aspect ratio of the driving transistor in the first pixel circuit is greater than that of the driving transistor in the second pixel circuit. By setting |ΔA2|>|ΔA1|>|ΔA3|, the differences between the pairs can be increased while conforming to the above size relationship, thereby making the performance of each pixel circuit more in line with the requirements of the light-emitting element.

[0118] In some embodiments, such as Figure 4 and Figure 5As shown, the amplitude modulation sub-circuit 11 of the first pixel circuit 101 includes a first storage capacitor Cst1, the amplitude modulation sub-circuit 11 of the second pixel circuit 102 includes a second storage capacitor Cst1', the pulse width modulation sub-circuit 12 of the first pixel circuit 101 includes a third storage capacitor Cst2, and the pulse width modulation sub-circuit 12 of the second pixel circuit 102 includes a fourth storage capacitor Cst2'. The two ends of the first storage capacitor Cst1 are connected to the gate of the first driving transistor T11 and the first power supply terminal PVDD1, respectively. The two ends of the second storage capacitor Cst1' are connected to the gate of the second driving transistor T11' and the first power supply terminal PVDD1, respectively. The two ends of the third storage capacitor Cst2 are connected to the third driving transistor T21 and the sweep frequency signal terminal SWEEP, respectively. The two ends of the fourth storage capacitor Cst2' are connected to the fourth driving transistor T21' and the sweep frequency signal terminal SWEEP, respectively.

[0119] The capacitance value of the first storage capacitor Cst1 is greater than the capacitance value of the second storage capacitor Cst1', and / or the capacitance value of the third storage capacitor Cst2 is greater than the capacitance value of the fourth storage capacitor Cst2'.

[0120] As an example, the capacitance value of the first storage capacitor Cst1 is greater than the capacitance value of the second storage capacitor Cst1', and the capacitance value of the third storage capacitor Cst2 is greater than the capacitance value of the fourth storage capacitor Cst2'.

[0121] As another example, the capacitance value of the first storage capacitor Cst1 is greater than the capacitance value of the second storage capacitor Cst1', and the capacitance value of the third storage capacitor Cst2 is equal to the capacitance value of the fourth storage capacitor Cst2'.

[0122] As an example, the capacitance of the first storage capacitor Cst1 is equal to the capacitance of the second storage capacitor Cst1', and the capacitance of the third storage capacitor Cst2 is greater than the capacitance of the fourth storage capacitor Cst2'.

[0123] For example, the capacitance of a storage capacitor can be adjusted by changing the area of ​​its plates.

[0124] Different colored light-emitting elements have different requirements for driving current. The driving current is stabilized by the storage capacitor in the pixel circuit. Therefore, in this embodiment, the capacitance values ​​of the storage capacitors corresponding to different colored light-emitting elements are set to be different. This can flexibly match the storage requirements of different colored light-emitting elements and reduce the layout area required for the storage capacitor in the second pixel circuit, thereby optimizing the layout design.

[0125] For example, the width-to-length ratio of the first driving transistor T11 is greater than that of the second driving transistor T11', and the width-to-length ratio of the first light-emitting control transistor T12 is greater than that of the second light-emitting control transistor T12', and the capacitance value of the first storage capacitor Cst1 is greater than that of the second storage capacitor Cst1'.

[0126] For example, the width-to-length ratio of the third driving transistor T21 is greater than that of the fourth driving transistor T21', and the width-to-length ratio of the third light-emitting control transistor T22 is greater than that of the fourth light-emitting control transistor T22', and the capacitance value of the third storage capacitor Cst2 is equal to that of the fourth storage capacitor Cst2'.

[0127] In some embodiments, the difference between the capacitance value of the first storage capacitor Cst1 and the capacitance value of the second storage capacitor Cst1' is ΔC1, and the difference between the capacitance value of the third storage capacitor Cst2 and the capacitance value of the fourth storage capacitor Cst2' is ΔC2, where ΔC1 > ΔC2.

[0128] The first storage capacitor Cst1 and the second storage capacitor Cst1' belong to the amplitude adjustment sub-circuit, and the third storage capacitor Cst2 and the fourth storage capacitor Cst2' belong to the pulse width modulation sub-circuit. The drive current of the amplitude adjustment sub-circuit is larger than that of the pulse width modulation sub-circuit, so the storage capacitor of the amplitude adjustment sub-circuit needs to be relatively larger. In this embodiment, by setting ΔC1>

[0129] ΔC2 can ensure that the performance of each pixel circuit is more in line with the requirements of the light-emitting element while conforming to the above size relationship.

[0130] In some embodiments, such as Figure 6 and Figure 7 As shown, the amplitude modulation sub-circuit 11 of the first pixel circuit 101 includes a first control transistor T29, and the pulse width modulation sub-circuit 12 of the first pixel circuit 101 is connected to the gate of the first control transistor T29. The first control transistor T29 is connected in series in the drive current path of the amplitude modulation sub-circuit 11. For example, the first control transistor T29 is connected between the first drive transistor T11 and the first light-emitting element 21.

[0131] The amplitude modulation sub-circuit 11 in the second pixel circuit 102 includes a second control transistor T29', and the pulse width modulation sub-circuit 12 of the second pixel circuit 102 is connected to the gate of the second control transistor T29'. The second control transistor T29' is connected in series in the drive current path of the amplitude modulation sub-circuit 11. For example, the second control transistor T29' is connected between the second drive transistor T11' and the second light-emitting element 22.

[0132] The first target transistor includes a first control transistor T29, and the second target transistor includes a second control transistor T29'; the aspect ratio of the first control transistor T29 is greater than the aspect ratio of the second control transistor T29'.

[0133] Different colored light-emitting elements have different requirements for driving current. The driving current must flow through the control transistor. Therefore, in this embodiment, the aspect ratio of the control transistor corresponding to different colored light-emitting elements is set to be different. This can flexibly match the current requirements of different colored light-emitting elements and reduce the layout area required for the control transistor in the second pixel circuit, thereby optimizing the layout design.

[0134] In some embodiments, the ratio of the width-to-length ratio of the first driving transistor T11 to the width-to-length ratio of the second driving transistor T11' is B1, the ratio of the width-to-length ratio of the third driving transistor T21 to the width-to-length ratio of the fourth driving transistor T21' is B2, and the ratio of the width-to-length ratio of the first control transistor T29 to the width-to-length ratio of the second control transistor T29' is B3; B3 = B1, or B3 = B2.

[0135] The first control transistor T29 and the first driving transistor T11 are connected in series, and the second control transistor T29' and the second driving transistor T11' are connected in series. When B3 = B1, the control transistors and driving transistors connected in series can be matched, thereby optimizing the performance of the pixel circuit.

[0136] The first driving transistor T11 drives the first light-emitting element, which is controlled by the third driving transistor T21 and the first control transistor T29. The second driving transistor T11' drives the second light-emitting element, which is controlled by the fourth driving transistor T21' and the second control transistor T29'. Therefore, from the perspective of control, when B3 = B2, the two transistors controlling the same driving transistor can be matched, thereby optimizing the performance of the pixel circuit.

[0137] In some embodiments, such as Figure 6 and Figure 7 As shown, the pulse width modulation sub-circuit 12 of the first pixel circuit 101 includes a first control capacitor C3, which is connected to the gate of the first control transistor T29. The first control capacitor C3 and transistor T28 are connected in parallel between node N1 and the reset signal terminal VSET. Node N1 is connected to the gate of the first control transistor T29. The first control capacitor C3 can control the state of the first control transistor T29.

[0138] The pulse width modulation sub-circuit 12 of the second pixel circuit 102 includes a second control capacitor C3', which is connected to the gate of the second control transistor T29'. The second control capacitor C3' and transistor T28' are connected in parallel between node N1' and the reset signal terminal VSET. Node N1' is connected to the gate of the second control transistor T29'. The second control capacitor C3' can control the state of the second control transistor T29'.

[0139] When the aspect ratio of the first control transistor T29 is greater than that of the second control transistor T29', the capacitance value of the first control capacitor C3 is greater than that of the second control capacitor C3'. This ensures that the interconnected control capacitors and control transistors are matched, thereby enabling effective control of both the first control transistor T29 and the second control transistor T29'.

[0140] It should be noted that the structures of the first pixel circuit and the second pixel circuit in this application are not limited to those of other types. Figures 4 to 7 The structure shown in this application demonstrates that the technical concept is also applicable to pixel circuits with other structures. As an example, such as... Figure 8 and Figure 9 As shown, the first pixel circuit 101 may further include a first connecting capacitor C4. In the first pixel circuit 101, the pulse width modulation sub-circuit 12 is connected to the amplitude modulation sub-circuit 11 through the first connecting capacitor C4. The second pixel circuit 102 may further include a second connecting capacitor C4'. In the second pixel circuit 102, the pulse width modulation sub-circuit 12 is connected to the amplitude modulation sub-circuit 11 through the second connecting capacitor C4'.

[0141] In some embodiments, the first light-emitting element 21 includes a red light-emitting element, and the second light-emitting element 22 includes at least one of a blue light-emitting element and a green light-emitting element. Alternatively, the first light-emitting element 21 includes at least one of a red light-emitting element and a green light-emitting element, and the second light-emitting element 22 includes a blue light-emitting element.

[0142] Taking micro LED as an example, the luminous efficiency of red light-emitting element is lower than that of green light-emitting element, and the luminous efficiency of green light-emitting element is lower than that of blue light-emitting element. Therefore, when displaying the same brightness or grayscale, the red light-emitting element requires the largest driving current, the blue light-emitting element requires the smallest driving current, and the green light-emitting element requires a driving current in between.

[0143] Among the three types of light-emitting elements, the pixel circuit parameters corresponding to two of them are the same. For example, the pixel circuit parameters of the blue light-emitting element and the green light-emitting element are the same, or the pixel circuit parameters of the red light-emitting element and the green light-emitting element are the same. The same parameters include the aspect ratio of the transistor, the capacitance value of the capacitor, etc.

[0144] In this embodiment of the application, for light-emitting elements with three light-emitting colors, only two types of pixel circuits with different parameters can be set, which can reduce the complexity of the process.

[0145] In other embodiments, such as Figure 10 As shown, the pixel circuit also includes a third pixel circuit 103, and the light-emitting element also includes a third light-emitting element 23. The third pixel circuit 103 is used to drive the third light-emitting element 23. The light-emitting colors of the first light-emitting element 21, the second light-emitting element 22, and the third light-emitting element 23 are different.

[0146] The third pixel circuit 103 includes a third target transistor 03. The first target transistor 01, the second target transistor 02, and the third target transistor 03 have the same function. The aspect ratios of the first target transistor 01, the second target transistor 02, and the third target transistor 03 are all different.

[0147] The equivalent circuit structures of the first pixel circuit, the second pixel circuit, and the third pixel circuit can be the same. In other words, the number of devices included in each of the first pixel circuit, the second pixel circuit, and the third pixel circuit, as well as the connection relationships between the devices, are the same. The differences between the first pixel circuit, the second pixel circuit, and the third pixel circuit include: the size of the target transistors that have the same function in the three circuits are different, and the three circuits are used to drive light-emitting elements of different light-emitting colors.

[0148] Since the red light-emitting element requires the largest driving current, the blue light-emitting element requires the smallest driving current, and the green light-emitting element requires a driving current in between, when the first light-emitting element includes a red light-emitting element, the second light-emitting element includes a green light-emitting element, and the third light-emitting element includes a blue light-emitting element, the aspect ratio of the first target transistor is greater than that of the second target transistor, and the aspect ratio of the second target transistor is greater than that of the third target transistor.

[0149] The first target transistor 01, the second target transistor 02, and the third target transistor 03 have the same function and may include three transistors with the same connection relationship in the first pixel circuit, the second pixel circuit, and the third pixel circuit.

[0150] In this embodiment, the target transistors of the three pixel circuits of the three light-emitting elements are set differently, which helps to maximize the optimization of the layout design.

[0151] For example, Figures 11 to 13 Some exemplary circuit structures of the third pixel circuit 103 are shown. Please refer to the reference. Figure 4 , Figure 5 and Figure 11The amplitude modulation sub-circuit 11 of the third pixel circuit 103 includes a fifth driving transistor T11” and a fifth light-emitting control transistor T12”. The pulse width modulation sub-circuit 12 of the third pixel circuit 103 includes a sixth driving transistor T21” and a sixth light-emitting control transistor T22”.

[0152] For example, the width-to-length ratio of the first driving transistor T11 is greater than that of the second driving transistor T11', and the width-to-length ratio of the second driving transistor T11' is greater than that of the fifth driving transistor T11".

[0153] For example, the width-to-length ratio of the third driving transistor T21 is greater than that of the fourth driving transistor T21', and the width-to-length ratio of the fourth driving transistor T21' is greater than that of the sixth driving transistor T21".

[0154] For example, the width-to-length ratio of the fifth driving transistor T11” is greater than that of the sixth driving transistor T21”.

[0155] For example, the width-to-length ratio of the first light-emitting control transistor T12 is greater than that of the second light-emitting control transistor T12', and the width-to-length ratio of the second light-emitting control transistor T12' is greater than that of the fifth light-emitting control transistor T12'".

[0156] For example, the width-to-length ratio of the third light-emitting control transistor T22 is greater than that of the fourth light-emitting control transistor T22', and the width-to-length ratio of the fourth light-emitting control transistor T22' is greater than that of the sixth light-emitting control transistor T22.

[0157] For example, the fifth light-emitting control transistor T12” includes transistor T12a” and transistor T12b”, transistor T12a” is close to the third light-emitting element, and the width-to-length ratio of transistor T12a” is greater than that of transistor T12b”.

[0158] For example, the sixth light-emitting control transistor T22” includes transistor T22a” and transistor T22b”, transistor T22a” is close to the third light-emitting element, and the width-to-length ratio of transistor T22a” is equal to the width-to-length ratio of transistor T22b”.

[0159] For example, please refer to the reference. Figure 6 , Figure 7 and Figure 12 The amplitude modulation submodule 11 of the third pixel circuit 103 also includes a third control transistor T29” and a third control capacitor C3”.

[0160] For example, the width-to-length ratio of the first control transistor T29 is greater than that of the second control transistor T29', and the width-to-length ratio of the second control transistor T29' is greater than that of the third control transistor T29'".

[0161] For example, the capacitance value of the first control capacitor C3 is greater than the capacitance value of the second control capacitor C3', and the capacitance value of the second control capacitor C3' is greater than the capacitance value of the third control capacitor C3''.

[0162] In some embodiments, the example still uses the first light-emitting element comprising a red light-emitting element, the second light-emitting element comprising a green light-emitting element, and the third light-emitting element comprising a blue light-emitting element. Figures 11 to 13 As shown in any of the figures, the amplitude modulation sub-circuit 11 of the third pixel circuit 103 includes a fifth storage capacitor Cst1, and the pulse width modulation sub-circuit 12 of the third pixel circuit 103 includes a sixth storage capacitor Cst2.

[0163] The capacitance value of the first storage capacitor Cst1 is greater than the capacitance value of the second storage capacitor Cst1', the capacitance value of the second storage capacitor Cst1' is greater than the capacitance value of the fifth storage capacitor Cst1"; and / or, the capacitance value of the third storage capacitor Cst2 is greater than the capacitance value of the fourth storage capacitor Cst2', the capacitance value of the fourth storage capacitor Cst2' is greater than the capacitance value of the sixth storage capacitor Cst2".

[0164] Different colored light-emitting elements have different requirements for driving current. The driving current is stabilized by the storage capacitor in the pixel circuit. Therefore, in this embodiment, the capacitance values ​​of the storage capacitors corresponding to the three different colored light-emitting elements are set to be different. This can flexibly match the storage requirements of the three different colored light-emitting elements and reduce the layout area required to decrease the storage capacitors sequentially, which is more conducive to optimizing the layout design.

[0165] In this article, the aspect ratio of a transistor is the ratio of its channel width to its channel length. Different transistors have different aspect ratios, including differences in at least one of their channel length and channel width.

[0166] As an example, such as Figure 14 As shown, Figure 14 The filling of the phase pattern indicates the same film layer. B represents the film layer where the semiconductor of the transistor is located, M1 represents the film layer where the gate of the transistor is located, and M2 represents the film layer where one plate of the capacitor is located. The capacitor includes two opposing plates, one of which is located in film layer M1. The first direction D1 represents the channel length direction of the transistor shown in the figure, and the second direction D2 represents the channel width direction of the transistor shown in the figure.

[0167] Please refer to the reference. Figure 6 , Figure 7 and Figure 14For example, the channel length of the first driving transistor T11 is equal to the channel length of the second driving transistor T11', and the channel width of the first driving transistor T11 is greater than the channel width of the second driving transistor T11', thereby making the width-to-length ratio of the first driving transistor T11 greater than the width-to-length ratio of the second driving transistor T11'.

[0168] For example, the channel length of the first sub-light-emitting control transistor T12a is equal to the channel length of the third sub-light-emitting control transistor T12a', and the channel width of the first sub-light-emitting control transistor T12a is greater than the channel width of the third sub-light-emitting control transistor T12a', thereby making the width-to-length ratio of the first sub-light-emitting control transistor T12a greater than the width-to-length ratio of the third sub-light-emitting control transistor T12a'.

[0169] If the first and second target transistors are transistors with other functions, a similar design can also be used. For example, the first control transistor T29 and the second control transistor T29' can be designed similarly, which will not be described in detail here. Similarly, a similar design can be used for the third target transistor, which will also not be described in detail here.

[0170] For example, the first storage capacitor Cst1 includes a first electrode C11 and a second electrode C12, and the second storage capacitor Cst1' includes a third electrode C11' and a fourth electrode C12'. The first electrode C11 and the third electrode C11' are located in the same film layer and have the same area. The second electrode C12 and the fourth electrode C12' are located in the same film layer, and the area of ​​the second electrode C12 is larger than the area of ​​the fourth electrode C12', thereby making the capacitance value of the first storage capacitor Cst1 greater than the capacitance value of the second storage capacitor Cst1'.

[0171] Understandably, the capacitance value of a capacitor is not only related to the area of ​​the two plates facing each other, but also to the thickness of the dielectric between the two plates and the dielectric constant of the dielectric. Therefore, the capacitance values ​​of the two capacitors can be made different by setting the thickness of the dielectric between the plates and the dielectric constant of the dielectric.

[0172] In some embodiments, the first target transistor and the second target transistor have different aspect ratios, including: the channel lengths of the first target transistor and the second target transistor are equal, but the channel widths of the first target transistor and the second target transistor are unequal. That is, while keeping the channel lengths of the two transistors constant, the channel width of at least one transistor is modulated, thereby making the aspect ratios of the two transistors different. This design approach achieves transistor differentiation without leading to excessively complex manufacturing processes.

[0173] Here, the first target transistor and the second target transistor can include the transistors in any of the examples above. For instance, the first driving transistor T11 and the second driving transistor T11' have equal channel lengths, and the channel width of the first driving transistor T11 is greater than the channel width of the second driving transistor T11', thereby making the aspect ratio of the first driving transistor T11 greater than that of the second driving transistor T11'. The same applies to cases where the first target transistor and the second target transistor include transistors with other functions, which will not be described in detail here.

[0174] In some embodiments, such as Figure 15 As shown, the first target transistor 01 includes n1 parallel first transistors T1, and the second target transistor 02 includes n2 parallel second transistors T1', where n1 and n2 are integers greater than 1. The gates of the n1 first transistors T1 are connected to the same signal, and the gates of the n2 second transistors T1' are connected to the same signal.

[0175] The channel length of each first transistor T1 is L1, and the channel width of each first transistor T1 is W1; the channel length of each second transistor T1' is L2, and the channel width of each second transistor T1' is W2.

[0176] Understandably, the channel lengths and channel widths of all the first transistors T1 are equal.

[0177] Therefore, the total width-to-length ratio of the n1 first transistors T1 is: n1*W1 / L1. Similarly, the total width-to-length ratio of the n2 second transistors T1' is: n2*W2 / L2.

[0178] In this embodiment, the first target transistor is composed of multiple first transistors of the same size connected in parallel. This facilitates the control of the overall width-to-length ratio of the first target transistor. For example, the overall width-to-length ratio of the first target transistor can be controlled by adjusting the number of first transistors connected in parallel. The second target transistor is composed of multiple second transistors of the same size connected in parallel. This facilitates the control of the overall width-to-length ratio of the second target transistor. For example, the overall width-to-length ratio of the second target transistor can be controlled by adjusting the number of second transistors connected in parallel.

[0179] In some embodiments, L1 = L2. Thus, by controlling the differentiation between W1 and W2, and / or the differentiation between n1 and n2, the aspect ratio differentiation of the first target transistor and the second target transistor can be achieved.

[0180] In some embodiments, W1 = W2, and n1 ≠ n2. For example, when the difference in the width-to-length ratio of the first target transistor and the second target transistor is large, W1 and W2 can be kept the same, and the quantities of n1 and n2 can be changed, thereby making it easier to achieve a relatively large difference in the width-to-length ratio of the first target transistor and the second target transistor.

[0181] In some embodiments, W1≠W2, n1=n2. For example, when the difference in the width-to-length ratio of the first target transistor and the second target transistor is small, n1 and n2 can be kept the same, and the channel width of the transistor can be finely adjusted, thereby making it easier to achieve a relatively small difference in the width-to-length ratio of the first target transistor and the second target transistor.

[0182] It should be noted that the first target transistor is composed of multiple first transistors of the same size connected in parallel, and the second target transistor is composed of multiple second transistors of the same size connected in parallel. This technical concept is applicable to any group of transistors with the same function but different aspect ratios.

[0183] For example, the first driving transistor is composed of multiple first transistors of the same size connected in parallel, and the second driving transistor is composed of multiple second transistors of the same size connected in parallel. As another example, the first light-emitting control transistor is composed of multiple first transistors of the same size connected in parallel, and the second light-emitting control transistor is composed of multiple second transistors of the same size connected in parallel. Further details will not be elaborated here.

[0184] It should be noted that the transistors in the embodiments of this application can be either N-type or P-type transistors. For N-type transistors, the on-state level is high and the off-state level is low. That is, when the gate potential of an N-type transistor is high, its first and second terminals are connected; when the gate potential of an N-type transistor is low, its first and second terminals are off. For P-type transistors, the on-state level is low and the off-state level is high. That is, when the gate potential of a P-type transistor is low, its first and second terminals are connected; when the gate potential of a P-type transistor is high, its first and second terminals are off. In specific implementations, the gate of each transistor is used as its control electrode. Furthermore, depending on the signal and type of the gate of each transistor, its first terminal can be used as the source and its second terminal as the drain, or vice versa. No distinction is made here. The source and drain of a transistor can sometimes be used interchangeably, and sometimes the source and drain of a transistor can be collectively referred to as source-drain. In addition, the on-level and off-level in the embodiments of this application are general terms. The on-level refers to any level that can turn on the transistor, and the off-level refers to any level that can turn off the transistor.

[0185] This application also provides a display device, including the display panel provided in this application. Please refer to... Figure 16 , Figure 16 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 16 The provided display device 1000 includes the display panel 100 provided in any of the above embodiments of this application. Figure 16 This embodiment uses a mobile phone as an example to illustrate the display device 1000. It is understood that the display device provided in this application embodiment can be other display devices with display functions, such as wearable products, computers, televisions, and in-vehicle display devices; this application does not impose specific limitations on these. The display device provided in this application embodiment has the beneficial effects of the display panel provided in this application embodiment. For details, please refer to the specific descriptions of the display panel in the above embodiments; these will not be repeated here.

[0186] The embodiments described above are not exhaustive, nor do they limit the application to the specific embodiments described herein. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that, Includes pixel circuitry and light-emitting elements; The pixel circuit includes an amplitude modulation sub-circuit and a pulse width modulation sub-circuit. The pixel circuit includes a first pixel circuit and a second pixel circuit, and the light-emitting element includes a first light-emitting element and a second light-emitting element. The first pixel circuit is used to drive the first light-emitting element, and the second pixel circuit is used to drive the second light-emitting element. The light-emitting color of the first light-emitting element and the light-emitting color of the second light-emitting element are different. The first pixel circuit includes a first target transistor, and the second pixel circuit includes a second target transistor. The first target transistor and the second target transistor have the same function. The aspect ratio of the first target transistor is not equal to that of the second target transistor; The amplitude modulation sub-circuit of the first pixel circuit includes a first light-emitting control transistor, and the amplitude modulation sub-circuit of the second pixel circuit includes a second light-emitting control transistor; The first light-emitting control transistor includes a first sub-light-emitting control transistor and a second sub-light-emitting control transistor. The two ends of the first sub-light-emitting control transistor are respectively connected to the first light-emitting element and the second sub-light-emitting control transistor. The two ends of the second sub-light-emitting control transistor are respectively connected to the first sub-light-emitting control transistor and the first power supply terminal. The aspect ratio of the first sub-light-emitting control transistor is greater than that of the second sub-light-emitting control transistor; And / or, the second light-emitting control transistor includes a third sub-light-emitting control transistor and a fourth sub-light-emitting control transistor, the two ends of the third sub-light-emitting control transistor are respectively connected to the second light-emitting element and the fourth sub-light-emitting control transistor, and the two ends of the fourth sub-light-emitting control transistor are respectively connected to the third sub-light-emitting control transistor and the first power supply terminal; The aspect ratio of the third sub-light-emitting control transistor is greater than that of the fourth sub-light-emitting control transistor.

2. The display panel according to claim 1, characterized in that, The amplitude modulation sub-circuit of the first pixel circuit includes a first driving transistor, the amplitude modulation sub-circuit of the second pixel circuit includes a second driving transistor, the pulse width modulation sub-circuit of the first pixel circuit includes a third driving transistor, and the pulse width modulation sub-circuit of the second pixel circuit includes a fourth driving transistor. The first target transistor includes the first driving transistor and / or the third driving transistor, and the second target transistor includes the second driving transistor and / or the fourth driving transistor; The width-to-length ratio of the first driving transistor is greater than that of the second driving transistor, and / or the width-to-length ratio of the third driving transistor is greater than that of the fourth driving transistor.

3. The display panel according to claim 2, characterized in that, The aspect ratio of the first driving transistor is greater than that of the third driving transistor; And / or, the width-to-length ratio of the second driving transistor is greater than the width-to-length ratio of the fourth driving transistor.

4. The display panel according to claim 1, characterized in that, The pulse width modulation sub-circuit of the first pixel circuit includes a third light-emitting control transistor, and the pulse width modulation sub-circuit of the second pixel circuit includes a fourth light-emitting control transistor; The first target transistor includes the first light-emitting control transistor and / or the third light-emitting control transistor, and the second target transistor includes the second light-emitting control transistor and / or the fourth light-emitting control transistor; The aspect ratio of the first light-emitting control transistor is greater than that of the second light-emitting control transistor, and / or the aspect ratio of the third light-emitting control transistor is greater than that of the fourth light-emitting control transistor.

5. The display panel according to claim 4, characterized in that, The amplitude modulation sub-circuit of the first pixel circuit includes a first driving transistor, the amplitude modulation sub-circuit of the second pixel circuit includes a second driving transistor, the pulse width modulation sub-circuit of the first pixel circuit includes a third driving transistor, and the pulse width modulation sub-circuit of the second pixel circuit includes a fourth driving transistor. The aspect ratio of the first light-emitting control transistor is greater than that of the first driving transistor; And / or, the aspect ratio of the second light-emitting control transistor is greater than the aspect ratio of the second driving transistor; And / or, the aspect ratio of the third light-emitting control transistor is greater than the aspect ratio of the third driving transistor; And / or, the aspect ratio of the fourth light-emitting control transistor is greater than the aspect ratio of the fourth driving transistor.

6. The display panel according to claim 4, characterized in that, The amplitude modulation sub-circuit of the first pixel circuit includes a first driving transistor, the amplitude modulation sub-circuit of the second pixel circuit includes a second driving transistor, the pulse width modulation sub-circuit of the first pixel circuit includes a third driving transistor, and the pulse width modulation sub-circuit of the second pixel circuit includes a fourth driving transistor. The absolute value of the difference between the width-to-length ratio of the first driving transistor and the width-to-length ratio of the second driving transistor is |∆A1|, the absolute value of the difference between the width-to-length ratio of the first light-emitting control transistor and the width-to-length ratio of the second light-emitting control transistor is |∆A2|, and the absolute value of the difference between the width-to-length ratio of the third driving transistor and the width-to-length ratio of the fourth driving transistor is |∆A3|. |∆A2|>|∆A1|>|∆A3|.

7. The display panel according to claim 1, characterized in that, The amplitude modulation sub-circuit of the first pixel circuit includes a first storage capacitor, the amplitude modulation sub-circuit of the second pixel circuit includes a second storage capacitor, the pulse width modulation sub-circuit of the first pixel circuit includes a third storage capacitor, and the pulse width modulation sub-circuit of the second pixel circuit includes a fourth storage capacitor. The capacitance value of the first storage capacitor is greater than the capacitance value of the second storage capacitor, and / or the capacitance value of the third storage capacitor is greater than the capacitance value of the fourth storage capacitor.

8. The display panel according to claim 7, characterized in that, The difference between the capacitance value of the first storage capacitor and the capacitance value of the second storage capacitor is ∆C1, and the difference between the capacitance value of the third storage capacitor and the capacitance value of the fourth storage capacitor is ∆C2, where ∆C1 > ∆C2.

9. The display panel according to claim 1, characterized in that, The amplitude modulation sub-circuit of the first pixel circuit includes a first control transistor, and the pulse width modulation sub-circuit of the first pixel circuit is connected to the gate of the first control transistor. The amplitude modulation sub-circuit in the second pixel circuit includes a second control transistor, and the pulse width modulation sub-circuit of the second pixel circuit is connected to the gate of the second control transistor; The first target transistor includes the first control transistor, and the second target transistor includes the second control transistor; The width-to-length ratio of the first control transistor is greater than that of the second control transistor.

10. The display panel according to claim 9, characterized in that, The amplitude modulation sub-circuit of the first pixel circuit includes a first driving transistor, the amplitude modulation sub-circuit of the second pixel circuit includes a second driving transistor, the pulse width modulation sub-circuit of the first pixel circuit includes a third driving transistor, and the pulse width modulation sub-circuit of the second pixel circuit includes a fourth driving transistor. The ratio of the width-to-length ratio of the first driving transistor to the width-to-length ratio of the second driving transistor is B1, the ratio of the width-to-length ratio of the third driving transistor to the width-to-length ratio of the fourth driving transistor is B2, and the ratio of the width-to-length ratio of the first control transistor to the width-to-length ratio of the second control transistor is B3. B3 = B1, or B3 = B2.

11. The display panel according to claim 9, characterized in that, The pulse width modulation sub-circuit of the first pixel circuit includes a first control capacitor, which is connected to the gate of the first control transistor. The pulse width modulation sub-circuit of the second pixel circuit includes a second control capacitor, which is connected to the gate of the second control transistor. The capacitance value of the first control capacitor is greater than the capacitance value of the second control capacitor.

12. The display panel according to claim 1, characterized in that, The channel length of the first target transistor is equal to the channel length of the second target transistor, but the channel width of the first target transistor is not equal to the channel width of the second target transistor.

13. The display panel according to claim 1, characterized in that, The first target transistor includes n1 first transistors connected in parallel, and the second target transistor includes n2 second transistors connected in parallel, where n1 and n2 are integers greater than 1; The channel length of each first transistor is L1, and the channel width of each first transistor is W1. The channel length of each second transistor is L2, and the channel width of each second transistor is W2.

14. The display panel according to claim 13, characterized in that, W1 = W2, n1 ≠ n2.

15. The display panel according to claim 13, characterized in that, W1≠W2, n1=n2.

16. The display panel according to claim 13, characterized in that, L1 = L2.

17. The display panel according to any one of claims 1 to 16, characterized in that, The first light-emitting element includes a red light-emitting element, and the second light-emitting element includes at least one of a blue light-emitting element and a green light-emitting element; Alternatively, the first light-emitting element may include at least one of a red light-emitting element and a green light-emitting element, and the second light-emitting element may include a blue light-emitting element.

18. The display panel according to any one of claims 1 to 16, characterized in that, The pixel circuit further includes a third pixel circuit, and the light-emitting element further includes a third light-emitting element. The third pixel circuit is used to drive the third light-emitting element. The light-emitting colors of the first light-emitting element, the second light-emitting element, and the third light-emitting element are different. The third pixel circuit includes a third target transistor, and the first target transistor, the second target transistor, and the third target transistor have the same function. The aspect ratios of the first target transistor, the second target transistor, and the third target transistor are all different.

19. The display panel according to claim 18, characterized in that, The first light-emitting element includes a red light-emitting element, the second light-emitting element includes a green light-emitting element, and the third light-emitting element includes a blue light-emitting element; The aspect ratio of the first target transistor is greater than that of the second target transistor, and the aspect ratio of the second target transistor is greater than that of the third target transistor.

20. The display panel according to claim 18, characterized in that, The first light-emitting element includes a red light-emitting element, the second light-emitting element includes a green light-emitting element, and the third light-emitting element includes a blue light-emitting element; The amplitude modulation sub-circuit of the first pixel circuit includes a first storage capacitor, the amplitude modulation sub-circuit of the second pixel circuit includes a second storage capacitor, the pulse width modulation sub-circuit of the first pixel circuit includes a third storage capacitor, and the pulse width modulation sub-circuit of the second pixel circuit includes a fourth storage capacitor. The amplitude modulation sub-circuit of the third pixel circuit includes a fifth storage capacitor, and the pulse width modulation sub-circuit of the third pixel circuit includes a sixth storage capacitor. The capacitance value of the first storage capacitor is greater than the capacitance value of the second storage capacitor, and the capacitance value of the second storage capacitor is greater than the capacitance value of the fifth storage capacitor; And / or, the capacitance value of the third storage capacitor is greater than the capacitance value of the fourth storage capacitor, and the capacitance value of the fourth storage capacitor is greater than the capacitance value of the sixth storage capacitor.

21. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 20.

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