Cascade digital filter device for large-scale downsampling

Abstract

This invention relates to the field of downsampling filter technology, and more particularly to a cascaded digital filtering device for large-scale downsampling. It includes: inputting initial information at a high sampling rate into a first-stage variable decimation factor cascaded integral-comb filter bank; after preliminary downsampling, the output is sent to a second-stage fixed decimation factor cascaded integral-comb filter bank; the second-stage fixed decimation factor cascaded integral-comb filter bank comprises three sequentially connected 16x decimation cascaded integral-comb filters; after high-fold downsampling, the data is output to a third-stage compensation filter to compensate for the large passband attenuation generated by the previous cascaded integral-comb filter bank and increase stopband attenuation; then the data is output to a fourth-stage decimation filter bank for multi-stage decimation and further downsampling, finally outputting a low-frequency sampling rate signal. Its advantages are: it can achieve downsampling of over a thousand times while maintaining passband flatness, suppressing high-frequency aliasing noise, and ensuring the integrity and accuracy of the downsampled data.

Description

Technical Field

[0001] The present invention relates to the technical field of downsampling filters, and in particular to a cascade digital filtering device for large-scale downsampling. Background Art

[0002] Space gravitational wave detection uses a three-star formation scheme, based on the Michelson laser heterodyne interferometry principle, to measure the micro-changes in the distance of the intersatellite inertial reference at a distance of millions of kilometers and hundreds of thousands of kilometers, thereby inverting the gravitational wave event, with a measurement accuracy of the picometer level. The electronic payload that measures the micro-changes in the distance of the intersatellite inertial reference is called a "phase meter", and its core function is high-precision phase measurement, with an index requirement within the 0.1mHz~1Hz frequency band, and its measurement accuracy needs to reach / (correspond / ). Due to the intersatellite Doppler effect, the dynamic range of the intersatellite interference signal frequency is 2MHz-20MHz. In order to measure the phase information of the interference signal with high precision, the processing frequency of the on-board phase measurement system is generally not less than 80MHz. In addition, due to the needs of intersatellite clock noise transmission and intersatellite ranging, in addition to the need for phase measurement scientific data from three satellites to be integrated on one satellite before being sent to the ground, intersatellites need to have communication functions. Considering the huge amount of data from long-term scientific observations, as well as the 10Hz~100Hz required by other scientific systems and the Hz level of phase measurement information processing requirements on the ground, it is necessary to perform large-scale downsampling of the phase measurement information with a processing frequency of tens of MHz.

[0003] In order to prevent the potential high-frequency noise from aliasing into the measurement frequency band during the downsampling process, a downsampling processing method is needed that can not only complete the large-scale downsampling processing, but also make the downsampled data meet the system performance requirements and minimize its impact on phase measurement. However, there is currently no perfect large-scale downsampling technology that can be applied to phase measurement systems. Therefore, the existing technical solutions can be divided into the following two aspects: (1) In terms of large-scale downsampling applied to phase measurement, the LISA (Laser Interferometer Space Antenna) team proposed in the LISA-Metrology System Final Report that the phase measurement information is extracted in several steps. A single cascaded integrated comb (CIC) filter is used to complete a large amount of extraction work, that is, the 80MHz sampling rate data is downsampled to about 610Hz, and then a general FIR extraction filter is used to extract it three times in a row to 102Hz, 10Hz, and 3.4Hz, and then output it to other systems according to different functional purposes. (2) In addition, in terms of multi-stage digital decimation filter groups, the most common multi-stage digital decimation filters are mostly used in Sigma delta ADCs to downsample the data output by the Sigma delta modulator. They are mostly three-stage structures, namely, a digital decimation filter formed by cascading a CIC filter, a compensation filter, and a half-band filter, in which the compensation and half-band filters are both decimated by a factor of 2.

[0004] The common three-stage digital decimation filter technology has certain limitations. First, the downsampling multiple is not large, usually only tens or hundreds. Second, since the last stage of the three-stage digital decimation filter is mostly a half-band filter, and the half-band filter is only suitable for 2x downsampling, it is difficult to output a specific sampling frequency (such as an odd multiple).

[0005] In addition, the existing large-scale downsampling method of phase measurement data uses a single CIC filter for large-scale downsampling, and then simply extracts to the target frequency. The problem is that since the stopband attenuation of the first sidelobe of the first-order integral comb filter is only 13.46dB, in order to improve the ability to suppress aliasing noise, its order is usually increased, but the higher the order, the greater the attenuation in the passband, which affects the accuracy and integrity of the phase measurement data in the measurement band. In addition, the sampling frequency of the initial high-rate data output in the system may change with the system requirements. The existing downsampling method is only for the highest sampling frequency of 80MHz, which is not comprehensive enough. Summary of the invention

[0006] In order to solve the above problems, the present invention provides a cascade digital filtering device for large-scale downsampling.

[0007] The present invention aims to provide a cascade digital filtering device for large-scale downsampling, comprising a four-stage cascade digital filter group, namely a first-stage variable decimation factor cascade integral comb filter group, a second-stage fixed decimation factor cascade integral comb filter group, a third-stage compensation filter and a fourth-stage decimation filter group;

[0008] Using the initial information as the input of the first stage variable decimation factor cascade integral comb filter bank, after preliminary downsampling by the first stage variable decimation factor cascade integral comb filter bank, outputting the downsampled data to the second stage fixed decimation factor cascade integral comb filter bank;

[0009] The second-stage fixed decimation factor cascade integrator comb filter group includes three 16-fold decimation cascade integrator comb filters connected in sequence, which are used to complete high-multiple downsampling and output the downsampled data to the third-stage compensation filter;

[0010] The third-stage compensation filter is used to compensate for the passband attenuation produced by the previous-stage cascaded integrator comb filter group and increase the stopband attenuation, and then outputs the data to the fourth-stage extraction filter group;

[0011] The fourth-stage decimation filter group includes multiple finite-length unit impulse response decimation filters and / or half-band filters for performing multi-stage decimation and further downsampling on the input data, and finally outputting a low-frequency rate signal from the output end of the fourth-stage decimation filter group.

[0012] Preferably, the first-stage variable decimation factor cascaded integrator comb filter bank includes a 2-fold decimation CIC filter, a 4-fold decimation CIC filter, two 8-fold decimation CIC filters, two signal connection modules and two selectors;

[0013] The input signal is divided into three paths, two of which are used as the input ends of the 2x extraction CIC filter and the 8x extraction CIC filter respectively, the third signal, the output of the 2x extraction CIC filter and the output of the 8x extraction CIC filter are respectively input into the first signal connection module, and the signals are integrated and output to the first selector through the first signal connection module; the signal output from the first selector is divided into three paths again, two of which are used as the input ends of the 4x extraction CIC filter and the 8x extraction CIC filter respectively, the third signal, the output of the 4x extraction CIC filter and the output of the 8x extraction CIC filter are respectively input into the second signal connection module, and the signals are integrated and output to the second selector through the second signal connection module; the signal output from the first selector is used as the output of the first-stage variable extraction factor cascaded integrator comb filter group.

[0014] Preferably, the first signal connection module and the second signal connection module are both multiplexers; and the selector is a 3-input selector.

[0015] Preferably, the CIC filters in the first-stage variable decimation factor cascaded integrator comb filter group and the second-stage fixed decimation factor cascaded integrator comb filter group are both recursive three-stage cascaded integrator comb filters;

[0016] The recursive three-stage cascaded integrator comb filter includes three integrators connected in sequence, an extractor and three differentiators connected in sequence; the initial information is input from the input end of the first integrator, output from the output end of the third integrator to the extractor, then input from the extractor to the first differentiator, and finally output from the output end of the third differentiator to the next stage filter.

[0017] Preferably, the integrator and the differentiator are both composed of a delay unit and an adder;

[0018] In the integrator, the adder input end is provided with two ports, one port is connected to the delay unit output end, and the other port is used as the input end of the integrator, and the output end of the adder is used as the input end of the delay unit and also as the output end of the integrator;

[0019] In the differentiator, the input end of the differentiator is respectively connected to the input end of the delay unit and the input end of the adder, the output end of the delay unit is connected to the input end of the adder, the input end of the differentiator and the output end of the delay unit serve as the positive input and negative input of the adder respectively, and the output end of the adder serves as the output end of the differentiator.

[0020] Preferably, the third-stage compensation filter includes n+1 adders, n coefficient multipliers and 2n-1 delay units, n≥2; the input of the third-stage compensation filter and the output of the 2n-1th delay unit are respectively connected to the input of the first adder, and the output of the first adder is connected to the input of the first coefficient multiplier; the output of the first delay unit and the output of the 2n-2th delay unit are respectively connected to the input of the second adder, and the output of the second adder is connected to the input of the second coefficient multiplier; n adders, n coefficient multipliers and 2n-1 delay units are connected in sequence, and then the outputs of the n coefficient multipliers are respectively connected to the input of the n+1th adder; the output of the n+1th adder is used as the output of the third-stage compensation filter.

[0021] Preferably, the finite length unit impulse response decimation filter in the fourth-stage decimation filter bank is used to complete odd-number multiple decimation, and the half-band filter is used to complete even-number multiple decimation.

[0022] Preferably, the fourth-stage extraction filter group includes a 3-fold finite-length unit impulse response extraction filter, a 5-fold finite-length unit impulse response extraction filter, a 2-fold half-band filter and a 3-fold finite-length unit impulse response extraction filter connected in sequence, which are used to respectively realize 3-fold, 10-fold and 3-fold extraction, and finally output a low-frequency rate signal from the output end of the fourth-stage extraction filter group.

[0023] Preferably, the initial information is high sampling frequency initial information of phase measurement; the overall downsampling multiple of the large-scale downsampling cascade digital filtering device is more than one thousand times.

[0024] Compared with the prior art, the present invention can achieve the following beneficial effects:

[0025] In view of the shortcomings of the prior art, the present invention proposes a four-stage cascaded large-scale downsampling cascade digital filtering device, which can complete the large-scale downsampling processing of high-frequency initial information in terms of structure and function, and the downsampling multiple can reach more than a thousand times, such as 2 20 times; and can adapt to the output and input information of different rates within the range, and perform more specific low-frequency sampling rate output at the same time. Performance requirements: It has better anti-aliasing effect and less impact on the accuracy of original data measurement; it has smaller passband attenuation and less attenuation effect on target information in the passband, and can ensure the integrity and accuracy of data in the passband. In summary, by adopting a four-stage filter cascade structure and complementing each level of downsampling filters, the initial information with a high sampling rate of tens of megahertz (MHz) can be downsampled to more than ten hertz or even a few hertz for output, while meeting the system performance requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 4 is a schematic diagram of the structure of a four-stage large-scale downsampling filter group provided according to an embodiment of the present invention.

[0027] Figure 2 The diagram is a schematic diagram of the structure of a first-stage variable decimation factor cascaded integrator-comb (CIC) filter bank according to an embodiment of the present invention.

[0028] Figure 3 1 is a schematic diagram of the structure of a second-stage fixed decimation factor cascaded integrator-comb (CIC) filter group provided according to an embodiment of the present invention; in the figure, 2 represents the input and output ends (corresponding to 1.25 MHz and 305.17 Hz) of the second-stage fixed decimation factor cascaded integrator-comb filter group 2, and 16 (1), 16 (2), and 16 (3) represent the first, second, and third 16-fold decimation CIC filters in series, respectively.

[0029] Figure 4 Schematic diagram of a recursive three-stage cascaded integrator-comb (CIC) filter provided according to an embodiment of the present invention.

[0030] Figure 5 is a schematic diagram of a third-stage compensation filter provided according to an embodiment of the present invention.

[0031] Figure 6 1 is a schematic diagram of a fourth-stage decimation filter group provided according to an embodiment of the present invention; in the figure, 1 represents an input end of 305.17 Hz, 1, 2, and 3 on the right represent output ends of three different sampling frequencies (corresponding to 3.3 Hz, 10 Hz, and 102 Hz), fir↓3 represents the first 3x decimation FIR decimation filter, fir↓5 represents the 5x decimation FIR decimation filter, HB↓2 represents a 2x half-band filter, and fir↓3(2) represents the second 3x decimation FIR decimation filter.

[0032] Figure 7 1 is an amplitude-frequency response diagram of the compensation filter provided in an embodiment of the present invention before and after compensation for passband attenuation.

[0033] Figure 8 It is a signal waveform diagram at a sampling frequency of 80 megahertz (MHz) provided according to an embodiment of the present invention.

[0034] Fig. 9 It is a waveform diagram of a signal after being downsampled by the cascade digital filtering device for large-scale downsampling provided by an embodiment of the present invention.

[0035] Reference numerals:

[0036] 1. First stage variable decimation factor cascaded integrator comb filter bank;

[0037] 2. The second stage fixed decimation factor cascaded integrator comb filter bank;

[0038] 3. The third stage compensation filter;

[0039] 4. Fourth stage decimation filter bank. DETAILED DESCRIPTION

[0040] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following description, the same modules are represented by the same reference numerals. In the case of the same reference numerals, their names and functions are also the same. Therefore, the detailed description thereof will not be repeated.

[0041] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and do not constitute a limitation of the present invention.

[0042] The present invention provides a cascade digital filtering device for large-scale downsampling. Taking the sampling frequencies of 102 Hz, 10 Hz and 3.4 Hz for the final output phase measurement information as an example, the invented cascade digital filtering device for large-scale downsampling can respectively downsample input signals with sampling frequencies in the range of 80 MHz to 1.25 MHz to the above three output sampling frequencies, wherein the main bodies of the first-stage and second-stage filter groups are both composed of third-order CIC filters, and can achieve a sidelobe attenuation of about 40.38 dB.

[0043] A cascade digital filter device for large-scale downsampling, comprising a four-stage cascade digital filter group: a first-stage variable decimation factor cascaded integrator comb (CIC) filter group, a second-stage fixed decimation factor cascaded integrator comb (CIC) filter group, a third-stage compensation filter and a fourth-stage decimation filter group;

[0044] Using the initial information as the input of the first stage variable decimation factor cascade integral comb filter bank, after preliminary downsampling by the first stage variable decimation factor cascade integral comb filter bank, outputting the downsampled data to the second stage fixed decimation factor cascade integral comb filter bank;

[0045] The second-stage fixed decimation factor cascade integrator comb filter group includes three 16-fold decimation cascade integrator comb filters connected in sequence, which are used to complete high-multiple downsampling and output the downsampled data to the third-stage compensation filter;

[0046] The third-stage compensation filter is used to compensate for the passband attenuation caused by the previous-stage CIC filter group and increase the stopband attenuation, and then outputs the data to the fourth-stage extraction filter group;

[0047] The fourth-stage decimation filter group includes an FIR decimation filter and / or a half-band filter, which is used to perform multi-stage decimation and continuous downsampling on the input data, and finally output a low-frequency rate signal from the output end of the fourth-stage decimation filter group.

[0048] Specifically, the first stage variable decimation factor cascaded integrator comb filter bank realizes preliminary downsampling, and its internal structure is as follows Figure 2 As shown, it is composed of a 2-fold decimation CIC filter, a 4-fold decimation CIC filter, two 8-fold decimation CIC filters, two signal connection modules and two 3-input selectors;

[0049] The input signal with a sampling frequency in the range of 80MHz~1.25MHz is divided into three paths, two of which are used as the input of the 2x extraction CIC filter and the 8x CIC filter respectively, the third signal, the output of the 2x extraction CIC filter and the output of the 8x CIC filter are respectively input to the first signal connection module (Mux1), and the signals are integrated and output to the first selector (selector1) through the first signal connection module; the signal output from the first selector is divided into three paths again, two of which are used as the input of the 4x extraction CIC filter and the 8x CIC filter respectively, the third signal, the output of the 4x extraction CIC filter and the output of the 8x CIC filter are respectively input to the second signal connection module (Mux2), and the signals are integrated and output to the second selector (selector2) through the second signal connection module; the signal output from the first selector is used as the output of the first-stage variable extraction factor cascaded integrator comb filter group.

[0050] The first signal connection module and the second signal connection module are both multiplexers (Mux).

[0051] Specifically, the internal structure of the second-stage fixed decimation factor cascaded integrator comb filter bank is as follows: Figure 3 , which is composed of three 16-fold decimation cascaded integrator comb (CIC) filters; the input signal is connected to the first 16-fold decimation CIC filter, and its output is connected to the second 16-fold decimation CIC filter. Similarly, the outputs of the two 16-fold decimation CIC filters are connected to the input of the third 16-fold decimation CIC filter, and the output of the third 16-fold decimation CIC filter is used as the output of the second-stage fixed decimation factor CIC filter group. In the embodiment, 16 3 The downsampling operation is performed by times, so that the data sampling frequency output by the second-stage fixed extraction factor cascaded integrator comb filter group is 305Hz.

[0052] Based on the above description, the cascaded integrator comb (CIC) filter can be divided into a recursive structure and a non-recursive structure. The transfer function of a single-stage CIC filter is:

[0053] ;

[0054] Where D is the decimation factor, M is the delay factor, usually 1 or 2; z is the z transfer function;

[0055] Recursive and non-recursive CIC filters are equivalent, but the non-recursive structure contains more accumulators and multipliers. Under the high decimation rate requirement of the present invention, the recursive structure is easier to implement and requires fewer resources. Therefore, the present invention uses recursive structure CIC filters. The CIC filters in the first-stage variable decimation factor cascaded integrator comb (CIC) filter group and the second-stage fixed decimation factor cascaded integrator comb (CIC) filter group are recursive three-order cascaded integrator comb (CIC) filters. The third-order CIC filter includes three integrators connected in sequence, an extractor, and three differentiators connected in sequence; the initial information is input from the input end of the first integrator, output from the output end of the third integrator to the extractor, and then input from the extractor to the first differentiator, and finally output from the output end of the third differentiator to the next filter; its structure is as follows: Figure 4 As shown (taking 8x extraction as an example). Among them, the integrator and the differentiator are both composed of delay units and adders:

[0056] In the integrator, the adder input is provided with two ports, one port is connected to the delay unit output, and the other port is used as the input of the integrator. The output of the adder is used as the input of the delay unit and also as the output of the integrator.

[0057] In the differentiator, the input end of the differentiator is respectively connected to the input end of the delay unit and the input end of the adder, the output end of the delay unit is connected to the input end of the adder, the input end of the differentiator and the output end of the delay unit serve as the positive input and negative input of the adder respectively, and the output end of the adder serves as the output end of the differentiator.

[0058] The third-stage compensation filter comprises n+1 adders, n coefficient multipliers and 2n-1 delay units, where n≥2; the input of the third-stage compensation filter and the output of the 2n-1th delay unit are respectively connected to the input of the first adder, and the output of the first adder is connected to the input of the first coefficient multiplier; the output of the first delay unit and the output of the 2n-2th delay unit are respectively connected to the input of the second adder, and the output of the second adder is connected to the input of the second coefficient multiplier; the n adders, n coefficient multipliers and 2n-1 delay units are connected in sequence, and the outputs of the n coefficient multipliers are respectively connected to the input of the n+1th adder; the output of the n+1th adder is used as the output of the third-stage compensation filter.

[0059] In a specific embodiment, the third-level compensation filter is generated by the "frequency sampling method" so that its amplitude-frequency response in the passband is the inverse of the amplitude response of the compensated CIC filter. This filter is an amplitude-compensated CFIR filter. When approaching the passband edge, its spectrum characteristic curve will rise, just offsetting the passband attenuation caused by the CIC filter. Through the written matlab program, inputting relevant parameters such as passband cutoff frequency, stopband cutoff frequency, passband ripple and stopband ripple, the tap coefficient h(n) (length N) of the compensation filter can be obtained. The following takes a compensation filter with a length of 8 as an example.

[0060] Since the coefficients of the filter are symmetrical, grouping the data of two identical coefficients together can obtain the compensation filter structure as follows: Figure 5 As shown: it is specifically composed of an adder, a coefficient multiplier, and a delay unit. The input signal and the output of the delay unit Delay4 are used as the input of the adder S1, and the output of the adder S1 is connected to the input of the coefficient multiplier h(1); the output of the delay unit Delay1 and the output of the delay unit Delay5 are used as the input of the adder S2, and the output of the adder S2 is connected to the input of the coefficient multiplier h(2); the output of the delay unit Delay2 and the output of the delay unit Delay6 are used as the input of the adder S3, and the output of the adder S3 is connected to the input of the coefficient multiplier h(3); the output of the delay unit Delay3 and the output of the delay unit Delay7 are used as the input of the adder S4, and the output of the adder S4 is connected to the input of the coefficient multiplier h(4); the output of each coefficient multiplier h(n) is used as the input of the adder S5, and the output of the adder S5 is the output of the third-stage compensation filter.

[0061] The fourth-stage decimation filter group includes multiple finite-length unit impulse response (FIR) decimation filters and / or half-band (HB) filters, wherein the HB filter is used to complete even-numbered decimation (implemented by multiple 2-fold cascades), and the FIR decimation filter is used to complete odd-numbered decimation. If the fourth-stage decimation filter group needs to complete 10-fold downsampling, the input end of the fourth-stage decimation filter group serves as the input end of the 5-fold FIR decimation filter, and its output end serves as the input end of the 2-fold HB filter, and the output of the HB filter serves as the output of the fourth-stage decimation filter group.

[0062] Specifically, the structure of the fourth-stage decimation filter bank is as follows: Figure 6; Since the final output is 101Hz, 10Hz, and 3.4Hz, the fourth-stage decimation filter group has a multi-stage rate output. At this time, the input data sampling frequency is about 305Hz, that is, 3 times, 10 times, and 3 times of decimation are required, respectively. The 3 times decimation is implemented by a general FIR decimation filter, and the 10 times decimation is implemented by a 5 times FIR decimation filter and a 2 times half-band filter cascade. Because the half-band filter is a special FIR filter, its even-order coefficients are all zero, so the calculation amount of implementing the half-band filter is half of that of other linear phase filters of the same length. Using this structure can occupy less resources and have better performance.

[0063] Example 1

[0064] Design as Figure 1-Figure 6 The large-scale downsampling cascade digital filtering device shown includes four cascaded digital filters:

[0065] First, the high-frequency initial information is used as the input of the first-stage variable decimation factor CIC filter group 1. The CIC filter coefficients are all 1 and have strong stability, linear phase, no multipliers, and simple structure, which is suitable for a large range of decimation. A combination of CIC filter groups with different decimation multiples is used. For example, the input signals with different sampling frequencies in the range of 80MHz to 1.25MHz can be preliminarily downsampled, and the output end is connected to the input end of the second-stage fixed decimation factor cascaded integrator comb filter group 2;

[0066] In order to achieve a larger multiple of data downsampling, the second stage fixed decimation factor cascade integrator comb filter group 2 also selects CIC filter, but the second stage is a CIC filter with a fixed decimation multiple, for example: 16 3 times downsampling, outputting data with a sampling frequency of approximately 305 Hz (such as Figure 3 As shown in Figure 2). Recursive 3rd-order CIC filters are selected in both the first and second stages to achieve downsampling and 40.38dB stopband attenuation.

[0067] Third-stage compensation filter 3: Although CIC filter can achieve good results, it has disadvantages such as large passband attenuation and limited stopband attenuation. Therefore, the cascade compensation filter is used to compensate for the passband attenuation to achieve the passband flatness required by the system and improve the overall anti-aliasing performance of the filter. Therefore, it is cascaded to the CIC filter as the third stage.

[0068] Fourth-stage decimation filter group 4: In order to eventually output signals of various low-frequency rates, such as 102 Hz, 10 Hz, and 3.4 Hz, it is necessary to continue downsampling from 305 Hz. Therefore, the last stage uses a decimation filter group combining a FIR decimation filter and an HB filter, which occupies less hardware resources while meeting the performance requirements of passband flatness and stopband attenuation, making the overall performance of the downsampling filter more in line with the requirements.

[0069] Through the above technical solutions, the overall downsampling filter group can complete the high-multiple downsampling of phase measurement information, and the compensation filter can well solve the stopband attenuation problem caused by the CIC filter, while increasing the stopband attenuation. The fourth-order half-band filter better controls the overall transition bandwidth of the filter, so that after downsampling, the performance requirements of data integrity, accuracy and measurement accuracy within the measurement frequency band can be met.

[0070] The compensation effect of passband attenuation is as follows: Figure 7 As shown: The amplitude-frequency response of the compensation filter is shown in the figure (CFIR filter). The amplitude attenuation of the uncompensated filter curve (CIC before compensation) at the passband cutoff frequency is about -0.1047dB, while the amplitude attenuation of the compensated filter curve (CIC after compensation) at the passband cutoff frequency is only -0.0003dB, indicating that the passband amplitude attenuation compensation effect is good. The data with a sampling frequency of 80MHz is downsampled, and the waveform before downsampling is as follows Figure 8 , after being extracted by the four-stage downsampling filter bank in the downsampling technology designed by the present invention, the output is as follows Fig. 9 , there is no obvious distortion before and after the waveform, achieving a large-scale downsampling effect.

[0071] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the disclosure of the present invention can be performed in parallel, sequentially or in different orders, as long as the desired results of the technical solution disclosed in the present invention can be achieved, and this document does not limit this.

[0072] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A cascade digital filtering device for large-scale downsampling, characterized in that: The invention comprises a four-stage cascade digital filter group, namely a first-stage variable decimation factor cascade integral comb filter group, a second-stage fixed decimation factor cascade integral comb filter group, a third-stage compensation filter and a fourth-stage decimation filter group; Using the initial information as the input of the first stage variable decimation factor cascade integral comb filter bank, after preliminary downsampling by the first stage variable decimation factor cascade integral comb filter bank, outputting the downsampled data to the second stage fixed decimation factor cascade integral comb filter bank; The first stage variable decimation factor cascaded integrator comb filter group includes a 2x decimation CIC filter, a 4x decimation CIC filter, two 8x decimation CIC filters, two signal connection modules and two selectors; The input signal is divided into three paths, two of which are used as the input ends of the 2x decimation CIC filter and the 8x CIC filter respectively, the third signal, the output of the 2x decimation CIC filter and the output of the 8x CIC filter are respectively input into the first signal connection module, and the signals are integrated and output to the first selector through the first signal connection module; the signal output from the first selector is divided into three paths again, two of which are used as the input ends of the 4x decimation CIC filter and the 8x CIC filter respectively, the third signal, the output of the 4x decimation CIC filter and the output of the 8x CIC filter are respectively input into the second signal connection module, and the signals are integrated and output to the second selector through the second signal connection module; the signal output from the first selector is used as the output of the first-stage variable decimation factor cascaded integrator comb filter group; The second-stage fixed decimation factor cascade integrator comb filter group includes three 16-fold decimation cascade integrator comb filters connected in sequence, which are used to complete high-multiple downsampling and output the downsampled data to the third-stage compensation filter; The third-stage compensation filter is used to compensate for the passband attenuation produced by the previous-stage cascaded integrator comb filter and increase the stopband attenuation, and then outputs the data to the fourth-stage decimation filter group; The fourth-stage decimation filter group includes multiple finite-length unit impulse response decimation filters and / or half-band filters for performing multi-stage decimation and further downsampling on the input data, and finally outputting a low-frequency rate signal from the output end of the fourth-stage decimation filter group.

2. The large-scale downsampling cascade digital filtering device according to claim 1, characterized in that: The first signal connection module and the second signal connection module are both multiplexers; the selector is a 3-input selector.

3. The large-scale downsampling cascade digital filtering device according to claim 2, characterized in that: The CIC filters in the first-stage variable decimation factor cascaded integrator comb filter bank and the second-stage fixed decimation factor cascaded integrator comb filter bank are both recursive three-stage cascaded integrator comb filters; The recursive three-stage cascaded integrator comb filter includes three integrators connected in sequence, an extractor and three differentiators connected in sequence; the initial information is input from the input end of the first integrator, output from the output end of the third integrator to the extractor, then input from the extractor to the first differentiator, and finally output from the output end of the third differentiator to the next stage filter.

4. The large-scale downsampling cascade digital filtering device according to claim 3, characterized in that: The integrator and the differentiator are both composed of a delay unit and an adder; In the integrator, the adder input end is provided with two ports, one port is connected to the delay unit output end, and the other port is used as the input end of the integrator, and the output end of the adder is used as the input end of the delay unit and also as the output end of the integrator; In the differentiator, the input end of the differentiator is respectively connected to the input end of the delay unit and the input end of the adder, the output end of the delay unit is connected to the input end of the adder, the input end of the differentiator and the output end of the delay unit serve as the positive input and negative input of the adder respectively, and the output end of the adder serves as the output end of the differentiator.

5. The large-scale downsampling cascade digital filtering device according to claim 4, characterized in that: The third-stage compensation filter comprises n+1 adders, n coefficient multipliers and 2n-1 delay units, where n≥2; the input of the third-stage compensation filter and the output of the 2n-1th delay unit are respectively connected to the input of the first adder, and the output of the first adder is connected to the input of the first coefficient multiplier; the output of the first delay unit and the output of the 2n-2th delay unit are respectively connected to the input of the second adder, and the output of the second adder is connected to the input of the second coefficient multiplier; the n adders, the n coefficient multipliers and the 2n-1 delay units are connected in sequence, and the outputs of the n coefficient multipliers are respectively connected to the input of the n+1th adder; the output of the n+1th adder is used as the output of the third-stage compensation filter.

6. The large-scale downsampling cascade digital filtering device according to claim 5, characterized in that: The finite length unit impulse response decimation filter in the fourth stage decimation filter bank is used to complete odd-number multiple decimation, and the half-band filter is used to complete even-number multiple decimation.

7. The large-scale downsampling cascade digital filtering device according to claim 6, characterized in that: The fourth-stage extraction filter group includes a 3-fold finite-length unit impulse response extraction filter, a 5-fold finite-length unit impulse response extraction filter, a 2-fold half-band filter and a 3-fold finite-length unit impulse response extraction filter connected in sequence, which are used to respectively realize 3-fold, 10-fold and 3-fold extraction, and finally output a low-frequency rate signal from the output end of the fourth-stage extraction filter group.

8. The large-scale downsampling cascade digital filtering device according to claim 7, characterized in that: The initial information is high sampling frequency initial information of phase measurement; the overall downsampling multiple of the large-scale downsampling cascade digital filtering device is more than one thousand times.

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