Data access method, heterogeneous system, electronic device, medium and program product

Abstract

The present invention provides a data access method, a heterogeneous system, an electronic device, a medium and a program product, which are applied to the field of heterogeneous system data access technology, wherein an access initiator logs in to a virtual serial port device created by an access responder on a local operating system; the virtual serial port device is a device created by the access responder through a local virtual serial port driver, and the virtual serial port driver is created based on the number of channels of a target access channel of a data buffer in a preset programmable logic device; an access request is initiated to the local operating system of the access responder, so that the access responder obtains the target response data corresponding to the access request from the local, and writes the target response data to the data buffer through the target access channel; the target response data is obtained from the data buffer through the target access channel to complete the corresponding data access operation. It can be seen that the present invention meets the needs of the access initiator to directly access the access responder through an internal channel, and expands the application scenario.

Description

Technical Field

[0001] The present invention relates to the technical field of heterogeneous system data access, and in particular to a data access method, a heterogeneous system, an electronic device, a medium and a program product. Background Art

[0002] As my country's digitalization progresses, the demand for computing power will continue to grow. Data centers are gradually evolving into computing centers, and computing power has become a new productivity tool. However, with Moore's Law gradually failing, relying solely on central processing units (CPUs) can no longer meet the massive computing power demands of computing centers. Against this backdrop, heterogeneous computing has rapidly developed. Various heterogeneous systems, created by integrating multiple types of acceleration hardware, such as CPUs, graphics processing units (GPUs), systems-on-chips (SoCs), and field-programmable gate arrays (FPGAs), have significantly boosted the computing power of data centers.

[0003] Heterogeneous systems based on field-programmable gate arrays (FPGAs) offer advantages in network communication and algorithm acceleration, thanks to their high bandwidth, low latency, parallel processing, and reconfigurability. However, they lack versatility and complex logical operations compared to system-on-chips (SoCs). Therefore, these systems typically combine an FPGA with a SoC, with the SoC running an embedded operating system to implement functions such as algorithm updates, FPGA status monitoring, and partial task offloading. However, in current FPGA-based SoC heterogeneous systems, there is no direct data path between the host and the SoC. For the host to access the SoC's operating system, it must access a gigabit port over the network or use a USB-to-serial converter, increasing the hardware cost of the heterogeneous system. Furthermore, the lack of a direct data path between the host and the SoC in heterogeneous systems limits their application in many scenarios. Furthermore, in this architecture, the FPGA is connected to the SoC via a network, which consumes a significant amount of internal FPGA resources.

[0004] It can be seen that how to build a direct data path between the host and the system on chip is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of the embodiments of the present invention is to provide a data access method, heterogeneous system, electronic device, medium and program product, which can solve the problems in the prior art of increasing the hardware cost of the heterogeneous system, occupying a large amount of field programmable gate array resources, and the relatively small application scenarios of the current system due to the lack of a direct data path between the host and the on-chip system.

[0006] To solve the above technical problems, an embodiment of the present invention provides a data access method, which is applied to an access initiator and includes:

[0007] A virtual serial port device created by the access responder on the local operating system; the virtual serial port device is a device created by the access responder using a local virtual serial port driver, and the virtual serial port driver is created based on the number of target access channels of the data buffer in the preset programmable logic device;

[0008] Initiate an access request to the local operating system of the access responder, so that the access responder obtains the target response data corresponding to the access request from the local system and writes the target response data into the data buffer through the target access channel;

[0009] The target response data is obtained from the data buffer through the target access channel to complete the corresponding data access operation.

[0010] In some embodiments, before logging in to access the virtual serial port device created by the responder on the local operating system, the method further includes:

[0011] Determining the number of target access channels from the data buffer based on user requirements; the target access channel is a channel used by the access initiator to access the access responder;

[0012] The number of channels is configured to the access responder so that the access responder creates a virtual serial port driver based on the number of channels.

[0013] In some embodiments, configuring the number of channels to the access responder so that the access responder creates a virtual serial port driver based on the number of channels includes:

[0014] The number of channels is configured to the access responder through the dual access random access memory in the programmable logic device, so that the access responder creates a virtual serial port driver based on the number of channels.

[0015] In some embodiments, the access responder creates a virtual serial port driver based on the number of channels, including:

[0016] Based on the embedded driver architecture and the number of target access channels, a virtual serial port driver is created through software implementation.

[0017] In some embodiments, the process of creating a virtual serial port device by the access responder includes:

[0018] Load the virtual serial port driver locally according to the number of channels configured by the access initiator;

[0019] Use the locally loaded virtual serial port driver to create a virtual serial port device on the local operating system;

[0020] The number of virtual serial port devices is one or more.

[0021] In some embodiments, before the access responder loads the virtual serial port driver locally, the process further includes:

[0022] Performing a local first initialization operation, and after the first initialization operation is completed, registering a corresponding operating system console and configuring a corresponding console environment;

[0023] Accordingly, after creating a virtual serial port device on the local operating system using the locally loaded virtual serial port driver, the following steps are also included:

[0024] Add a virtual serial port device to the operating system console.

[0025] In some embodiments, the first initialization operation includes enabling a local serial port receive interrupt and configuring a local serial port receive processing function.

[0026] In some embodiments, further comprising:

[0027] After the virtual serial port driver is loaded locally and before the virtual serial port device is added to the operating system console, a second initialization operation is performed;

[0028] The second initialization operation is to configure the hardware serial port address information between the preset programmable logic device.

[0029] In some embodiments, the virtual serial port driver is loaded locally according to the number of channels configured by the access initiator, including:

[0030] Determine whether the number of channels configured by the access initiator is non-zero;

[0031] If the number of channels configured by the access initiator is non-zero, the virtual serial port driver is loaded locally. Otherwise, the virtual serial port driver is prohibited from being loaded locally.

[0032] In some embodiments, if the predetermined programmable logic device includes at least two data buffers, the method further includes:

[0033] Determine whether the read and write clocks between the data buffers are consistent;

[0034] If the read and write clocks of the data buffers are inconsistent, the read and write clocks of the data buffers are adjusted to be consistent through a preset synchronization method.

[0035] In some embodiments, the preset synchronization method includes delaying a clock cycle or performing Gray code conversion.

[0036] In some embodiments, the data buffer is a buffer implemented based on an internal register of a preset programmable logic device, and the data buffer adopts a first-in-first-out data reading and writing strategy.

[0037] In some embodiments, writing the target response data to the data buffer via the target access channel includes:

[0038] Monitor whether a full signal sent by the data buffer is received;

[0039] If the write-full signal sent by the data buffer is not detected, the target response data is written into the data buffer through the target access channel; otherwise, the target response data is prohibited from being written into the data buffer.

[0040] In some embodiments, the process of creating a virtual serial port device by the access responder further includes:

[0041] Configure the corresponding device index for each created virtual serial port device, and establish a correspondence between different virtual serial port devices and different target access channels;

[0042] Accordingly, the target response data is written into the data buffer via the target access channel, including:

[0043] Determine the target device index corresponding to the virtual serial port device currently logged in by the access initiator;

[0044] The target response data is written into the data buffer by using the target access channel corresponding to the target device index among the target access channels.

[0045] In some embodiments, further comprising:

[0046] Reading the target response data in the data buffer using the target access channel through a preset data receiving tool, and forwarding the read target response data to the target virtual serial port device; the target virtual serial port device is a virtual serial port device corresponding to the target access channel for transmitting the target response data determined from each virtual serial port device;

[0047] Accordingly, the target response data is obtained from the data buffer through the target access channel, including:

[0048] Obtain target response data from the target virtual serial port device by the preset data receiving tool through the corresponding target access channel.

[0049] In some embodiments, reading the target response data in the data buffer using the target access channel by a preset data receiving tool includes:

[0050] Monitor whether a non-empty interrupt signal sent by the data buffer is received;

[0051] If a non-empty interrupt signal sent by the data buffer is detected, the target response data in the data buffer is read using the target access channel through a preset data receiving tool, otherwise reading data from the data buffer is prohibited.

[0052] In some embodiments, the access initiator is a host and the access responder is a system on chip; or, the access initiator is a system on chip and the access responder is a host.

[0053] In another aspect, the present invention provides a data access method, applied to an access responder, comprising:

[0054] Obtaining an access request initiated by an access initiator to a local operating system after logging into a virtual serial port device; the virtual serial port device is a device pre-created by an access responder on the local operating system through a local virtual serial port driver, and the virtual serial port driver is created based on the number of target access channels of a data buffer in a preset programmable logic device;

[0055] The target response data corresponding to the access request is obtained locally, and the target response data is written into the data buffer through the target access channel, so that the access initiator can obtain the target response data from the data buffer through the target access channel.

[0056] On the other hand, the present invention also provides a heterogeneous system, comprising: an access initiator, an access responder, and a preset programmable logic device; wherein,

[0057] The preset programmable logic device is used to construct a target access channel between an access initiator and an access responder through its own data buffer;

[0058] The access initiator is used to log in to the virtual serial port device created by the access responder on the local operating system, initiate an access request to the access responder's local operating system, and obtain the target response data corresponding to the access request from the data buffer through the target access channel. The virtual serial port device is a device created by the access responder using the local virtual serial port driver, which is created based on the number of channels of the target access channel.

[0059] The access responder is used to obtain the target response data corresponding to the access request from the local computer, and write the target response data into the data buffer through the target access channel;

[0060] The access initiator is the host and the access responder is the system on chip; or the access initiator is the system on chip and the access responder is the host.

[0061] In another aspect, the present invention further provides an electronic device, comprising:

[0062] memory for storing computer programs;

[0063] The processor is configured to execute a computer program to implement the steps of the above-mentioned data access method.

[0064] On the other hand, the present invention further provides a non-volatile storage medium having a computer program stored thereon, which implements the steps of the above-mentioned data access method when executed by a processor.

[0065] On the other hand, the present invention further provides a computer program product, comprising a computer program / instruction, which implements the steps of the above-mentioned data access method when executed by a processor.

[0066] As can be seen from the above technical solution, the present invention provides a data access method, which is applied to the access initiator, including: logging in to the virtual serial port device created by the access responder on the local operating system; the virtual serial port device is a device created by the access responder through the local virtual serial port driver, and the virtual serial port driver is created based on the number of channels of the target access channel of the data buffer in the preset programmable logic device; initiating an access request to the local operating system of the access responder so that the access responder obtains the target response data corresponding to the access request from the local system and writes the target response data to the data buffer through the target access channel; obtaining the target response data from the data buffer through the target access channel to complete the corresponding data access operation. It can be seen that the virtual serial port device created by the access responder on the local operating system of the present invention is equivalent to building a direct connection between the access initiator and the access responder, which can meet the access initiator's need to directly access the access responder through the internal channel, and realize the access initiator's common firmware update, algorithm upgrade, and status monitoring needs of the access responder under this access mode. In addition, the virtual serial port driver in the present invention is created based on the number of channels, so the present invention can achieve the purpose of multi-user access without increasing resources, further expanding the application scenarios of the data access method provided by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] In order to more clearly illustrate the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0068] Figure 1 A flowchart of a data access method provided by an embodiment of the present invention;

[0069] Figure 2 This is a first structural diagram of a heterogeneous system in the prior art;

[0070] Figure 3 It is a second structural diagram of a heterogeneous system in the prior art;

[0071] Figure 4A diagram showing a virtual serial port driver framework according to an embodiment of the present invention;

[0072] Figure 5 A flowchart for creating a virtual serial port device provided by an embodiment of the present invention;

[0073] Figure 6 A logic diagram of data transmission implemented by a data buffer provided by an embodiment of the present invention;

[0074] Figure 7 A flowchart of data writing provided by an embodiment of the present invention;

[0075] Figure 8 A flowchart of data reading provided by an embodiment of the present invention;

[0076] Figure 9 A system framework diagram provided for an embodiment of the present invention;

[0077] Figure 10 A specific flow chart of the data access method provided by an embodiment of the present invention;

[0078] Figure 11 A structural diagram of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0079] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0080] The terms "including" and "having," as used in the present description and accompanying drawings, and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements and may include steps or elements that are not listed.

[0081] In order to enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0082] Next, a data access method provided by an embodiment of the present invention is described in detail. Figure 1 A flowchart of a data access method provided by an embodiment of the present invention, the data access method applied to an access initiator, includes the following steps:

[0083] S10: Log in to the virtual serial port device created by the access responder on the local operating system; the virtual serial port device is a device created by the access responder through the local virtual serial port driver, and the virtual serial port driver is created based on the channel number of the target access channel of the data buffer in the preset programmable logic device.

[0084] S11: Initiate an access request to the local operating system of the access responder, so that the access responder obtains target response data corresponding to the access request locally and writes the target response data into the data buffer through the target access channel.

[0085] S12: Obtain target response data from the data buffer through the target access channel to complete the corresponding data access operation.

[0086] In some embodiments, the architecture diagram of a conventional heterogeneous system is as follows: Figure 2 and Figure 3As shown, in the two conventional heterogeneous system forms, there is no direct data path between the host (HOST) and the system on chip (SOC). If the host wants to access the operating system on the SoC, it needs to access the gigabit port through the network or use the universal serial bus to serial port method to access, thereby increasing the hardware cost of the heterogeneous system. In addition, since there is no direct data path between the host and the SoC in the two heterogeneous system forms, the host mainly connects to the SoC through the network inside the field programmable gate array, which will occupy more internal resources of the field programmable gate array. The host's access to the SoC is often only for algorithm upgrades, firmware upgrades, command execution, etc., so a high-bandwidth network is not required. In addition, the number of serial ports in the current SoC is limited, which cannot achieve the purpose of multi-user access, limiting the application of the current heterogeneous system in some multi-user data acceleration scenarios. Therefore, based on this, the present invention provides a data access method in which the host can directly access the SoC through a direct channel. In the data access method provided by the present invention, since a direct channel is established, the host can directly access the SoC through the direct channel. Similarly, the SoC can also access the host through the direct channel. Therefore, the present invention classifies the host and the system-on-chip as access initiators or access responders, and the field programmable gate array as a pre-set programmable logic device. The data access method provided by the present invention specifically comprises the following steps: the access responder creates a corresponding virtual serial port based on the number of target access channels determined by the existing data buffer in the pre-set programmable logic device; based on the virtual serial port driver, a virtual serial port device corresponding to the virtual serial port driver is created using a combination of software and hardware. Here, the virtual serial port device can be simply understood as a platform. The access initiator then logs in to the virtual serial port device created by the access responder, that is, logs in to the platform of the current access responder; since the access initiator wants to access the access responder, the access initiator needs to initiate an access request to the local operating system of the access responder (the access request can be understood as a data access request); when the access responder receives the access request, it specifically analyzes the data to be accessed represented by the access request, that is, determines the target response data corresponding to the access request, and then writes the target response data into the data buffer in the preset programmable logic device; after the data buffer in the preset programmable logic device stores the target response data, the access initiator reads the target response data in the data buffer, thereby achieving the access initiator's data access purpose to the access responder.

[0087] It should be noted that the number of channels determined according to the data buffer in the preset programmable logic device is determined according to user needs, but the sum of the widths of the channel signals corresponding to the number of channels under this requirement needs to be smaller than the signal width corresponding to the data buffer.

[0088] It should also be noted that the target access channel mentioned in the present invention is constructed based on the data buffer in the preset programmable logic device, and is used to connect the access initiator and the access responder. Its nature is a virtual channel, not a channel constructed based on specific physical connection lines.

[0089] The present invention does not limit the specific hardware selection of the access initiator, access responder, and preset programmable logic device. In some embodiments, the access initiator is a host, the access responder is a system on chip, the preset programmable logic device is a field programmable gate array (FPGA), and the data buffer is a data buffer with a first-in, first-out read and write strategy (First In First Out, FIFO). Alternatively, in some embodiments, the access initiator is a SOC, the access responder is a host, the preset programmable logic device is an FPGA, and the data buffer is a FIFO. It should be noted that the embodiment provided by the present invention is only one possible implementation method, but is not limited to this implementation method and can be customized according to user needs.

[0090] For example: when the access initiator is the HOST, the access responder is the SOC, the preset programmable logic device is the FPGA, and the data buffer is the FIFO, when implementing specific data access, the HOST first logs in to the virtual serial port device created by the SOC, and then sends an access request corresponding to the data currently to be accessed to the SOC. At this time, the SOC determines the data that the HOST needs to access (target response data) based on the currently received access request, and writes the target response data into the FIFO. Then the HOST reads the target response data written in the FIFO, and the HOST completes the data access to the SOC.

[0091] For example: when the access initiator is SOC, the access responder is HOST, the preset programmable logic device is FPGA, and the data buffer is FIFO, when implementing specific system upgrade access, SOC logs in to the virtual serial port device created by HOST, and then sends an access request corresponding to the current system upgrade to HOST. At this time, HOST determines the corresponding upgrade code or data (target response data) based on the access request, and writes the target response data into FIFO. Then SOC reads the target response data written in FIFO and performs system upgrade according to the read data. At this time, SOC completes the system upgrade access to HOST.

[0092] As can be seen from the above technical solution, the present invention provides a data access method, which is applied to the access initiator, including: logging in to the virtual serial port device created by the access responder on the local operating system; the virtual serial port device is a device created by the access responder through the local virtual serial port driver, and the virtual serial port driver is created based on the number of channels of the target access channel of the data buffer in the preset programmable logic device; initiating an access request to the local operating system of the access responder so that the access responder obtains the target response data corresponding to the access request from the local system and writes the target response data to the data buffer through the target access channel; obtaining the target response data from the data buffer through the target access channel to complete the corresponding data access operation. It can be seen that the virtual serial port device created by the access responder on the local operating system of the present invention is equivalent to building a direct connection between the access initiator and the access responder, which can meet the access initiator's need to directly access the access responder through the internal channel, and realize the access initiator's common firmware update, algorithm upgrade, and status monitoring needs of the access responder under this access mode. In addition, the virtual serial port driver in the present invention is created based on the number of channels, so the present invention can achieve the purpose of multi-user access without increasing resources, further expanding the application scenarios of the data access method provided by the present invention.

[0093] In some embodiments, because the specific number of virtual serial port devices is related to the number of channels, before creating a virtual serial port device, it is necessary to determine the number of target access channels from a data buffer based on user requirements. The target access channel is the channel used by the access initiator to access the access responder. After the access initiator determines the number of channels, the dual-access random access memory in the programmable logic device is used to allocate the number of channels to the access responder, ensuring that the number of channels on the access responder is the same as the number of channels on the access initiator and that they correspond one-to-one. After the access responder determines the current number of channels, it creates a virtual serial port driver based on its own embedded driver architecture and through software implementation.

[0094] The framework for creating a virtual serial port driver is as follows Figure 4 As shown, the interior mainly includes a serial port driver and an embedded driver framework. In the serial port driver, there is a signal processing of receiving interrupt signals between the serial port startup function and the preset programmable logic device, and the serial port startup function and the startup function in the embedded driver framework and the startup function in the user space are mutually configured, which mainly realizes a translation behavior of the interrupt signal; the receiving processing function in the serial port driver and the reading function in the embedded driver framework and the startup function in the user space are mutually configured, which mainly realizes the reading behavior of the data; the data sending function in the serial port driver and the write function in the embedded driver framework and the startup function in the user space are mutually configured, which mainly realizes the writing behavior of the data.

[0095] The embedded driver architecture can be the tty architecture found in Linux embedded systems. This tty architecture includes the tty core and line discipline, and is implemented by the kernel. When the embedded driver architecture is the tty architecture found in Linux embedded systems, the serial port startup function is called startup; the receive processing function is called vtty_uart_handle_rx; ​​the data transmission function is called start_tx; the startup function in the embedded driver framework is called N_tty_open; the read function is called N_tty_read; the write function is called N_tty_write; and the startup function in user space is called tty_open.

[0096] The present invention mainly defines and implements structures such as uart_driver, uart_ops, uart_port, etc., and initializes them according to hardware and driver conditions. Among them, the uart_driver structure contains information such as the virtual serial port device name, virtual serial port driver name, major and minor device numbers, and serial port console. Its driver registers uart_driver with the system through uart_register_driver; the uart_port structure is used to describe the I / O port or I / O memory address, data buffer size, port type, and other information of a universal asynchronous receiver and transmitter (UART) port. Its driver adds a port through the uart_add_one_port function; the uart_ops structure is related to the underlying hardware and is also the interface for software and hardware collaboration in the present invention (such as the PCIE interface, etc.), which specifically includes startup-serial port settings, starting the port, initializing the data buffer, setting the data buffer receive interrupt processing function, etc. In the above structure, when the driver receives an interrupt, it calls the vtty_uart_handle_rx function to receive the target response data and transmits the received data to the application layer of the access initiator through the tty_flip_buffer_push function.

[0097] After creating the virtual serial port driver, the access responder needs to create a virtual serial port device based on the locally created virtual serial port driver to ensure that the access initiator can log in. The process of creating a virtual serial port device by the access responder is as follows: first, enable the local serial port receive interrupt and configure the local serial port receive processing function (the first initialization operation) to ensure that the serial port receive processing function and receive interrupt under the current serial port meet the requirements of the current usage scenario; then register the corresponding operating system console and configure the corresponding console environment; after registering the corresponding operating system console, load the virtual serial port driver locally according to the number of channels configured by the access initiator, which specifically specifies the current number of channels, and then use the locally loaded virtual serial port driver to create the corresponding virtual serial port device on the local operating system. The number of virtual serial port devices can be one or more; after creating the virtual serial port device, it needs to be added to the operating system console to make it a whole.

[0098] Among them, in the process of creating a virtual serial port device on the local operating system using the locally loaded virtual serial port driver, there is hardware mounting behavior. Therefore, in order to ensure the normal construction and use of the system, it also includes: after the virtual serial port driver is loaded locally and before the virtual serial port device is added to the operating system console, it is necessary to configure the hardware serial port address information between the preset programmable logic device, that is, to initialize the hardware (the second initialization operation).

[0099] It should be noted that when loading the virtual serial port driver locally based on the number of channels configured by the access initiator, it is necessary to determine whether the number of channels currently configured by the access initiator is non-zero. The virtual serial port driver can only be loaded locally if the number of channels configured by the access initiator is non-zero. Otherwise, loading the virtual serial port driver locally is prohibited. The reason is that when the number of channels is zero, it means that there is no channel between the access initiator and the access responder, and therefore it is impossible to construct the corresponding virtual serial port and virtual serial port device based on the channel. The number of channels is determined based on the running script of the access responder.

[0100] Configuring the corresponding console environment specifically includes:

[0101] 1. Modify the file / etc / default / grub and add the virtual serial port device to the console: console=vtty-x,1500000n81;

[0102] 2. Regenerate the Linux boot loader. The command varies for different operating systems. For example, for Fedora, the command is as follows: grub2-mkconfig -o / boot / efi / EFI / fedora / grub.cfg;

[0103] 3. Manually load the virtual serial port driver on the responder. For example, create six serial port devices: insmodvtty.ko 6. Check the virtual serial port devices: ls / dev / vtty*. Verify on the responder whether the operating system console contains the virtual serial port devices: cat / sys / devices / virtual / tty / console / active.

[0104] In summary, the process of creating a virtual serial port device is as follows: Figure 5 As shown, it includes the following steps:

[0105] S20: Virtual serial port driver.

[0106] S21: Execute the first initialization operation (vyyt_init).

[0107] S22: Register the operating system console (register_console).

[0108] S23: Register the driver (platform_driver_register).

[0109] S24: Implement hardware mounting (vtty_probe).

[0110] S25: Execute the second initialization operation (vtty_dev_init).

[0111] S26: Add a virtual serial port device (uart_add_one_port).

[0112] S27: Completed.

[0113] Since steps S20 to S27 correspond to the above embodiment, the present invention will not describe them in detail here.

[0114] The present invention provides a complete process for building a virtual serial port driver and creating a virtual serial port device. Under this process, a complete access channel is constructed for the access initiator and the access responder. Under this channel, the access initiator can meet the needs of directly accessing the access responder through an internal channel. Under this access mode, the access initiator can realize the common firmware update, algorithm upgrade, and status monitoring needs of the access responder, further expanding the application scenarios.

[0115] In some embodiments, a pre-set programmable logic device may contain at least two data buffers. When there are at least two data buffers, the read and write clocks of the data buffers may be inconsistent, thereby increasing the metastability of the overall system. Therefore, when it is determined that the read and write clocks of the data buffers are inconsistent, the read and write clocks of the data buffers are aligned using a pre-set synchronization method, thereby reducing the metastability of the system. Typically, this can be achieved by delaying the clock cycle (i.e., using an X-beat method) or by using Gray code conversion.

[0116] It should be noted that since the data buffer is used to write and read data, its first-in-first-out data read and write strategy meets the current data transmission requirements, so its data buffer can be selected as a data buffer with a first-in-first-out read and write strategy.

[0117] The present invention provides a method for selecting a data buffer, and when there are multiple data buffers, a synchronization method is required to ensure that the reading and writing between the multiple data buffers are always consistent, thereby improving the internal stability of the programmable logic device and ensuring the stability of writing and reading data in the data buffer.

[0118] In some embodiments, as Figure 6 As shown, the specific steps of writing the target response data into the data buffer through the target access channel are: monitoring whether the write-full signal sent by the data buffer is received; if the write-full signal sent by the data buffer is not detected, the target response data is written into the data buffer through the target access channel, otherwise the target response data is prohibited from being written into the data buffer. That is to say, before the access responder writes the target response data into the data buffer through the target access channel, it is necessary to ensure that there is space inside the current data buffer where data can be written, that is, the current data buffer is in a not-full state. Therefore, when the write-full signal sent by the data buffer is received, it means that the current data buffer is in a full state and data cannot be written at this time; when the write-full signal sent by the data buffer is not detected, it means that the current data buffer is in a not-full state, and the target response data can be written into the data buffer through the target access channel. In addition, in the process of writing the target response data, it is necessary to double-access the random access memory to reset the data buffer.

[0119] It should be noted that the target response data currently being written is specifically composed of the label corresponding to the current target access channel and the data to be transmitted corresponding to the current target access channel. In other words, since the present invention provides a multi-channel access method, each channel can perform access operations, etc. However, when two channels are accessed simultaneously, the access initiator cannot determine which channel is performing which access request. Therefore, when the access responder writes data to the data buffer, the data written includes the label corresponding to the current target access channel.

[0120] The specific steps are: obtaining the channel label corresponding to the target access channel; obtaining the data to be transmitted corresponding to the target access channel; combining the data to be transmitted with the corresponding channel label to obtain the target response data corresponding to the target access channel. The specific combination method is: obtaining the target data byte corresponding to the current data transmission; obtaining the data byte to be transmitted corresponding to the data to be transmitted; when the data byte to be transmitted is smaller than the target data byte, filling the data to be transmitted into the consecutive empty bytes in the target data byte; filling the channel label corresponding to the current data to be transmitted into the remaining empty bytes in the current target data byte to obtain the target response data corresponding to the target access channel.

[0121] In addition, since the process of creating a virtual serial port device by the access responder also includes the steps of configuring a corresponding device index for each created virtual serial port device and establishing a corresponding relationship between different virtual serial port devices and different target access channels, the specific step of writing the target response data into the data buffer through the target access channel also includes the steps of determining the target device index corresponding to the virtual serial port device logged in by the current access initiator; and using the target access channel corresponding to the target device index among the target access channels to write the target response data into the data buffer. The main purpose of this step is to establish a one-to-one correspondence between the target access channel, the virtual serial port, and the virtual serial port device. Specifically, the target access channel corresponding to the virtual serial port device logged in by the current access initiator is used as the write channel to write its target response data into the data buffer.

[0122] On this basis, if Figure 6As shown, obtaining target response data from the data buffer through the target access channel includes: monitoring whether a non-empty interrupt signal sent by the data buffer is received; if a non-empty interrupt signal sent by the data buffer is detected, the target response data in the data buffer is read through the target access channel, otherwise reading data from the data buffer is prohibited. The reason is: when the data buffer includes target response data, the access initiator can obtain the target response data from the data buffer through the target access channel. When the data buffer no longer stores the target response data, the access initiator cannot read from the data buffer. Therefore, only when a non-empty interrupt signal sent by the data buffer is detected, it means that the target response data is still stored in the data buffer, and the target response data in the data buffer is read through the target access channel; if the non-empty interrupt signal sent by the data buffer is not detected, it means that there is no target response data in the data buffer, and reading data from the data buffer is prohibited.

[0123] Since there is a device index, the specific steps for obtaining the target response data from the data buffer through the target access channel are as follows: using the preset data receiving tool to read the target response data in the data buffer using the target access channel, and forwarding the read target response data to the target virtual serial port device; the target virtual serial port device is the virtual serial port device corresponding to the target access channel for transmitting the target response data, determined from each virtual serial port device. The preset data receiving tool can specifically determine the target access channel and virtual serial port device corresponding to the current target response data. Therefore, the preset data receiving tool can be used to set the virtual serial port device corresponding to the current target response data as the target virtual serial port device, and the target response data can be sent to the corresponding target virtual serial port through the corresponding target access channel, thereby achieving a one-to-one correspondence between the target response data, the target access channel, and the virtual serial port device.

[0124] In summary, if Figure 7 As shown, the multi-channel writing of target response data into the data buffer specifically includes the following steps:

[0125] S30: Multi-channel writing (sending) data.

[0126] S31: Query the virtual serial port device index.

[0127] S32: Adjust and determine target response data.

[0128] S33: Write the reorganized target response data into the data buffer.

[0129] S34: Completed.

[0130] like Figure 8 As shown, the multi-channel acquisition of target response data in the data buffer specifically includes the following steps:

[0131] S40: Multi-channel reading (receiving) data.

[0132] S41: Determine a target access channel according to the target response data.

[0133] S42: Determine a target virtual serial port device according to a preset data receiving tool.

[0134] S43: Send the target response data to the target virtual serial port device through the target access channel.

[0135] S44: Completed.

[0136] Among them, due to Figure 7 and Figure 8 The specific embodiments of the steps are the same as those in the above embodiments, so the present invention will not be described in detail here.

[0137] In summary, the above embodiments use the host as the access initiator, the system on chip as the access responder, and the field programmable gate array as the preset programmable logic device. The data buffer is set to 16 bits wide (bit0 to bit7 are data, bit8 to bit10 are channel numbers, and bit11 to bit15 are reserved). It supports up to 8 user channels. When the internal serial port is configured with the n81 protocol, its regular transmission bits are: 1 start bit, 8 data bits and one stop bit; under the premise that the baud rate is set to 1500000bps, its bandwidth is 1500000 / 10 / 1024 / 1024 MB / s ≈1.43MB / s. Since the present invention supports up to 8 channels and transmits at 16 bits, the total bandwidth is about MB / s. The system framework of the present invention under the current configuration is as follows Figure 9 As shown, it can be seen that the present invention, when creating a channel between the host and the SoC, also reuses the high-speed serial bus (interface) (e.g., PCIE / axi / Avalon) between the host / SoC and the FPGA.

[0138] In summary, the above embodiments and Figure 9 The system framework shown in FIG. 1 and the specific process of the data access method provided by the present invention are as follows: Figure 10 As shown, the following steps are included:

[0139] S50: Heterogeneous system is powered on.

[0140] S51: The host is powered on.

[0141] S52: The FPGA program is automatically loaded.

[0142] S53: Determine whether the data buffer is initialized.

[0143] S54: If yes, perform data writing or reading operation; if not, return to step S53.

[0144] S55: Determine whether the number of channels obtained by the system-on-chip running script is non-zero.

[0145] S56: If yes, the system on chip loads the virtual serial port driver according to the number of channels; if no, return to step S55.

[0146] S57: Create a virtual serial port device.

[0147] S58: Processing related operations after the host logs in.

[0148] S59: The host initializes the data buffer.

[0149] S60: The host loads the virtual serial port driver.

[0150] S61: The host configures the number of channels to the system on chip according to user needs.

[0151] S62: Open the serial port tool to log in to the virtual serial port device and access the SoC operating system.

[0152] It should be noted that the specific embodiments corresponding to S50-S62 are the same as the above embodiments, so the present invention will not be described in detail here.

[0153] It should be noted that the embodiment provided by the present invention is only one possible implementation method, but is not limited to this implementation method and can be set according to user needs.

[0154] It should be noted that the dotted lines in the drawings are all configuration lines.

[0155] It can be seen from the above technical solution that the present invention does not need to occupy a large number of resources of preset programmable devices. Data transmission can be completed efficiently through the data buffer and multiplexing of the high-speed bus interface, and the maximum communication rate can reach 1MB / s+. It meets the needs of low-speed communication without increasing costs and reducing resource occupation. In addition, the present invention realizes the terminal login, algorithm upgrade, firmware upgrade, command execution and other operations of the access initiator on the access responder through the collaborative cooperation of the virtual serial port driver and the preset programmable device. And the present invention realizes serial port multi-terminal login by attaching channel numbers in the data, which solves the problem that only a single serial port can be logged in in the existing serial port solution without increasing resources.

[0156] On the other hand, the present invention further provides a data access method, applied to an access responder, comprising:

[0157] Obtaining an access request initiated by an access initiator to a local operating system after logging into a virtual serial port device; the virtual serial port device is a device pre-created by an access responder on the local operating system through a local virtual serial port driver, and the virtual serial port driver is created based on the number of target access channels of a data buffer in a preset programmable logic device;

[0158] The target response data corresponding to the access request is obtained locally, and the target response data is written into the data buffer through the target access channel, so that the access initiator can obtain the target response data from the data buffer through the target access channel.

[0159] It should be noted that since the embodiment of the present invention is the same as the above embodiment, the present invention will not be described in detail here.

[0160] In addition, the present invention also provides a heterogeneous system, comprising: an access initiator, an access responder, and a preset programmable logic device; wherein,

[0161] The preset programmable logic device is used to construct a target access channel between an access initiator and an access responder through its own data buffer;

[0162] The access initiator is used to log in to the virtual serial port device created by the access responder on the local operating system, initiate an access request to the access responder's local operating system, and obtain the target response data corresponding to the access request from the data buffer through the target access channel. The virtual serial port device is a device created by the access responder using the local virtual serial port driver, which is created based on the number of channels of the target access channel.

[0163] The access responder is used to obtain the target response data corresponding to the access request from the local computer, and write the target response data into the data buffer through the target access channel;

[0164] The access initiator is the host and the access responder is the system on chip; or the access initiator is the system on chip and the access responder is the host.

[0165] It should also be noted that since the embodiment of the present invention is the same as the above embodiment, the present invention will not be described in detail here.

[0166] Figure 11 A structural diagram of an electronic device provided by an embodiment of the present invention, such as Figure 11 As shown, the electronic device includes: a memory 60 for storing computer programs;

[0167] The processor 61 is configured to implement the steps of the data access method in the above embodiment when executing a computer program.

[0168] The electronic device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer, or a desktop computer.

[0169] The processor 61 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 61 may be implemented using at least one of the following hardware forms: a digital signal processing (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The processor 61 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 61 may be integrated with a graphics processing unit (GPU), which is responsible for rendering and drawing content required to be displayed on the display screen. In some embodiments, the processor 61 may also include an artificial intelligence (AI) processor for handling computational operations related to machine learning.

[0170] The memory 60 may include one or more computer-readable storage media, which may be non-transitory. The memory 60 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 60 is at least used to store the following computer program 601, wherein, after the computer program is loaded and executed by the processor 61, it can implement the relevant steps of the data access method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 60 may also include an operating system 602 and data 603, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 602 may include Windows, Unix, Linux, etc.

[0171] In some embodiments, the electronic device may further include a display screen 62 , an input / output interface 63 , a communication interface 64 , a power supply 65 , and a communication bus 66 .

[0172] Those skilled in the art will understand that Figure 11 The structure shown in the figure does not constitute a limitation of the electronic device, and may include more or fewer components than shown in the figure.

[0173] It is understandable that if the data access method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the current technology, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and executes all or part of the steps of the various embodiments of the present invention. The aforementioned storage medium includes: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, a magnetic disk, or an optical disk, and other media that can store program code.

[0174] Based on this, an embodiment of the present invention further provides a non-volatile storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned data access method are implemented.

[0175] At the same time, the present invention also provides a computer program product, including a computer program / instruction, which implements the steps of the above data access method when executed by a processor.

[0176] The above describes in detail an electronic device provided by an embodiment of the present invention. The various embodiments are described in a progressive manner throughout this specification, with each embodiment focusing on its differences from other embodiments. Reference can be made to the descriptions of the embodiments for similar or identical parts. The devices disclosed in the embodiments are described briefly because they correspond to the methods disclosed in the embodiments. For relevant details, refer to the descriptions of the methods.

[0177] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0178] The above is a detailed introduction to a data access method, heterogeneous system, electronic device, medium and program product provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A data access method, characterized in that: Applicable to the access initiator, including: Determine the number of target access channels from a data buffer in a preset programmable logic device based on user requirements; the target access channel is a channel used by the access initiator to access the access responder; configuring the channel quantity to the access responder so that the access responder creates a virtual serial port driver based on the channel quantity; Log in to the virtual serial port device created by the access responder on the local operating system; the virtual serial port device is a device created by the access responder through the local virtual serial port driver; Initiating an access request to a local operating system of the access responder, so that the access responder obtains target response data corresponding to the access request locally, and writes the target response data into the data buffer through the target access channel; The target response data is obtained from the data buffer through the target access channel to complete the corresponding data access operation.

2. The data access method according to claim 1, characterized in that: The configuring the number of channels to the access responder so that the access responder creates the virtual serial port driver based on the number of channels includes: The number of channels is configured to the access responder through the dual access random access memory in the programmable logic device, so that the access responder creates the virtual serial port driver based on the number of channels.

3. The data access method according to claim 1, characterized in that: The access responder creates the virtual serial port driver based on the number of channels, including: Based on the embedded driver architecture and the number of channels of the target access channel, the virtual serial port driver is created by software implementation.

4. The data access method according to claim 1, characterized in that: The process of the access responder creating the virtual serial port device includes: Loading the virtual serial port driver locally according to the number of channels configured by the access initiator; Creating the virtual serial port device on the local operating system using the locally loaded virtual serial port driver; The number of the virtual serial port devices is one or more.

5. The data access method according to claim 4, characterized in that: Before the access responder loads the virtual serial port driver locally, the method further includes: Execute a local first initialization operation, and after the first initialization operation is completed, register a corresponding operating system console and configure a corresponding console environment; Correspondingly, after creating the virtual serial port device on the local operating system using the locally loaded virtual serial port driver, the method further includes: Add the virtual serial port device to the operating system console.

6. The data access method according to claim 5, characterized in that: The first initialization operation includes enabling a local serial port receiving interrupt and configuring a local serial port receiving processing function.

7. The data access method according to claim 5, characterized in that: Also includes: After the virtual serial port driver is loaded locally and before the virtual serial port device is added to the operating system console, a second initialization operation is performed; The second initialization operation is to configure the hardware serial port address information between the preset programmable logic device.

8. The data access method according to claim 4, characterized in that: The step of loading the virtual serial port driver locally according to the number of channels configured by the access initiator includes: Determine whether the number of channels configured by the access initiator is a non-zero value; If the number of channels configured by the access initiator is a non-zero value, the virtual serial port driver is loaded locally; otherwise, the virtual serial port driver is prohibited from being loaded locally.

9. The data access method according to claim 1, characterized in that: If the preset programmable logic device includes at least two data buffers, the method further includes: Determining whether the read and write clocks between the data buffers are consistent; If the read and write clocks between the data buffers are inconsistent, the read and write clocks between the data buffers are adjusted to be consistent through a preset synchronization method.

10. The data access method according to claim 9, characterized in that: The preset synchronization method includes a method of delaying a clock cycle or a method of converting a Gray code.

11. The data access method according to claim 1, characterized in that: The data buffer is a buffer implemented based on the internal register of the preset programmable logic device, and the data buffer adopts a first-in-first-out data reading and writing strategy.

12. The data access method according to claim 1, characterized in that: The step of writing the target response data into the data buffer through the target access channel comprises: Monitoring whether a full signal sent by the data buffer is received; If the write-full signal sent by the data buffer is not detected, the target response data is written into the data buffer through the target access channel; otherwise, the target response data is prohibited from being written into the data buffer.

13. The data access method according to claim 1, characterized in that: The process of the access responder creating a virtual serial port device also includes: Configuring a corresponding device index for each of the created virtual serial port devices, and establishing a correspondence between different virtual serial port devices and different target access channels; Accordingly, writing the target response data into the data buffer through the target access channel includes: Determine the target device index corresponding to the virtual serial port device currently logged in by the access initiator; The target response data is written into the data buffer by using the target access channel corresponding to the target device index among the target access channels.

14. The data access method according to claim 13, characterized in that: Also includes: Using the target access channel to read the target response data in the data buffer through a preset data receiving tool, and forwarding the read target response data to a target virtual serial port device; The target virtual serial port device is a virtual serial port device corresponding to the target access channel for transmitting the target response data, which is determined from among the virtual serial port devices; Correspondingly, obtaining the target response data from the data buffer through the target access channel includes: The target response data read by the preset data receiving tool through the corresponding target access channel is obtained from the target virtual serial port device.

15. The data access method according to claim 14, characterized in that: The step of reading the target response data in the data buffer by using the target access channel through a preset data receiving tool includes: Monitoring whether a non-empty interrupt signal sent by the data buffer is received; If a non-empty interrupt signal sent by the data buffer is detected, the target response data in the data buffer is read by using the target access channel through a preset data receiving tool, otherwise reading data from the data buffer is prohibited.

16. The data access method according to any one of claims 1 to 15, characterized in that: The access initiator is a host, and the access responder is a system on chip; or, the access initiator is a system on chip, and the access responder is a host.

17. A data access method, characterized in that: Applicable to access responders, including: Obtaining the number of channels of the target access channel configured by the access initiator; the number of channels is determined by the access initiator from a data buffer in a preset programmable logic device based on user requirements; the target access channel is a channel used by the access initiator to access the access responder; Creating a virtual serial port driver based on the number of channels; Pre-create a virtual serial port device on the local operating system through the local virtual serial port driver; Obtaining an access request initiated by an access initiator to the local operating system after logging into the virtual serial port device; Target response data corresponding to the access request is locally acquired, and the target response data is written into the data buffer through the target access channel, so that the access initiator acquires the target response data from the data buffer through the target access channel.

18. A heterogeneous system, characterized in that: include: An access initiator, an access responder, and a preset programmable logic device; wherein, The preset programmable logic device is used to construct a target access channel between the access initiator and the access responder through its own data buffer; The access responder creates a virtual serial port device through a local virtual serial port driver, the virtual serial port driver is created based on the channel number of the target access channel, and obtains target response data corresponding to the access request from the local, and writes the target response data into the data buffer through the target access channel; The access initiator is used to log in to the virtual serial port device created by the access responder on the local operating system through the local virtual serial port driver, initiate an access request to the local operating system of the access responder, and obtain target response data corresponding to the access request from the data buffer through the target access channel; The access initiator is a host, and the access responder is a system on chip; or the access initiator is a system on chip, and the access responder is a host.

19. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of the data access method according to any one of claims 1 to 17.

20. A non-volatile storage medium, characterized in that: The non-volatile storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the data access method according to any one of claims 1 to 17 are implemented.

21. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the data access method according to any one of claims 1 to 17 are implemented.

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