A method for preparing silicon epitaxial wafer for TMBS

Abstract

The invention relates to a method for preparing a silicon epitaxial wafer for TMBS, comprising the following steps: placing a silicon substrate on a graphite pedestal in a silicon epitaxial furnace reaction chamber, heating, keeping the temperature, introducing hydrogen chloride gas into the silicon epitaxial furnace reaction chamber with hydrogen as carrier gas, cleaning; hydrogen purging, introducing trichlorosilane gas with hydrogen as carrier gas, and growing a silicon coating layer on the graphite pedestal; cleaning the silicon substrate, placing the silicon substrate on the silicon coating layer of the graphite pedestal again, rotating the graphite pedestal, heating to 1140-1160° C., introducing hydrogen chloride gas with a flow rate of 0.8-1.2 L / min, and gas throwing; adjusting the flow rate of hydrogen chloride to 0.4-0.6 L / min, gas throwing, stopping the introduction of hydrogen chloride gas, and introducing hydrogen purging; introducing trichlorosilane gas into the inner cavity of the epitaxial furnace with hydrogen as carrier gas for a time of 60-140 s, keeping the graphite pedestal rotating, cooling, and obtaining the silicon epitaxial wafer.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor material preparation, and in particular to a method for preparing a silicon epitaxial wafer for TMBS. Background Art

[0002] Compared with the traditional Schottky barrier diode (SBD), the trench Schottky barrier diode (TMBS) has a lower reverse leakage current, and the continuous optimization of reverse leakage current is the focus of the promotion of this product. Silicon epitaxial wafers grow one or more layers of silicon single crystal thin films on polished silicon single crystal wafers through gas phase chemical reactions at high temperatures. By controlling the growth conditions, different resistivities, different thicknesses and different types of outer edge layers can be obtained. Due to its characteristics, TMBS needs to focus on improving the process methods that can reduce leakage current in the epitaxial wafer production process.

[0003] The preparation method of silicon epitaxial wafer for Schottky device disclosed in ZL202010341314.3 is as follows: hydrogen chloride gas is introduced into the reaction chamber of silicon epitaxial furnace to etch the residual deposited material on the base; main process hydrogen carries gaseous trichlorosilane into the reaction chamber of silicon epitaxial furnace, and a layer of undoped dense polycrystalline silicon is deposited on the surface of the base; the temperature of the base is lowered, and a silicon substrate is loaded on the base; the base is heated, and the surface of the silicon substrate is baked at high temperature; main process hydrogen is introduced to purge the reaction chamber of epitaxial furnace; main process hydrogen carries gaseous trichlorosilane into the reaction chamber of silicon epitaxial rate, auxiliary hydrogen flows into the lower part of the base in the opposite direction of the flow direction of the main process hydrogen, and trichlorosilane is emptied in the pipeline; main process hydrogen is introduced to purge the reaction chamber of silicon epitaxial furnace; silicon epitaxial layer is grown; after the growth of silicon epitaxial layer is completed, it is taken out from the base after cooling. However, this method can only solve the problem of whether it can be produced, and cannot effectively reduce the leakage current of TMBS. With the rapid development of the automotive industry, the demand for TMBS materials has increased significantly. Therefore, technological innovation is urgently needed to meet the preparation needs of TMBS silicon epitaxial wafers and ensure qualified thickness, resistivity and leakage current parameters. The process flow is simple and highly operable, and can meet the requirements of industrialized continuous production of quartz.

[0004] Therefore, in order to solve the above problems, the present invention needs to provide a method for preparing a silicon epitaxial wafer for TMBS. Summary of the invention

[0005] The purpose of the present invention is to provide a method for preparing a silicon epitaxial wafer for TMBS, and to solve the technical problem that devices prepared by using silicon epitaxial wafers for TMBS in the prior art have excessive leakage current and cannot meet the use requirements.

[0006] The present invention provides a method for preparing a silicon epitaxial wafer for TMBS, comprising the following steps:

[0007] S1) placing a silicon substrate on a graphite susceptor in a silicon epitaxial furnace reaction chamber, heating the chamber to 1130-1160° C., maintaining the temperature, and introducing hydrogen chloride gas into the silicon epitaxial furnace reaction chamber using hydrogen as a carrier gas to clean the epitaxial furnace reaction chamber, the graphite susceptor, the PIN needles and the silicon substrate;

[0008] S2) hydrogen is purged into the reaction chamber of the epitaxial furnace to discharge the hydrogen chloride gas, trichlorosilane gas is introduced with hydrogen as carrier gas, and a silicon coating layer is grown on the graphite base;

[0009] S3) Take out the silicon substrate, clean the silicon substrate, and place it on the silicon coating of the graphite base again. The graphite base is rotated, heated to 1140℃~1160℃, and hydrogen chloride gas is introduced. The flow rate of hydrogen chloride gas is 0.8~1.2L / min, the etching rate is 0.9-1.1μm / min, and the gas throwing is 16~20s; adjust the hydrogen chloride flow rate to 0.4~0.6L / min, the etching rate is 0.4-0.6μm / min, and the gas throwing is 8~12s. Stop introducing hydrogen chloride gas, introduce hydrogen gas, the flow rate is 50~70L / min, and purge for 15~25s;

[0010] S4) introducing trichlorosilane gas into the inner cavity of the epitaxial furnace using hydrogen as a carrier gas for 60-140 seconds, while the graphite susceptor keeps rotating and the temperature is lowered to obtain a silicon epitaxial wafer.

[0011] Preferably, in step S3, a silicon epitaxial layer is formed on a silicon substrate at a growth rate of 3.6 to 4.0 μm / min for 4 to 8 seconds to obtain a silicon epitaxial wafer.

[0012] Preferably, in step S1, the flow rate of hydrogen chloride gas is 15-25 L / min. First, under the dilution of hydrogen with a flow rate of 5-15 L / min, the etching time is 10-20 s; secondly, under the dilution of hydrogen with a flow rate of 25-35 L / min, the etching time is 15-25 s.

[0013] Preferably, in step S1, after the temperature is raised to 1130-1160°C, four-probe temperature calibration is performed to adjust the temperature compensation at the center and edge of the graphite susceptor so that the temperature difference in the pit of the graphite susceptor is less than 10°C.

[0014] Preferably, in step S1, a silicon substrate is placed on a graphite susceptor in a reaction chamber of a silicon epitaxial furnace, the temperature is raised to 1130-1160° C., and the temperature is maintained for 3-7 minutes.

[0015] Preferably, in step S2, the epitaxial furnace reaction chamber is purged with hydrogen at a hydrogen flow rate of 50 to 70 L / min for 15 to 25 seconds to discharge the hydrogen chloride gas, and the silicon coating layer is formed by growing on the graphite base at a growth rate of 3.6 to 4.0 μm / min for 14 to 18 seconds.

[0016] Preferably, the purity of hydrogen chloride gas is ≥99.99%, and the purity of trichlorosilane gas is ≥99.95%.

[0017] Preferably, the diameter of the silicon substrate is 200 mm, the silicon substrate is a heavily phosphorus-doped silicon substrate, and the resistivity of the silicon substrate is 0-0.0015 Ω·cm.

[0018] Preferably, the leakage current of the epitaxial furnace device at a voltage of 45V is required to be less than 13μA.

[0019] Preferably, in step S3, the silicon epitaxial furnace chamber door is opened at 800-880° C., the silicon substrate is taken out and the silicon substrate is cleaned;

[0020] The silicon substrate sheet is sent into the chamber of the silicon epitaxial furnace at 680-720°C and placed in the pit of the graphite susceptor. The rotation speed of the graphite susceptor is 35 revolutions / min.

[0021] The method for preparing a silicon epitaxial wafer for TMBS provided by the present invention has the following improvements compared with the prior art:

[0022] 1. The preparation method of silicon epitaxial wafer for TMBS provided by the present invention cleans the silicon substrate twice before and after production, and then introduces a double gas polishing process, first with large flow gas polishing and then with small flow gas polishing, so that the interface between the silicon substrate and the epitaxial wafer is cleaner, the single crystal of the silicon substrate is more thoroughly exposed, the epitaxial growth is denser and more orderly, and the self-doping effect introduced by the silicon substrate is effectively reduced, avoiding the problems of large edge leakage and low voltage caused by low edge resistivity.

[0023] 2. The method for preparing the silicon epitaxial wafer for TMBS provided by the present invention can obtain a device produced by preparing the epitaxial wafer using the silicon epitaxial wafer for TMBS, and the leakage current of the device under the voltage of 45V is less than 13μA. DETAILED DESCRIPTION

[0024] The technical solution of the present invention will be described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] The present invention provides a method for preparing a silicon epitaxial wafer for TMBS, comprising the following steps:

[0026] S1) placing a silicon substrate on a graphite susceptor in a silicon epitaxial furnace reaction chamber, heating the chamber to 1130-1160° C., maintaining the temperature, and introducing hydrogen chloride gas into the silicon epitaxial furnace reaction chamber using hydrogen as a carrier gas to clean the epitaxial furnace reaction chamber, the graphite susceptor, the PIN needles and the silicon substrate;

[0027] S2) hydrogen is purged into the reaction chamber of the epitaxial furnace to discharge the hydrogen chloride gas, trichlorosilane gas is introduced with hydrogen as carrier gas, and a silicon coating layer is grown on the graphite base;

[0028] S3) Take out the silicon substrate, clean the silicon substrate, and place it on the silicon coating of the graphite base again. The graphite base is rotated, heated to 1140℃~1160℃, and hydrogen chloride gas is introduced. The flow rate of hydrogen chloride gas is 0.8~1.2L / min, the etching rate is 0.9-1.1μm / min, and the gas throwing is 16~20s; adjust the hydrogen chloride flow rate to 0.4~0.6L / min, the etching rate is 0.4-0.6μm / min, and the gas throwing is 8~12s. Stop introducing hydrogen chloride gas, introduce hydrogen gas, the flow rate is 50~70L / min, and purge for 15~25s;

[0029] S4) introducing trichlorosilane gas into the inner cavity of the epitaxial furnace using hydrogen as a carrier gas for 60-140 seconds, while the graphite susceptor keeps rotating and the temperature is lowered to obtain a silicon epitaxial wafer.

[0030] The method for preparing silicon epitaxial wafers for TMBS provided by the present invention cleans the silicon substrate twice before and after production, i.e., gas polishing with hydrogen chloride gas in step S1 and washing with water after cooling and taking out in step S3, so that the surface of the silicon substrate is clean; and then a double gas polishing process is introduced, firstly high-flow gas polishing and then low-flow gas polishing, so that the interface between the silicon substrate and the epitaxial wafer is cleaner, the single crystal of the silicon substrate is more thoroughly exposed, the epitaxial growth is denser and more orderly, the self-doping effect introduced by the silicon substrate is effectively reduced, and the problems of large edge leakage and low voltage caused by low edge resistivity are avoided.

[0031] Preferably, in step S3, a silicon epitaxial layer is formed on a silicon substrate at a growth rate of 3.6 to 4.0 μm / min for 4 to 8 seconds to obtain a silicon epitaxial wafer.

[0032] Preferably, in step S1, firstly, the etching time is 10 to 20 seconds under the dilution of hydrogen at a flow rate of 5 to 15 L / min; secondly, the etching time is 15 to 25 seconds under the dilution of hydrogen at a flow rate of 25 to 35 L / min.

[0033] The flow rate of hydrogen chloride gas in the present invention is 15-25 L / min. First, under the dilution of hydrogen with a flow rate of 5-15 L / min, the etching time is 10-20 seconds, and the accumulated silicon at the graphite base and the PIN needle is mainly etched. Then, under the dilution of hydrogen with a flow rate of 25-35 L / min, the etching time of hydrogen chloride gas is 15-25 seconds, and the accumulated silicon on the upper part of the chamber is etched.

[0034] Preferably, in step S1, after the temperature is raised to 1130-1160°C, four-probe temperature calibration is performed to adjust the temperature compensation at the center and edge of the graphite susceptor so that the temperature difference in the pit of the graphite susceptor is less than 10°C.

[0035] Preferably, in step S1, a silicon substrate is placed on a graphite susceptor in a reaction chamber of a silicon epitaxial furnace, the temperature is raised to 1130-1160° C., and the temperature is maintained for 3-7 minutes.

[0036] Preferably, in step S2, the epitaxial furnace reaction chamber is purged with hydrogen at a hydrogen flow rate of 50 to 70 L / min for 15 to 25 seconds to discharge the hydrogen chloride gas, and the silicon coating layer is formed by growing on the graphite base at a growth rate of 3.6 to 4.0 μm / min for 14 to 18 seconds.

[0037] Preferably, the purity of hydrogen chloride gas is ≥99.99%, and the purity of trichlorosilane gas is ≥99.95%.

[0038] Preferably, the diameter of the silicon substrate is 200 mm, the silicon substrate is a heavily phosphorus-doped silicon substrate, and the resistivity of the silicon substrate is 0-0.0015 Ω·cm.

[0039] Preferably, the leakage current of the epitaxial furnace device at a voltage of 45V is required to be less than 13μA.

[0040] In step S3, the silicon epitaxial furnace chamber door is opened at 800-880° C., the silicon substrate is taken out and the silicon substrate is cleaned;

[0041] The silicon substrate sheet is sent into the chamber of the silicon epitaxial furnace at 680-720°C and placed in the pit of the graphite susceptor. The rotation speed of the graphite susceptor is 35 revolutions / min.

[0042] Preferably, the method for preparing silicon epitaxial wafers for preparing TMBS of the present invention can prepare 8-inch silicon epitaxial wafers.

[0043] The method for preparing a silicon epitaxial wafer for TMBS provided by the present invention can obtain a device produced by preparing an epitaxial wafer using the silicon epitaxial wafer for TMBS, and the leakage current of the device under a voltage of 45V is less than 13μA.

[0044] Embodiment 1

[0045] The method for preparing a silicon epitaxial wafer for TMBS comprises the following steps:

[0046] 101) placing a silicon substrate on a graphite susceptor in a silicon epitaxial furnace reaction chamber, heating to 1140°C, without rotating the graphite susceptor, keeping the temperature for 5 minutes, using four probes for temperature calibration, adjusting the temperature compensation at the center and edge of the graphite susceptor, so that the temperature difference in the pit of the graphite susceptor is less than 10°C, and continuing to heat to 1180°C, introducing hydrogen chloride gas into the silicon epitaxial furnace reaction chamber with hydrogen as carrier gas, the flow rate of hydrogen chloride gas is 20L / min, firstly, under the dilution of hydrogen with a flow rate of 10L / min, the etching time is 15s; secondly, under the dilution of hydrogen with a flow rate of 30L / min, the etching time is 15s; cleaning the epitaxial furnace reaction chamber, graphite susceptor, PIN needle and silicon substrate;

[0047] 102) Purge the reaction chamber of the epitaxial furnace with hydrogen at a hydrogen flow rate of 60 L / min for 20 seconds to exhaust the hydrogen chloride gas, introduce trichlorosilane gas with hydrogen as carrier gas, grow on the graphite base at a growth rate of 3.8 μm / min for 16 seconds to form a silicon coating layer, which can reduce the self-doping effect of the cavity on the epitaxial growth process;

[0048] 103) Open the silicon epitaxial furnace chamber door at 840°C, take out the silicon substrate and clean it; put the silicon substrate into the silicon epitaxial furnace chamber at 700°C, place it in the pit of the graphite susceptor, the graphite susceptor rotates at a speed of 35 rpm, heat it to 1150°C, introduce hydrogen chloride gas, the flow rate of hydrogen chloride gas is 1.0 L / min, the etching rate is 1.1 μm / min, and the gas is blown for 18 seconds; adjust the hydrogen chloride flow rate to 0.5 L / min, the etching rate is 0.6 μm / min, and the gas is blown for 10 seconds to better expose the flat substrate surface, stop introducing hydrogen chloride gas, introduce hydrogen gas, the flow rate is 60 L / min, and purge for 20 seconds;

[0049] 104) Using hydrogen as carrier gas, trichlorosilane gas was introduced into the inner cavity of the epitaxial furnace. The hydrogen flow rate was 60 L / min, the trichlorosilane gas flow rate was 16 L / min, and the introduction time was 140 s. The graphite susceptor kept rotating at a speed of 35 r / min, and the epitaxial layer was grown at a speed of 3.8 μm / min. 5 s before the end, the gas flow rate of the doping pipeline was changed to 0.24 L / min, which could ensure that the breakdown voltage was sufficient while reducing the on-voltage. After cooling to 700°C, the silicon epitaxial wafer was cleaned to obtain the epitaxial wafer.

[0050] The purity of the hydrogen chloride gas in this embodiment is ≥99.99%, and the purity of the trichlorosilane gas is ≥99.95%.

[0051] The diameter of the silicon substrate in this embodiment is 200 mm. The silicon substrate is a heavily phosphorus-doped silicon substrate. The resistivity of the silicon substrate is 0.0005 Ω·cm.

[0052] The epitaxial furnace of this embodiment is a Jingsheng EP200D single-wafer silicon epitaxial furnace.

[0053] The silicon epitaxial wafer for TMBS obtained in this embodiment has a leakage current of 13 μA at a voltage of 45 V for the device prepared.

[0054] Embodiment 2

[0055] The method for preparing a silicon epitaxial wafer for TMBS comprises the following steps:

[0056] 201) Place a silicon substrate on a graphite susceptor in a silicon epitaxial furnace reaction chamber, heat it to 1130°C, do not rotate the graphite susceptor, keep it warm for 3 minutes, use four probes to calibrate the temperature, adjust the temperature compensation at the center and edge of the graphite susceptor, so that the temperature difference in the pit of the graphite susceptor is less than 10°C, continue to heat it to 1180°C, use hydrogen as a carrier gas to introduce hydrogen chloride gas into the silicon epitaxial furnace reaction chamber, the flow rate of hydrogen chloride gas is 15L / min, first, under the dilution of hydrogen with a flow rate of 5L / min, the etching time is 10s; secondly, under the dilution of hydrogen with a flow rate of 25L / min, the etching time is 15s; clean the epitaxial furnace reaction chamber, graphite susceptor, PIN needle and silicon substrate;

[0057] 202) purging the reaction chamber of the epitaxial furnace with hydrogen at a hydrogen flow rate of 50 L / min for 20 seconds, exhausting the hydrogen chloride gas, introducing trichlorosilane gas with hydrogen as a carrier gas, and growing on the graphite base at a growth rate of 3.6 μm / min for 16 seconds to form a silicon coating layer, which can reduce the self-doping effect of the cavity on the epitaxial growth process;

[0058] 203) Open the silicon epitaxial furnace chamber door at 800°C, take out the silicon substrate and clean it; put the silicon substrate into the silicon epitaxial furnace chamber at 680°C, place it in the pit of the graphite susceptor, the graphite susceptor rotates at a speed of 35 rpm, heats up to 1140°C, introduces hydrogen chloride gas, the flow rate of hydrogen chloride gas is 0.8L / min, the etching rate is 0.9μm / min, and the gas polishing is 16s; adjust the hydrogen chloride flow rate to 0.4L / min, the etching rate is 0.4.0μm / min, and the gas polishing is 8s to better expose the flat substrate surface, stop introducing hydrogen chloride gas, introduce hydrogen gas, the flow rate is 50L / min, and purge for 15s;

[0059] 204) Trichlorosilane gas was introduced into the inner cavity of the epitaxial furnace using hydrogen as the carrier gas. The hydrogen flow rate was 60 L / min, the trichlorosilane gas flow rate was 16 L / min, and the introduction time was 140 s. The graphite base kept rotating at a speed of 35 r / min, and the epitaxial layer was grown at a speed of 3.8 μm / min. 5 s before the end, the gas flow rate of the doping pipeline was changed to 0.24 L / min, which could ensure that the breakdown voltage was sufficient while reducing the on-voltage. After cooling to 700°C, the silicon epitaxial wafer was cleaned to obtain the epitaxial wafer.

[0060] The purity of the hydrogen chloride gas in this embodiment is ≥99.99%, and the purity of the trichlorosilane gas is ≥99.95%.

[0061] The diameter of the silicon substrate in this embodiment is 200 mm. The silicon substrate is a heavily phosphorus-doped silicon substrate. The resistivity of the silicon substrate is 0.0015 Ω·cm.

[0062] The epitaxial furnace of this embodiment is a Jingsheng EP200D single-wafer silicon epitaxial furnace.

[0063] The silicon epitaxial wafer for TMBS obtained in this embodiment has a leakage current of 13 μA at a voltage of 45 V for the device prepared.

[0064] Embodiment 3

[0065] The method for preparing a silicon epitaxial wafer for TMBS comprises the following steps:

[0066] 301) Place the silicon substrate on the graphite susceptor of the silicon epitaxial furnace reaction chamber, heat it to 1160°C, do not rotate the graphite susceptor, keep it warm for 7 minutes, use four probes to calibrate the temperature, adjust the temperature compensation of the center and edge of the graphite susceptor, so that the temperature difference in the pit of the graphite susceptor is less than 10°C, continue to heat it to 1180°C, use hydrogen as a carrier gas to introduce hydrogen chloride gas into the silicon epitaxial furnace reaction chamber, the flow rate of hydrogen chloride gas is 25L / min, first, under the dilution of hydrogen with a flow rate of 10L / min, the etching time is 15s; secondly, under the dilution of hydrogen with a flow rate of 30L / min, the etching time is 25s; clean the epitaxial furnace reaction chamber, graphite susceptor, PIN needle and silicon substrate;

[0067] 302) Purge the reaction chamber of the epitaxial furnace with hydrogen at a hydrogen flow rate of 60 L / min for 20 seconds to exhaust the hydrogen chloride gas, introduce trichlorosilane gas with hydrogen as carrier gas, grow on the graphite base at a growth rate of 4.0 μm / min for 18 seconds to form a silicon coating layer, which can reduce the self-doping effect of the cavity on the epitaxial growth process;

[0068] 303) Open the silicon epitaxial furnace chamber door at 880°C, take out the silicon substrate and clean it; put the silicon substrate into the silicon epitaxial furnace chamber at 720°C, place it in the pit of the graphite base, the graphite base rotates at a speed of 35 rpm, heat it to 1160°C, introduce hydrogen chloride gas, the flow rate of hydrogen chloride gas is 1.2L / min, the etching rate is 1.0μm / min, and the gas is purged for 20s; adjust the hydrogen chloride flow rate to 0.6L / min, the etching rate is 0.5μm / min, and the gas is purged for 12s to better expose the flat substrate surface, stop introducing hydrogen chloride gas, introduce hydrogen gas, the flow rate is 70L / min, and purge for 20s;

[0069] 304) Trichlorosilane gas was introduced into the inner cavity of the epitaxial furnace using hydrogen as the carrier gas. The hydrogen flow rate was 60 L / min, the trichlorosilane gas flow rate was 16 L / min, and the introduction time was 140 s. The graphite base kept rotating at a speed of 35 r / min, and the epitaxial layer was grown at a speed of 3.8 μm / min. 5 s before the end, the gas flow rate of the doping pipeline was changed to 0.24 L / min, which could ensure that the breakdown voltage was sufficient while reducing the on-voltage. After cooling to 700°C, the silicon epitaxial wafer was obtained by cleaning.

[0070] The purity of the hydrogen chloride gas in this embodiment is ≥99.99%, and the purity of the trichlorosilane gas is ≥99.95%.

[0071] The diameter of the silicon substrate in this embodiment is 200 mm. The silicon substrate is a heavily phosphorus-doped silicon substrate. The resistivity of the silicon substrate is 0.0015 Ω·cm.

[0072] The epitaxial furnace of this embodiment is a Jingsheng EP200D single-wafer silicon epitaxial furnace.

[0073] The silicon epitaxial wafer for TMBS obtained in this embodiment has a leakage current of 13 μA at a voltage of 45 V for the device prepared.

[0074] Comparative Example 1

[0075] The only difference between this embodiment and the first embodiment is that the gas throwing in step 103 is a single gas throwing, that is, hydrogen chloride gas is introduced, the flow rate of hydrogen chloride gas is 1.0 L / min, the etching rate is 1.1 μm / min, the gas throwing is performed for 18 seconds, the introduction of hydrogen chloride gas is stopped, and hydrogen gas is introduced at a flow rate of 60 L / min, and the purge is performed for 20 seconds.

[0076] The silicon epitaxial wafer for TMBS obtained in this comparative example, and the device prepared had a leakage current of 18 μA at a voltage of 45 V.

[0077] Compared with Example 1, Comparative Example 1 only performed one polishing, which could not effectively ensure that the interface between the substrate and the epitaxial interface was cleaner, and could not avoid the problems of large edge leakage and low voltage caused by low edge resistivity.

[0078] Comparative Example 2

[0079] The difference between this comparative example and comparative example 1 is that the gas sparging time is extended. That is, in this comparative example, hydrogen chloride gas is introduced at a flow rate of 1.0 L / min, the etching rate is 1.1 μm / min, the gas sparging is performed for 28 seconds, the introduction of hydrogen chloride gas is stopped, hydrogen gas is introduced at a flow rate of 60 L / min, and the purging is performed for 20 seconds.

[0080] The silicon epitaxial wafer for TMBS obtained in this comparative example, and the device prepared had a leakage current of 17 μA at a voltage of 45 V.

[0081] Compared with Comparative Example 1, although the gas throwing time was extended in Comparative Example 2, the flow rate of the hydrogen chloride gas was not changed. The flow rate was too large and the gas throwing time was too long, which made the silicon substrate rough and affected the growth of the epitaxial layer.

[0082] Comparative Example 3

[0083] The difference between this embodiment and the first embodiment is that in step 103, the flow rate of hydrogen chloride gas for the second gas polishing is adjusted, that is, hydrogen chloride gas is introduced with a flow rate of 1.0 L / min, an etching rate of 1.1 μm / min, and the gas polishing is performed for 18 s. The flow rate of hydrogen chloride is adjusted to 0.7 L / min, the etching rate is 0.6 μm / min, and the gas polishing is performed for 10 s to better expose the flat substrate surface. The introduction of hydrogen chloride gas is stopped, and hydrogen gas is introduced with a flow rate of 60 L / min, and the purge is performed for 20 s.

[0084] The silicon epitaxial wafer for TMBS obtained in this comparative example, and the device prepared had a leakage current of 17 μA at a voltage of 45 V.

[0085] Comparative Example 3 Compared with Example 1, the second hydrogen chloride flow rate is 0.7 L / min, and the hydrogen chloride flow rate is still too large, which makes the silicon substrate rough and affects the growth of the epitaxial layer.

[0086] Comparative Example 4

[0087] The difference between this embodiment and the first embodiment is that in step 103, the flow rate of hydrogen chloride gas for the second gas polishing is adjusted, that is, hydrogen chloride gas is introduced with a flow rate of 1.0 L / min, an etching rate of 1.1 μm / min, and the gas polishing is performed for 18 s. The flow rate of hydrogen chloride is adjusted to 0.3 L / min, the etching rate is 0.6 μm / min, and the gas polishing is performed for 10 s to better expose the flat substrate surface. The introduction of hydrogen chloride gas is stopped, and hydrogen gas is introduced with a flow rate of 60 L / min, and the purge is performed for 20 s.

[0088] The silicon epitaxial wafer for TMBS obtained in this comparative example, and the device prepared had a leakage current of 18 μA at a voltage of 45 V.

[0089] Comparative Example 4 Compared with Example 1, the second hydrogen chloride flow rate is 0.3 L / min, and the hydrogen chloride flow rate is too small to ensure the cleanliness of the interface between the silicon substrate and the epitaxial layer, and to completely expose the silicon substrate.

[0090] Comparative Example 5

[0091] The difference between this embodiment and the first embodiment is that in step 101, the silicon substrate is not placed first. In step 103, the temperature is lowered and the silicon substrate is sent into the chamber of the silicon epitaxial furnace at 680° C. and placed in the pit of the graphite base. The other steps are the same.

[0092] The silicon epitaxial wafer for TMBS obtained in this comparative example has a leakage current of 18 μA at a voltage of 45 V for the device produced by preparing the epitaxial wafer.

[0093] Compared with Comparative Example 1, in this comparative example, the silicon substrate is not fully cleaned before preparing the epitaxial layer, so the cleanliness of the interface between the silicon substrate and the epitaxial layer cannot be guaranteed, and the silicon substrate cannot be completely exposed.

[0094] The preparation method of silicon epitaxial wafer for TMBS provided in Examples 1 to 3 is to clean the silicon substrate twice before and after production, and then introduce a double gas polishing process, first with a large flow rate and then with a small flow rate, so that the interface between the silicon substrate and the epitaxial layer is cleaner, the single crystal of the silicon substrate is more thoroughly exposed, the epitaxial growth is more dense and orderly, and the self-doping effect introduced by the substrate is effectively reduced. The epitaxial wafers obtained in Examples 1 to 3 are used to prepare devices, and the leakage current of the device at 45V is less than 13μA, and the leakage current is small, avoiding the problem of large edge leakage and low voltage caused by low edge resistivity. However, the processes of Comparative Examples 1 to 5 lack the double gas polishing process, lack the double cleaning of the silicon substrate, or the flow rate setting in the double gas polishing process is inappropriate, which will affect the polishing effect of the silicon substrate. The leakage current of the device finally obtained at 45V is about 18μA, which cannot solve the problem of low leakage of the device to be solved by the present invention.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a silicon epitaxial wafer for TMBS, characterized in that: The steps include: S1) placing a silicon substrate on a graphite susceptor in a silicon epitaxial furnace reaction chamber, heating the chamber to 1130-1160° C., maintaining the temperature, and introducing hydrogen chloride gas into the silicon epitaxial furnace reaction chamber using hydrogen as a carrier gas to clean the epitaxial furnace reaction chamber, the graphite susceptor, the PIN needles and the silicon substrate; S2) hydrogen is purged into the reaction chamber of the epitaxial furnace to discharge hydrogen chloride gas, trichlorosilane gas is introduced with hydrogen as carrier gas, and a silicon coating layer is grown on the graphite base; S3) Take out the silicon substrate, clean the silicon substrate, and place it on the silicon coating of the graphite base again. The graphite base is rotated, heated to 1140℃~1160℃, and hydrogen chloride gas is introduced. The flow rate of hydrogen chloride gas is 0.8~1.2L / min, the etching rate is 0.9-1.1μm / min, and the gas throwing is 16~20s; adjust the hydrogen chloride flow rate to 0.4~0.6L / min, the etching rate is 0.4-0.6μm / min, and the gas throwing is 8~12s. Stop introducing hydrogen chloride gas, introduce hydrogen gas, the flow rate is 50~70L / min, and purge for 15~25s; S4) introducing trichlorosilane gas into the inner cavity of the epitaxial furnace using hydrogen as a carrier gas for 60-140 seconds, while the graphite susceptor keeps rotating and the temperature is lowered to obtain a silicon epitaxial wafer; In step S1, the flow rate of hydrogen chloride gas is 15-25 L / min. First, under the dilution of hydrogen with a flow rate of 5-15 L / min, the etching time is 10-20 s; secondly, under the dilution of hydrogen with a flow rate of 25-35 L / min, the etching time is 15-25 s.

2. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, characterized in that: In step S4, a silicon epitaxial layer is formed on the silicon substrate at a growth rate of 3.6 to 4.0 μm / min for 4 to 8 seconds to obtain a silicon epitaxial wafer.

3. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, characterized in that: In step S1, after the temperature is raised to 1130-1160°C, four-probe temperature calibration is performed to adjust the temperature compensation at the center and edge of the graphite susceptor so that the temperature difference in the pit of the graphite susceptor is less than 10°C.

4. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, wherein: In step S1, a silicon substrate is placed on a graphite susceptor in a reaction chamber of a silicon epitaxial furnace, the temperature is raised to 1130-1160° C., and the temperature is maintained for 3-7 minutes.

5. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, characterized in that: In step S2, the reaction chamber of the epitaxial furnace is purged with hydrogen at a flow rate of 50 to 70 L / min for 15 to 25 seconds to discharge the hydrogen chloride gas and grow on the graphite base at a growth rate of 3.6 to 4.0 μm / min for 14 to 18 seconds to form a silicon coating layer.

6. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, characterized in that: The purity of hydrogen chloride gas is ≥99.99%, and the purity of trichlorosilane gas is ≥99.95%.

7. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, characterized in that: The diameter of the silicon substrate piece is 200 mm, the silicon substrate piece is a heavily phosphorus-doped silicon substrate piece, and the resistivity of the silicon substrate piece is 0 to 0.0015 Ω·cm.

8. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, characterized in that: For devices produced by epitaxial wafers prepared from silicon epitaxial wafers, the leakage current of the epitaxial furnace devices at a voltage of 45V is required to be less than 13μA.

9. The method for preparing a silicon epitaxial wafer for TMBS according to claim 1, characterized in that: In step S3, the silicon epitaxial furnace chamber door is opened at 800-880° C., the silicon substrate is taken out and the silicon substrate is cleaned; The silicon substrate sheet is sent into the chamber of the silicon epitaxial furnace at 680-720°C and placed in the pit of the graphite susceptor. The rotation speed of the graphite susceptor is 35 revolutions / min.