Request processing method and device, computer equipment, storage medium and program product

Abstract

The invention relates to a request processing method and device, computer equipment, a storage medium and a program product. The method comprises the steps of obtaining a first key value pair of a first operation range corresponding to a mapping release request and a second key value pair of a second operation range corresponding to the mapping release request under the condition that the mapping release request is received; an address parameter in the first key value pair points to an address in the first operation range; the address parameter in the second key value pair does not point to the address in the second operation range; writing the second key value pair and the first key value pair into a preset linked list, and triggering a write-back operation when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold value. By adopting the method, the write-back performance can be improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a request processing method, apparatus, computer equipment, storage medium and program product. Background Art

[0002] In an all-flash storage system, the write performance can be greatly improved by using cache write-back. However, frequent file creation, modification, and deletion operations will generate a large number of unmap operations. How to efficiently manage storage space and reduce unnecessary disk write operations becomes a key technology.

[0003] In traditional technology, after receiving an unmap operation request, the unmap operation is analogized to a write request operation, and the unmap operation is split into multiple cache pages. When the number of cache pages reaches a preset threshold, a write-back is triggered.

[0004] However, conventional technologies suffer from the problem of degraded write-back performance. Summary of the invention

[0005] Based on this, it is necessary to provide a request processing method, apparatus, computer equipment, storage medium and program product that can improve write-back performance in response to the above technical problems.

[0006] In a first aspect, the present application provides a request processing method, comprising:

[0007] In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to a first operation range of the mapping release request and a second key-value pair corresponding to a second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; and the address parameter in the second key-value pair does not point to the address of the second operation range;

[0008] The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0009] In one embodiment, the obtaining of a first key-value pair corresponding to a first operation scope of the mapping release request and a second key-value pair corresponding to a second operation scope of the mapping release request includes:

[0010] Determining the first operating range and the second operating range corresponding to the mapping release request;

[0011] Align and split the first operation range according to the cache page granularity value of the storage system to obtain the first key-value pair;

[0012] The second operation range is aligned and split according to a preset granularity value to obtain the second key-value pair; the preset granularity value is greater than the cache page granularity value.

[0013] In one embodiment, the determining the first operation range and the second operation range corresponding to the mapping release request includes:

[0014] Based on the volume corresponding to the mapping release request, obtaining the offset and length of the mapping release request;

[0015] The first operating range and the second operating range are determined according to the offset and the length.

[0016] In one embodiment, writing the second key-value pair and the first key-value pair into a preset linked list includes:

[0017] The second key-value pair and the first key-value pair are written into the linked list according to a preset writing rule; the writing rule includes that the key-value pairs whose addresses are not pointed to by the address parameters are written before the key-value pairs whose addresses are pointed to by the address parameters.

[0018] In one embodiment, the method further comprises:

[0019] In the case of receiving a write request, splitting the write data corresponding to the write request into a third key-value pair; the address parameter in the third key-value pair points to the write address of the write data;

[0020] The third key-value pair is written into the linked list according to the writing rule to form a new linked list.

[0021] In one embodiment, the method further comprises:

[0022] When the write-back operation is triggered, de-duplication and merging are performed on the key-value pairs in the new linked list to obtain a processed linked list;

[0023] A write-back operation is performed based on the processed linked list.

[0024] In one embodiment, the method further comprises:

[0025] In case of receiving a read request, obtaining a first timestamp of the write-back operation and a second timestamp of the mapping release request;

[0026] If the first timestamp is greater than the second timestamp, reading the key-value pair of the address pointed to by the address parameter in the new linked list in response to the read request;

[0027] If the first timestamp is less than or equal to the second timestamp, in response to the read request, the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list are first read, and then the key-value pairs whose addresses are pointed to by the address parameters in the new linked list are read.

[0028] In a second aspect, the present application further provides a request processing device, including:

[0029] A first acquisition module is used to, when receiving a mapping release request, acquire a first key-value pair corresponding to a first operation range of the mapping release request and a second key-value pair corresponding to a second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; and the address parameter in the second key-value pair does not point to the address of the second operation range;

[0030] A processing module is used to write the second key-value pair and the first key-value pair into a preset linked list, and trigger a write-back operation when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0031] In a third aspect, the present application further provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0032] In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to a first operation range of the mapping release request and a second key-value pair corresponding to a second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; and the address parameter in the second key-value pair does not point to the address of the second operation range;

[0033] The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0034] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the following steps are implemented:

[0035] In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to a first operation range of the mapping release request and a second key-value pair corresponding to a second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; and the address parameter in the second key-value pair does not point to the address of the second operation range;

[0036] The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0037] In a fifth aspect, the present application further provides a computer program product, including a computer program, which implements the following steps when executed by a processor:

[0038] In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to a first operation range of the mapping release request and a second key-value pair corresponding to a second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; and the address parameter in the second key-value pair does not point to the address of the second operation range;

[0039] The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0040] The above-mentioned request processing method, apparatus, computer equipment, storage medium and program product, upon receiving a mapping release request, obtain a first key-value pair corresponding to the first operating range of the mapping release request and a second key-value pair corresponding to the second operating range of the mapping release request. Since the address parameter in the obtained first key-value pair points to the address of the first operating range corresponding to the mapping release request, and the address parameter in the second key-value pair does not point to the address of the second operating range corresponding to the mapping release request, the cache amount of the storage system occupied by the key-value pair corresponding to the mapping release request is reduced. In addition, since the address parameter in the second key-value pair corresponding to the second operating range of the mapping release request does not point to the address of the second operating range, the second key-value pair corresponding to the second operating range of the mapping release request and the first key-value pair of the first operating range are written into the preset linked list, and the preset conditions for triggering the write-back operation will not be reached too quickly, thereby avoiding too frequent triggering of the write-back operation, thereby improving the write-back performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1 A schematic diagram of a request processing method in one embodiment;

[0043] Figure 2A flowchart of a request processing method in another embodiment;

[0044] Figure 3 Schematic diagram of a process of obtaining a first key-value pair and a second key-value pair in one embodiment;

[0045] Figure 4 A flowchart of a request processing method in another embodiment;

[0046] Figure 5 A flowchart of a request processing method in another embodiment;

[0047] Figure 6 A schematic diagram of a process of merging key-value pairs corresponding to a mapping release request in one embodiment;

[0048] Figure 7 A schematic diagram of a process of merging a key-value pair corresponding to a mapping release request and a key-value pair corresponding to a write request in one embodiment;

[0049] Figure 8 A flowchart of a request processing method in another embodiment;

[0050] Fig. 9 is a structural block diagram of a request processing device in one embodiment;

[0051] Fig.10 is a structural block diagram of a request processing device in another embodiment;

[0052] Fig.11 is a structural block diagram of a request processing device in another embodiment;

[0053] Fig.12 is a structural block diagram of a request processing device in another embodiment;

[0054] Fig.13 is a structural block diagram of a request processing device in another embodiment;

[0055] Fig.14 is a structural block diagram of a request processing device in another embodiment;

[0056] Fig.15 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0058] In an exemplary embodiment, Figure 1 As shown, a request processing method is provided. This embodiment uses the method applied to a computer device as an example for illustration. It can be understood that the method can also be applied to a server, and can also be applied to a system including a computer device and a server, and is implemented through the interaction between the computer device and the server. In this embodiment, the method includes the following steps:

[0059] S201, when a mapping release request is received, obtain a first key-value pair corresponding to the first operating scope of the mapping release request, and a second key-value pair corresponding to the second operating scope of the mapping release request; the address parameter in the first key-value pair points to the address of the first operating scope; the address parameter in the second key-value pair does not point to the address of the second operating scope.

[0060] Among them, the mapping unmap request can be triggered by the user to request the cancellation of the mapping relationship between the file or memory area and the process address space. When the memory mapping is released, the cache pages related to it may be marked as invalid or waiting for recycling. If these cache pages are dirty, they are usually written back to the disk before recycling. The Unmap operation itself does not directly process the dirty cache pages, but only releases the memory mapping. The processing of dirty cache pages is jointly handled by the kernel's memory management subsystem and the file system cache mechanism.

[0061] Optionally, in this embodiment, the first operation range corresponding to the mapping release request can be the operation range of the first and last parts of the mapping release request, and the second operation range corresponding to the mapping release request can be the operation range of the middle part of the mapping release request; or, the first operation range corresponding to the mapping release request can be the operation range of the middle part of the mapping release request, and the second operation range corresponding to the mapping basic request can be the operation range of the first and last parts of the mapping release request.

[0062] It should be noted that the key-value pair in this embodiment is composed of two related data elements, key and value, wherein the key may include the volume ID (VOLID), the offset (lba) of the cache page, the snapshot version (snapVersion) and the bitmap (bitmap) corresponding to the mapping release request, and the value may be the address parameter pointed to by the key-value pair. In this embodiment, the value value in the first key-value pair of the first operation range, that is, the address parameter in the first key-value pair, may point to the address of the first operation range corresponding to the mapping release request, and the value value in the second key-value pair of the second operation, that is, the address parameter in the second key-value pair, does not point to the real cache page address, that is, the address parameter in the second key-value pair does not point to the second operation range corresponding to the mapping release request. Optionally, in this embodiment, the first operation range corresponding to the mapping release request may be processed by analogy to a write-zero request, and the first key-value pair of the first operation range is obtained, so that the address parameter in the obtained first key-value pair points to the address of the first operation range. At the same time, as an optional implementation, the second operation range corresponding to the mapping release request may be aligned and split, and the second key-value pair of the second operation range corresponding to the mapping release request may be obtained.

[0063] S202, writing the second key-value pair and the first key-value pair into a preset linked list, and triggering a write-back operation when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0064] In this embodiment, the obtained second key-value pair and the first key-value pair can be sorted to form an ordered linked list. As an optional implementation, the obtained second key-value pair and the first key-value pair can be written into a linked list that has already been written with key-value pairs, that is, the obtained second key-value pair and the first key-value pair are written into a preset linked list. It can be understood that since key-value pairs are constantly written into the linked list, the length of the linked list is constantly changing. As an optional implementation, if the length of the linked list reaches a preset length threshold, a write-back operation will be triggered to write the dirty cache pages in the cache back to the disk.

[0065] Optionally, in this embodiment, when a mapping release request is received, the maximum timestamp of the recorded key-value pair may also be updated.

[0066] In the above-mentioned request processing method, when a mapping release request is received, a first key-value pair corresponding to the first operating range of the mapping release request and a second key-value pair corresponding to the second operating range of the mapping release request are obtained. Since the address parameter in the obtained first key-value pair points to the address of the first operating range corresponding to the mapping release request, and the address parameter in the second key-value pair does not point to the address of the second operating range corresponding to the mapping release request, the cache amount of the storage system occupied by the key-value pair corresponding to the mapping release request is reduced. In addition, since the address parameter in the second key-value pair corresponding to the second operating range of the mapping release request does not point to the address of the second operating range, the second key-value pair corresponding to the second operating range of the mapping release request and the first key-value pair of the first operating range are written into the preset linked list, the preset conditions for triggering the write-back operation will not be reached too quickly, thereby avoiding too frequent triggering of the write-back operation, thereby improving the write-back performance.

[0067] In this embodiment, the specific implementation process of obtaining the first key-value pair corresponding to the first operation range of the mapping release request and the second key-value pair corresponding to the second operation range of the mapping release request will be described in detail. Figure 2 As shown, the above S201 includes:

[0068] S301: Determine a first operation range and a second operation range corresponding to a mapping release request.

[0069] Optionally, in this embodiment, the first operation range and the second operation range corresponding to the mapping release request can be determined based on a user-defined division method. For example, the user-defined division method can be to define the part between the starting position and the middle position of the mapping release request as the first operation range, and to define the part between the middle position and the end position of the mapping release request as the second operation range.

[0070] As another optional implementation, in this embodiment, when a mapping release request is received, the volume corresponding to the mapping release request can be determined first, and then, based on the volume corresponding to the mapping release request, the offset and length of the mapping release request are obtained, and based on the offset and length of the mapping base request, the first operation range and the second operation range of the mapping release request are determined.

[0071] S302: Align and split the first operation range according to the cache page granularity value of the storage system to obtain a first key-value pair.

[0072] It can be understood that since the mapping release request does not have real data, after determining the first operating range and the second operating range corresponding to the mapping release request, as an optional implementation, if there are unaligned pages in the first operating range or there are unaligned pages in the second operating range, then a cache page size memory can be applied for the unaligned pages to fill the unaligned pages.

[0073] Optionally, in this embodiment, the cache page granularity value of the storage system can be used as a splitting unit, and the first operation range corresponding to the mapping release request can be aligned and split according to the cache page granularity value of the storage system to obtain a first key-value pair of the first operation range corresponding to the mapping release request. Exemplarily, the cache page granularity value of the storage system can be 8K, 18K, etc., which is not limited in this embodiment.

[0074] S303, align and split the second operation range according to a preset granularity value to obtain a second key-value pair; the preset granularity value is greater than the cache page granularity value.

[0075] Among them, the preset granularity value is greater than the cache page granularity value of the storage system, for example, the preset granularity value may be 32MB, etc. Optionally, in this embodiment, if the first operation range is the head and tail parts of the mapping release request, then after the head and tail parts of the mapping release request are split, the remaining parts are aligned with the cache page size. As an optional implementation, the second operation range in this embodiment may be aligned with the cache page size. Therefore, in this embodiment, the second operation range of the mapping release request may be aligned and split according to the preset granularity value to obtain the second key-value pair corresponding to the second operation range of the mapping release request, and the value of the second key-value pair does not point to the real cache page address. In addition, it should be noted that when a volume makes multiple mapping release requests, the key-value pairs obtained by splitting the multiple mapping release requests will be retained in the above linked list.

[0076] For example, Figure 3 A schematic diagram of a process for obtaining a first key-value pair corresponding to a first operation range of a mapping release request and a second key-value pair corresponding to a second operation range of a mapping release request, such as Figure 3 As shown, based on the volume corresponding to the mapping release request, the first operation range corresponding to the mapping release request can be determined to be the head and tail parts of the mapping release request, and the second operation range corresponding to the mapping release request can be the middle part of the mapping release request. Afterwards, the first operation range corresponding to the mapping release request can be aligned and split to obtain a first key-value pair, and the second operation range corresponding to the mapping release request can be aligned and split to obtain a second key-value pair, and the obtained first key-value pair and second key-value pair can be sorted to form a key-value pair sequence.

[0077] In this embodiment, by determining the first operation range and the second operation range corresponding to the mapping release request, the computer device can align and split the first operation range corresponding to the mapping release request according to the cache page granularity value of the storage system to obtain a first key-value pair whose address parameter points to the address of the first operation range, and align and split the second operation range corresponding to the mapping release request according to the preset granularity value to obtain a second key-value pair whose address parameter does not point to the address of the second operation range, thereby improving the write-back performance while reducing the occupied cache amount of the storage system, and the process of determining two different operation ranges corresponding to the mapping release request and splitting the mapping release request through two different split granularities is also relatively simple, thereby ensuring the feasibility of the solution.

[0078] In this embodiment, the formation process of the linked list is explained in detail. In an exemplary embodiment, the above S202 includes:

[0079] Step A: Write the second key-value pair and the first key-value pair into the linked list according to a preset writing rule; the writing rule includes that the key-value pair whose address parameter does not point to an address is written before the key-value pair whose address parameter points to an address.

[0080] In this embodiment, after obtaining the first key-value pair and the second key-value pair corresponding to the mapping release request, the computer device can write the first key-value pair and the second key-value pair corresponding to the mapping release request into the linked list in order according to the writing rule that the key-value pair whose address is not pointed to by the address parameter is written before the key-value pair whose address is pointed to by the address parameter, that is, in the formed linked list, the second key-value pair is arranged before the first key-value pair.

[0081] In this embodiment, according to the writing rule that the key-value pair whose address is not pointed to by the address parameter is written before the key-value pair whose address is pointed to by the address parameter, the second key-value pair and the first key-value pair corresponding to the mapping release request are written into the preset linked list, which can ensure the orderliness of the key-value pairs written in the linked list, thereby enabling the ordered key-value pairs to be conveniently processed in subsequent operations, thereby improving the convenience of subsequent operations.

[0082] In some scenarios, the computer device may receive a write request in addition to the mapping base request. In this embodiment, the processing method of the received write request will be explained in detail. In an exemplary embodiment, Figure 4 As shown, the above method also includes:

[0083] S401, when a write request is received, splitting the write data corresponding to the write request into a third key-value pair; the address parameter in the third key-value pair points to the write address of the write data.

[0084] It should be noted that, since the first operation range corresponding to the mapping release request is processed by analogy with the write-zero request when splitting, the received write request can be split according to the non-full split granularity when the first operation range corresponding to the mapping release request is split. That is to say, in this embodiment, as an optional implementation, Figure 4 As shown, the write data corresponding to the received write request can be split according to the cache page granularity of the storage system, and the write data corresponding to the write request can be split into third key-value pairs, and the third parameter in the obtained third key-value pair can point to the write address of the write data.

[0085] S402, writing the third key-value pair into the linked list according to the writing rule to form a new linked list.

[0086] In this embodiment, the third key-value pair can be written into the above linked list according to the writing rule that the key-value pair that the address parameter does not point to is written before the key-value pair that the address parameter points to, to form a new linked list. That is, in the formed new linked list, please continue to refer to Figure 3 , the second key-value pair corresponding to the received mapping release request is written before the first key-value pair corresponding to the mapping release request and the third key-value pair corresponding to the write request. In addition, if two of the third key-value pairs corresponding to the write request point to the same unit on the volume, the two third key-value pairs can be retained at the same time, and which third key-value pair is valid can be determined based on the timestamp on the third key-value pairs.

[0087] In this embodiment, when a write request is received, the write data corresponding to the write request is split into a third key-value pair, and the address parameter in the third key-value pair points to the write address of the write data corresponding to the write request. In this way, the third key-value pair corresponding to the write request can be written into a linked list according to the write rule that the key-value pairs to which the address parameter does not point are written before the key-value pairs to which the address parameter points. This makes the key-value pairs in the newly formed linked list arranged in order. In this way, while processing the received write request, it is possible to avoid affecting the processing operations of other requests due to the processing of the write request.

[0088] In some scenarios, after processing multiple unmapping requests and write requests, the length of the linked list of written key-value pairs will reach a preset length threshold, thereby triggering a write-back operation. This embodiment will explain the detailed processing of the triggered write-back operation. In an exemplary embodiment, Figure 5 As shown, the above method also includes:

[0089] S501, when a write-back operation is triggered, de-duplication and merging are performed on the key-value pairs in the new linked list to obtain a processed linked list.

[0090] In this embodiment, when the write-back operation is triggered, the new linked list is first traversed, and the second key-value pair corresponding to the mapping release request is merged and deduplicated to ensure that a unit (lba) of the volume has only one second key-value pair corresponding to the mapping release request, and then the first key-value pair and the third key-value pair in the new linked list are traversed, and a third key-value pair is obtained and merged with the first key-value pair. For example, Figure 6 A schematic diagram of the process of merging the key-value pairs corresponding to the mapping release request is shown in FIG. Figure 6 As shown, if there is an overlapped lba on the key-value pair chain corresponding to the mapping release request, a valid key-value pair is selected from the overlapping part according to the timestamp time, and the overlapping part of the key-value pair corresponding to the mapping release request is removed and only one copy is retained; Figure 7 The schematic diagram is a process diagram for merging the key-value pairs corresponding to the mapping release request and the key-value pairs corresponding to the write request, as shown in FIG. Figure 7 As shown, when traversing the third key-value pair corresponding to the write request and the first key-value pair corresponding to the mapping release request, each time a third key-value pair is obtained, the obtained third key-value pair is compared with the first key-value pair corresponding to the mapping release request. If there is an overlap, the valid key-value pair is selected according to the timestamp.

[0091] S502, performing a write-back operation based on the processed linked list.

[0092] In this embodiment, by performing de-duplication and merging processing on the key-value pairs in the formed new linked list, a processed linked list can be obtained. At this time, the computer device can perform a write-back operation based on the processed linked list.

[0093] In this embodiment, when a write-back operation is triggered, de-duplication and merging are performed on the key-value pairs in the new linked list so that the processed linked list is free of duplicate key-value pairs, thereby ensuring the efficiency of the write-back operation when the write-back operation is performed based on the processed linked list; in addition, since the key-value pairs in the linked list are arranged in order, when de-duplication and merging are performed on the key-value pairs in the new linked list, the key-value pairs in the new linked list can be efficiently de-duplication and merging, thereby improving the efficiency of the processed linked list.

[0094] In some scenarios, a read request triggered by a user may also be received. In this embodiment, the process of processing the received read request will be described in detail. In an exemplary embodiment, Figure 8 As shown, the above method also includes:

[0095] S601, when a read request is received, obtaining a first timestamp of a write-back operation and a second timestamp of a mapping release request.

[0096] In this embodiment, when a read request triggered by a user is received, the first timestamp of the processed write-back operation and the second timestamp of the processed mapping release request can be obtained from the above-mentioned linked list, and the sizes of the first timestamp of the write-back operation and the second timestamp of the mapping release request can be compared to obtain the comparison result of the sizes of the first timestamp and the second timestamp.

[0097] S602: If the first timestamp is greater than the second timestamp, read the key-value pair of the address pointed to by the address parameter in the new linked list in response to the read request.

[0098] In this embodiment, if the first timestamp of the write-back operation is greater than the second timestamp of the mapping release request, it means that the computer device may not have processed the mapping release request, or the data of the mapping release request has been written back to the disk. At this time, there is no need to read the key-value pair corresponding to the mapping release request, and the dirty cache page can be read directly. That is to say, in this embodiment, if the first timestamp of the write-back operation is greater than the second timestamp of the mapping release request, the computer device can read the key-value pair of the address pointed to by the address parameter in the new linked list formed in response to the received read request, that is, the computer device can read the third key-value pair in the new linked list in response to the received read request.

[0099] S603: If the first timestamp is less than or equal to the second timestamp, in response to the read request, first read the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list, and then read the key-value pairs whose addresses are pointed to by the address parameters in the new linked list.

[0100] In this embodiment, if the first timestamp of the write-back operation is less than or equal to the second timestamp of the mapping release request, it means that the mapping release request has been written and the write-back has not been completed. At this time, it is necessary to first read the key-value pair corresponding to the mapping release request, and then read the dirty cache page key-value pair, and select a valid key-value pair after comparing the timestamps of the read key-value pairs to fill in the memory corresponding to the read request. That is, in this embodiment, if the first timestamp of the write-back operation is less than or equal to the second timestamp of the mapping release request, the computer device can respond to the received read request by first reading the key-value pair whose address parameter does not point to the address in the new linked list, and then reading the key-value pair whose address parameter points to the address in the new linked list.

[0101] In this embodiment, when a read request is received, by obtaining the first timestamp of the write-back operation and the second timestamp of the mapping release request, it is possible to determine the processing status of the mapping release request and the processing status of the write request before processing the read request, so that when the first timestamp of the write-back operation is greater than the second timestamp of the mapping release request, the key-value pair of the address pointed to by the address parameter in the new linked list can be read in response to the received read request; when the first timestamp of the write-back operation is less than or equal to the second timestamp of the mapping release request, the key-value pair of the address not pointed to by the address parameter in the new linked list can be read in response to the received read request, and then the key-value pair of the address pointed to by the address parameter in the new linked list can be read, so as to minimize the impact of the mapping release request on the read request.

[0102] To facilitate understanding by those skilled in the art, the request processing method provided by the present application is described in detail below. The method may include:

[0103] S1. When a mapping release request is received, an offset and a length of the mapping release request are obtained based on a volume corresponding to the mapping release request.

[0104] S2: Determine a first operation range and a second operation range corresponding to the mapping release request according to the offset and the length of the mapping release request.

[0105] S3, align and split the first operation range according to the cache page granularity value of the storage system to obtain a first key-value pair corresponding to the first operation range of the mapping release request.

[0106] S4, align and split the second operation range according to a preset granularity value to obtain a second key-value pair corresponding to the second operation range of the mapping release request; the preset granularity value is greater than the cache page granularity value.

[0107] S5, writing the second key-value pair and the first key-value pair into the linked list according to a preset writing rule; the writing rule includes writing the key-value pair whose address parameter does not point to an address before the key-value pair whose address parameter points to an address.

[0108] S6, when a write request is received, splitting the write data corresponding to the write request into a third key-value pair; the address parameter in the third key-value pair points to the write address of the write data.

[0109] S7, write the third key-value pair into the linked list according to the writing rule to form a new linked list.

[0110] S8, when the write-back operation is triggered, the key-value pairs in the new linked list are de-duplicated and merged to obtain a processed linked list.

[0111] S9, performing a write-back operation based on the processed linked list.

[0112] S10, when a read request is received, obtaining a first timestamp of the write-back operation and a second timestamp of the mapping release request.

[0113] S11: If the first timestamp is greater than the second timestamp, then in response to the read request, read the key-value pair of the address pointed to by the address parameter in the new linked list.

[0114] S12, if the first timestamp is less than or equal to the second timestamp, then in response to the read request, first read the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list, and then read the key-value pairs whose addresses are pointed to by the address parameters in the new linked list.

[0115] It should be noted that for the descriptions in the above S1-S12, reference may be made to the relevant descriptions in the above embodiments, and the effects are similar, so this embodiment will not be repeated here.

[0116] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0117] Based on the same inventive concept, the embodiment of the present application also provides a request processing device for implementing the request processing method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more request processing device embodiments provided below can refer to the limitations on the request processing method above, and will not be repeated here.

[0118] In an exemplary embodiment, Fig. 9 As shown, a request processing device is provided, comprising: a first acquisition module 10 and a processing module 11, wherein:

[0119] The first acquisition module 10 is used to, upon receiving a mapping release request, obtain a first key-value pair corresponding to the first operating range of the mapping release request and a second key-value pair corresponding to the second operating range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operating range; the address parameter in the second key-value pair does not point to the address of the second operating range.

[0120] The processing module 11 is used to write the second key-value pair and the first key-value pair into a preset linked list, and trigger a write-back operation when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0121] The request processing device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0122] In one embodiment, Fig.10 As shown, the first acquisition module 10 includes: a determination unit 101, a first splitting unit 102 and a second splitting unit 103, wherein:

[0123] The determining unit 101 is configured to determine a first operating range and a second operating range corresponding to a mapping release request.

[0124] The first splitting unit 102 is used to align and split the first operation range according to the cache page granularity value of the storage system to obtain a first key-value pair.

[0125] The second splitting unit 103 is used to align and split the second operation range according to a preset granularity value to obtain a second key-value pair; the preset granularity value is greater than the cache page granularity value.

[0126] The request processing device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0127] In one embodiment, please continue to see Fig.10 The determination unit 101 is specifically used to obtain the offset and length of the mapping release request based on the volume corresponding to the mapping release request; and determine the first operation range and the second operation range according to the offset and the length.

[0128] The request processing device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0129] In one embodiment, Fig.11 As shown, the processing module 11 includes: a writing unit 111, wherein:

[0130] The writing unit 111 is used to write the second key-value pair and the first key-value pair into the linked list according to a preset writing rule; the writing rule includes writing the key-value pair whose address parameter does not point to an address before the key-value pair whose address parameter points to an address.

[0131] The request processing device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0132] In one embodiment, Fig.12 As shown, the above device further includes: a splitting module 12 and a writing module 13, wherein:

[0133] The splitting module 12 is used to split the write data corresponding to the write request into a third key-value pair when a write request is received; the address parameter in the third key-value pair points to the write address of the write data.

[0134] The writing module 13 is used to write the third key-value pair into the linked list according to the writing rule to form a new linked list.

[0135] The request processing device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0136] In one embodiment, Fig.13 As shown, the above device also includes: a deduplication module 14 and a write-back module 15, wherein:

[0137] The deduplication module 14 is used to perform deduplication and merging processing on the key-value pairs in the new linked list when the write-back operation is triggered to obtain a processed linked list.

[0138] The write-back module 15 is used to perform a write-back operation based on the processed linked list.

[0139] The request processing device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0140] In one embodiment, Fig.14 As shown, the above device further includes: a second acquisition module 16, a first reading module 17 and a second reading module 18, wherein:

[0141] The second acquisition module 16 is used to acquire the first timestamp of the write-back operation and the second timestamp of the mapping release request when a read request is received.

[0142] The first reading module 17 is configured to read the key-value pair of the address pointed to by the address parameter in the new linked list in response to the read request if the first timestamp is greater than the second timestamp.

[0143] The second reading module 18 is used to first read the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list, and then read the key-value pairs whose addresses are pointed to by the address parameters in the new linked list in response to the read request if the first timestamp is less than or equal to the second timestamp.

[0144] The request processing device provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0145] Each module in the above request processing device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.

[0146] In an exemplary embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as shown in FIG. Fig.15 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store key-value pairs of mapping release requests and key-value pairs of write requests. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a request processing method is implemented.

[0147] Those skilled in the art will understand that Fig.15 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0148] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented:

[0149] In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to the first operation range of the mapping release request and a second key-value pair corresponding to the second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; the address parameter in the second key-value pair does not point to the address of the second operation range;

[0150] The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0151] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0152] Determine a first operation range and a second operation range corresponding to the mapping release request;

[0153] Align and split the first operation range according to the cache page granularity value of the storage system to obtain a first key-value pair;

[0154] The second operation range is aligned and split according to a preset granularity value to obtain a second key-value pair; the preset granularity value is greater than the cache page granularity value.

[0155] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0156] Based on the volume corresponding to the mapping release request, obtain the offset and length of the mapping release request;

[0157] A first operating range and a second operating range are determined according to the offset and the length.

[0158] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0159] According to a preset writing rule, the second key-value pair and the first key-value pair are written into the linked list; the writing rule includes that the key-value pairs whose addresses are not pointed to by the address parameters are written before the key-value pairs whose addresses are pointed to by the address parameters.

[0160] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0161] When a write request is received, the write data corresponding to the write request is split into a third key-value pair; the address parameter in the third key-value pair points to the write address of the write data;

[0162] The third key-value pair is written into the linked list according to the writing rule to form a new linked list.

[0163] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0164] When the write-back operation is triggered, the key-value pairs in the new linked list are de-duplicated and merged to obtain a processed linked list;

[0165] Perform write-back operation based on the processed linked list.

[0166] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0167] When a read request is received, obtaining a first timestamp of the write-back operation and a second timestamp of the mapping release request;

[0168] If the first timestamp is greater than the second timestamp, reading the key-value pair of the address pointed to by the address parameter in the new linked list in response to the read request;

[0169] If the first timestamp is less than or equal to the second timestamp, in response to the read request, the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list are first read, and then the key-value pairs whose addresses are pointed to by the address parameters in the new linked list are read.

[0170] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0171] In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to the first operation range of the mapping release request and a second key-value pair corresponding to the second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; the address parameter in the second key-value pair does not point to the address of the second operation range;

[0172] The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0173] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0174] Determine a first operation range and a second operation range corresponding to the mapping release request;

[0175] Align and split the first operation range according to the cache page granularity value of the storage system to obtain a first key-value pair;

[0176] The second operation range is aligned and split according to a preset granularity value to obtain a second key-value pair; the preset granularity value is greater than the cache page granularity value.

[0177] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0178] Based on the volume corresponding to the mapping release request, obtain the offset and length of the mapping release request;

[0179] A first operating range and a second operating range are determined according to the offset and the length.

[0180] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0181] According to a preset writing rule, the second key-value pair and the first key-value pair are written into the linked list; the writing rule includes that the key-value pairs whose addresses are not pointed to by the address parameters are written before the key-value pairs whose addresses are pointed to by the address parameters.

[0182] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0183] When a write request is received, the write data corresponding to the write request is split into a third key-value pair; the address parameter in the third key-value pair points to the write address of the write data;

[0184] The third key-value pair is written into the linked list according to the writing rule to form a new linked list.

[0185] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0186] When the write-back operation is triggered, the key-value pairs in the new linked list are de-duplicated and merged to obtain a processed linked list;

[0187] Perform write-back operation based on the processed linked list.

[0188] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0189] When a read request is received, obtaining a first timestamp of the write-back operation and a second timestamp of the mapping release request;

[0190] If the first timestamp is greater than the second timestamp, reading the key-value pair of the address pointed to by the address parameter in the new linked list in response to the read request;

[0191] If the first timestamp is less than or equal to the second timestamp, in response to the read request, the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list are first read, and then the key-value pairs whose addresses are pointed to by the address parameters in the new linked list are read.

[0192] In one embodiment, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the following steps:

[0193] In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to the first operation range of the mapping release request and a second key-value pair corresponding to the second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; the address parameter in the second key-value pair does not point to the address of the second operation range;

[0194] The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

[0195] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0196] Determine a first operation range and a second operation range corresponding to the mapping release request;

[0197] Align and split the first operation range according to the cache page granularity value of the storage system to obtain a first key-value pair;

[0198] The second operation range is aligned and split according to a preset granularity value to obtain a second key-value pair; the preset granularity value is greater than the cache page granularity value.

[0199] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0200] Based on the volume corresponding to the mapping release request, obtain the offset and length of the mapping release request;

[0201] A first operating range and a second operating range are determined according to the offset and the length.

[0202] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0203] According to a preset writing rule, the second key-value pair and the first key-value pair are written into the linked list; the writing rule includes that the key-value pairs whose addresses are not pointed to by the address parameters are written before the key-value pairs whose addresses are pointed to by the address parameters.

[0204] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0205] When a write request is received, the write data corresponding to the write request is split into a third key-value pair; the address parameter in the third key-value pair points to the write address of the write data;

[0206] The third key-value pair is written into the linked list according to the writing rule to form a new linked list.

[0207] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0208] When the write-back operation is triggered, the key-value pairs in the new linked list are de-duplicated and merged to obtain a processed linked list;

[0209] Perform write-back operation based on the processed linked list.

[0210] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0211] When a read request is received, obtaining a first timestamp of the write-back operation and a second timestamp of the mapping release request;

[0212] If the first timestamp is greater than the second timestamp, reading the key-value pair of the address pointed to by the address parameter in the new linked list in response to the read request;

[0213] If the first timestamp is less than or equal to the second timestamp, in response to the read request, the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list are first read, and then the key-value pairs whose addresses are pointed to by the address parameters in the new linked list are read.

[0214] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0215] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0216] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the present application. It should be noted that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A request processing method, characterized in that: The method comprises: In the case of receiving a mapping release request, obtaining a first key-value pair corresponding to a first operation range of the mapping release request and a second key-value pair corresponding to a second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; and the address parameter in the second key-value pair does not point to the address of the second operation range; The second key-value pair and the first key-value pair are written into a preset linked list, and a write-back operation is triggered when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

2. The method according to claim 1, characterized in that The obtaining of a first key-value pair corresponding to the first operation range of the mapping release request and a second key-value pair corresponding to the second operation range of the mapping release request includes: Determining the first operating range and the second operating range corresponding to the mapping release request; Align and split the first operation range according to the cache page granularity value of the storage system to obtain the first key-value pair; The second operation range is aligned and split according to a preset granularity value to obtain the second key-value pair; the preset granularity value is greater than the cache page granularity value.

3. The method according to claim 2, characterized in that The determining the first operation range and the second operation range corresponding to the mapping release request includes: Based on the volume corresponding to the mapping release request, obtaining the offset and length of the mapping release request; The first operating range and the second operating range are determined according to the offset and the length.

4. The method according to any one of claims 1 to 3, characterized in that: The step of writing the second key-value pair and the first key-value pair into a preset linked list includes: The second key-value pair and the first key-value pair are written into the linked list according to a preset writing rule; the writing rule includes that the key-value pairs whose addresses are not pointed to by the address parameters are written before the key-value pairs whose addresses are pointed to by the address parameters.

5. The method according to claim 4, characterized in that The method further comprises: In the case of receiving a write request, splitting the write data corresponding to the write request into a third key-value pair; the address parameter in the third key-value pair points to the write address of the write data; The third key-value pair is written into the linked list according to the writing rule to form a new linked list.

6. The method according to claim 5, characterized in that The method further comprises: When the write-back operation is triggered, de-duplication and merging are performed on the key-value pairs in the new linked list to obtain a processed linked list; A write-back operation is performed based on the processed linked list.

7. The method according to claim 6, characterized in that The method further comprises: In case of receiving a read request, obtaining a first timestamp of the write-back operation and a second timestamp of the mapping release request; If the first timestamp is greater than the second timestamp, reading the key-value pair of the address pointed to by the address parameter in the new linked list in response to the read request; If the first timestamp is less than or equal to the second timestamp, in response to the read request, the key-value pairs whose addresses are not pointed to by the address parameters in the new linked list are first read, and then the key-value pairs whose addresses are pointed to by the address parameters in the new linked list are read.

8. A request processing device, characterized in that: The device comprises: A first acquisition module is used to, when receiving a mapping release request, acquire a first key-value pair corresponding to a first operation range of the mapping release request and a second key-value pair corresponding to a second operation range of the mapping release request; the address parameter in the first key-value pair points to the address of the first operation range; and the address parameter in the second key-value pair does not point to the address of the second operation range; A processing module is used to write the second key-value pair and the first key-value pair into a preset linked list, and trigger a write-back operation when a preset condition is met; the preset condition is that the length of the linked list reaches a preset length threshold.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

11. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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