Back contact solar cell and preparation method thereof
By preparing an insulating layer containing electrode grooves outside the carrier collection layer and preparing a second insulating layer outside the metal electrode, the complexity and consumption problems of screen printing and sintering processes in the prior art are solved, and simplification is achieved Improve the preparation process and aesthetics.
Patent Information
- Application Number
- CN202411911231.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2025-02-18
AI Technical Summary
The existing back contact solar cells have dual problems of screen printing and sintering processes during the preparation process, resulting in the metal electrodes being prone to lobes during welding, and the process is complicated and consumes a lot.
By preparing a first insulating layer including electrode grooves outside the carrier collection layer and preparing a second insulating layer outside the metal electrode and the first insulating layer, the pre-embedding of the metal electrode is achieved, and the screen printing and sintering process is avoided .
Save dual processes of screen printing and sintering, simplify the preparation process, reduce material consumption, and improve the appearance aesthetics of solar cells.
Smart Images
Figure CN119486335A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of solar cell manufacturing, and in particular to a back contact solar cell and a preparation method thereof. Background Art
[0002] In the existing back contact battery preparation process, the doping layer and the tunneling oxide structure are usually prepared first, and after the outermost passivation layer is prepared, the metal paste coated is sintered to obtain the outermost protruding metal electrode. Specifically, the metal paste is generally coated by screen printing. As the number of times the printing screen is used increases, the problem of broken grid and large paste consumption is prone to occur during the metal paste coating process, and the metal fine grid obtained by the sintering process is prone to cracking during the subsequent welding process. Summary of the invention
[0003] In view of this, an embodiment of the present invention provides a back-contact solar cell and a method for preparing the same. By preparing a first insulating layer including an electrode groove on the outside of the carrier collection layer, and preparing a second insulating layer on the outside of the metal electrode and the first insulating layer, a back-contact solar cell structure in which the metal electrode is pre-buried inside the insulating layer is obtained, so that the metal electrode can be directly connected to the carrier collection layer without the need for screen printing and sintering processes, saving the dual processes of screen printing and sintering in the prior art. At the same time, the second insulating layer provided on the outside of the metal electrode can encapsulate the metal electrode, protecting the metal electrode while improving the appearance of the solar cell.
[0004] In order to solve the above technical problems, the present invention provides the following technical solutions:
[0005] In a first aspect, the present invention provides a method for preparing a back-contact solar cell, comprising: step 1, preparing alternatingly arranged first carrier collection layers and second carrier collection layers on a first main surface of a silicon substrate, wherein the type of the first carrier collection layer and the type of the second carrier collection layer are opposite, and there is no electrical connection between the first carrier collection layer and the second carrier collection layer; step 2, preparing a first insulating layer on the outside of the first carrier collection layer and the second carrier collection layer, and preparing spaced electrode grooves on the first insulating layer, wherein each of the electrode grooves corresponds to the first carrier collection layer or the second carrier collection layer; step 3, forming metal electrodes in the electrode grooves so that the metal electrodes are stacked on the outside of the first carrier collection layer or the second carrier collection layer; step 4, preparing a second insulating layer on the outside of the metal electrode and the outside of the first insulating layer, so as to bury the metal electrode inside the second insulating layer.
[0006] Optionally, step 1 includes: step 11, preparing a first doping layer doped with a first element on a partial area of the first main surface of the silicon substrate, and preparing a second doping layer doped with a second element on an area of the first main surface where the first doping layer is not provided, to obtain a first area having the first doping layer and a second area having the second doping layer; step 12, preparing a tunneling oxide structure on the outside of the first doping layer and the second doping layer, and removing the tunneling oxide structure in the edge area of the second area close to the first doping layer, to form a first carrier collection layer including the first doping layer and the tunneling oxide structure, and a second carrier collection layer including the second doping layer and the tunneling oxide structure.
[0007] Optionally, the step 11 includes: step 111, preparing a first doping layer doped with a first doping element on the first main surface of the silicon substrate; step 112, removing the first doping layer corresponding to the second region, and preparing a protective layer on the outside of the remaining first doping layer; step 113, doping the first main surface with a second element to form the second doping layer in the second region using the protective layer, and removing the protective layer after the doping is completed.
[0008] Optionally, the depth of the electrode groove is 5 μm to 10 μm; and / or the width of the electrode groove is 16 μm to 26 μm.
[0009] Optionally, step 3 includes: using at least one of CVD deposition technology and ALD deposition technology to deposit a metal electrode in the electrode groove; and / or the material of the metal electrode includes at least one of the following: copper, titanium, nickel, silver, aluminum; and / or the size of the metal electrode is not larger than the size of the electrode groove.
[0010] Optionally, the step 12 includes: step 121, preparing a tunneling oxide layer and an intrinsic polysilicon layer by stacking them outside the first doping layer and the second doping layer to obtain the tunneling oxide structure; step 122, removing the tunneling oxide structure corresponding to the edge area by using a laser process.
[0011] In a second aspect, the present invention provides a back-contact solar cell, comprising: a silicon substrate, a first carrier collection layer and a second carrier collection layer alternately arranged on a first main surface of the silicon substrate, a first insulating layer located outside the second carrier collection layer and spaced close to the first carrier collection layer, and a second insulating layer arranged outside the first insulating layer; wherein the type of the first carrier collection layer is opposite to the type of the second carrier collection layer, and there is no electrical connection between the first carrier collection layer and the second carrier collection layer; an electrode groove is formed between each adjacent two first insulating layers, wherein each of the electrode grooves corresponds to the first carrier collection layer or the second carrier collection layer; a metal electrode stacked on the outside of the first carrier collection layer or the second carrier collection layer is also arranged in the electrode groove, and the second insulating layer is located outside the metal electrode to bury the metal electrode inside the second insulating layer.
[0012] The technical solution of the first aspect of the above invention has the following advantages or beneficial effects: by preparing a first insulating layer including an electrode groove on the outside of the carrier collection layer, and preparing a second insulating layer on the outside of the metal electrode and the first insulating layer, a back-contact solar cell structure in which the metal electrode is pre-buried inside the insulating layer is obtained, so that the metal electrode can be directly connected to the carrier collection layer without the need for screen printing and sintering processes, saving the dual processes of screen printing and sintering in the prior art. At the same time, the second insulating layer arranged on the outside of the metal electrode can encapsulate the metal electrode, which protects the metal electrode and improves the appearance of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The accompanying drawings are used to better understand the present invention and do not constitute an improper limitation of the present invention.
[0014] Figure 1 is a schematic flow chart of a method for preparing a back-contact solar cell according to an embodiment of the present invention;
[0015] Figure 2 is a schematic diagram of a process for preparing a first carrier collection layer and a second carrier collection layer according to an embodiment of the present invention;
[0016] Figure 3 is a schematic diagram of the cross-sectional structure of the silicon substrate prepared in step S201 according to an embodiment of the present invention;
[0017] Figure 4 is a schematic diagram of the cross-sectional structure of the silicon substrate prepared in step S202 according to an embodiment of the present invention;
[0018] Figure 5is a schematic diagram of a process for preparing a first doping layer and a second doping layer in step S201 according to an embodiment of the present invention;
[0019] Figure 6 is a schematic diagram of the cross-sectional structure of a silicon substrate prepared in step S501 according to an embodiment of the present invention;
[0020] Figure 7 is a schematic diagram of the cross-sectional structure of the silicon substrate prepared in step S502 according to an embodiment of the present invention;
[0021] Figure 8 is a schematic diagram of the cross-sectional structure of a silicon substrate obtained after the second doping layer 31 is prepared by using the protective layer 7 in step S503 according to an embodiment of the present invention;
[0022] Fig. 9 is a schematic diagram of a process for preparing a protective layer in step S502 according to an embodiment of the present invention;
[0023] Fig.10 is a schematic diagram of a process for preparing a tunneling oxide structure in step S202 according to an embodiment of the present invention;
[0024] Fig.11 is a schematic diagram of the cross-sectional structure of a silicon substrate prepared in step S1001 according to an embodiment of the present invention;
[0025] Fig.12 is a schematic diagram of the cross-sectional structure of the silicon substrate prepared in step S1002 according to an embodiment of the present invention;
[0026] Fig.13 is a schematic diagram of the cross-sectional structure of a silicon substrate obtained after preparing the first insulating layer in step S102 according to an embodiment of the present invention;
[0027] Fig.14 is a schematic diagram of a cross-sectional structure of a silicon substrate obtained after preparing spaced electrode grooves in step S102 according to an embodiment of the present invention;
[0028] Fig.15 4 is a schematic diagram of the cross-sectional structure of a back-contact solar cell according to an embodiment of the present invention.
[0029] The reference numerals are as follows:
[0030] 1-silicon substrate; 11-first region; 12-second region; 121-edge region; 2-first carrier collection layer; 21-first doping layer; 3-second carrier collection layer; 31-second doping layer; 4-electrode groove; 5-metal electrode; 6-tunneling oxide structure; 61-tunneling oxide layer; 62-intrinsic polysilicon layer; 7-protective layer; 71-passivation layer; 72-photoresist layer. DETAILED DESCRIPTION
[0031] A solar cell is a photoelectric semiconductor sheet that uses sunlight to generate electricity directly. It is also called a "solar chip" or "photovoltaic cell". As long as it is illuminated by light that meets certain illumination conditions, it can instantly output voltage and generate current in the presence of a circuit. In physics, it is called solar photovoltaic (PV), or photovoltaic for short. In order to conveniently and clearly describe the method for preparing a solar cell and the solar cell of the present invention, the following exemplary embodiments of the present invention are described in conjunction with the accompanying drawings, which include various details of the embodiments of the present invention to facilitate understanding, and they should be considered as merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.
[0032] In one embodiment of the present invention, Figure 1 As shown, this embodiment provides a method for preparing a solar cell, and the preparation method may include the following steps:
[0033] Step S101, preparing a first carrier collection layer 2 and a second carrier collection layer 3 arranged alternately on a first main surface of a silicon substrate 1, wherein the type of the first carrier collection layer 2 and the type of the second carrier collection layer 3 are opposite, and there is no electrical connection between the first carrier collection layer 2 and the second carrier collection layer 3;
[0034] Step S102, preparing a first insulating layer outside the first carrier collection layer 2 and the second carrier collection layer 3, and preparing spaced electrode grooves 4 on the first insulating layer, wherein each electrode groove 4 corresponds to the first carrier collection layer 2 or the second carrier collection layer 3;
[0035] Step S103, forming a metal electrode 5 in the electrode groove 4, so that the metal electrode 5 is stacked outside the first carrier collection layer 2 or the second carrier collection layer 3;
[0036] Step S104 , preparing a second insulating layer outside the metal electrode 5 and outside the first insulating layer, so as to bury the metal electrode 5 inside the second insulating layer.
[0037] In the process of preparing solar cells in the prior art, a passivation layer is usually prepared directly on the outside of the prepared first carrier collection layer 2 and the second carrier collection layer 3, and then a metal slurry is applied on the passivation layer at intervals, and the metal slurry is sintered so that the metal slurry penetrates the passivation layer and is connected to the first carrier collection layer 2 and the second carrier collection layer 3 respectively, so as to realize the extraction of current. Among them, when applying the metal slurry, it is inevitable to use a silk screen or a screen. As the number of uses increases, more and more metal slurry will adhere to the silk screen or the screen, so that during the coating process, more metal slurry needs to be consumed to achieve effective coating, and there is a risk of grid breakage. Therefore, the embodiment of the present invention sets an electrode groove 4 in step S103, so that the metal electrode 5 located in the electrode groove 4 can be directly connected to the first carrier collection layer 2 or the second carrier collection layer 3, and the process of applying the metal slurry and sintering in the prior art is no longer required, which not only simplifies the preparation process, but also saves the consumption of the metal slurry during the coating process. In addition, the embodiment of the present invention prepares a second insulating layer on the outside of the metal electrode 5 and the outside of the first insulating layer in step S104, which can further improve the overall aesthetics of the solar cell compared to the prior art setting of exposing the metal electrode 5. Moreover, since the metal electrode 5 in the embodiment of the present invention is not in direct contact with the outside, other metals with certain activity but cheaper (such as copper) other than silver can be selected, which greatly reduces the overall cost of the solar cell.
[0038] The preparation method of the embodiment of the present invention is specifically described below:
[0039] In the process of preparing the first carrier collection layer 2 and the second carrier collection layer 3 in step S101, in an optional embodiment, as Figure 2 As shown, including:
[0040] Step S201, preparing a first doping layer 21 doped with a first element on a partial area of the first main surface of the silicon substrate 1, and preparing a second doping layer 31 doped with a second element on an area of the first main surface where the first doping layer 21 is not provided, to obtain a first area 11 having the first doping layer 21 and a second area 12 having the second doping layer 31;
[0041] In step S202, a tunneling oxide structure 6 is prepared outside the first doping layer 21 and the second doping layer 31, and the tunneling oxide structure 6 in the edge region 121 of the second region 12 close to the first doping layer 21 is removed to form a first carrier collection layer 2 including the first doping layer 21 and the tunneling oxide structure 6, and a second carrier collection layer 3 including the second doping layer 31 and the tunneling oxide structure 6.
[0042] For example, the cross-sectional structure of the silicon substrate prepared in step S201 is as follows: Figure 3As shown, the cross-sectional structure of the silicon substrate obtained in step S202 is as follows Figure 4 As shown. Figure 3 and Figure 4 It can be seen that the first doping layer 21 is stacked and prepared on the back of the silicon substrate 1, and the second doping layer 31 is formed on the surface of the silicon substrate 1 by doping the second element on the back of the silicon substrate 1. Specifically, when the silicon substrate 1 is an n-type silicon substrate, the first element can be boron, and the second element can be phosphorus.
[0043] For step S201, in a further optional embodiment, the first doping layer 21 may be prepared first and then the second doping layer 31 may be prepared. Figure 5 As shown, including:
[0044] Step S501, preparing a first doping layer 21 doped with a first doping element on a first main surface of a silicon substrate 1;
[0045] Step S502, removing the first doping layer 21 corresponding to the second region 12, and preparing a protective layer 7 outside the remaining first doping layer 21;
[0046] Step S503 , doping the first main surface with a second element to form a second doping layer 31 in the second region 12 using the protective layer 7 , and removing the protective layer 7 after the doping is completed.
[0047] For example, Figures 6 to 8 The cross-sectional structure diagram of the silicon substrate obtained in steps S501 to S503 of the embodiment of the present invention is shown, wherein: Figure 6 FIG. 4 shows a schematic diagram of the cross-sectional structure of the silicon substrate obtained in step S501. Figure 7 FIG. 4 shows a schematic diagram of the cross-sectional structure of the silicon substrate obtained in step S502. Figure 8 FIG. 4 shows a schematic cross-sectional structure diagram of the silicon substrate obtained after the second doping layer 31 is prepared using the protective layer 7 in step S503. Figures 6 to 8 It can be seen that the embodiment of the present invention uses the protective layer 7 on the outside of the first region 11 to protect the pre-prepared first doping layer 21, thereby preventing the second element from affecting the first doping layer 21 during the doping process, thereby achieving the process of preparing the first doping layer 21 and the second doping layer 31 in different regions. It can be understood that after removing the protective layer 7 in step S503, Figure 3 As shown in the schematic diagram of the cross-sectional structure of the silicon substrate, in an optional embodiment, the protective layer 7 can be removed by using a laser process.
[0048] Specifically, the protective layer 7 can be divided into a multi-layer structure stacked in layers. Since the protective layer 7 does not exist in the final solar cell structure, it is only used to protect the first doping layer 21 when preparing the second doping layer 31. Therefore, the structure of the protective layer 7 also needs to facilitate the subsequent removal process. In a further optional embodiment, the process of preparing the protective layer 7 in step S502 is as follows: Fig. 9 As shown, including:
[0049] Step S901, using laser to remove the first doping layer 21 corresponding to the second region 12, and preparing a passivation layer 71 outside the second region 12 and the remaining first doping layer 21;
[0050] Step S902, coating a photoresist layer 72 on the outside of the passivation layer 71, and performing interval exposure on the photoresist layer 72;
[0051] Step S903 , removing the portion of the photoresist layer 72 corresponding to the first region 11 and the portion of the passivation layer 71 corresponding to the first region 11 , respectively, to obtain the protection layer 7 .
[0052] The passivation layer 71 and the photoresist layer 72 are already disposed at Figure 8 It is marked in the figure that in the embodiment of the present invention, the thickness of the passivation layer 71 is relatively thin, which is easier to remove on the one hand, and can protect the photoresist layer 72 from affecting the first doping layer 21 during the polymerization reaction on the other hand. In an optional embodiment, the passivation layer 71 is made of silicon dioxide, and the thickness is between 0.5nm and 1.5nm, preferably 1nm.
[0053] For the photoresist layer 72, according to the different types of photoresists, it is divided into positive photoresist and negative photoresist, and the reaction to light is also different. For example, when the photoresist is a negative photoresist, by exposing the first area 11, the photoresist in the first area 11 undergoes a polymerization reaction to become a solid and insoluble photoresist layer 72, and for the photoresist in the second area 12, it only needs to be cleaned with a developer to remove the photoresist solution in the second area 12 that has not undergone a polymerization reaction. Compared with the process of opening the film by the laser process commonly used in the prior art, the embodiment of the present invention uses the photoresist layer 72 not only to achieve the function of preparing the first carrier collection layer 2 and the second carrier collection layer 3 in different regions, but also to avoid the laser damage to the silicon substrate caused by the laser process, and the removal process is simple, and only the cured photoresist layer 72 needs to be immersed in the degumming solution to achieve quick and effective removal.
[0054] It can be seen that through the above Figures 2 to 9The embodiment of the present invention realizes the preparation of the alternatingly arranged first carrier collection layer 2 and the second carrier collection layer 3 on the first main surface of the silicon substrate 1 by using the protective layer 7 including the photoresist layer 72. It not only does not require the laser film opening process in the prior art, but also avoids laser damage to the silicon substrate, and the process flow is simple.
[0055] The tunneling oxide structure 6 in step S202 may also include a multi-layer structure arranged in a stacked manner. In an optional embodiment, the specific process of step S202 is as follows: Fig.10 As shown, including:
[0056] Step S1001, preparing a tunneling oxide layer 61 and an intrinsic polysilicon layer 62 by stacking outside the first doping layer 21 and the second doping layer 31 to obtain a tunneling oxide structure 6;
[0057] Step S1002 , using a laser process to remove the tunneling oxide structure 6 corresponding to the edge region 121 .
[0058] It can be seen that in the embodiment of the present invention, the tunneling oxide structure 6 is composed of a stacked tunneling oxide layer 61 and an intrinsic polysilicon layer 62, wherein the tunneling oxide layer 61 is used to separate electrons and holes, and the thickness can be 1nm~2nm. Among them, an overly thick tunneling oxide layer 61 will hinder the tunneling transmission of most carriers, resulting in a decrease in the open circuit voltage (OCV) of the battery, thereby affecting the energy conversion efficiency of the battery. At the same time, uneven thickness or excessive thickness will cause problems in the battery during use, affecting its long-term stability. The intrinsic polysilicon layer 62 is responsible for transmitting electrons or holes, and through the selection of its doping concentration and crystal structure, efficient carrier transmission is achieved; at the same time, carrier recombination is reduced, the open circuit voltage and fill factor of the battery are improved, and the overall photoelectric conversion efficiency is also helped to improve.
[0059] For example, Figure 11 to Figure 12 FIG. 2 shows a schematic diagram of the cross-sectional structure of the silicon substrate prepared in the above step S1001 and step S1002. Fig.11 As shown, a tunneling oxide layer 61 can be prepared on the back of the silicon substrate 1 by a CVD deposition method in an environment where oxygen is introduced, that is, a tunneling oxide layer 61 is simultaneously formed on the outside of the first doping layer 21 and the second doping layer 31. Then, in an environment where SiH4 is introduced, an intrinsic polysilicon layer 62 is deposited on the outside of the tunneling oxide layer 61, thereby obtaining a tunneling oxide structure 6 located outside the first doping layer 21 and the second doping layer 31. Fig.12As shown, in order to ensure that the current between the first carrier collection layer 2 and the second carrier collection layer 3 does not have a conduction short circuit problem, in the second area 12 at the recessed position, it is necessary to groove the edge area 121 close to the first area 11 on both sides to ensure the spacing between the first carrier collection layer 2 and the second carrier collection layer 3. Therefore, in step S1002 of the embodiment of the present invention, it is necessary to use a laser process to remove the tunneling oxide structure 6 corresponding to the edge area 121.
[0060] For step S102, since the tunneling oxide structure 6 corresponding to the edge region 121 is actually removed in step S1002, in an optional embodiment, the cross-sectional structure of the silicon substrate obtained after the first insulating layer is prepared in step S102 is as follows: Fig.13 As shown, the cross-sectional structure obtained after preparing the spaced electrode grooves 4 on the first insulating layer is as shown Fig.14 As shown. Fig.13 and Fig.14 It can be seen that only the first insulating layer in the edge region 121 is actually retained, and its function is to isolate the electron transmission between the first carrier collection layer 2 and the second carrier collection layer 3, and to provide a preparation space for the metal electrode 5 through the electrode grooves 4 set in the first region 11 and the second region 12. In an optional embodiment, the material of the first insulating layer is silicon nitride, and the silicon nitride is removed at intervals by laser technology to obtain the spaced electrode grooves 4.
[0061] For step S103, in an optional embodiment of the present invention, at least one of CVD deposition technology and ALD deposition technology can be used to deposit metal electrodes 5 in the electrode grooves 4. The advantage of this preparation method is that, compared with the use of precious metal silver in the prior art, the embodiment of the present invention can grow cheap metals as metal electrodes 5 in the electrode grooves 4 by deposition, such as depositing copper ions. In the sintering process of the prior art, it is impossible to sinter copper ions with high activity, and only inert metals can be sintered.
[0062] In an optional embodiment, the depth of the electrode groove 4 is 5μm~10μm, for example, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, etc.; as for the width of the electrode groove 4, in another optional embodiment, the width of the electrode groove 4 is 16μm~26μm, for example, 16μm, 20μm, 24μm, 26μm, etc.
[0063] It is understandable that the growth of the metal electrode 5 is limited by the width and depth of the electrode groove 4, so in a further optional embodiment, the size of the metal electrode 5 is not greater than the size of the electrode groove 4. In the actual preparation process, the metal ions are not necessarily completely deposited in the electrode groove 4, so the thickness of the metal electrode 5 may be different from that of the electrode groove 4. In a further optional embodiment, the metal electrode 5 in the present invention fills the electrode groove 4, that is, the thickness of the metal electrode 5 is 5μm~10μm, such as 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, etc. The width of its growth is often limited by the width of the electrode groove 4, so in an optional embodiment, the width of the metal electrode 5 is also 16μm~26μm, such as 16μm, 20μm, 24μm, 26μm, etc.
[0064] In addition, the metal electrode 5 in the electrode groove 4 can only correspond to the first carrier collection layer 2 or the second carrier collection layer 3 , and cannot be arranged in the intersection area between the first carrier collection layer 2 and the second carrier collection layer 3 .
[0065] Below Fig.15 The cross-sectional structure of the silicon substrate obtained in step S104 is described by taking the example of FIG. Fig.15 As shown, the second insulating layer is arranged on the outside of the first insulating layer and the metal electrode 5, completely covering the back of the solar cell, thereby achieving the effect of burying the metal electrode 5 and improving the appearance of the solar cell. In an optional embodiment, the second insulating layer can be made of the same material as the first insulating layer, so that after the second insulating layer is prepared, it can be combined with the first insulating layer to form a complete insulating layer, thereby encapsulating the metal electrode 5 and ensuring the sealing of the metal electrode 5.
[0066] It should be noted that, in order to facilitate the subsequent connection of the metal electrode 5, in a further optional embodiment, the second insulating layer may be grooved to obtain an electrode lead-out groove, and a metal slurry may be applied to the electrode lead-out groove to use the metal slurry to lead out the current in the metal electrode 5. Among them, as for the opening position of the electrode lead-out groove, as long as it is ensured to be set corresponding to each metal electrode 5, the shape of the opening of the electrode lead-out groove may be circular, elliptical, rectangular, trapezoidal, etc., and the present invention does not make specific limitations on this.
[0067] In summary, the method for preparing a solar cell provided by an embodiment of the present invention obtains a back-contact solar cell structure in which the metal electrode is pre-buried inside the insulating layer by preparing a first insulating layer including an electrode groove on the outside of the carrier collection layer, and preparing a second insulating layer on the outside of the metal electrode and the first insulating layer, so that the metal electrode can be directly connected to the carrier collection layer without the need for screen printing and sintering processes, thus saving the dual processes of screen printing and sintering in the prior art. At the same time, the second insulating layer provided on the outside of the metal electrode can encapsulate the metal electrode, thereby protecting the metal electrode and improving the appearance of the solar cell.
[0068] Likewise Fig.15 The structure of the back contact solar cell provided by the embodiment of the present invention is specifically described by taking the example of Fig.15 As shown, the back-contact solar cell provided by the present invention includes: a silicon substrate 1, a first carrier collection layer 2 and a second carrier collection layer 3 alternately arranged on the first main surface of the silicon substrate, a first insulating layer located outside the second carrier collection layer 3 and spaced apart near the first carrier collection layer 2, and a second insulating layer arranged outside the first insulating layer; wherein the type of the first carrier collection layer 2 and the type of the second carrier collection layer 3 are opposite, and there is no electrical connection between the first carrier collection layer 2 and the second carrier collection layer 3; an electrode groove 4 is formed between each two adjacent first insulating layers, wherein each electrode groove 4 corresponds to the first carrier collection layer 2 or the second carrier collection layer 3; a metal electrode 5 stacked on the outside of the first carrier collection layer 2 or the second carrier collection layer 3 is also arranged in the electrode groove 4, and the second insulating layer is located outside the metal electrode 5 to bury the metal electrode 5 inside the second insulating layer.
[0069] Among them, the first carrier collection layer 2 and the second carrier collection layer 3 can both be stacked multilayer structures, that is, in an optional embodiment, the first carrier collection layer 2 includes a first doping layer 21 and a tunneling oxide structure 6 that are stacked; the second carrier collection layer 3 includes a second doping layer 31 and a tunneling oxide structure 6 that are stacked, and the tunneling oxide structure 6 does not cover the edge area 121 of the second doping layer 31 close to the first doping layer 21, and the first insulating layer is arranged in the edge area 121.
[0070] Furthermore, for the tunneling oxide structure 6, in an optional embodiment, it includes a stacked tunneling oxide layer 61 and an intrinsic polysilicon layer 62, wherein the thickness of the tunneling oxide layer 61 is 1nm~2nm; the thickness of the intrinsic polysilicon layer 62 is 110nm~150nm, for example, 110nm, 120nm, 130nm, 140nm, 150nm, etc.
[0071] In a further optional embodiment, the width of the edge region 121 is 10 nm to 100 nm, for example, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 70 nm, 80 nm, 100 nm, etc.
[0072] Regarding the selection of materials for the first insulating layer and the second insulating layer, in an optional embodiment, the first insulating layer includes at least one of the following materials: silicon nitride or silicon dioxide; the second insulating layer includes at least one of the following materials: silicon nitride or silicon dioxide.
[0073] In addition, in order to facilitate the connection between the metal electrode 5 and an external power source or a wire, an electrode lead-out groove corresponding to the metal electrode 5 is also provided on the second insulating layer.
[0074] In summary, the back-contact solar cell provided by the embodiment of the present invention obtains a back-contact solar cell structure in which the metal electrode is pre-buried inside the insulating layer by preparing a first insulating layer including an electrode groove on the outside of the carrier collection layer and preparing a second insulating layer on the outside of the metal electrode and the first insulating layer, so that the metal electrode can be directly connected to the carrier collection layer without the need for screen printing and sintering processes, thus saving the dual processes of screen printing and sintering in the prior art. At the same time, the second insulating layer provided on the outside of the metal electrode can encapsulate the metal electrode, thereby protecting the metal electrode and improving the appearance of the solar cell.
[0075] The introduction provided in the above steps is only used to help understand the structure, method and core idea of the present invention. For ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also belong to the scope of protection of the claims of the present invention.
Claims
1. A method for preparing a back contact solar cell, characterized in that: include: Step 1, preparing a first carrier collection layer (2) and a second carrier collection layer (3) arranged alternately on a first main surface of a silicon substrate (1), wherein the type of the first carrier collection layer (2) and the type of the second carrier collection layer (3) are opposite, and there is no electrical connection between the first carrier collection layer (2) and the second carrier collection layer (3); Step 2, preparing a first insulating layer outside the first carrier collection layer (2) and the second carrier collection layer (3), and preparing spaced electrode grooves (4) on the first insulating layer, wherein each of the electrode grooves (4) corresponds to the first carrier collection layer (2) or the second carrier collection layer (3); Step 3, forming a metal electrode (5) in the electrode groove (4), so that the metal electrode (5) is stacked and arranged outside the first carrier collection layer (2) or the second carrier collection layer (3); Step 4: preparing a second insulating layer on the outside of the metal electrode (5) and on the outside of the first insulating layer, so as to bury the metal electrode (5) inside the second insulating layer.
2. The preparation method according to claim 1, characterized in that: The step 1 comprises: Step 11, preparing a first doping layer (21) doped with a first element on a partial area of the first main surface of the silicon substrate (1), and preparing a second doping layer (31) doped with a second element on an area of the first main surface where the first doping layer (21) is not provided, to obtain a first area (11) having the first doping layer (21) and a second area (12) having the second doping layer (31); Step 12, preparing a tunneling oxide structure (6) outside the first doping layer (21) and the second doping layer (31), and removing the tunneling oxide structure (6) in the second region (12) close to the edge region (121) of the first doping layer (21), to form a first carrier collection layer (2) including the first doping layer (21) and the tunneling oxide structure (6), and a second carrier collection layer (3) including the second doping layer (31) and the tunneling oxide structure (6).
3. The preparation method according to claim 2, characterized in that: The step 11 comprises: Step 111, preparing a first doping layer (21) doped with a first doping element on a first main surface of the silicon substrate (1); Step 112, removing the first doping layer (21) corresponding to the second region (12), and preparing a protective layer (7) outside the remaining first doping layer (21); Step 113, doping the first main surface with a second element to form the second doping layer (31) in the second region (12) using the protective layer (7), and removing the protective layer (7) after the doping is completed.
4. The preparation method according to claim 1, characterized in that: The depth of the electrode groove (4) is 5 μm to 10 μm; and / or, The width of the electrode groove (4) is 16 μm to 26 μm.
5. The preparation method according to claim 1, characterized in that: The step 3 comprises: using at least one of a CVD deposition technique and an ALD deposition technique to deposit a metal electrode (5) in the electrode groove (4); and / or, The material of the metal electrode (5) includes at least one of the following: copper, titanium, nickel, silver, and aluminum; and / or, The size of the metal electrode (5) is no larger than the size of the electrode groove (4).
6. The preparation method according to claim 2, characterized in that: The step 12 comprises: Step 121, preparing a tunneling oxide layer (61) and an intrinsic polysilicon layer (62) by stacking them outside the first doped layer (21) and the second doped layer (31) to obtain the tunneling oxide structure (6); Step 122: using a laser process to remove the tunneling oxide structure (6) corresponding to the edge region (121).
7. A back contact solar cell, characterized in that: include: A silicon substrate (1), a first carrier collection layer (2) and a second carrier collection layer (3) alternately arranged on a first main surface of the silicon substrate, a first insulating layer located outside the second carrier collection layer (3) and spaced apart from the first carrier collection layer (2), and a second insulating layer located outside the first insulating layer; The type of the first carrier collection layer (2) and the type of the second carrier collection layer (3) are opposite, and there is no electrical connection between the first carrier collection layer (2) and the second carrier collection layer (3); An electrode groove (4) is formed between every two adjacent first insulating layers, wherein each of the electrode grooves (4) corresponds to the first carrier collection layer (2) or the second carrier collection layer (3); A metal electrode (5) is also provided in the electrode groove (4) and is stacked on the outside of the first carrier collection layer (2) or the second carrier collection layer (3); the second insulating layer is located on the outside of the metal electrode (5) so that the metal electrode (5) is buried inside the second insulating layer.
8. The back contact solar cell according to claim 7, characterized in that: The first carrier collection layer (2) comprises a first doping layer (21) and a tunneling oxide structure (6) which are stacked; The second carrier collection layer (3) comprises a second doped layer (31) and a tunneling oxide structure (6) which are stacked, and the tunneling oxide structure (6) does not cover an edge region (121) of the second doped layer (31) close to the first doped layer (21), and the first insulating layer is arranged in the edge region (121).
9. The back contact solar cell according to claim 8, characterized in that: The width of the edge region (121) is 10 nm to 100 nm; and / or, The tunneling oxide structure (6) comprises a tunneling oxide layer (61) and an intrinsic polysilicon layer (62) which are stacked.
10. The back contact solar cell according to any one of claims 7 to 9, characterized in that: The first insulating layer comprises at least one of the following materials: silicon nitride or silicon dioxide; and / or, The second insulating layer comprises at least one of the following materials: silicon nitride or silicon dioxide; and / or, An electrode lead-out groove corresponding to the metal electrode (5) is also provided on the second insulating layer.