An apparatus and method for dynamic control of dead time of a single photon detector

By dynamically adjusting the dead time of the single-photon detector by sampling the avalanche signal amplitude, the problem of balancing the afterpulse probability and the maximum count rate in the dead time setting is solved, and the maximum count rate is improved under low afterpulse probability.

CN119573898BActive Publication Date: 2026-04-14HEFEI INSTITUTE OF PHYSICAL SCIENCE CHINESE ACADEMY OF SCIENCES +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HEFEI INSTITUTE OF PHYSICAL SCIENCE CHINESE ACADEMY OF SCIENCES
Filing Date
2024-12-02
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

The dead time setting of single-photon detectors makes it difficult to increase the maximum count rate while reducing the afterpulse probability, and the existing technology uses a fixed dead time, which limits performance.

Method used

By sampling the amplitude of the avalanche signal and dynamically adjusting the length of the dead time, the dead time of the detection mission can be set according to the intensity of the avalanche carriers, thereby achieving the maximum count rate improvement under low afterpulse probability.

Benefits of technology

While reducing the afterpulse probability, dynamically adjusting the dead time optimizes the maximum count rate of the single-photon detector, thereby improving the dynamic range and performance of the system.

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Abstract

The application discloses a kind of single-photon detector dead time dynamic control device and method, in the device, drive circuit, for after input signal amplification is loaded to avalanche photodiode cathode;Avalanche extraction amplification circuit is used to filter and amplify first avalanche analog signal, and output second avalanche analog signal;Multi-amplitude discrimination circuit is used to discriminate the amplitude of second avalanche analog signal, and respectively output first avalanche digital signal to dead time processing module, amplitude data to dead time control module;Dead time control module sets signal to dead time processing module to output dead time;Dead time processing module processes first avalanche digital signal according to dead time setting signal and then outputs second avalanche digital signal.The application can dynamically adjust the setting of dead time according to the size of avalanche current amplitude in the detection process, and can improve the maximum count rate under the condition of low post-pulse probability.
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Description

Technical Field

[0001] This invention belongs to the field of quantum communication and weak light detection, specifically relating to a device and method for dynamic control of the dead time of a single-photon detector. Background Technology

[0002] A single-photon detector (SPD), based on the photoelectric effect of an avalanche photodiode, is a highly sensitive detector capable of detecting only a single photon even under extremely weak light signals. SPDs are one of the key devices for realizing quantum communication; in quantum computing, they are used to monitor and manipulate the state of qubits, enabling crucial tasks such as quantum gate operations; in lidar, they can significantly improve sensitivity and detection range; in the biomedical field, SPDs can be used for bioluminescence imaging, cell metabolism monitoring, and more; and they have important applications in optical measurement.

[0003] The dead time of a single-photon detector refers to the time required for the detector to recover to the state of receiving another photon after receiving one. The afterpulse probability, on the other hand, refers to the probability of secondary or multiple detection signals triggered by previous photon events after the single-photon detector has recovered. These two are closely related. Dead time, a performance indicator of the dynamic range of a single-photon detector system, is defined as the shortest interval between two adjacent detection events. The length of the dead time directly affects the afterpulse probability. A longer dead time helps the single-photon detector recover fully and shields secondary or multiple detection signals, thus reducing the afterpulse probability, but it limits the maximum count rate. Conversely, a shorter dead time may cause the single-photon detector to retain the influence of previous photon events during the recovery process, thus increasing the afterpulse probability. Therefore, when setting the dead time, a trade-off between the afterpulse probability and the maximum count rate is necessary to meet the requirements of specific application scenarios. Summary of the Invention

[0004] This invention discloses a device and method for dynamic control of the dead time of a single-photon detector. It adopts sampling and judgment of the avalanche signal amplitude, that is, to obtain the intensity of the avalanche carriers at each avalanche, and sets the length of the dead time according to the intensity. In order to obtain a low afterpulse probability, the stronger the intensity, the longer the dead time is set, and vice versa. In this way, the length of the dead time can be optimized under the condition of low afterpulse probability, thereby improving the value of the maximum count rate.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] A device for dynamic control of the dead time of a single-photon detector, the device comprising a driving circuit, a bias voltage source, a quenching resistor, an avalanche photodiode, a 50-ohm resistor, an avalanche extraction amplification circuit, a multi-amplitude discrimination circuit, a dead time control module, and a dead time processing module, wherein...

[0007] The driving circuit is used to amplify the input signal and apply it to the cathode of the avalanche photodiode.

[0008] The bias voltage source is connected to the cathode of the avalanche photodiode via a quenching resistor to provide bias voltage for the avalanche photodiode.

[0009] The 50-ohm resistor is connected to the anode of the avalanche photodiode and is used to perform impedance matching on the first avalanche analog signal output by the avalanche photodiode.

[0010] The avalanche extraction and amplification circuit is used to filter and amplify the first avalanche simulation signal and output the second avalanche simulation signal.

[0011] The multi-amplitude discrimination circuit is used to discriminate the amplitude of the second avalanche analog signal and output the first avalanche digital signal dead time processing module and the amplitude data dead time control module respectively.

[0012] The dead time control module receives and processes amplitude data, sets the dead time setting signal for this detection mission based on the intensity of avalanche carriers, and outputs the dead time setting signal to the dead time processing module.

[0013] The dead time processing module processes the first avalanche digital signal according to the dead time setting signal and then outputs the second avalanche digital signal.

[0014] Furthermore, the quenching resistor is used to quench the avalanche photodiode by voltage division after the avalanche current is generated, so that it returns to its initial detection state.

[0015] Furthermore, the dead time setting signal includes the length of the dead time.

[0016] Furthermore, the multi-amplitude discrimination circuit includes a power divider, a high-speed comparator, and a high-speed analog-to-digital converter. The power divider splits the second avalanche analog signal into two parts, which are then output to the high-speed comparator and the high-speed analog-to-digital converter, respectively. The high-speed comparator discriminates the second avalanche analog signal to determine whether an avalanche signal has been generated. The high-speed analog-to-digital converter samples the second avalanche analog signal to obtain amplitude data.

[0017] Furthermore, the multi-amplitude discrimination circuit includes a power divider and n high-speed comparators. The power divider splits the second avalanche analog signal into n parts, which are then output to the n high-speed comparators. The n high-speed comparators correspond to n discrimination levels. The first high-speed comparator outputs a first avalanche digital signal. When the generated second avalanche analog signal is higher than the discrimination level, the first avalanche digital signal is output as a high level; when it is lower than the discrimination level, the first avalanche digital signal is output as a low level. The dead-time control module determines the amplitude data of the first avalanche digital signal based on the output levels of the n high-speed comparators.

[0018] Furthermore, the dead time control module includes a delay circuit, a D flip-flop, a digital potentiometer, and a capacitor. The delay circuit is used to delay the first avalanche digital signal, and the delay time is not shorter than the time required for the dead time setting. The first avalanche digital signal after the delay is input to the clock input interface of the D flip-flop. The D flip-flop is used to receive the first avalanche digital signal and output the second avalanche digital signal. The digital potentiometer and the capacitor are connected in series to realize the dead time setting and the delay of the clear terminal of the D flip-flop.

[0019] Furthermore, the dead time control module includes a first delay circuit, a D flip-flop, and a second delay circuit. The first delay circuit delays the first avalanche digital signal for a time not shorter than the time required for the dead time setting. The delayed first avalanche digital signal is then input to the clock input interface of the D flip-flop. The D flip-flop receives the first avalanche digital signal and outputs the second avalanche digital signal. The second delay circuit is used to set the dead time and delay the reset input of the D flip-flop.

[0020] On the other hand, the present invention provides a method for dynamic control of the dead time of a single-photon detector, the method comprising:

[0021] The input signal is amplified by the driver circuit and then applied to the avalanche photodiode;

[0022] The avalanche photodiode obtains a bias voltage through a quenching resistor, generates an avalanche current signal, and then uses a 50-ohm resistor to match and convert it into the first avalanche analog signal.

[0023] The first avalanche simulation signal is extracted and amplified by the avalanche extraction and amplification circuit, and the second avalanche simulation signal is output.

[0024] The multi-amplitude discrimination circuit performs amplitude discrimination on the second avalanche analog signal and transmits the output first avalanche digital signal to the dead time processing module and the amplitude data to the dead time control module.

[0025] The dead time control module sets the dead time after this avalanche based on the amplitude data;

[0026] The dead time processing module receives the first avalanche digital signal and outputs the second avalanche digital signal according to the set dead time.

[0027] The beneficial effects of this invention are as follows:

[0028] Considering that a large number of avalanche carriers will result in a large number of carriers remaining in the multiplication layer traps, the probability of these carriers being released and causing a post-pulse will increase. However, the number of carriers in a single avalanche is random. This invention sets the length of the dead time based on the amplitude of the avalanche current signal, thus solving the problem of limiting the maximum count rate by using a fixed dead time to suppress the probability of post-pulse. By dynamically adjusting the dead time, the maximum count rate is improved under low post-pulse probability conditions. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of a device for dynamic control of the dead time of a single-photon detector according to the present invention.

[0030] Figure 2 This is a schematic diagram of the multi-amplitude discrimination circuit structure of the present invention;

[0031] Figure 3 This is another schematic diagram of the multi-amplitude discrimination circuit structure of the present invention;

[0032] Figure 4 This is a schematic diagram of the dead time control module structure of the present invention;

[0033] Figure 5 This is another schematic diagram of the dead time control module structure of the present invention;

[0034] Figure 6 This is a flowchart of a method for dynamic control of the dead time of a single-photon detector according to the present invention. Detailed Implementation

[0035] The present invention will now be clearly and completely described with reference to the accompanying drawings in the embodiments of the present invention.

[0036] like Figure 1 The diagram shown is a schematic of a device for dynamic control of the dead time of a single-photon detector according to the present invention, including a driving circuit, a bias voltage source, a quenching resistor, an avalanche photodiode, a 50-ohm resistor, an avalanche extraction amplification circuit, a multi-amplitude discrimination circuit, a dead time control module, and a dead time processing module.

[0037] The driving circuit is used to amplify the input signal and apply it to the cathode of the avalanche photodiode.

[0038] The bias voltage source is connected to the cathode of the avalanche photodiode via a quenching resistor to provide a bias voltage to the avalanche photodiode. The bias voltage is higher than the breakdown voltage, enabling it to operate in Geiger mode.

[0039] The quenching resistor is connected at one end to the cathode of the avalanche photodiode and at the other end to the bias voltage. It is used to quench the avalanche photodiode by voltage division after the avalanche current is generated, so that it can be restored to the initial detection state.

[0040] The avalanche photodiode operates in Geiger mode, enabling it to be a highly sensitive photodetector for detecting single photon (the smallest quantum of light) signals.

[0041] The 50-ohm resistor is connected at one end to the anode of the avalanche photodiode and at the other end to ground potential, thereby achieving impedance matching for the first avalanche analog signal output by the avalanche photodiode.

[0042] The avalanche extraction and amplification circuit has its input end connected to the anode of the avalanche photodiode and its output end connected to the input port of the multi-amplitude discrimination circuit. It is used to filter and amplify the first avalanche analog signal and output the second avalanche analog signal.

[0043] The multi-amplitude discrimination circuit has an input terminal connected to the avalanche extraction amplification circuit, an output terminal connected to the dead time control module, and another output terminal connected to the dead time processing module. This enables the discrimination of the amplitude of the second avalanche analog signal and outputs the first avalanche digital signal to the dead time processing module and the amplitude data to the dead time control module.

[0044] The dead time control module is connected to a multi-amplitude discrimination circuit at one end and a dead time processing module at the other end. It receives and processes amplitude data, sets the dead time for this detection based on the intensity of avalanche carriers, and outputs the dead time setting signal to the dead time processing module.

[0045] The dead time processing module is connected to a multi-amplitude discrimination circuit at one end and a dead time control module at the other end. It receives the first avalanche digital signal, configures the dead time of this detection mission according to the dead time setting signal output by the dead time control module, and outputs the second avalanche digital signal.

[0046] A preferred embodiment of a multi-amplitude discrimination circuit is shown in the figure below. Figure 2 As shown, the system includes a power divider, a high-speed comparator, and a high-speed analog-to-digital converter. The power divider splits the second avalanche analog signal into two parts, which are then output to the high-speed comparator and the high-speed analog-to-digital converter, respectively. The high-speed comparator identifies the second avalanche analog signal to determine whether an avalanche signal has been generated. The identification level is an avalanche signal threshold level. When the level is higher than the identification level, the first avalanche digital signal is output as a high level; when the level is lower than the identification level, the first avalanche digital signal is output as a low level. The high-speed analog-to-digital converter samples the second avalanche analog signal and converts it into a digital signal. The amplitude data obtained from the digital signal is then output to the dead-time control module.

[0047] Another preferred embodiment of the multi-amplitude discrimination circuit is shown in the figure below. Figure 3 As shown, the system includes a power divider and n high-speed comparators. The power divider splits the second avalanche analog signal into n parts, each outputting to one of the n high-speed comparators. The n high-speed comparators correspond to n discrimination levels. The discrimination level voltage is set to the minimum for the first channel and increases sequentially. In principle, for the avalanche signal amplitude, a higher discrimination level results in fewer high-level output events, leading to lower detection efficiency. However, a higher avalanche signal amplitude also corresponds to a larger avalanche current, requiring a corresponding increase in the dead time to reduce afterpulse. For each of the n discrimination levels, n dead time values ​​are preset. The first high-speed comparator outputs a first avalanche digital signal. When the generated second avalanche analog signal is higher than discrimination level 1, the first avalanche digital signal is output as a high level; when it is lower than discrimination level 1, the first avalanche digital signal is output as a low level. The dead time control module determines the amplitude data of the first avalanche digital signal based on the output levels of the n high-speed comparators.

[0048] A preferred implementation diagram of the dead time control module is shown below. Figure 4 As shown, the circuit includes a delay circuit, a D flip-flop, a digital potentiometer, and a capacitor. The delay circuit delays the first avalanche digital signal for a time not shorter than the dead time setting. The delayed first avalanche digital signal is then input to the clock input interface of the D flip-flop. The D flip-flop receives the first avalanche digital signal, outputs the second avalanche digital signal, and ensures that no other avalanche digital signals are output within the dead time. When the CLK terminal of the D flip-flop receives a high-level transition, the Q port outputs a high level. The digital potentiometer and capacitor form an RC delay circuit; when the Q port of the D flip-flop transitions from high to low, the port outputs a low level. The time constant set by the RC delay circuit is cleared to zero only after the time constant is set, during which the Q port remains high.

[0049] Another preferred implementation diagram of the dead time control module is shown below. Figure 5 As shown, the system includes a first delay circuit, a D flip-flop, and a second delay circuit. The first delay circuit delays the first avalanche digital signal for a time not less than the time required for the dead time setting. The delayed first avalanche digital signal is then input to the clock input interface of the D flip-flop. The D flip-flop receives the first avalanche digital signal, outputs the second avalanche digital signal, and ensures that no other avalanche digital signals are output within the dead time. When the CLK input of the D flip-flop receives a high-level transition, the Q port outputs a high level. The second delay circuit sets the dead time. When the Q port of the D flip-flop receives a high-level transition, the second delay circuit outputs a high level. The port output is low. The time delay set by the second delay circuit is cleared only after the delay period, during which the Q port remains at a high level.

[0050] On the other hand, a flowchart of a method for dynamic control of the dead time of a single-photon detector is shown below. Figure 6 As shown, the input signal is amplified by the driving circuit and then applied to the avalanche photodiode. The avalanche photodiode obtains a bias voltage through a quenching resistor, generates an avalanche current signal, and then uses a 50-ohm resistor to match and convert it into a first avalanche analog signal. The first avalanche analog signal is then extracted and amplified by the avalanche extraction and amplification circuit, outputting a second avalanche analog signal. The multi-amplitude discrimination circuit performs amplitude discrimination on the second avalanche analog signal and transmits the output first avalanche digital signal to the dead time processing module, while the amplitude data is transmitted to the dead time control module. The dead time control module sets the dead time after this avalanche based on the amplitude data. The dead time processing module receives the first avalanche digital signal, outputs the second avalanche digital signal according to the set dead time, and no longer outputs other detection signals.

[0051] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A device for dynamic control of the dead time of a single-photon detector, characterized in that, The device includes a drive circuit, a bias voltage source, a quenching resistor, an avalanche photodiode, a 50-ohm resistor, an avalanche extraction amplification circuit, a multi-amplitude discrimination circuit, a dead time control module, and a dead time processing module. The driving circuit is used to amplify the input signal and apply it to the cathode of the avalanche photodiode. The bias voltage source is connected to the cathode of the avalanche photodiode via a quenching resistor to provide bias voltage for the avalanche photodiode. The 50-ohm resistor is connected to the anode of the avalanche photodiode and is used to perform impedance matching on the first avalanche analog signal output by the avalanche photodiode. The avalanche extraction and amplification circuit is used to filter and amplify the first avalanche simulation signal and output the second avalanche simulation signal. The multi-amplitude discrimination circuit is used to discriminate the amplitude of the second avalanche analog signal and output the first avalanche digital signal dead time processing module and the amplitude data dead time control module respectively. The dead time control module receives and processes amplitude data, sets the dead time setting signal for this detection mission based on the intensity of avalanche carriers, and outputs the dead time setting signal to the dead time processing module. The dead time processing module processes the first avalanche digital signal according to the dead time setting signal and then outputs the second avalanche digital signal. The multi-amplitude discrimination circuit includes a power divider, a high-speed comparator, and a high-speed analog-to-digital converter. The power divider splits the second avalanche analog signal into two parts, which are then output to the high-speed comparator and the high-speed analog-to-digital converter, respectively. The high-speed comparator discriminates the second avalanche analog signal to determine whether an avalanche signal has been generated. The high-speed analog-to-digital converter samples the second avalanche analog signal to obtain amplitude data; or... The multi-amplitude discrimination circuit includes a power divider and n high-speed comparators. The power divider splits the second avalanche analog signal into n parts, which are then output to the n high-speed comparators. The n high-speed comparators correspond to n discrimination levels. The first high-speed comparator outputs a first avalanche digital signal. When the generated second avalanche analog signal is higher than the discrimination level, the first avalanche digital signal is output as a high level; when it is lower than the discrimination level, the first avalanche digital signal is output as a low level. The dead time control module determines the amplitude data of the first avalanche digital signal based on the output levels of the n high-speed comparators.

2. The device for dynamic control of dead time of a single-photon detector according to claim 1, characterized in that, The quenching resistor is used to quench the avalanche photodiode by voltage division after the avalanche current is generated, so that it returns to its initial detection state.

3. The device for dynamic control of dead time of a single-photon detector according to claim 1, characterized in that, The dead time setting signal includes the length of the dead time.

4. The device for dynamic control of dead time of a single-photon detector according to claim 1, characterized in that, The dead time control module includes a delay circuit, a D flip-flop, a digital potentiometer, and a capacitor. The delay circuit is used to delay the first avalanche digital signal. The delay time is not shorter than the time required for the dead time setting. The first avalanche digital signal after the delay is input to the clock input interface of the D flip-flop. The D flip-flop is used to receive the first avalanche digital signal and output the second avalanche digital signal; the digital potentiometer and capacitor connected in series are used to realize the dead time setting and the delay of the clear terminal of the D flip-flop.

5. The device for dynamic control of dead time of a single-photon detector according to claim 1, characterized in that, The dead time control module includes a first delay circuit, a D flip-flop, and a second delay circuit. The first delay circuit delays the first avalanche digital signal, and the delay time is not less than the time required for the dead time setting. The first avalanche digital signal after the delay is input to the clock input interface of the D flip-flop. The D flip-flop is used to receive the first avalanche digital signal and output the second avalanche digital signal; the second delay circuit is used to implement the dead time setting and the delay of the clear terminal of the D flip-flop.

6. A method for dynamic control of the dead time of a single-photon detector, characterized in that, The method includes: The input signal is amplified by the driver circuit and then applied to the avalanche photodiode; The avalanche photodiode obtains a bias voltage through a quenching resistor, generates an avalanche current signal, and then uses a 50-ohm resistor to match and convert it into the first avalanche analog signal. The first avalanche simulation signal is extracted and amplified by the avalanche extraction and amplification circuit, and the second avalanche simulation signal is output. The multi-amplitude discrimination circuit performs amplitude discrimination on the second avalanche analog signal and transmits the output first avalanche digital signal to the dead time processing module and the amplitude data to the dead time control module. The dead time control module sets the dead time after this avalanche based on the amplitude data; The dead time processing module receives the first avalanche digital signal and outputs the second avalanche digital signal according to the set dead time. The multi-amplitude discrimination circuit includes a power divider, a high-speed comparator, and a high-speed analog-to-digital converter. The power divider splits the second avalanche analog signal into two parts, which are then output to the high-speed comparator and the high-speed analog-to-digital converter, respectively. The high-speed comparator discriminates the second avalanche analog signal to determine whether an avalanche signal has been generated. The high-speed analog-to-digital converter samples the second avalanche analog signal to obtain amplitude data; or... The multi-amplitude discrimination circuit includes a power divider and n high-speed comparators. The power divider splits the second avalanche analog signal into n parts, which are then output to the n high-speed comparators. The n high-speed comparators correspond to n discrimination levels. The first high-speed comparator outputs a first avalanche digital signal. When the generated second avalanche analog signal is higher than the discrimination level, the first avalanche digital signal is output as a high level; when it is lower than the discrimination level, the first avalanche digital signal is output as a low level. The dead time control module determines the amplitude data of the first avalanche digital signal based on the output levels of the n high-speed comparators.

Citation Information

Patent Citations

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