Method for keeping software pace between board cards consistent
In the security computing platform in the field of railway signals, the motherboard notifies the remaining time from the pace cycle of the board and judges and adjusts the pace deviation, which solves the problem of inconsistent software pace between boards and cards, and realizes the pace consistency of multi-board programs and the stability of the security computing platform.
Patent Information
- Application Number
- CN202411672250.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-21
- Publication Date
- 2025-03-11
AI Technical Summary
In the security computing platform in the field of railway signals, it is difficult to keep the software in a consistent pace when multiple computer boards run the same program, resulting in inconsistent calculation results and relatively difficult to safe data.
The motherboard card notifies the remaining time of the local step cycle to the slave board during the step cycle, and the step deviation is judged and adjusted by the slave board to ensure that the software steps between the boards are consistent.
The consistency of multi-board program pace is achieved, providing a foundation for the construction of a secure computing platform, ensuring the consistency of calculation results and the accuracy of secure data.
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Figure CN119596900A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a method for keeping software synchronization between boards. Background Art
[0002] In the field of railway signaling, the safety computing platform mostly adopts a two-out-of-two or three-out-of-two mechanism. In these safety platforms, the same program is running on multiple computer boards. These programs need to keep pace, calculate the same calculation results at the same time, and compare and output safety data.
[0003] Therefore, a method is provided to keep the software of the boards in sync. Summary of the invention
[0004] The purpose of the present invention is to overcome the existing defects and provide a method for keeping the software of multiple boards in step with each other, so as to achieve keeping the software of multiple boards in step with each other and provide an implementation basis for building a secure computing platform.
[0005] The technical solution to achieve the above purpose is:
[0006] A method for keeping the software of multiple boards in step, wherein one of the boards is a master card and the other boards are slave cards, comprising:
[0007] Step S1: The master card notifies the slave card of the remaining time T of its own local pace cycle within the pace cycle. c_rr ;
[0008] Step S2, the slave card obtains the remaining time T of the local pacing cycle of the main board. c_rr Then the pace deviation of the board itself is judged;
[0009] Step S3, making corresponding pace deviation adjustments based on the pace deviation results.
[0010] Preferably, in step S2, the parameters involved in the pace deviation judgment include: the remaining time T of the local pace cycle of the mainboard card taking into account the network delay c_rr_nd , Mainboard local pacing cycle remaining time T c_rr , the remaining time T of the local pacing cycle of the slave card c_lr , Network delay time T between the main board and the slave board nd , current board pace state S, current board pace deviation time T pd , Board software step cycle time t c , where T c_rr_nd =T c_rr -T nd .
[0011] Preferably, in step S2, the step deviation determination includes:
[0012] If T c_lr >T c_rr_nd , and (T c_lr -T c_rr_nd )>(t c -T c_lr +T c_rr_nd );
[0013] The current board pace state S is too fast;
[0014] Otherwise, the current board pace state S is slow, T pd =MIN((T c_lr -T c_rr_nd ), (t c -T c_lr +T c_rr_nd ));
[0015] If T c_rr_nd ≥T c_lr , and (T c_rr_nd -T c_lr )<(t c -T c_rr_nd +T c_lr );
[0016] The current board pace state S is too fast;
[0017] Otherwise, the current board pace state S is slow, T pd =MIN((t c -T c_rr_nd +T c_lr ), (T c_rr_nd -T c_lr )).
[0018] Preferably, in step S3, the parameters involved in the pace deviation adjustment include: network jitter tolerance value N jt , Network jitter value N j , the current board is in step with the program running time T prg .
[0019] Preferably, in step S3, when N j In N jt Within the range and T c_rr >T nd The pace deviation adjustment is performed at the same time, and the pace deviation adjustment includes:
[0020] If the current board pace state S is fast, and (T c_lr -T prg +T pd ) <t c ;
[0021] Then the remaining time of the current pacing cycle is adjusted to T c_lr -T prg +T pd ;
[0022] Otherwise, adjust the current step cycle to (t c +T pd ) and restore the next pacing cycle to t c ;
[0023] If the current board pace state S is slow, and (T c_lr -T prg )>T pd ;
[0024] Then the remaining time of the current pacing cycle is adjusted to T c_lr -T prg -T pd ;
[0025] Otherwise, the remaining time of the adjustment cycle is adjusted to 0 and the next adjustment cycle begins.
[0026] The beneficial effect of the present invention is that the present invention notifies the slave card of the remaining time T of its own local pace cycle through the master card within the pace cycle. c_rr ; The remaining time T of the local pacing cycle of the main board is obtained from the board c_rr Then the pace deviation of its own board is judged; the corresponding pace deviation adjustment is made according to the pace deviation result; this method can effectively achieve the consistency of multi-board program and provide a basis for the construction of a security platform. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 It is a flow chart of a method for keeping software synchronization between boards and cards of the present invention;
[0028] Figure 2 It is a flow chart of keeping the software of the boards and cards in step with each other in the present invention. DETAILED DESCRIPTION
[0029] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. In the description of the present invention, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside" and the like indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.
[0030] The present invention will be further described below in conjunction with the accompanying drawings.
[0031] like Figure 1 , 2 As shown, a method for keeping the software synchronization between boards is provided, wherein one of the boards is a master board and the other boards are slave boards. When it is found that the slave board is out of step with the master board, the step of the slave board is adjusted to be consistent with the step of the master board, thereby achieving the synchronization between the multiple boards, which specifically includes:
[0032] Step S1: The master card notifies the slave card of the remaining time T of its own local pace cycle within the pace cycle. c_rr .
[0033] Step S2, the slave card obtains the remaining time T of the local pacing cycle of the main board. c_rr Then judge the pace deviation of its own board.
[0034] In the embodiment, the parameters involved in the pace deviation judgment include: the remaining time T of the local pace cycle of the mainboard card taking into account the network delay c_rr_nd , Mainboard local pacing cycle remaining time T c_rr , the remaining time T of the local pacing cycle of the slave card c_lr , Network delay time T between the main board and the slave board nd , current board pace state S, current board pace deviation time T pd , Board software step cycle time t c , where T c_rr_nd =T c_rr -T nd .
[0035] In the embodiment, the step deviation determination includes:
[0036] If T c_lr >T c_rr_nd , and (T c_lr -T c_rr_nd )>(t c -T c_lr +T c_rr_nd );
[0037] The current board pace state S is too fast;
[0038] Otherwise, the current board pace state S is slow, T pd =MIN((T c_lr -T c_rr_nd ), (t c -T c_lr +T c_rr_nd ));
[0039] If T c_rr_nd ≥T c_lr , and (T c_rr_nd -T c_lr )<(t c -T c_rr_nd +T c_lr );
[0040] The current board pace state S is too fast;
[0041] Otherwise, the current board pace state S is slow, T pd =MIN((t c -T c_rr_nd +T c_lr ), (T c_rr_nd -T c_lr )).
[0042] Step S3, making corresponding pace deviation adjustments based on the pace deviation results.
[0043] In the embodiment, the parameters involved in the pace deviation adjustment include: network jitter tolerance value N jt , Network jitter value N j , the current board is in step with the program running time T prg .
[0044] In the embodiment, when N j In N jt Within the range and T c_rr >T nd The pace deviation adjustment is performed at the same time, and the pace deviation adjustment includes:
[0045] If the current board pace state S is fast, and (T c_lr -T prg +T pd ) <t c ;
[0046] Then the remaining time of the current pacing cycle is adjusted to T c_lr -T prg +T pd ;
[0047] Otherwise, adjust the current step cycle to (t c +T pd ) and restore the next pacing cycle to t c ;
[0048] If the current board pace state S is slow, and (T c_lr -T prg )>T pd ;
[0049] Then the remaining time of the current pacing cycle is adjusted to T c_lr -T prg -T pd ;
[0050] Otherwise, the remaining time of the adjustment cycle is adjusted to 0 and the next adjustment cycle begins.
[0051] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions described in the above embodiments may still be modified, or some or all of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for keeping the software of different boards in sync, characterized in that: Among the multiple boards, one is the master board and the rest are slave boards, including: Step S1: The master card notifies the slave card of the remaining time T of its own local pace cycle within the pace cycle. c_rr ; Step S2, the slave card obtains the remaining time T of the local pacing cycle of the main board. c_rr Then the pace deviation of the board itself is judged; Step S3, making corresponding pace deviation adjustments based on the pace deviation results.
2. A method for keeping software synchronization between boards according to claim 1, characterized in that: In step S2, the parameters involved in the pace deviation judgment include: the remaining time T of the local pace cycle of the mainboard card taking into account the network delay c_rr_nd , Mainboard local pacing cycle remaining time T c_rr , the remaining time T of the local pacing cycle of the slave card c_lr , Network delay time T between the main board and the slave board nd , current board pace state S, current board pace deviation time T pd , Board software step cycle time t c , where T c_rr_nd =T c_rr -T nd .
3. A method for keeping software synchronization between boards according to claim 2, characterized in that: In step S2, the step deviation determination includes: If T c_lr >T c_rr_nd , and (T c_lr -T c_rr_nd )>(t c -T c_lr +T c_rr_nd ); The current board pace state S is too fast; Otherwise, the current board pace state S is slow, T pd =MIN((T c_lr -T c_rr_nd ), (t c -T c_lr +T c_rr_nd )); If T c_rr_nd ≥T c_lr , and (T c_rr_nd -T c_lr )<(t c -T c_rr_nd +T c_lr ); The current board pace state S is too fast; Otherwise, the current board pace state S is slow, T pd =MIN((t c -T c_rr_nd +T c_lr ), (T c_rr_nd -T c_lr )).
4. A method for maintaining software synchronization between boards according to claim 3, characterized in that: In step S3, the parameters involved in the pace deviation adjustment include: network jitter tolerance value N jt , Network jitter value N j , the current board is in step with the program running time T prg .
5. A method for keeping software synchronization between boards according to claim 4, characterized in that: In step S3, when N j In N jt Within the range and T c_rr >T nd The pace deviation adjustment is performed at the same time, and the pace deviation adjustment includes: If the current board pace state S is fast, and (T c_lr -T prg +T pd ) <t c ; Then the remaining time of the current pacing cycle is adjusted to T c_lr -T prg +T pd ; Otherwise, adjust the current step cycle to (t c +T pd ) and restore the next pacing cycle to t c ; If the current board pace state S is slow, and (T c_lr -T prg )>T pd ; Then the remaining time of the current pacing cycle is adjusted to T c_lr -T prg -T pd ; Otherwise, the remaining time of the adjustment cycle is adjusted to 0 and the next adjustment cycle begins.