Copper interconnection structure and preparation method and application thereof
By using a barrier layer composed of TaN layer, Ta layer and MnO2 composite layer in the copper interconnect structure, the problem of short service life caused by copper diffusion is solved, and a more efficient copper diffusion barrier effect is achieved.
Patent Information
- Application Number
- CN202411596599.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-11
- Publication Date
- 2025-03-14
AI Technical Summary
In the existing copper interconnect structure, the effect of the copper diffusion barrier layer is not ideal, resulting in a short service life of the copper interconnect structure and its devices.
A barrier layer composed of a TaN layer, a Ta layer and a composite layer is used. The composite layer is formed by heat treatment of MnO2 and a copper layer to enhance the mobility resistance of copper and reduce copper diffusion to the dielectric layer.
Significantly reduce the degree of copper diffusion to the substrate, reduce the copper content in the substrate, and improve the service life of copper interconnect structures and their electronic devices.
Smart Images
Figure BDA0005127081530000081
Abstract
Description
Technical Field
[0001] The invention belongs to the field of semiconductors, and in particular relates to a copper interconnect structure and a preparation method and application thereof. Background Art
[0002] As an interconnect material, copper has the advantages of low resistivity, high melting point, easy deposition, high thermal conductivity, low thermal expansion coefficient, high thermal stress, etc., and is widely used in interconnect processes below 32nm process. However, copper also has many problems as an interconnect material. Copper does not have an effective surface passivation layer like aluminum. It has a high diffusion coefficient in Si and its oxides, and it is easy to diffuse and penetrate into the device. As a deep energy level doping material, it causes leakage current to increase and even short circuit failure. In addition, copper has poor support and wettability for the dielectric material SiO2, which is not conducive to its effective combination with the dielectric layer. Therefore, a barrier layer must be introduced at the interface between the copper conductor and the interlayer dielectric to solve the above problems. However, the current barrier layer is not ideal in preventing copper diffusion. With the use of electronic devices, the copper in the dielectric layer gradually accumulates to a high level, resulting in its scrapping and short service life. Summary of the invention
[0003] In view of the problem that the copper diffusion barrier layer involved in the above-mentioned prior art has poor effect in preventing copper diffusion, resulting in the scrapping of copper interconnect structures and devices thereof, the present invention will provide a copper interconnect structure and a preparation method and application thereof.
[0004] To achieve the above purpose, the following technical solutions are specifically included:
[0005] On the one hand, the present invention provides a copper interconnect structure, which comprises a substrate, a barrier layer, and a copper layer in sequence, wherein the barrier layer comprises a TaN layer, a Ta layer, and a composite layer in sequence; the composite layer is formed by heat treating MnO2 and the copper layer.
[0006] The barrier layer of the present invention includes a TaN layer, a Ta layer, and a composite layer in sequence, wherein the TaN layer and the Ta layer serve as basic barrier layers to increase barrier performance; the MnO2 and copper layers react through heat treatment to form a composite layer containing copper and manganese oxides; under heat treatment conditions, the oxides containing Cu and Mn in the composite layer will gather on the surface of the copper layer, effectively enhancing the migration resistance of Cu, reducing the diffusion of Cu to the dielectric layer, and increasing the service life of the copper interconnect structure and its electronic devices.
[0007] Preferably, the composite layer contains composite oxides of copper and manganese.
[0008] Preferably, the thickness of the TaN layer is 1-10 nm.
[0009] Preferably, the thickness of the Ta layer is 1-10 nm.
[0010] Preferably, the thickness of the MnO2 is 1-20 nm.
[0011] Preferably, the substrate comprises a substrate having a dielectric layer on its surface.
[0012] Further preferably, in the substrate having a dielectric layer on the surface, the dielectric layer is at least one of a single crystal silicon and a silicon oxide dielectric layer.
[0013] The present invention also provides a method for preparing the copper interconnect structure, comprising the following steps:
[0014] (1) Using TaCl5 and NH3 as raw materials, a TaN layer is deposited on a substrate by atomic layer deposition technology;
[0015] (2) using TaF5 and Si2H6 as raw materials, depositing a Ta layer on the TaN layer by atomic layer deposition technology;
[0016] (3) using Mn(thd)3 and O3 as raw materials, depositing MnO2 on the Ta layer by atomic layer deposition technology;
[0017] (4) depositing a Cu seed layer on the MnO2 by physical vapor deposition technology;
[0018] (5) depositing a Cu coating on the Cu seed layer by electrochemical deposition to obtain a precursor;
[0019] (6) thermally treating the precursor to obtain the copper interconnect structure.
[0020] In the present invention, Mn(thd)3 refers to tris(2,2,6,6-tetramethyl-3,5-heptanedione)manganese.
[0021] Atomic layer deposition (ALD) is a method that can deposit materials on the surface of a substrate layer by layer in the form of a single atomic film. Atomic layer deposition is similar to ordinary chemical deposition, but in the atomic layer deposition process, the chemical reaction of a new layer of atomic film is directly related to the previous layer, so that only one layer of atoms is deposited in each reaction. In essence, atomic layer deposition is a method (technology) of forming a deposited film by alternately passing gaseous precursor pulses into a reactor and chemically adsorbing and reacting on a deposition substrate. When the precursors reach the surface of the deposition substrate, they will chemically adsorb on its surface and undergo a surface reaction. Atomic layer deposition technology includes chemical adsorption self-limitation (CS) and sequential reaction self-limitation (RS) processes. The present invention adopts chemical adsorption self-limitation (CS) mode.
[0022] Preferably, in step (1), in the atomic layer deposition technology, the temperature of the reaction of TaCl5 and NH3 is 500-600°C, and the reaction time is 5-20s.
[0023] The present invention uses atomic layer deposition technology to deposit a TaN layer, and the specific process includes the following steps: first, TaCl5 is introduced into the atomic layer deposition equipment for 5-20 seconds, and then argon gas is purged for 5-20 seconds; second, the substrate is heated to 500-600°C, and NH3 is introduced for reaction for 5-20 seconds, and then argon gas is purged for 5-20 seconds to obtain a layer of TaN layer; finally, optionally, the above process is repeated to prepare multiple TaN layers. The introduced TaCl5 and NH3 are both in gas phase.
[0024] Preferably, in step (2), in the atomic layer deposition technology, the temperature of the reaction of TaF5 and Si2H6 is 200-300°C, and the reaction time is 5-20s.
[0025] The present invention uses atomic layer deposition technology to deposit a Ta layer, and the specific process includes the following steps: first, TaCl5 is introduced into the atomic layer deposition equipment for 5-20 seconds, and then argon gas is purged for 5-20 seconds; secondly, the substrate is heated to 200-300°C, and Si2H6 is introduced for reaction for 5-20 seconds, and then argon gas is purged for 5-20 seconds to obtain a Ta layer; finally, optionally, the above process is repeated to prepare multiple Ta layers. The introduced TaCl5 and Si2H6 are both in gas phase.
[0026] Preferably, in step (3), in the atomic layer deposition technology, the temperature of the reaction of Mn(thd)3 and O3 is 300-400°C, and the reaction time is 5-20s.
[0027] The present invention uses atomic layer deposition technology to deposit MnO2, and the specific process includes the following steps: first, Mn(thd)3 is introduced into the atomic layer deposition equipment for 5-20 seconds, and then argon is purged for 5-20 seconds; secondly, the substrate is heated to 300-400°C, and O3 is introduced for reaction for 5-20 seconds, and then argon is purged for 5-20 seconds to obtain a layer of MnO2; finally, optionally, the above process is repeated to prepare multilayer MnO2. Wherein, the introduced Mn(thd)3 and O3 are both in gas phase.
[0028] Preferably, in step (4), the thickness of the Cu seed layer is 5-25 nm.
[0029] The present invention adopts physical vapor deposition technology to deposit a Cu seed layer, wherein the target material in the physical vapor deposition is a pure copper target with a purity of more than 99.9999%. The Cu seed layer can improve the wettability of the subsequent electroplated Cu coating, improve the quality of the electroplated Cu coating, and can serve as a cathode during the electroplating of the Cu coating.
[0030] Preferably, in step (5), the thickness of the Cu plating layer is 5-35 nm, more preferably 20-30 nm.
[0031] The Cu seed layer and the Cu plating layer together constitute the copper layer of the copper interconnect structure, which plays the role of a conductor.
[0032] The invention adopts an electrochemical method to electroplatingly deposit a Cu plating layer. The electrochemically deposited Cu plating layer is dense and uniform, with few defects such as voids, so that the electrical interconnection performance of the copper interconnection is good.
[0033] Preferably, the heat treatment temperature is 200-450°C and the heat treatment time is 5-60s.
[0034] Under the above-mentioned heat treatment conditions, MnO2 reacts with the copper layer to form an oxide composite layer containing copper and manganese. Under the heat treatment conditions, the composite oxide containing Cu and Mn in the composite layer will accumulate on the surface of the copper layer. This phenomenon can effectively enhance the migration resistance of Cu and reduce the diffusion of Cu into the dielectric layer.
[0035] The present invention also provides an electronic device, comprising the copper interconnection structure. In the copper interconnection structure of the present invention, the barrier layer has an effective barrier effect on the copper diffusion of the copper layer, which can significantly reduce the degree of copper diffusion into the substrate, reduce the copper content in the substrate, and improve the service life of the electronic device. After the electronic device operates for 1000 hours using a current of 1.5A, the mass percentage of the Cu element in the substrate is less than 10%.
[0036] Compared with the prior art, the present invention has the following beneficial effects: the present invention forms a copper diffusion barrier layer through a TaN layer, a Ta layer, and a composite layer, which can significantly reduce the degree of copper diffusion into the substrate, reduce the copper content in the substrate, and improve the service life of the copper interconnect structure and its electronic devices. DETAILED DESCRIPTION
[0037] In order to better illustrate the purpose, technical scheme and advantages of the present invention, the present invention will be further described below through specific examples. The test methods used in the examples and / or comparative examples are conventional methods unless otherwise specified; the materials, reagents, etc. used can be obtained from commercial channels unless otherwise specified.
[0038] In the following embodiments and comparative examples, the substrate used is a silicon wafer, a silicon dioxide dielectric layer exists on the surface of the silicon wafer, and a barrier layer is formed on the dielectric layer.
[0039] Example 1
[0040] A method for preparing a copper interconnect structure comprises the following steps:
[0041] S1: Atomic layer deposition technology to deposit TaN layer:
[0042] (1) Placing a wafer as a substrate in an atomic layer deposition device, and introducing TaCl5 gas for 15 seconds so that TaCl5 is adsorbed on the surface of the substrate;
[0043] (2) introducing argon gas to purge and remove the TaCl5 gas that is not attached to the surface of the wafer substrate. The purge time is 15 seconds.
[0044] (3) heating the surface of the wafer substrate to 550° C. and introducing NH 3 gas, so that NH 3 reacts with TaCl 5 adsorbed on the surface of the wafer substrate to form a TaN film layer. The reaction time of introducing NH 3 gas is 15 s.
[0045] (4) introducing argon gas to purge and remove unreacted NH3 for 15 s;
[0046] (5) Repeat the above process 30 times to deposit a 10 nm TaN film layer on the surface;
[0047] S2: Atomic layer deposition technology to deposit Ta layer:
[0048] (1) introducing TaCl5 gas for 15 seconds to allow TaCl5 to adsorb on the surface of the substrate containing the TaN layer;
[0049] (2) introducing argon gas to purge and remove TaCl5 gas that is not attached to the surface of the substrate containing the TaN layer, and the purge time is 15 s;
[0050] (3) The surface of the wafer substrate is heated to 250° C., and Si2H6 gas is introduced to allow Si2H6 to react with TaCl5 adsorbed on the surface of the wafer substrate to form a Ta film layer. The reaction time of the Si2H6 gas is 15 s.
[0051] (4) introducing argon gas to purge and remove unreacted Si2H6 for 15 s;
[0052] (5) Repeat the above process 30 times to deposit a 10 nm TaN film layer on the surface;
[0053] S3: Atomic layer deposition technology to deposit MnO2 layer:
[0054] (1) introducing Mn(thd)3 gas for 15 seconds to allow Mn(thd)3 to adsorb on the surface of the substrate containing the Ta layer;
[0055] (2) introducing argon gas to purge and remove the Mn(thd)3 gas that is not attached to the surface of the substrate containing the Ta layer, and the purge time is 15 s;
[0056] (3) heating the surface of the wafer substrate to 350° C. and introducing O3 gas so that O3 reacts with Mn(thd)3 adsorbed on the surface of the wafer substrate to form a MnO2 film layer. The O3 gas reaction time is 15 s.
[0057] (4) introducing argon gas to purge and remove unreacted O3 for 15 seconds;
[0058] (5) Repeat the above process 60 times to deposit a 20 nm MnO2 film on the surface;
[0059] S4: Physical vapor deposition of Cu seed layer:
[0060] Using pure copper with a purity of more than 99.9999% as the target material, a Cu seed layer is deposited on the MnO2 layer by physical vapor deposition. The Cu seed layer serves as the cathode for the subsequent electroplating of the Cu coating, and the film thickness is 20 copper atomic layers.
[0061] S5: Electrochemical deposition of Cu plating:
[0062] An acidic solution containing copper ions is used as an electroplating solution, and a Cu seed layer is used as a cathode for electroplating a Cu plating layer. A full Cu plating layer (20-30 nm) is electroplated on the Cu seed layer, and voids should be prevented during the electroplating process. After the electroplating is completed, the Cu seed layer and the Cu electroplating layer constitute a copper layer in the interconnect structure.
[0063] S6: Heat treatment process:
[0064] The electroplated product is heated to 350°C for 10 seconds. During the heat treatment, MnO2 reacts with Cu to produce Cu-MnO2 (composite oxide of copper and manganese). Under the heat treatment conditions, the alloy elements will accumulate on the copper surface. This phenomenon can effectively enhance the migration resistance of Cu and reduce the diffusion of Cu into the dielectric layer.
[0065] Example 2
[0066] The difference between this embodiment and embodiment 1 is that the total thickness of the TaN film layer in step S1 of this embodiment is 1 nm, and the rest is the same.
[0067] Example 3
[0068] The difference between this embodiment and embodiment 1 is that the total thickness of the TaN film layer in step S1 of this embodiment is 5 nm, and the rest is the same.
[0069] Example 4
[0070] The present embodiment is different from the embodiment 1 in that the total thickness of the Ta film layer in step S2 of the present embodiment is 1 nm, and the rest is the same.
[0071] Example 5
[0072] The present embodiment is different from the embodiment 1 in that the total thickness of the Ta film layer in step S2 of the present embodiment is 5 nm, and the rest is the same.
[0073] Example 6
[0074] The difference between this embodiment and embodiment 1 is that the total thickness of the MnO2 film layer in step S3 of this embodiment is 1 nm, and the rest is the same.
[0075] Example 7
[0076] The difference between this embodiment and embodiment 1 is that the total thickness of the MnO2 film layer in step S3 of this embodiment is 5 nm, and the rest is the same.
[0077] Example 8
[0078] The difference between this embodiment and embodiment 1 is that the total thickness of the MnO2 film layer in step S3 of this embodiment is 11 nm, and the rest is the same.
[0079] Example 9
[0080] The difference between this embodiment and embodiment 1 is that the heat treatment temperature in step S6 of this embodiment is 200° C., and the rest is the same.
[0081] Example 10
[0082] The present embodiment is different from the embodiment 1 in that the heat treatment temperature in step S6 of the present embodiment is 450° C., and the rest is the same.
[0083] Embodiment 11
[0084] The present embodiment is different from the embodiment 1 in that the heat treatment time in step S6 of the present embodiment is 2 s, and the rest is the same.
[0085] Example 12
[0086] The present embodiment is different from the embodiment 1 in that the heat treatment time in step S6 of the present embodiment is 5 s, and the rest is the same.
[0087] Example 13
[0088] The difference between this embodiment and embodiment 1 is that the heat treatment time in step S6 of this embodiment is 30s, and the rest is the same.
[0089] Embodiment 14
[0090] The present embodiment is different from the embodiment 1 in that the heat treatment time in step S6 of the present embodiment is 60 s, and the rest is the same.
[0091] Comparative Example 1
[0092] Compared with Example 1, the difference between this comparative example and Example 1 is that no barrier layer is provided in this comparative example, and the specific steps are as follows:
[0093] S1: Physical vapor deposition of Cu seed layer:
[0094] Using pure copper with a purity of more than 99.9999% as a target material, a Cu seed layer is deposited on the surface of the wafer by physical vapor deposition. The Cu seed layer serves as a cathode for subsequent electroplating of a Cu coating. The thickness of the Cu seed layer is 20 nm.
[0095] S2: Electrochemical deposition of Cu plating:
[0096] An acidic solution containing copper ions is used as an electroplating solution, and a Cu seed layer is used as a cathode for electroplating and depositing a Cu plating layer. A full Cu plating layer is electroplated and deposited on the Cu seed layer. Voids should be prevented during the electroplating process. After the electroplating is completed, the Cu seed layer and the Cu electroplating layer constitute a copper layer in the interconnect structure, and finally a copper interconnect structure is obtained.
[0097] Comparative Example 2
[0098] The difference between this comparative example and Example 1 is that this comparative example does not have a TaN film layer, and the rest is the same.
[0099] Comparative Example 3
[0100] The difference between this comparative example and Example 1 is that this comparative example does not have a Ta film layer, and the rest is the same.
[0101] Comparative Example 4
[0102] Compared with Example 1, this comparative example is different in that this comparative example does not have a MnO2 film layer, and the rest is the same.
[0103] Comparative Example 5
[0104] The difference between this comparative example and Example 1 is that this comparative example does not have a TaN film layer and a Ta film layer, and the rest is the same.
[0105] Comparative Example 6
[0106] The difference between this comparative example and Example 1 is that the heat treatment process in step S6 is not performed in this comparative example, and the rest is the same.
[0107] Test: The copper interconnect structures in the above embodiments and comparative examples were operated at a current of 1.5 A for 1000 h, and then glow discharge mass spectrometry (GDMS) was used to test the copper content in the dielectric layer. The results are shown in Table 1.
[0108] Table 1
[0109]
[0110] It can be seen from the above embodiments that in the copper interconnect structure of the present invention, the copper diffusion barrier layer formed by the TaN layer, the Ta layer, and the composite layer can significantly reduce the degree of copper diffusion into the dielectric layer, reduce the copper content in the dielectric layer, and improve the service life of the copper interconnect structure and its electronic devices.
[0111] It can be seen from Example 1 and Comparative Examples 1-6 that the lack of any one of the TaN layer, Ta layer and composite layer will reduce the effect of blocking copper diffusion. In the barrier layer of the present invention, the TaN layer, Ta layer and composite layer cooperate with each other to synergistically improve the effect of blocking copper diffusion.
[0112] It can be seen from Examples 1-8 that increasing the thickness of each barrier layer can further improve the effect of blocking copper diffusion to a certain extent. When the thickness of each layer is within 20nm, it basically meets the requirement of blocking copper diffusion. If the thickness of each layer is further increased, the preparation cost is too high and the benefit is not high.
[0113] It can be seen from Examples 1 and 9-14 that within a certain range, as the heat treatment time and temperature increase, the composite oxide of Cu and Mn can act as a dense barrier layer to block the diffusion of Cu. If the temperature and / or time continue to increase, the diffusion activity of Cu continues to increase, and the barrier effect of the composite oxide of Cu and Mn will weaken. Therefore, the present invention selects a heat treatment time of 200-450°C and a heat treatment time of 2-60s, and the composite layer obtained after heat treatment has a better effect as a barrier to Cu.
[0114] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the essence and scope of the technical solution of the present invention.
Claims
1. A copper interconnect structure, characterized in that: It comprises a substrate, a barrier layer and a copper layer in sequence, wherein the barrier layer comprises a TaN layer, a Ta layer and a composite layer in sequence; the composite layer is formed by heat treatment of MnO2 and the copper layer.
2. The copper interconnect structure according to claim 1, characterized in that The thickness of the TaN layer is 1-10 nm.
3. The copper interconnect structure according to claim 1, characterized in that The thickness of the Ta layer is 1-10 nm.
4. The copper interconnect structure according to claim 1, characterized in that The thickness of the MnO2 is 1-20nm.
5. The copper interconnect structure according to claim 1, characterized in that The substrate includes a substrate having a dielectric layer on its surface.
6. A method for preparing a copper interconnect structure according to any one of claims 1 to 5, characterized in that: The steps include: (1) Using TaCl5 and NH3 as raw materials, a TaN layer is deposited on a substrate by atomic layer deposition technology; (2) using TaF5 and Si2H6 as raw materials, depositing a Ta layer on the TaN layer by atomic layer deposition technology; (3) using Mn(thd)3 and O3 as raw materials, depositing MnO2 on the Ta layer by atomic layer deposition technology; (4) depositing a Cu seed layer on the MnO2 by physical vapor deposition technology; (5) depositing a Cu coating on the Cu seed layer by electrochemical deposition to obtain a precursor; (6) thermally treating the precursor to obtain the copper interconnect structure.
7. The method for preparing a copper interconnect structure according to claim 6, characterized in that: Include at least one of the following: In step (1), in the atomic layer deposition technology, the temperature of the reaction of TaCl5 and NH3 is 500-600°C, and the reaction time is 5-20s; In step (2), in the atomic layer deposition technology, the temperature of the reaction of TaF5 and Si2H6 is 200-300°C, and the reaction time is 5-20s.
8. The method for preparing a copper interconnect structure according to claim 6, wherein: Include at least one of the following: In step (3), in the atomic layer deposition technology, the temperature of the reaction of Mn(thd)3 and O3 is 300-400°C, and the reaction time is 5-20s; In step (4), the thickness of the Cu seed layer is 5-25 nm.
9. The method for preparing a copper interconnect structure according to claim 6, wherein: Include at least one of the following: In step (5), the thickness of the Cu plating layer is 5-35 nm; In step (6), the temperature of the heat treatment is 200-450° C., and the time of the heat treatment is 5-60 seconds.
10. An electronic device, characterized in that: The copper interconnect structure comprises the copper interconnect structure as claimed in any one of claims 1 to 5.