A method for judging pulse width based on busy time after NAND Flash recovery

By managing the busy time of NAND Flash, the waiting time is increased cycle until the erotic operation is restored to the maximum pulse width when the erase operation is completed is 0, which solves the problem of pulse width in NAND Flash that cannot be detected, and realizes effective pulse management and reduction of operation delay.

CN119741954APending Publication Date: 2025-04-01SHANDONG SINOCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202411778928.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-05
Publication Date
2025-04-01

AI Technical Summary

Technical Problem

After the NAND Flash erases or writes, the pulse width during busy time cannot be detected by the logic analyzer, resulting in the inability to effectively judge and manage the pulse width.

Method used

By performing erase and full operation on the block to be tested of NAND Flash, sending erase or write operations, suspending commands and recovery commands, looping to increase the waiting time until the recovery time is 0, when the erase operation is completed, the waiting time is recorded as the maximum pulse width.

Benefits of technology

It realizes effective judgment of the pulse width in NAND Flash erase or write operations, avoiding operation delays and failures caused by excessive pulse width.

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Abstract

A method for judging pulse width according to busy time after NAND Flash recovery relates to the field of memory technology, obtains the maximum pulse width t_pulse_max, and solves the problem that the pulse width of NAND Flash erasing or writing cannot be measured by instruments. After the maximum pulse width is obtained through testing, in actual SSD applications, when erasing or writing is suspended, the maximum pulse width is delayed to prevent the maximum pulse from being interrupted all the time, and erasing or writing cannot be completed all the time.
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