Display device

Abstract

The invention provides a display device, which comprises a display panel, a first circuit board, a second circuit board, a flexible connecting piece for connecting the first circuit board and the second circuit board, a first switch unit, a second switch unit, a third switch unit and a third switch unit, the second switch unit and the third switch unit are arranged on the second circuit board, in a first state, the first switch unit and the second switch unit are in a conducting state, the third switch unit is in a cut-off state, the detection signal end, the first switch unit, the flexible connecting piece and the second switch unit form a conducting detection loop, and in a second state, the second switch unit is in a cut-off state. The first switch unit and the second switch unit are in a cut-off state, the third switch unit is in a conducting state, and the flexible connecting piece transmits a function signal to the signal output end through the third switch unit. According to the technical scheme, oblique insertion detection and circuit protection can be realized under the condition that a signal line of the flexible connecting piece is not additionally occupied.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically to a display device. Background Technology

[0002] In the production and assembly of LCD modules, since the multiple circuit boards in the module are usually set separately, it is necessary to use flexible flat cables (FFC) or flexible printed circuits (FPC) to connect the separate circuit parts through connectors to form a complete working circuit.

[0003] However, during manual or mechanical insertion, flexible flat cables or flexible printed circuit boards are prone to misalignment. Misalignment refers to the failure of a flexible flat cable or flexible printed circuit board to be fully and accurately inserted into the connector slot at an angle parallel to the ideal insertion direction, resulting in misalignment between its conductive pins and the connector's target contacts. Since the pin spacing of flexible flat cables or flexible printed circuit boards is usually small, deviations during assembly can easily lead to pin misconnections or short circuits to ground. Overcurrent caused by misalignment can damage components such as driver integrated circuits and power management chips, resulting in damage to the LCD module, increased module repair costs, and reduced production yield.

[0004] Traditional anti-misalignment solutions typically employ mechanical error prevention measures, such as positioning bumps on the connector. However, these mechanical error prevention measures are prone to failure due to assembly errors and can only prevent misalignment before it occurs, failing to provide circuit protection for misalignment that has already occurred. Alternatively, some circuit-based anti-misalignment solutions exist, such as using dedicated anti-misalignment detection pins in the connector. These pins are used to detect misalignment via the general purpose input / output (GPIO) ports of a timing controller. If misalignment is detected, the power management chip is not triggered, thus protecting the LCD module's operating circuitry. However, these dedicated anti-misalignment detection pins occupy connector space. As display module resolutions and refresh rates increase, the number of connector pins increases, leading to space constraints and creating a conflict between dedicated anti-misalignment detection pins and connector space requirements.

[0005] Therefore, it is necessary to propose a new technical solution to solve the above-mentioned technical problems. Summary of the Invention

[0006] The purpose of this application is to provide a display device that enables oblique insertion detection and circuit protection without additionally occupying the signal lines of the flexible connector.

[0007] This application provides a display device, which includes a display panel, a first circuit board, a second circuit board, and a flexible connector connecting the first circuit board and the second circuit board. The display device also includes an anti-misalignment protection circuit; the anti-misalignment protection circuit includes a first switch unit, a second switch unit, and a third switch unit; the first switch unit is disposed on the first circuit board, a first end of the first switch unit is electrically connected to a detection signal terminal, a second end of the first switch unit is electrically connected to the flexible connector, and a control terminal of the first switch unit is electrically connected to a first control signal terminal; the second switch unit and the third switch unit are disposed on the second circuit board, and the second circuit board also has a signal output terminal for electrical connection with the display panel; the first end of the second switch unit is electrically connected to the flexible connector. The second end of the second switching unit is electrically connected to the flexible connector, and the control end of the second switching unit is electrically connected to the second control signal end; the first end of the third switching unit is electrically connected to the flexible connector, the second end of the third switching unit is electrically connected to the signal output end, and the control end of the third switching unit is electrically connected to the second control signal end; in the first state, the first switching unit and the second switching unit are in a conducting state, and the third switching unit is in a cut-off state, forming a conducting detection loop with the detection signal end, the first switching unit, the flexible connector, and the second switching unit; in the second state, the first switching unit and the second switching unit are in a cut-off state, and the third switching unit is in a conducting state, transmitting a functional signal to the signal output end through the third switching unit.

[0008] In the above-described display device, the first switching unit includes a first transistor and a second transistor, and the detection signal terminal includes a first detection terminal and a second detection terminal; the gate of the first transistor and the gate of the second transistor are both electrically connected to the first control signal terminal; one of the source and drain of the first transistor is electrically connected to the first detection terminal, and the other of the source and drain of the first transistor is electrically connected to the first line of the flexible connector; one of the source and drain of the second transistor is electrically connected to the second detection terminal, and the other of the source and drain of the second transistor is electrically connected to the second line of the flexible connector.

[0009] In the above-described display device, the second switching unit includes a third transistor and a fourth transistor; the gates of the third transistor and the fourth transistor are both electrically connected to the second control signal terminal; one of the source and drain of the third transistor is electrically connected to the first line of the flexible connector, and the other of the source and drain of the third transistor is electrically connected to the third line of the flexible connector; one of the source and drain of the fourth transistor is electrically connected to the fourth line of the flexible connector, and the other of the source and drain of the fourth transistor is electrically connected to the second line of the flexible connector; a connection trace is provided on the first circuit board, and the third line and the fourth line of the flexible connector are electrically connected through the connection trace; in the first state, the first detection terminal, the first transistor, the first line of the flexible connector, the third transistor, the third line of the flexible connector, the connection trace on the first circuit board, the fourth line of the flexible connector, the fourth transistor, the second line of the flexible connector, the second transistor, and the second detection terminal form the detection circuit.

[0010] In the above-described display device, the third switching unit includes a fifth transistor and an eighth transistor, and the signal output terminal includes a first output terminal and a second output terminal; the gate of the fifth transistor and the gate of the eighth transistor are both electrically connected to the second control signal terminal; one of the source and drain of the fifth transistor is electrically connected to the first line of the flexible connector, and the other of the source and drain of the fifth transistor is electrically connected to the first output terminal; one of the source and drain of the eighth transistor is electrically connected to the second line of the flexible connector, and the other of the source and drain of the eighth transistor is electrically connected to the second output terminal.

[0011] In the aforementioned display device, the third switching unit further includes a sixth transistor and a seventh transistor, and the signal output terminal further includes a third output terminal and a fourth output terminal; the gate of the sixth transistor and the gate of the seventh transistor are both electrically connected to the second control signal terminal; one of the source and drain of the sixth transistor is electrically connected to the third line of the flexible connector, and the other of the source and drain of the sixth transistor is electrically connected to the third output terminal; one of the source and drain of the seventh transistor is electrically connected to the fourth line of the flexible connector, and the other of the source and drain of the seventh transistor is electrically connected to the fourth output terminal; the other of the source and drain of the third transistor is also electrically connected to one of the source and drain of the sixth transistor; and one of the source and drain of the fourth transistor is also electrically connected to one of the source and drain of the seventh transistor.

[0012] In the above-described display device, the first transistor, the second transistor, the third transistor, and the fourth transistor are P-type transistors; the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are N-type transistors.

[0013] In the above-mentioned display device, a timing controller is provided on the first circuit board, the detection signal terminal is electrically connected to the general-purpose input / output port of the timing controller, and the first control signal terminal is electrically connected to the enable signal output terminal of the timing controller; the timing controller is configured to output a low-level signal to the first control signal terminal in the first state, and detect the conduction state of the detection circuit through the general-purpose input / output port.

[0014] In the above-mentioned display device, a power management chip is also provided on the first circuit board. The power management chip is electrically connected to the first control signal terminal, and the second control signal terminal is electrically connected to the voltage output terminal of the power management chip. The power management chip is configured to output a high-level voltage signal to the second control signal terminal after receiving a high-level signal from the first control signal terminal.

[0015] In the above-described display device, the second circuit board includes a first sub-circuit board and a second sub-circuit board; the third transistor, the fifth transistor, and the sixth transistor are disposed on the first sub-circuit board; the fourth transistor, the seventh transistor, and the eighth transistor are disposed on the second sub-circuit board; the first circuit board is provided with connecting traces, the first sub-circuit board is electrically connected to the connecting traces through the third line of the flexible connector, and the second sub-circuit board is electrically connected to the connecting traces through the fourth line of the flexible connector.

[0016] In the above-described display device, the flexible connector includes a first flexible connector and a second flexible connector; one end of the first flexible connector is electrically connected to the first circuit board, and the other end of the first flexible connector is electrically connected to the first sub-circuit board; one end of the second flexible connector is electrically connected to the first circuit board, and the other end of the second flexible connector is electrically connected to the second sub-circuit board; the first line and the third line are located on the first flexible connector, and the second line and the fourth line are located on the second flexible connector; the third line of the first flexible connector and the fourth line of the second flexible connector are electrically connected through the connecting traces on the first circuit board.

[0017] The display device provided in the embodiments of this application, by setting a first switching unit on a first circuit board and a second and third switching unit on a second circuit board, allows a portion of the circuitry on the flexible connector to be used as a misalignment detection circuit in the first state and restored to function signal transmission lines in the second state. This achieves dual-function multiplexing of the circuitry, thereby realizing misalignment detection and circuit protection without additionally occupying the signal lines of the flexible connector. Specifically, in the first state, the first and second switching units are in a conducting state, and the third switching unit is in a cut-off state. At this time, the detection signal terminal, the first switching unit, the flexible connector, and the second switching unit form a conducting detection circuit. The conduction state of this detection circuit is detected to determine whether the flexible connector has misaligned. Since the third switching unit is in a cut-off state, the circuitry on the flexible connector is isolated from the signal output terminal, preventing the display panel from malfunctioning during the detection process. In the second state, the first and second switching units are in a cut-off state, and the third switching unit is in a conducting state. At this time, the detection circuit is broken, and the flexible connector transmits a function signal to the signal output terminal through the third switching unit. The circuitry on the flexible connector is restored to function signal transmission lines, and the entire display device can operate normally. By switching the first, second, and third switching units on and off in different states, the circuits on the flexible connector can perform different functions during the misalignment detection phase and the normal operation phase, thus avoiding the need for a dedicated anti-misalignment detection pin and solving the problem of dedicated anti-misalignment detection pins occupying connector space.

[0018] The anti-misalignment protection circuit of the display device of this application prevents the power management chip from outputting its operating voltage by controlling the first control signal terminal to not output an enable signal or to output an invalid signal when an abnormal connection of the flexible connector is detected. This avoids damage to components such as the driver integrated circuit and the power management chip caused by misalignment, reduces the scrap rate and maintenance cost of the display device, and improves the production yield.

[0019] Furthermore, this technical solution utilizes the power-on timing logic of the power management chip to achieve oblique insertion detection, resulting in a fast detection response speed. Oblique insertion detection can be completed within a short time during the initial power-on phase of the display device, avoiding damage to components caused by overcurrent due to oblique insertion. By adjusting the position and number of lines used for oblique insertion detection on the flexible connector, this technical solution can be adapted to flexible flat cables or flexible printed circuit boards with different pin counts, exhibiting good compatibility and applicability. Attached Figure Description

[0020] Figure 1 A schematic diagram of a display device provided for an embodiment of this application.

[0021] Figure 2This is a schematic diagram illustrating the working principle of the display device provided in the embodiments of this application in a first state.

[0022] Figure 3 A schematic diagram illustrating the working principle of the display device provided in the embodiments of this application in a second state. Detailed Implementation

[0023] The specific embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0024] The terms “first,” “second,” and similar words do not indicate any order, quantity, or importance, but are merely used to distinguish different technical features. The terms “multiple,” and similar words mean two or more, unless otherwise expressly specified.

[0025] The technical solutions of different embodiments of this application can be combined with each other.

[0026] The display device provided in this application addresses the problem of circuit damage caused by misaligned insertion during the assembly of flexible flat cables (FFC) or flexible printed circuits (FPCs). This display device uses an anti-misalignment protection circuit to detect the connection status of flexible connectors and prevents the power management chip from outputting its operating voltage when misalignment is detected, thereby protecting components such as the driver integrated circuit and power management chip in the display device.

[0027] The display device provided in the embodiments of this application may be, for example, an LCD display device, an OLED display device, a Mini-LED display device, or a Micro-LED display device. The embodiments of this application will be described using an LCD display device as an example.

[0028] In embodiments of this application, the display device includes a display panel, a first circuit board CB, a second circuit board XB, a flexible connector, and an anti-misalignment protection circuit. The display panel is used to display images. The first circuit board CB and the second circuit board XB are separately disposed, and the flexible connector connects the first circuit board CB and the second circuit board XB to achieve an electrical connection between the first circuit board CB and the second circuit board XB. The second circuit board XB is electrically connected to the display panel to transmit drive signals to the display panel. The flexible connector is a flexible flat cable or a flexible printed circuit board. In a specific embodiment of this application, the display device is a liquid crystal display (LCD), the first circuit board CB is a control board (C board), and the second circuit board XB is a driver board (X board).

[0029] In liquid crystal display devices, the display panel is a liquid crystal display panel (DP). For example... Figure 1 As shown, the liquid crystal display panel DP includes a gate driving circuit GOA, multiple gate lines GL, multiple data lines DL, and multiple pixel units PX. The gate driving circuit GOA is electrically connected to the multiple gate lines GL and provides gate scan signals to the multiple gate lines GL. The multiple gate lines GL extend along a first direction, and the multiple data lines DL extend along a second direction intersecting the first direction. The multiple gate lines GL and multiple data lines DL intersect to form an array of pixel units PX. A source driver chip SDIC is disposed on a flexible connector connecting the second circuit board XB and the liquid crystal display panel DP. The source driver chip SDIC is electrically connected to the multiple data lines DL and provides data signals to the multiple data lines DL. A timing controller TCON is disposed on the first circuit board CB. The timing controller TCON is electrically connected to the source driver chip SDIC and provides control signals and image data signals to the source driver chip SDIC. The timing controller TCON is also used to provide control signals to the gate driving circuit GOA. The pixel unit PX receives the gate scan signal through the gate line GL and the data signal through the data line DL to drive the liquid crystal molecules to deflect, thereby realizing image display.

[0030] like Figure 2 and Figure 3 As shown, the anti-misalignment protection circuit includes a first switching unit, a second switching unit, and a third switching unit. The first switching unit is disposed on the first circuit board CB, and the second and third switching units are disposed on the second circuit board XB. The anti-misalignment protection circuit controls the conduction and cutoff of the first, second, and third switching units in different states, enabling a portion of the circuitry on the flexible connector to function as a misalignment detection circuit in the detection state and as a functional signal transmission line in the normal operating state.

[0031] The first circuit board CB houses a timing controller TCON and a power management chip PMIC. The timing controller TCON controls the timing of the LCD panel DP and detects the connection status of the flexible connectors through its general purpose input / output (GPIO) ports. The power management chip PMIC provides various operating voltages to the display device. The anti-misalignment protection circuit also includes a detection signal terminal, a first control signal terminal PMIC_EN, and a second control signal terminal VAA. The detection signal terminal is electrically connected to the GPIO port of the timing controller TCON. The first control signal terminal PMIC_EN is electrically connected to the enable signal output terminal of the timing controller TCON and simultaneously to the enable signal input terminal of the power management chip PMIC. The second control signal terminal VAA is electrically connected to the voltage output terminal of the power management chip PMIC.

[0032] like Figure 2 and Figure 3As shown, the first terminal of the first switching unit is electrically connected to the detection signal terminal, the second terminal of the first switching unit is electrically connected to the flexible connector, and the control terminal of the first switching unit is electrically connected to the first control signal terminal PMIC_EN. The first switching unit includes a first transistor Q1 and a second transistor Q2. The detection signal terminal includes a first detection terminal GPIO1 and a second detection terminal GPIO2. Both the first detection terminal GPIO1 and the second detection terminal GPIO2 are electrically connected to the general purpose input / output port GPIO of the timing controller TCON. The gates of the first transistor Q1 and the second transistor Q2 are both electrically connected to the first control signal terminal PMIC_EN. One of the source and drain of the first transistor Q1 is electrically connected to the first detection terminal GPIO1, and the other of the source and drain of the first transistor Q1 is electrically connected to the first line W1 of the flexible connector. One of the source and drain of the second transistor Q2 is electrically connected to the second detection terminal GPIO2, and the other of the source and drain of the second transistor Q2 is electrically connected to the second line W2 of the flexible connector. The first transistor Q1 and the second transistor Q2 are P-type transistors.

[0033] The first terminal of the second switching unit is electrically connected to the flexible connector, the second terminal of the second switching unit is electrically connected to the flexible connector, and the control terminal of the second switching unit is electrically connected to the second control signal terminal VAA. The second switching unit includes a third transistor Q3 and a fourth transistor Q4. The gates of both the third transistor Q3 and the fourth transistor Q4 are electrically connected to the second control signal terminal VAA. One of the source and drain of the third transistor Q3 is electrically connected to the first line W1 of the flexible connector, and the other of the source and drain of the third transistor Q3 is electrically connected to one of the source and drain of the fourth transistor Q4. The other of the source and drain of the fourth transistor Q4 is electrically connected to the second line W2 of the flexible connector. The third transistor Q3 and the fourth transistor Q4 are P-type transistors.

[0034] like Figure 2 and Figure 3As shown, the second circuit board XB also has a signal output terminal for electrical connection with the display panel. The first terminal of the third switching unit is electrically connected to the flexible connector, the second terminal of the third switching unit is electrically connected to the signal output terminal, and the control terminal of the third switching unit is electrically connected to the second control signal terminal VAA. The third switching unit includes a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, and an eighth transistor Q8. The signal output terminal includes a first output terminal OP1, a second output terminal OP2, a third output terminal OP3, and a fourth output terminal OP4. The gates of the fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7, and the eighth transistor Q8 are all electrically connected to the second control signal terminal VAA. One of the source and drain of the fifth transistor Q5 is electrically connected to the first line W1 of the flexible connector, and the other of the source and drain of the fifth transistor Q5 is electrically connected to the first output terminal OP1. One of the source and drain of the sixth transistor Q6 is electrically connected to the third line W3 of the flexible connector, and the other of the source and drain of the sixth transistor Q6 is electrically connected to the third output terminal OP3. One of the source and drain of the seventh transistor Q7 is electrically connected to the fourth line W4 of the flexible connector, and the other of the source and drain of the seventh transistor Q7 is electrically connected to the fourth output terminal OP4. One of the source and drain of the eighth transistor Q8 is electrically connected to the second line W2 of the flexible connector, and the other of the source and drain of the eighth transistor Q8 is electrically connected to the second output terminal OP2. The fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7, and the eighth transistor Q8 are N-type transistors.

[0035] In one embodiment of this application, such as Figure 2 and Figure 3 As shown, the second circuit board XB includes a first sub-circuit board XB1 and a second sub-circuit board XB2. A third transistor Q3, a fifth transistor Q5, and a sixth transistor Q6 are disposed on the first sub-circuit board XB1. A fourth transistor Q4, a seventh transistor Q7, and an eighth transistor Q8 are disposed on the second sub-circuit board XB2. The flexible connectors include a first flexible connector LB1 and a second flexible connector LB2. One end of the first flexible connector LB1 is electrically connected to the first circuit board CB, and the other end of the first flexible connector LB1 is electrically connected to the first sub-circuit board XB1. One end of the second flexible connector LB2 is electrically connected to the first circuit board CB, and the other end of the second flexible connector LB2 is electrically connected to the second sub-circuit board XB2. A first line W1 and a third line W3 are located on the first flexible connector LB1, and a second line W2 and a fourth line W4 are located on the second flexible connector LB2.

[0036] To achieve comprehensive detection of the skewed insertion state of the flexible connector, one of the source and drain of the third transistor Q3 is also electrically connected to one of the source and drain of the sixth transistor Q6, i.e., the third transistor Q3 is connected between the first line W1 and the third line W3. One of the source and drain of the fourth transistor Q4 is also electrically connected to one of the source and drain of the seventh transistor Q7, i.e., the fourth transistor Q4 is connected between the second line W2 and the fourth line W4. The other of the source and drain of the third transistor Q3 is electrically connected to the connection trace W5 on the first circuit board CB via the third line W3 of the first flexible connector LB1, and one of the source and drain of the fourth transistor Q4 is electrically connected to the connection trace W5 via the fourth line W4 of the second flexible connector LB2. This connection method ensures that, under detection conditions, the first line W1 on the first flexible connector LB1, the third transistor Q3, the third line W3 on the first flexible connector LB1, the connection trace W5 on the first circuit board CB, the fourth line W4 on the second flexible connector LB2, the fourth transistor Q4, and the second line W2 on the second flexible connector LB2 form a series path, thereby effectively detecting the insertion status at both ends of the two flexible connectors. When either end of any flexible connector is not fully inserted into the connector, the series path cannot form a complete conductive path, and the timing controller TCON detects a connection abnormality.

[0037] The display device has two operating states: a first state and a second state. The first state is a detection state, used to detect whether the flexible connector is inserted at an angle. The second state is the normal operating state, in which the display device operates normally.

[0038] During the initial power-on phase of the display device, for example, after inputting a 12V power supply voltage, the timing controller TCON outputs a priority voltage, such as 0.9V, and the timing controller TCON begins operation. At this time, the power management chip PMIC has not yet started, and the second control signal terminal VAA has no voltage output and is in a low-level state. The timing controller TCON outputs a low-level signal to the first control signal terminal PMIC_EN.

[0039] like Figure 2As shown, in the first state, the first and second switching units are in the ON state, and the third switching unit is in the OFF state. Specifically, the gates of the first transistor Q1 and the second transistor Q2 are turned on after receiving a low-level signal. The gates of the third transistor Q3 and the fourth transistor Q4 are turned on after receiving a low-level signal, i.e., the second control signal terminal VAA is low. The gates of the fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7, and the eighth transistor Q8 are turned off after receiving a low-level signal. At this time, the detection signal terminal, the first switching unit, the flexible connector, and the second switching unit form a conducting detection loop. Specifically, the first detection terminal GPIO1, the first transistor Q1, the first line W1 of the first flexible connector LB1, the third transistor Q3, the third line W3 of the first flexible connector LB1, the connection trace W5 on the first circuit board CB, the fourth line W4 of the second flexible connector LB2, the fourth transistor Q4, the second line W2 of the second flexible connector LB2, the second transistor Q2, and the second detection terminal GPIO2 form a detection loop. Meanwhile, since the third transistor Q3 is also connected to the third line W3, and the fourth transistor Q4 is also connected to the fourth line W4, the conduction of this detection loop also depends on the overall contact condition of the flexible connector. The timing controller TCON detects the conduction status of this detection loop through its general purpose input / output (GPIO) ports.

[0040] If the flexible connector is correctly inserted into the connector, a complete conductive path is formed between the first line W1 of the first flexible connector LB1 and the second line W2 of the second flexible connector LB2 through the third transistor Q3, the third line W3 of the first flexible connector LB1, the connection trace W5 on the first circuit board CB, the fourth line W4 of the second flexible connector LB2, and the fourth transistor Q4. The detection circuit is activated, and the timing controller TCON detects this activation through the general purpose input / output port GPIO. The timing controller TCON determines that the flexible connector connection is normal and outputs a high-level signal to the first control signal terminal PMIC_EN. Upon receiving the high-level signal from the first control signal terminal PMIC_EN, the power management chip PMIC starts working and outputs a high-level voltage signal to the second control signal terminal VAA. The display device then enters the second state.

[0041] If the flexible connector is inserted at an angle, the conductive pins of the flexible connector will make misaligned contact with the connector contacts. A complete conductive path will not be formed between the first line W1 and the second line W2 of the flexible connector, resulting in a non-conductive detection circuit. The timing controller TCON will detect this non-conductive circuit through the general purpose input / output port GPIO. The timing controller TCON will determine that the flexible connector connection is abnormal and will either not output a high-level signal or output an invalid signal to the first control signal terminal PMIC_EN. The power management chip PMIC will not receive a valid enable signal and will not output operating voltage. The display device will remain in the first state and will not transition to the second state. In this case, the insertion position of the flexible connector needs to be adjusted, and the connector re-inserted. Then, the display device should be powered on again for testing.

[0042] like Figure 3 As shown, in the second state, the first and second switching units are in the off state, and the third switching unit is in the on state. The timing controller TCON is configured to output a high-level signal to the first control signal terminal PMIC_EN. The gates of the first transistor Q1 and the second transistor Q2 are turned off upon receiving the high-level signal, thereby disconnecting the general purpose input / output (GPIO) port from the flexible connector to prevent signal interference. The power management chip PMIC is configured to start working upon receiving a high-level signal from the first control signal terminal PMIC_EN, outputting a high-level voltage signal to the second control signal terminal VAA. The gates of the third transistor Q3 and the fourth transistor Q4 are turned off upon receiving the high-level voltage signal, disconnecting the detection circuit. The gates of the fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7, and the eighth transistor Q8 are turned on upon receiving the high-level voltage signal. At this time, the detection circuit is disconnected, and the flexible connector transmits the functional signal to the signal output terminal through the third switching unit.

[0043] In the second state, the first line W1 of the flexible connector transmits a function signal to the first output terminal OP1 through the conducting fifth transistor Q5. The second line W2 of the flexible connector transmits a function signal to the second output terminal OP2 through the conducting eighth transistor Q8. The third line W3 of the flexible connector transmits a function signal to the third output terminal OP3 through the conducting sixth transistor Q6. The fourth line W4 of the flexible connector transmits a function signal to the fourth output terminal OP4 through the conducting seventh transistor Q7. The first output terminal OP1, the second output terminal OP2, the third output terminal OP3, and the fourth output terminal OP4 are electrically connected to the display panel, transmitting drive signals to the display panel. After receiving the drive signals, the display panel displays the image normally.

[0044] In one specific embodiment of this application, the first flexible connector LB1 and the second flexible connector LB2 are 96-pin flexible flat cables. The first line W1 corresponds to pin 70 of the first flexible connector LB1, and the third line W3 corresponds to pin 5 of the first flexible connector LB1. The second line W2 corresponds to pin 70 of the second flexible connector LB2, and the fourth line W4 corresponds to pin 5 of the second flexible connector LB2. The first output terminal OP1 and the second output terminal OP2 are used to transmit a 3.3-volt power supply voltage to the display panel. The third output terminal OP3 and the fourth output terminal OP4 are used to transmit a gamma voltage to the display panel. In the second state, the first line W1 and the second line W2 transmit a 3.3-volt power supply voltage, and the third line W3 and the fourth line W4 transmit a gamma voltage. Since pins 70 and 5 are far apart on the connector, a detection circuit is constructed using these two pins. In the detection state, when both ends of the connector are fully inserted, a complete conductive path is formed between the first line W1 and the second line W2, and between the third line W3 and the fourth line W4. Only then is the entire detection circuit conductive, thus accurately identifying misalignment faults.

[0045] Through the above technical solution, the display device performs oblique insertion detection at the initial power-on stage, with a short detection response time, completing the detection within milliseconds. In the detection state, some lines on the flexible connector, such as those for transmitting power supply voltage and gamma voltage, are used as oblique insertion detection circuits. This eliminates the need for dedicated anti-oblique insertion detection pins on the flexible connector, avoiding the space occupation problem associated with dedicated anti-oblique insertion detection pins, making it particularly suitable for high-resolution, narrow-bezel display products. In normal operation, the lines on the flexible connector revert to functional signal transmission lines, achieving dual-function multiplexing of the lines. When an abnormal connection of the flexible connector is detected, the power management chip (PMIC) is prevented from outputting its operating voltage, avoiding damage to components such as the driver integrated circuit and power management chip caused by overcurrent due to oblique insertion. This reduces the scrap rate and repair costs of the display device, and improves production yield.

[0046] The embodiments of this application have been described in detail above. The content of this specification should not be construed as limiting the scope of protection of this application.

Claims

1. A display device, characterized in that, The display device includes a display panel, a first circuit board, a second circuit board, and a flexible connector connecting the first circuit board and the second circuit board. The display device also includes an anti-misalignment protection circuit. The anti-misalignment protection circuit includes a first switching unit, a second switching unit, and a third switching unit; The first switching unit is disposed on the first circuit board. The first end of the first switching unit is electrically connected to the detection signal terminal, the second end of the first switching unit is electrically connected to the flexible connector, and the control terminal of the first switching unit is electrically connected to the first control signal terminal. The second switch unit and the third switch unit are disposed on the second circuit board, and the second circuit board is also provided with a signal output terminal for electrical connection with the display panel; The first end of the second switching unit is electrically connected to the flexible connector, the second end of the second switching unit is electrically connected to the flexible connector, and the control end of the second switching unit is electrically connected to the second control signal end. The first end of the third switch unit is electrically connected to the flexible connector, the second end of the third switch unit is electrically connected to the signal output end, and the control end of the third switch unit is electrically connected to the second control signal end. In the first state, the first switch unit and the second switch unit are in the on state, the third switch unit is in the off state, and the detection signal terminal, the first switch unit, the flexible connector and the second switch unit form a conducting detection loop; In the second state, the first and second switch units are in the off state, the third switch unit is in the on state, and the flexible connector transmits a functional signal to the signal output terminal through the third switch unit.

2. The display device according to claim 1, characterized in that, The first switching unit includes a first transistor and a second transistor, and the detection signal terminal includes a first detection terminal and a second detection terminal; The gates of the first transistor and the second transistor are both electrically connected to the first control signal terminal; One of the source and drain of the first transistor is electrically connected to the first detection terminal, and the other of the source and drain of the first transistor is electrically connected to the first line of the flexible connector. One of the source and drain of the second transistor is electrically connected to the second detection terminal, and the other of the source and drain of the second transistor is electrically connected to the second line of the flexible connector.

3. The display device according to claim 2, characterized in that, The second switching unit includes a third transistor and a fourth transistor; The gates of the third transistor and the fourth transistor are both electrically connected to the second control signal terminal. One of the source and drain of the third transistor is electrically connected to the first line of the flexible connector, and the other of the source and drain of the third transistor is electrically connected to the third line of the flexible connector. One of the source and drain of the fourth transistor is electrically connected to the fourth line of the flexible connector, and the other of the source and drain of the fourth transistor is electrically connected to the second line of the flexible connector. The first circuit board is provided with connecting traces, and the third and fourth lines of the flexible connector are electrically connected through the connecting traces; In the first state, the first detection terminal, the first transistor, the first line of the flexible connector, the third transistor, the third line of the flexible connector, the connection trace on the first circuit board, the fourth line of the flexible connector, the fourth transistor, the second line of the flexible connector, the second transistor, and the second detection terminal form the detection circuit.

4. The display device according to claim 3, characterized in that, The third switching unit includes a fifth transistor and an eighth transistor, and the signal output terminal includes a first output terminal and a second output terminal; The gates of the fifth transistor and the eighth transistor are both electrically connected to the second control signal terminal. One of the source and drain of the fifth transistor is electrically connected to the first line of the flexible connector, and the other of the source and drain of the fifth transistor is electrically connected to the first output terminal. One of the source and drain of the eighth transistor is electrically connected to the second line of the flexible connector, and the other of the source and drain of the eighth transistor is electrically connected to the second output terminal.

5. The display device according to claim 4, characterized in that, The third switching unit further includes a sixth transistor and a seventh transistor, and the signal output terminal further includes a third output terminal and a fourth output terminal; The gates of the sixth transistor and the seventh transistor are both electrically connected to the second control signal terminal. One of the source and drain of the sixth transistor is electrically connected to the third line of the flexible connector, and the other of the source and drain of the sixth transistor is electrically connected to the third output terminal. One of the source and drain of the seventh transistor is electrically connected to the fourth line of the flexible connector, and the other of the source and drain of the seventh transistor is electrically connected to the fourth output terminal. The other of the source and drain of the third transistor is also electrically connected to the source and drain of the sixth transistor. One of the source and drain of the fourth transistor is also electrically connected to one of the source and drain of the seventh transistor.

6. The display device according to claim 5, characterized in that, The first transistor, the second transistor, the third transistor, and the fourth transistor are P-type transistors; The fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are N-type transistors.

7. The display device according to claim 1, characterized in that, A timing controller is provided on the first circuit board, the detection signal terminal is electrically connected to the general-purpose input / output port of the timing controller, and the first control signal terminal is electrically connected to the enable signal output terminal of the timing controller. The timing controller is configured to output a low-level signal to the first control signal terminal in the first state, and to detect the conduction state of the detection loop through the general-purpose input / output port.

8. The display device according to claim 7, characterized in that, The first circuit board is also provided with a power management chip, which is electrically connected to the first control signal terminal, and the second control signal terminal is electrically connected to the voltage output terminal of the power management chip. The power management chip is configured to output a high-level voltage signal to the second control signal terminal after receiving a high-level signal from the first control signal terminal.

9. The display device according to claim 5, characterized in that, The second circuit board includes a first sub-circuit board and a second sub-circuit board; The third transistor, the fifth transistor, and the sixth transistor are disposed on the first sub-circuit board; The fourth transistor, the seventh transistor, and the eighth transistor are disposed on the second sub-circuit board; The first circuit board is provided with connecting traces. The first sub-circuit board is electrically connected to the connecting traces through the third line of the flexible connector. The second sub-circuit board is electrically connected to the connecting traces through the fourth line of the flexible connector.

10. The display device according to claim 9, characterized in that, The flexible connector includes a first flexible connector and a second flexible connector; One end of the first flexible connector is electrically connected to the first circuit board, and the other end of the first flexible connector is electrically connected to the first sub-circuit board. One end of the second flexible connector is electrically connected to the first circuit board, and the other end of the second flexible connector is electrically connected to the second sub-circuit board; The first line and the third line are located on the first flexible connector, and the second line and the fourth line are located on the second flexible connector; The third line of the first flexible connector and the fourth line of the second flexible connector are electrically connected through the connection traces on the first circuit board.

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