Double-chip packaging structure based on double-sided chip on film

Abstract

The invention discloses a double-chip packaging structure based on a double-sided chip-on-film, and belongs to the field of semiconductor packaging, the double-chip packaging structure based on the double-sided chip-on-film comprises a chip-on-film (Tape), double chips, a copper through hole, a circuit layer, a solder mask layer and a glue sealing area, the chip-on-film is of a multi-layer composite structure and comprises a base material, a conductive layer, an insulating layer and an interlayer adhesive, the base material is a thermoplastic PI material; a through hole is formed in the base material, and the manufacturing process of the through hole comprises the steps of forming the through hole through laser processing, coarsening the wall surface of the through hole through plasma etching, forming a copper wall on the wall surface of the through hole through a chemical plating process, and filling copper through a plating process to form the copper through hole; the double chips are inversely packaged on the chip on film through a wafer bump; through the double-sided circuit design, the circuit layout space is doubled, the problem of dense circuits of multi-IC packaging is solved, the manufacturing difficulty and the short circuit risk are reduced, and meanwhile the production cost is reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and in particular to a dual-chip packaging structure based on double-sided flip-chip films. Background Technology

[0002] As a new type of packaging carrier, COFTape has advantages over traditional flexible printed circuit boards (FPCs), such as direct flip-chip packaging, micron-level fine wiring, narrow bezels, bend resistance, ultra-thinness (less than 0.1mm thick), and good heat dissipation. It is widely used in high-end display and touch device fields.

[0003] However, the current mainstream design of flip-chip films in the industry can only package one IC, and there are the following technical bottlenecks: Circuit layout limitations: The circuit layer of flip-chip film needs to provide power and signal transmission channels for ICs. If multiple ICs are packaged, multiple independent circuit networks need to be designed, resulting in a dense circuit layout. This not only significantly increases the manufacturing difficulty and cost, but also easily leads to the risk of short circuits due to circuit crossing. Low space utilization: Most existing flip-chip films are single-sided circuit designs, with material layers and ICs laid out on only one side, while the other side is a non-functional back side that can only be passively cooled by attaching heat dissipation stickers, resulting in ineffective use of space resources. Impedance matching challenge: Dual IC packages require the design of matching impedance lines for each IC, and the impedance coupling effect between ICs must be considered. The design complexity is extremely high, and impedance matching failure can easily lead to IC malfunction or even failure. Insufficient heat dissipation: When multiple ICs work at the same time, local heat concentration occurs on the flip-chip film of a single-sided circuit, which can easily cause film aging and deformation, affecting the stability and service life of the packaging structure.

[0004] To address the shortcomings of the existing technology, this invention proposes a dual-chip packaging structure based on double-sided flip-chip film, which optimizes circuit layout, impedance matching, and heat dissipation performance, and adapts to the needs of multi-IC collaborative operation. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a dual-chip packaging structure based on double-sided flip-chip film, which solves the problems mentioned in the background section.

[0006] Technical Solution: To solve the above-mentioned technical problems, according to one aspect of the present invention, more specifically, a dual-chip packaging structure based on a double-sided flip-chip film, comprising a flip-chip film (Tape), two chips, copper vias, a circuit layer, a solder resist layer, and an encapsulation area, as detailed below: The flip-chip film has a multilayer composite structure, including a substrate, a conductive layer, an insulating layer, and an interlayer adhesive. The substrate is a thermoplastic PI material. The substrate is provided with through holes, and the manufacturing process of the through holes is as follows: laser processing to form through holes → plasma etching to roughen the through hole wall surface → chemical plating process to form copper wall on the through hole wall surface → electroplating process to fill copper to form the copper through holes; The dual chips are flip-chip packaged onto the flip-chip film via wafer bumps. The flip-chip film has circuit layers on both the front and back sides. The dual chips are electrically interconnected with the circuit layers through the copper vias. The solder resist layer covers the surface of the circuit layer, achieving a firm bond between the circuit and the substrate and providing insulation protection; The encapsulation area surrounds the dual chips and is used to enhance the adhesion between the dual chips and the flip-chip film.

[0007] Furthermore, the dual chips are packaged on the same side of the flip-chip film, and the flip-chip film has only one set of input / output (I / O) interface lines. The input / output interface lines are located on the front circuit layer of the flip-chip film, and the back circuit layer of the flip-chip film is the interconnection circuit layer of the dual chips.

[0008] Furthermore, the back-side circuit layer is designed with linewidth and line spacing adapted to the input / output impedance of the two chips, and a heat dissipation pad is attached to the back of the flip-chip film, which covers the corresponding area of ​​the two chips.

[0009] Furthermore, the dual chips are respectively packaged on the front and back of the flip-chip film in a mirror layout. The front and back of the flip-chip film are each provided with an independent input / output (I / O) interface line. The flip-chip film is also provided with a grounding via. The copper vias are evenly arranged around the copper vias for signal transmission and avoid the traces of the circuit layer.

[0010] Furthermore, the dual chips are functional combination ICs, which are selected from a combination of a touch driver IC and a display driver IC, or a combination of dual OLED driver ICs.

[0011] Furthermore, the thermoplastic PI material possesses high toughness, making it suitable for the repeated bending requirements of foldable screens.

[0012] Furthermore, the copper wall thickness formed by the electroplating process is 2-5 micrometers.

[0013] Furthermore, the dual-chip configuration is a combination of a touch driver IC and a display driver IC. In the back-side circuit layer, the touch signal lines use narrow wiring to increase impedance, while the display signal lines use wide wiring to reduce impedance.

[0014] Furthermore, the dual chips are dual OLED driver ICs, used to drive the main screen area and the secondary screen area of ​​the OLED panel respectively.

[0015] The beneficial effects of the dual-chip packaging structure based on double-sided flip-chip film of the present invention are as follows: (1) The present invention doubles the circuit layout space through double-sided circuit design, which solves the problem of dense circuits in multi-IC packaging, reduces manufacturing difficulty and short circuit risk, and reduces production cost. (2) The impedance matching of the present invention is accurate: the line width and line spacing of the dual IC can be adapted to its own impedance through independent line layer design on the front / back side, avoiding impedance coupling effect, ensuring signal transmission efficiency, and preventing IC malfunction. (3) The copper through-hole and double-sided circuit layer of the present invention expand the heat dissipation area. Combined with the selective mounting of the heat dissipation pad, it effectively disperses the local heat when multiple ICs are working, delays tape aging and deformation, and improves the stability of the packaging structure. (4) The two embodiments of the present invention are respectively adapted to the functionally complementary and independently working dual IC combination, which can meet the needs of different scenarios such as integrated touch display and dual-screen partition driving; The substrate is made of high-toughness thermoplastic PI, combined with a bend-resistant double-sided circuit and encapsulation structure, which can meet the requirements of repeated bending of foldable screens. Attached Figure Description

[0016] The present invention will now be described in further detail with reference to the accompanying drawings and specific implementation methods.

[0017] Figure 1 This is a schematic diagram of the structure of Embodiment 1 of the present invention (dual-chip same-side packaging); Figure 2 This is a schematic diagram of the structure of Embodiment 2 (dual-chip opposite-side packaging) of the present invention.

[0018] In the diagram: 1. Encapsulation area; 2. IC; 3. Wafer bump; 4. Copper via; 5. Solder mask; 6. Circuit layer; 7. Substrate; 8. Thermal pad. Detailed Implementation

[0019] The present invention will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in the present application can be combined with each other.

[0020] To make the technical solution of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0021] Reference Figure 1 and Figure 2 The dual-chip packaging structure based on double-sided flip-chip film includes two implementation methods. The core lies in the double-sided circuit design of the flip-chip film (hereinafter referred to as "Tape") and the layout optimization of the dual chips. The specific technical solutions are as follows: 1. Basic Design of Packaging Structure The Tape is a multi-layer composite structure, which includes a substrate 7, a conductive layer, an insulating layer and an interlayer adhesive in sequence from top to bottom (or from inside to outside); the substrate 7 is made of thermoplastic PI material, which has high toughness to adapt to the repeated bending requirements of foldable screens.

[0022] The through-hole fabrication process of the Tape is as follows: a laser is used to process through-holes at the preset wiring positions on the substrate 7, the through-hole wall is roughened by plasma etching, a copper wall with a thickness of 2-5 micrometers is formed on the through-hole wall by chemical plating (as an electroplating conductive electrode), and then copper is filled into the through-hole by electroplating to form a conductive circuit (copper through-hole 4) for signal transmission or grounding.

[0023] The encapsulation structure also includes an encapsulation area 1, a solder resist layer 5, and a thermal pad 8: the encapsulation area 1 surrounds the IC2 to enhance the bonding force between the IC2 and the tape and to disperse the stress caused by the mismatch of the thermal expansion coefficients of different materials; the solder resist layer 5 covers the surface of the circuit layer 6 to achieve a firm bond and insulation protection between the circuit and the substrate 7; the thermal pad 8 can be selectively mounted on the back of the IC2 or the back of the tape to enhance the heat dissipation effect.

[0024] The dual chips are functional combination IC2, including but not limited to: touch driver IC2 and display driver IC2 (functionally complementary), dual OLED driver IC2 (independently working), etc. Example 1

[0025] Reference Figure 1 Dual-chip same-side packaging structure This implementation method is applicable to a combined IC2 with complementary functions and upstream and downstream signal linkage (such as touch driver IC2 + display driver IC2), and the specific structure is as follows: The dual-chip flip package is located on the same side of the tape (defined as the front side), and the electrical connection is achieved through the wafer bump 3 on IC2 and the copper via 4 of the tape using a bonding process. The front-side line layer 6 of the Tape is designed as an input / output (I / O) interface line for interconnection with external circuits, and only one set of I / O interfaces is provided; On the other side (back side) of the Tape, a copper circuit layer 6 is laid as an interconnection circuit layer 6 between the two chips. The interconnection signals between the two chips are made possible by copper vias 4 to achieve circuit conduction on both sides. Based on the independent space of the back-side wiring layer 6, the line width and line spacing of the two IC2 are designed to adapt to their input / output impedance: for example, the touch signal line uses narrow wiring to increase impedance, and the display signal line uses wide wiring to reduce impedance, without being constrained by the single-sided wiring space. The thermal pad 8 is attached to the back of the tape, covering the area corresponding to the dual IC2. Combined with the copper via 4 and the copper circuit layer 6 on the back, it expands the heat dissipation area and improves heat dissipation efficiency. Example 2

[0026] Reference Figure 2 Dual-chip off-side packaging structure This implementation method is applicable to a combined IC2 with independent input / output requirements (such as dual OLED driver IC2, driving the main screen area and the secondary screen area respectively), and the specific structure is as follows: The two chips are flip-chip packaged on both sides of the tape (defined as the front and back sides) in a mirror layout, and the electrical interconnection between the two chips is directly achieved through copper via 4; The Tape has independent input / output (I / O) interface lines on the front and back, with a total of 2 sets of I / O interfaces, which are interconnected with corresponding external loads (such as the main screen area and the secondary screen area). To improve impedance continuity, the wiring design is optimized by setting ground vias on both the front and back of the tape, which are used in conjunction with copper vias 4 for signal transmission. The ground vias are evenly distributed around the signal vias to shorten the signal return path and reduce impedance mismatch caused by via parasitic parameters. At the same time, the ground vias avoid the signal traces to prevent the formation of parasitic capacitances that affect signal quality. Thermal pads 8 are applied to the corresponding areas of IC2 on the front and back of the Tape to further improve heat dissipation.

[0027] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A dual-chip packaging structure based on a double-sided flip-chip film, comprising a flip-chip film, dual chips, copper vias (4), a circuit layer (6), a solder resist layer (5), and an encapsulation area (1), characterized in that: The flip-chip film has a multilayer composite structure, including a substrate (7), a conductive layer, an insulating layer and an interlayer adhesive, wherein the substrate (7) is a thermoplastic PI material; The substrate (7) has through holes, and the manufacturing process of the through holes is as follows: Laser processing forms through holes → plasma etching roughens the through hole wall → chemical plating process forms copper wall on the through hole wall → electroplating process fills copper to form the copper through hole (4). The dual chips are flip-chip packaged on the flip film via wafer bumps (3). The flip film has the circuit layer (6) on both the front and back sides. The dual chips are electrically interconnected with the circuit layer (6) through the copper via (4). The solder resist layer (5) covers the surface of the circuit layer (6) to achieve a firm bond between the circuit and the substrate (7) and provide insulation protection. The encapsulation area (1) is arranged around the dual chip to enhance the adhesion between the dual chip and the flip-chip film; A heat dissipation sticker (8) is attached to the back of the flip-chip film, and the heat dissipation sticker (8) covers the area corresponding to the dual chips.

2. The dual-chip packaging structure based on double-sided flip-chip film according to claim 1, characterized in that, The dual chips are packaged on the same side of the flip-chip film. The flip-chip film has only one set of input / output (I / O) interface lines. The input / output interface lines are located on the front circuit layer (6) of the flip-chip film. The back circuit layer (6) of the flip-chip film is the interconnection circuit layer (6) of the dual chips.

3. The dual-chip packaging structure based on double-sided flip-chip film according to claim 2, characterized in that, The back-side line layer (6) consists of line widths and line spacings designed to accommodate the input / output impedances of the two chips.

4. The dual-chip packaging structure based on double-sided flip-chip film according to claim 1, characterized in that, The dual chips are respectively packaged on the front and back of the flip-chip film in a mirror layout, and the front and back of the flip-chip film are respectively provided with a set of independent input / output (I / O) interface lines; The flip-chip film is also provided with grounding vias, which are evenly arranged around the copper vias (4) for signal transmission and avoid the traces of the circuit layer (6).

5. The dual-chip packaging structure based on double-sided flip-chip film according to claim 1, characterized in that, The dual-chip is a functional combination IC (2), which is selected from a combination of a touch driver IC (2) and a display driver IC (2), or a combination of dual OLED driver ICs (2).

6. The dual-chip packaging structure based on double-sided flip-chip film according to claim 1, characterized in that, The thermoplastic PI material has high toughness, making it suitable for the repeated bending requirements of foldable screens.

7. The dual-chip packaging structure based on double-sided flip-chip film according to claim 1, characterized in that, The copper wall thickness formed by the electroplating process is 2-5 micrometers.

8. The dual-chip packaging structure based on double-sided flip-chip film according to claim 3, characterized in that, The dual chip is a combination of a touch driver IC (2) and a display driver IC (2). In the back circuit layer (6), the touch signal lines use narrow wiring to increase impedance, and the display signal lines use wide wiring to reduce impedance.

9. The dual-chip packaging structure based on double-sided flip-chip film according to claim 4, characterized in that, The dual chips are dual OLED driver ICs (2), which are used to drive the main screen area and the secondary screen area of ​​the OLED panel respectively.

Images