Compensation method, compensation circuit and display panel

Abstract

The application belongs to the technical field of display driving, and particularly relates to a compensation method, a compensation circuit and a display panel. The compensation method comprises the following steps: if a voltage difference between a first data voltage and a second data voltage is greater than a preset threshold, obtaining a first row period number corresponding to a time length of the first data voltage in a current frame and a second row period number corresponding to a time length of the second data voltage in the current frame; determining a compensation parameter according to the voltage difference, the first row period number or / and the second row period number; and outputting a compensation voltage to the current data line according to the compensation parameter in a vertical blanking period of the current frame. Therefore, through the cooperative work of jump detection, threshold screening, time quantization and blanking period compensation, the application not only improves the problem of the display panel current leakage, but also eliminates the vertical crosstalk and reduces the system power consumption.

Description

Technical Field

[0001] This disclosure belongs to the field of display driving technology, and specifically relates to a compensation method, a compensation circuit, and a display panel. Background Technology

[0002] As display panels evolve towards higher refresh rates, lower power consumption, longer lifespans, and narrower bezels, leakage current in pixel circuits has become a critical bottleneck. Specifically, leakage current mainly originates from the off-state current of thin-film transistors in pixel circuits, leading to problems such as uneven brightness, image retention, decreased contrast, and increased power consumption at low grayscale levels. Especially in low-frequency driving or standby scenarios, leakage current can cause noticeable flickering and display abnormalities.

[0003] Therefore, improving the leakage current of the display panel is an urgent problem to be solved. Summary of the Invention

[0004] This application provides a compensation method, a compensation circuit, and a display panel. Through the coordinated operation of jump detection, threshold screening, time quantization, and blanking period compensation, this application not only improves the leakage current problem of the display panel but also eliminates vertical crosstalk and reduces system power consumption.

[0005] In a first aspect, this application provides a compensation method, the compensation method comprising: detecting voltage jumps in the data voltage on the current data line during the scanning period of the current frame, obtaining a first data voltage before the jump and a second data voltage after the jump; if the voltage difference between the first data voltage and the second data voltage is greater than a preset threshold, obtaining the number of first row cycles corresponding to the duration of the first data voltage in the current frame, and the number of second row cycles corresponding to the duration of the second data voltage in the current frame; wherein the preset threshold corresponds to the minimum grayscale difference that generates perceptible vertical crosstalk on the display panel; determining compensation parameters based on the voltage difference, the number of first row cycles and / or the number of second row cycles; and outputting a compensation voltage to the current data line according to the compensation parameters during the vertical blanking period of the current frame.

[0006] Optionally, determining compensation parameters based on the voltage difference and the number of the second row cycles includes: determining a compensation duration based on the product of the number of the second row cycles and a unit row cycle; determining a reverse compensation voltage based on the voltage difference; wherein, when the absolute value of the voltage difference is less than a preset threshold, the reverse compensation voltage is 0; when the absolute value of the voltage difference is greater than the preset threshold, the reverse compensation voltage is the reverse of the voltage difference; and using the reverse compensation voltage and the compensation duration as the compensation parameters.

[0007] Optionally, during the vertical blanking period of the current frame, outputting a compensation voltage to the current data line according to the compensation parameters includes: adjusting the duration of the vertical blanking period of the current frame to be equal to the compensation duration according to the compensation parameters; during the adjusted vertical blanking period, outputting the reverse compensation voltage to the current data line, and controlling the start time of the reverse compensation voltage output to be synchronized with the start time of the adjusted vertical blanking period, the duration of the reverse compensation voltage output being equal to the compensation duration; after the reverse compensation voltage output ends, restoring the voltage of the current data line to a preset initial level.

[0008] Optionally, the compensation parameter is determined based on the voltage difference, the number of the first row cycles, and the number of the second row cycles, including: calculating an estimated leakage current based on the product of the absolute value of the voltage difference and a preset proportional coefficient; calculating the leakage duration based on the product of the number of the second row cycles and the duration of a unit row cycle; calculating a theoretical voltage offset based on the product of the estimated leakage current and the leakage duration, combined with the capacitance value of the storage capacitor in the pixel circuit; obtaining a final compensation offset based on the theoretical voltage offset and a correction factor; wherein the correction factor is negatively correlated with the number of the first row cycles; when the second data voltage is greater than the first data voltage, the active compensation voltage is the first data voltage minus the final compensation offset; when the second data voltage is less than the first data voltage, the active compensation voltage is the first data voltage plus the final compensation offset; and using the active compensation voltage as the compensation parameter.

[0009] Optionally, during the vertical blanking period of the current frame, outputting a compensation voltage to the current data line according to the compensation parameters includes: during the vertical blanking period of the current frame, turning on the switching transistor corresponding to the current data line and simultaneously outputting the active compensation voltage to the current data line; after the active compensation voltage output ends, restoring the voltage of the current data line to a preset initial level.

[0010] Optionally, during the vertical blanking period of the current frame, after outputting a compensation voltage to the current data line according to the compensation parameters, the compensation method further includes: within a preset time window after outputting the compensation voltage, sensing the actual luminous brightness of the pixel corresponding to the current data line through a photosensitive element; if the absolute value of the error between the actual luminous brightness and the target brightness exceeds a preset brightness error threshold, adjusting the compensation parameters according to the error, and outputting the adjusted compensation voltage during the vertical blanking period of the next frame; wherein, the target brightness is the brightness corresponding to the first data voltage.

[0011] Secondly, this application provides a compensation circuit applied to a compensation method. The compensation circuit includes: a voltage detection module electrically connected to the current data line, used to detect voltage jumps in the data voltage on the current data line during the current frame scanning period; if the voltage difference between the first data voltage before the jump and the second data voltage after the jump is greater than a preset threshold, a compensation trigger signal is output; a counting module connected to the output terminal of the voltage detection module, used to obtain, under the action of the compensation trigger signal, the number of first line cycles corresponding to the duration of the first data voltage in the current frame, and the number of second line cycles corresponding to the duration of the second data voltage in the current frame; a parameter calculation module connected to the counting module, used to determine compensation parameters based on the voltage difference, the number of first line cycles, and / or the number of second line cycles; and a compensation execution module connected to the parameter calculation module, used to output a compensation voltage to the current data line according to the compensation parameters during the vertical blanking period of the current frame.

[0012] Optionally, the voltage detection module includes: a first diode, the anode of which is connected to the current data line; a delay resistor, the first end of which is connected to the current data line; a delay capacitor, the first end of which is connected to the second end of the delay resistor, and the second end of the delay capacitor is grounded; a second diode, the anode of which is connected to the second end of the delay resistor; and a comparator, the first input terminal of which is connected to the cathode of the first diode, the second input terminal of which is connected to the cathode of the second diode, and the output terminal of which serves as the output terminal of the voltage detection module.

[0013] Optionally, the compensation circuit further includes at least one of the following: a photosensitive element, connected to the parameter calculation module, for sensing the actual luminous brightness of the pixel corresponding to the current data line, so that the parameter calculation module adjusts the compensation parameter according to the error between the actual luminous brightness and the target brightness; and a selection module, connected to the control terminal of the switching transistor in the parameter calculation module and the pixel circuit respectively, for selecting between active compensation and passive compensation.

[0014] Thirdly, this application provides a display panel, the display panel comprising: a pixel array, the pixel array including multiple data lines and multiple gate lines, and multiple pixel units defined by the intersection of the data lines and the gate lines; and a compensation circuit, the voltage detection module of the compensation circuit being electrically connected to the data lines, and the output terminal of the compensation execution module of the compensation circuit being electrically connected to the data lines.

[0015] The technical solution provided in this application has at least the following beneficial effects:

[0016] This application detects the voltage difference between the first data voltage before and after a jump on the current data line, and the second data voltage after the jump, and determines in real time whether the voltage difference exceeds a preset threshold. Compensation is only initiated when the voltage difference exceeds the minimum grayscale difference that can generate perceptible vertical crosstalk, avoiding ineffective compensation in scenarios where grayscale changes are gradual and leakage effects are not obvious, thus enabling on-demand activation of the compensation function. In addition, by obtaining the number of first row cycles corresponding to the first data voltage and the number of second row cycles corresponding to the second data voltage, the leakage time window is converted into a row cycle count value, so that the compensation amount can be correlated with the total leakage amount. Matching; in particular, by outputting a compensation voltage to the current data line according to the compensation parameters during the vertical blanking period of the current frame, the compensation action is performed using the inherent idle time period of the display driver. This not only avoids occupying the effective display time and affecting normal screen writing, but also promptly cancels the positive leakage current effect that has occurred in the current frame. The correction is completed within the earliest available time window after the leakage occurs, realizing the synergy of real-time compensation and zero-overhead compensation. Therefore, through the coordinated work of jump detection, threshold filtering, time quantization and blanking period compensation, this application not only improves the leakage current problem of the display panel, but also eliminates vertical crosstalk and reduces system power consumption. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0018] Figure 1 The diagram shown is a schematic diagram of a pixel circuit provided by related technologies.

[0019] Figure 2 The diagram shown is a flowchart of a compensation method provided in an embodiment of this application.

[0020] Figure 3 The diagram shown is a schematic representation of a passive compensation process provided in an embodiment of this application.

[0021] Figure 4 The figure shown is a timing diagram before compensation provided in an embodiment of this application.

[0022] Figure 5 The figure shown is a timing diagram of a compensated version provided in an embodiment of this application.

[0023] Figure 6 The figure shown is a timing diagram before compensation provided in another embodiment of this application.

[0024] Figure 7The figure shown is a timing diagram of another compensation provided in an embodiment of this application.

[0025] Figure 8 The diagram shown is a flowchart of an active compensation method provided in an embodiment of this application.

[0026] Figure 9 The diagram shown is a structural schematic of a compensation circuit provided in an embodiment of this application.

[0027] Figure 10 The diagram shown is a circuit diagram of a voltage detection module provided in an embodiment of this application.

[0028] Figure 11 The diagram shown is a structural schematic of another compensation circuit provided in an embodiment of this application.

[0029] Figure 12 The diagram shown is a structural schematic of another compensation circuit provided in an embodiment of this application.

[0030] Explanation of reference numerals in the attached figures: 100. Compensation circuit; 110. Voltage detection module; 120. Counting module; 130. Parameter calculation module; 140. Compensation execution module; 150. Photosensitive element; 160. Selection module; T1, Switching transistor; T2, Driving transistor; T3, Third transistor; OLED, Light-emitting diode; Cs, Storage capacitor; VR, Delay resistor; VC, Delay capacitor; U1, Comparator; OP1, First buffer; OP2, Second buffer; D1, First diode; D2, Second diode. Detailed Implementation

[0031] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0032] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0033] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0034] Taking an OLED display panel as an example, the pixel circuit involved adopts a 2T1C structure, such as... Figure 1 The diagram includes a switching transistor T1, a driving transistor T2, and a storage capacitor Cs. Its operation is divided into a charging phase and a holding phase, specifically: (1) Stage 1 (Charging Cycle): During the pixel's charging cycle, the data line provides a first data voltage Vdata1. This voltage is written to the control terminal of the driving transistor T2 through the switching transistor T1 and stored in the storage capacitor Cs. The driving transistor T2 generates a corresponding driving current according to the first data voltage Vdata1, enabling the organic light-emitting diode OLED to display the target brightness.

[0035] (2) Stage 2 (Holding Stage and Leakage Occurrence): After the pixel charging cycle ends, the pixel enters the holding stage. At this time, the control terminal of the switching transistor T1 is subjected to a turn-off voltage, and theoretically, the switching transistor T1 should be in the off state. However, due to the inherent subthreshold conduction characteristics of thin-film transistors (TFTs), even if the gate voltage is lower than the threshold voltage, there is still a weak leakage current between the source and drain.

[0036] Meanwhile, in order to drive other pixels in the same column, the source driver continuously outputs a second data voltage Vdata2 to the data line. When there is a significant voltage difference between the second data voltage Vdata2 and the first data voltage Vdata1 written in the previous stage (for example, the second data voltage Vdata2 corresponds to a high grayscale, and the first data voltage Vdata1 corresponds to a low grayscale), this voltage difference will drive leakage current from the data line through the switching transistor T1, which is in a weakly conducting state, to the control terminal of the driving transistor T2.

[0037] The aforementioned leakage current gradually alters the charge on the storage capacitor Cs, causing a shift in the gate voltage of the driving transistor T2, which in turn causes the driving current flowing through the OLED to deviate from the target value. This manifests macroscopically as vertical color crosstalk appearing in what should be a pure grayscale image. For example, when the upper half of the display is a low-grayscale pure color and the lower half is a high-grayscale color bar, the voltage of the high-grayscale data line in the lower half will affect the pixels already written to in the upper half through leakage, causing a color ghosting effect in the gray area of ​​the upper half, severely degrading the display quality.

[0038] Therefore, in order to improve the leakage current problem of the display panel, this application provides a compensation method, specifically including the following embodiments: Figure 2 The diagram shown is a flowchart illustrating a compensation method provided in an embodiment of this application; as follows: Figure 2 As shown, the compensation method in this embodiment is applied to display panels, including LCD display panels and OLED display panels, and specifically includes the following steps: Step S100: Detect the voltage jump of the data voltage on the current data line during the current frame scan period, and obtain the first data voltage before the jump and the second data voltage after the jump.

[0039] It should be noted that during the normal scanning process of the display panel, data voltages used to drive different pixel rows are transmitted on the data lines. This step detects in real time whether there is a voltage jump in the data voltage on the current data line during the current frame scanning period, obtaining the first data voltage before the jump and the second data voltage after the jump. Specifically: when pixels of different gray levels are driven successively on the same data line in a frame image, the data voltage will inevitably jump; for example, the previous row of pixels needs to display 64 gray levels (corresponding to the first data voltage Vdata1), and the next row of pixels needs to display 255 gray levels (corresponding to the second data voltage Vdata2).

[0040] Step S200: If the voltage difference between the first data voltage and the second data voltage is greater than a preset threshold, obtain the number of first line cycles corresponding to the duration of the first data voltage in the current frame, and the number of second line cycles corresponding to the duration of the second data voltage in the current frame.

[0041] It should be noted that in actual display, leakage current will only produce visually perceptible vertical crosstalk when the grayscale difference is sufficiently large (e.g., a jump from grayscale 64 to grayscale 255). The preset threshold is pre-calibrated as the minimum grayscale difference on the display panel that can produce visually perceptible vertical crosstalk. For small grayscale differences (e.g., from grayscale 120 to grayscale 121), the leakage current is minimal and will not cause significant image quality degradation, eliminating the need for wasted power consumption and timing resources for compensation. Therefore, in this embodiment, compensation is only performed when the voltage difference between the first data voltage and the second data voltage exceeds the preset threshold, which not only reduces system power consumption but also prevents overcompensation from causing new image quality problems.

[0042] Furthermore, in the display driver, the scan time of each pixel row is characterized by the row period (TP). By counting the row synchronization clock pulses, the exact number of row periods for each data voltage can be obtained. For example, in a frame, if the upper half (e.g., the first 540 rows) is 64 gray levels, then the first data voltage lasts for 540 row periods (number of first row periods = 540); if the lower half (the last 540 rows) is 255 gray levels, then the second data voltage lasts for 540 row periods (number of second row periods = 540). This embodiment quantifies the leakage duration to provide a precise time scale for subsequent compensation calculations, ensuring that the compensation duration matches the leakage duration.

[0043] Step S300: Determine the compensation parameters based on the voltage difference, the number of cycles in the first row, and / or the number of cycles in the second row.

[0044] It should be noted that the impact of leakage current on pixels is determined by both the magnitude of the leakage current (positively correlated with the voltage difference) and the duration of the leakage (positively correlated with the number of line cycles). This step combines the voltage difference, the number of the first line cycles, and the number of the second line cycles to generate a compensation parameter that can offset the leakage effect. This compensation parameter can be a reverse voltage value or a corrected data voltage value.

[0045] Step S400: During the vertical blanking period of the current frame, output a compensation voltage to the current data line according to the compensation parameters.

[0046] It should be noted that the vertical blanking period (Vblank) is the idle time period after each frame scan ends and before the next frame begins, during which no valid image data is written to the data line. This embodiment utilizes this idle window to apply a compensation voltage to the data line without interfering with normal display. The compensation voltage acts on the gate of the driving transistor of the target pixel through the leakage path of the switching transistor or an actively turned-on switching transistor, thereby offsetting the voltage shift caused by the previous forward leakage.

[0047] In summary, this application detects the voltage difference between the first data voltage before and after the current data line transition and the second data voltage after the transition, and determines in real time whether the voltage difference exceeds a preset threshold. Compensation is only initiated when the voltage difference exceeds the minimum grayscale difference that can generate perceptible vertical crosstalk, thus avoiding ineffective compensation in scenarios where grayscale changes are gradual and leakage effects are not obvious, and achieving on-demand activation of the compensation function. In addition, by obtaining the number of first row cycles corresponding to the first data voltage and the number of second row cycles corresponding to the second data voltage, the leakage time window is converted into a row cycle count value, so that the compensation amount and the total leakage amount can be matched. It is well-matched; in particular, by outputting a compensation voltage to the current data line according to the compensation parameters during the vertical blanking period of the current frame, the compensation action is performed using the inherent idle time period of the display driver. This not only does not occupy the effective display time or affect the normal image writing, but also promptly cancels the positive leakage current effect that has occurred in the current frame. The correction is completed within the earliest available time window after the leakage occurs, realizing the synergy of real-time compensation and zero-overhead compensation. Therefore, through the coordinated work of jump detection, threshold screening, time quantization and blanking period compensation, this application not only improves the leakage current problem of the display panel, but also eliminates vertical crosstalk and reduces system power consumption.

[0048] Figure 3 The diagram illustrates a passive compensation process according to an embodiment of this application. Specifically, this embodiment provides a passive compensation method based on reverse voltage cancellation to eliminate vertical crosstalk caused by data line voltage jumps. This method is applicable to scenarios where two different gray levels appear sequentially on the same data line in a display panel. For example, in a 1080-line resolution display panel, when the upper 540 lines have a gray level of 64 (low gray level) and the lower 540 lines have a gray level of 255 (high gray level), the high gray level voltage in the lower half will interfere with the low gray level pixels in the upper half through leakage current, causing color crosstalk in the upper half. Conversely, when the upper half has a high gray level and the lower half has a low gray level, the high gray level voltage in the upper half will also interfere with the low gray level pixels in the lower half through leakage current, causing color crosstalk in the lower half. The leakage principle is the same in both cases: that is, the higher voltage transfers charge to the lower voltage region through the subthreshold leakage current of the switching transistor, only the leakage direction is reversed. The passive compensation method in this embodiment is applicable to both scenarios; it only requires determining the polarity of the reverse compensation voltage based on the actual voltage difference. The following detailed explanation uses a typical scenario of "low grayscale in the upper half and high grayscale in the lower half" as an example. The passive compensation method in this embodiment specifically includes the following steps: Step S211: Determine the compensation duration based on the product of the number of cycles in the second row and the cycle in the unit row.

[0049] Specifically, when a voltage jump is detected and the voltage difference is greater than a preset threshold, the number of second line cycles corresponding to the duration of the second data voltage Vdata2 (high grayscale voltage) in the current frame is first obtained, and the compensation duration is determined based on the product of the number of second line cycles and the unit line cycle.

[0050] For example, the second data voltage Vdata2 (corresponding to 255 grayscale levels) is continuously output in the lower half of the 540 lines, therefore the number of second line cycles N2 = 540. The unit line cycle T_line is the time occupied by each line scan; for example, at a 60Hz refresh rate and 1080 line resolution, the unit line cycle is approximately 15.4μs. The compensation duration T_comp = N2 × T_line, meaning the compensation duration is exactly equal to the duration of the high grayscale voltage. In this embodiment, the compensation duration is set to be exactly the same as the leakage current duration to ensure that the total charge of reverse leakage matches the total charge of forward leakage.

[0051] Step S212: Determine the reverse compensation voltage based on the voltage difference.

[0052] Specifically, the absolute value of the voltage difference ΔV = |Vdata2 - Vdata1| is calculated. When ΔV is less than the preset threshold, the reverse compensation voltage is 0; when ΔV is greater than the preset threshold, the reverse compensation voltage is the reverse of ΔV, that is, the voltage magnitudes are equal but the polarities are opposite.

[0053] For example: the first data voltage Vdata1 corresponds to 64 gray levels (e.g., 1.5V), and the second data voltage Vdata2 corresponds to 255 gray levels (e.g., 4.5V), ΔV = |Vdata2 - Vdata1| = 3.0V. The preset threshold is set to the minimum gray level difference that produces perceptible vertical crosstalk, for example, a voltage difference corresponding to a gray level difference of 100 (approximately 1.2V). Since 3.0V is significantly greater than this threshold, the reverse compensation voltage V_rev = -ΔV = -3.0V (or a gray level voltage corresponding to -3.0V, such as -L127). The polarity of this reverse compensation voltage is opposite to the voltage difference that causes leakage, therefore the direction of the leakage effect is also opposite.

[0054] Step S213: Use the reverse compensation voltage and compensation duration as compensation parameters.

[0055] The compensation parameters in this embodiment include two independent pieces of information: one is the voltage amplitude (reverse compensation voltage), and the other is the time length (compensation duration), which together determine the total charge of reverse compensation.

[0056] Step S311: Adjust the duration of the vertical blanking period of the current frame to be equal to the compensation duration according to the compensation parameters.

[0057] It should be noted that the duration of the vertical blanking period is usually fixed (e.g., tens of microseconds), much shorter than the time of 540 line cycles (e.g., 540 × 15.4 μs ≈ 8.3 ms). In this embodiment, to achieve reverse compensation matching the leakage current duration, the Vblank period must be lengthened to be the same as the compensation duration. This adjustment can be achieved by inserting a blank line or extending the high-level time of the line synchronization signal during the vertical blanking period of the current frame.

[0058] Step S312: During the adjusted vertical blanking period, output a reverse compensation voltage to the current data line, and control the start time of the reverse compensation voltage output to be synchronized with the start time of the adjusted vertical blanking period. The duration of the reverse compensation voltage output is equal to the compensation duration.

[0059] It should be noted that when the vertical blanking period begins, the voltage on the data line is immediately switched from its current value to a reverse compensation voltage (e.g., from 0V to -3.0V), and this voltage is maintained until the end of the compensation duration. The end of the compensation duration coincides with the end of the adjusted blanking period, which is also the instant before the next frame scan begins. In this embodiment, the reverse compensation voltage is continuously applied to the data line throughout the complete compensation duration. Through the leakage path of the switching transistor, a reverse voltage offset is applied to the gate of the driving transistor of the interfered low grayscale pixel, thereby counteracting the effect of forward leakage.

[0060] like Figures 4-7 As shown, Figure 4 and Figure 6 All are timing diagrams before compensation, the only difference being... Figure 4 The timing diagram shown indicates that the upper half of the displayed image is a low grayscale, and the lower half is a high grayscale; while Figure 6 The timing diagram shown indicates that the upper half of the displayed image is a high grayscale, and the lower half of the displayed image is a low grayscale. Figure 5 and Figure 7 These are all timing diagrams after compensation. Figure 5 exist Figure 4 Based on this, the duration of the blanking period and the data voltage on the data line during the blanking period were modified; Figure 7 exist Figure 6 Based on this, the duration of the blanking period and the data voltage on the data line during the blanking period were also modified. Figures 4-7 In this context, STV represents the frame start signal, Terminate represents the scan end signal, TP represents the clock signal, Vdata represents the data voltage, Active represents the scan period, and Vblank represents the blanking period.

[0061] Step S313: After the reverse compensation voltage output is completed, restore the voltage of the current data line to the preset initial level.

[0062] After compensation is complete, the data line voltage must not remain at the reverse compensation voltage (e.g., -3.0V), otherwise it will affect the normal display of the next frame. Therefore, at the end of the blanking period, the data line voltage is reset to a preset initial level, usually 0V or the common voltage Vcom, to ensure that the data line is in a known initial state that does not affect normal writing before the next frame scan begins, thus avoiding residual voltage interference with new image data.

[0063] Steps S211 to S213 in this embodiment are... Figure 2 One implementation of step S200 is that steps S311 to S313 are... Figure 2 One implementation of step S300.

[0064] Therefore, when a data line voltage is detected to jump from a low grayscale to a high grayscale, or vice versa, the system first extends the vertical blanking period to the same duration as the line following the jump. Then, within this duration, it continuously outputs a reverse voltage equal in magnitude but opposite in polarity to the forward voltage difference. This reverse voltage, through the leakage path of the switching transistor, applies a reverse charge to the gate of the driving transistor of the disturbed low grayscale pixel, gradually pulling the offset gate voltage back to the target value. Since the magnitude of the reverse compensation voltage is equal to the magnitude of the forward leakage voltage, and the duration is the same, the total reverse leakage current is exactly equal to the total forward leakage current, achieving precise cancellation.

[0065] It should be explained that the reverse compensation voltage output during the vertical blanking period not only affects the interfered low-grayscale pixels, but theoretically will also affect the high-grayscale pixels on the same data line (i.e., the color areas that generate color crosstalk) through the leakage path. However, high-grayscale pixels are inherently in a high-brightness state, and the human eye is far less sensitive to brightness fluctuations in high-brightness areas than in low-grayscale areas. Simultaneously, the driving voltage of high-grayscale pixels is relatively high, and the relative change in brightness caused by the compensation voltage is extremely small, resulting in brightness deviations that are imperceptible to the naked eye. Therefore, the negative impact of the compensation voltage on the high-grayscale portion is negligible. This method eliminates vertical crosstalk in low-grayscale areas without introducing new perceptible image quality defects. The active compensation method in subsequent embodiments follows the same principle and will not be elaborated further.

[0066] Figure 8The diagram illustrates an active compensation process according to an embodiment of this application. Specifically, this embodiment provides an active charging-based compensation method to eliminate vertical crosstalk caused by data line voltage jumps. Unlike the aforementioned passive compensation embodiments, this method does not adjust the vertical blanking period duration. Instead, it actively turns on the switching transistor during the vertical blanking period and directly writes the calculated active compensation voltage into the control terminal of the driving transistor, thereby accurately restoring the gate voltage of the interfered pixel. This method is also applicable to scenarios where different gray levels appear sequentially on the same data line, such as the upper half of line 540 being 64 gray levels (low gray level) and the lower half of line 540 being 255 gray levels (high gray level), or vice versa. Here, taking the upper half being low gray level and the lower half being high gray level as an example, the active compensation method of this embodiment is described as follows: Step S221: Calculate the estimated leakage current based on the product of the absolute value of the voltage difference and the preset proportional coefficient.

[0067] Specifically, in the subthreshold region of a thin-film transistor, the leakage current is approximately linearly related to the source-drain voltage difference (i.e., the voltage difference ΔV). The preset scaling factor k is determined by the process characteristics of the switching transistor, for example, k = 1 × 10⁻⁶. - ¹² A / V. For example, if the first data voltage Vdata1 = 1.5V (corresponding to 64 gray levels), the second data voltage Vdata2 = 4.5V (corresponding to 255 gray levels), and ΔV = 3.0V, then the estimated leakage current I_leak = preset proportional coefficient k × voltage difference 3.0 = 3 × 10⁻⁶ - ¹² A.

[0068] Step S222: Calculate the leakage duration based on the product of the number of cycles in the second row and the duration of the unit row cycle.

[0069] Specifically, the second data voltage Vdata2 is continuously output during the leakage trigger period, and its duration is equal to the number of rows occupied by high grayscale multiplied by the scan time per row. In the example, the lower half of 540 rows is high grayscale, and the number of second row cycles N2 = 540; assuming the unit row cycle T_line = 15.4μs, then the leakage duration T_leak = 540 × 15.4μs ≈ 8.32ms.

[0070] Step S223: Calculate the theoretical voltage offset based on the product of the estimated leakage current and the leakage duration, and in conjunction with the capacitance value of the storage capacitor in the pixel circuit.

[0071] Specifically, the total leakage charge Q_leak = I_leak × T_leak is obtained by multiplying the estimated leakage current I_leak by the leakage duration T_leak; then, the theoretical voltage shift ΔV_shift = Q_leak / C0 is calculated by combining the capacitance value C0 of the storage capacitor in the pixel circuit.

[0072] It should be noted that leakage charge accumulates on the storage capacitor of the driving transistor's gate, causing voltage changes. The capacitance C0 of the storage capacitor is typically around 0.2pF. Continuing with the above values, Q_leak = 3 × 10⁻⁶. - ¹² A × 0.00832s = 2.5 × 10 - ¹ 4 C, then ΔV_shift = 2.5 × 10 - ¹ 4 / (0.2×10 - ¹²) = 0.125V. That is, theoretically there is a voltage offset of 0.125V.

[0073] Step S224: Obtain the final compensation offset based on the theoretical voltage offset and the correction factor.

[0074] Specifically, based on the theoretical voltage offset ΔV_shift and the correction factor F, the final compensated offset ΔV_comp = ΔV_shift × F is obtained. The correction factor F is negatively correlated with the number of cycles N1 in the first row.

[0075] In this embodiment, the number of cycles N1 in the first row represents the time that the low-grayscale pixels have been held before being disturbed. The smaller N1 is, the more recently the pixels have been written, and the charge on their storage capacitors is not yet stable, making them more susceptible to leakage current disturbances, thus requiring stronger compensation. The correction factor F can be set based on engineering experience, for example, F = 1 + 100 / (N1+10). In the example, the upper 540 rows are low-grayscale, N1=540, then F≈1+100 / 550≈1.18; ΔV_comp = 0.125V × 1.18 ≈0.148V. If N1 is very small (e.g., the first few rows after power-on), F will be larger, resulting in stronger compensation.

[0076] Step S225: When the second data voltage is greater than the first data voltage, the active compensation voltage is the first data voltage minus the final compensation offset; when the second data voltage is less than the first data voltage, the active compensation voltage is the first data voltage plus the final compensation offset.

[0077] It should be noted that the active compensation voltage V_active is determined based on the relationship between the second data voltage and the first data voltage. When the second data voltage is greater than the first data voltage, V_active = Vdata1 - ΔV_comp; when the second data voltage is less than the first data voltage, V_active = Vdata1 + ΔV_comp. V_active is used as the compensation parameter.

[0078] For example, Vdata2 > Vdata1, therefore V_active = 1.5V - 0.148V = 1.352V. This voltage is lower than the original low grayscale voltage. Its physical meaning is: by actively writing a voltage lower than the target voltage, the voltage rise caused by leakage is offset, thereby allowing the gate voltage of the driving transistor to actually recover to 1.5V.

[0079] Step S321: During the vertical blanking period of the current frame, turn on the switching transistor corresponding to the current data line and output an active compensation voltage to the current data line.

[0080] It should be noted that the vertical blanking period is the idle period after each frame ends, during which normal display scanning stops. This step utilizes this window to first set the gate line of the row containing the interfered pixel to a high level, thereby turning on the switching transistor; simultaneously, the data line voltage is set to V_active = 1.352V. Since the switching transistor is on, this voltage can be directly written to the control terminal of the driving transistor, updating the charge on the storage capacitor, thus precisely adjusting the gate voltage to near the target value. Here, by actively turning on the transistor to write the compensation voltage, gate voltage correction is achieved, without relying on the natural cancellation of leakage paths, resulting in a faster response and immunity to subthreshold nonlinearity.

[0081] Step S322: After the active compensation voltage output ends, restore the voltage of the current data line to the preset initial level.

[0082] Specifically: After compensation is completed, the data line voltage needs to be reset to avoid affecting the normal writing of the next frame; the switching transistor is turned off before the blanking period ends, so that the storage capacitor maintains the voltage just written, ensuring that the data line is in a known initial state when the next frame starts, and avoiding residual interference.

[0083] Steps S221 to S225 in this embodiment are... Figure 2 Another implementation of step S200 is that steps S321 to S322 are... Figure 2 Another implementation of step S300.

[0084] When the system detects a jump in data line voltage from low grayscale to high grayscale that lasts for multiple line cycles, it first calculates an estimated leakage current based on the voltage difference. This estimate is then combined with the number of second line cycles to obtain the total leakage charge, which is divided by the storage capacitance to obtain the theoretical voltage offset. A correction factor related to the low grayscale holding time is then introduced to dynamically adjust the compensation strength. Finally, the calculated active compensation voltage (e.g., 1.352V) is directly written to the gate of the driver transistor of the interfered pixel during the vertical blanking period by actively turning on the switching transistor, precisely pulling the gate voltage, which has increased due to leakage, back to the target value (1.5V).

[0085] It is worth noting that active compensation only activates the switching transistors for the specific rows affected by the interference, while the transistors in other rows remain off. Therefore, the compensation voltage will not be mistakenly written to undisturbed pixels, and the problem of potentially affecting high grayscale areas, as seen in passive compensation, is avoided. This method is particularly suitable for scenarios with severe leakage current or requiring extremely high image quality.

[0086] Compared to passive compensation, active compensation does not require an extended vertical blanking period, placing lower demands on the timing controller. Furthermore, the compensation voltage can be precisely calculated and is not limited by the nonlinear characteristics of the leakage path. However, it requires an additional enable signal line and precise knowledge of the row position of the interfered pixel. This method is also applicable to both high-grayscale interference with low-grayscale and low-grayscale interference with high-grayscale; simply add or subtract based on the relationship between Vdata2 and Vdata1.

[0087] In one embodiment, after outputting a compensation voltage to the current data line according to the compensation parameters during the vertical blanking period of the current frame, the compensation method further includes: within a preset time window after outputting the compensation voltage, sensing the actual luminous brightness of the pixel corresponding to the current data line through a photosensitive element; if the absolute value of the error between the actual luminous brightness and the target brightness exceeds a preset brightness error threshold, adjusting the compensation parameters according to the error, and outputting the adjusted compensation voltage during the vertical blanking period of the next frame; wherein, the target brightness is the brightness corresponding to the first data voltage.

[0088] It should be noted that, based on the aforementioned passive or active compensation, this embodiment introduces a photosensitive element to form a closed-loop feedback to further improve the compensation accuracy. This is suitable for applications with extremely high image quality requirements (such as professional monitors and automotive displays), and specifically includes the following feedback adjustment steps: (1) Sensing actual luminous brightness: Within a preset time window after the output compensation voltage (e.g., the blanking gap after the end of the current frame or a short idle period before the start of the next frame), the actual luminous brightness of the pixel corresponding to the current data line is sensed by a photosensitive element (such as a photodiode) placed on the edge of the display panel or embedded in the pixel gap. The photosensitive element can perform directional sensing for the compensated pixel area or sense the average brightness of the area.

[0089] (2) Compare the error and determine whether to adjust: Compare the sensed actual luminance with the target luminance and calculate the absolute value of the error. The target luminance is the standard luminance corresponding to the first data voltage (i.e., the luminance that the pixel should have displayed before the leakage occurred). If the absolute value of the error exceeds the preset luminance error threshold (e.g., 5% or the minimum luminance difference that the human eye can perceive), it is determined that the compensation is insufficient or over-compensated and needs to be adjusted.

[0090] (3) Adjust and output the compensation parameters: Based on the magnitude and direction of the error (if the actual brightness is too high, it indicates insufficient compensation and the compensation intensity needs to be increased; if the actual darkness is too low, it indicates overcompensation and the compensation intensity needs to be decreased), the original compensation parameters are corrected by proportional adjustment or step adjustment. The corrected compensation parameters are output again during the vertical blanking period of the next frame to re-compensate the same pixel.

[0091] The above process can be repeated multiple times until the error converges to within a threshold or reaches a preset maximum number of iterations. This embodiment, through closed-loop feedback of the photosensitive element, can perceive the actual compensation effect in real time and dynamically correct the compensation parameters, thereby overcoming open-loop compensation deviations caused by factors such as display panel aging, temperature drift, and process differences. Especially for calculation models relying on leakage current estimates in active compensation, closed-loop feedback can automatically calibrate model parameters, maintaining compensation accuracy over a long period. Furthermore, this feedback mechanism is compatible with both passive and active compensation, without requiring changes to the original compensation architecture.

[0092] Figure 9 The diagram shows a structural schematic of a compensation circuit 100 provided in an embodiment of this application. The compensation circuit 100 provided in this embodiment is used to implement the compensation method shown in the foregoing embodiments. This compensation circuit 100 can be integrated into the driving system of the display panel, and is typically separated from the pixel array and disposed on a printed circuit board or within a driver chip. Figure 9 As shown, the compensation circuit 100 specifically includes: (1) Voltage detection module 110, whose input terminal is electrically connected to the current data line, is used to monitor the voltage waveform on the data line in real time. When the data line voltage jumps from the first data voltage Vdata1 to the second data voltage Vdata2, the module calculates the difference between the two and compares it with an internal preset threshold. If the difference is greater than the threshold (i.e., the grayscale span is sufficient to generate perceptible vertical crosstalk), a compensation trigger signal is output.

[0093] (2) The counting module 120 has its input terminal connected to the output terminal of the voltage detection module 110. After receiving the compensation trigger signal, it starts the internal counter. This module also receives the row cycle clock signal TP. During the effective period of the trigger signal, it records the number of TP pulses (number of the first row cycle) that have passed during the first data voltage holding period and the number of TP pulses (number of the second row cycle) that have passed during the second data voltage holding period. After the counting is completed, the two count values ​​and the voltage difference information are output to the parameter calculation module 130.

[0094] (3) The parameter calculation module 130 is connected to the counting module 120. Based on the received voltage difference, the number of cycles in the first row, and the number of cycles in the second row, it determines the compensation parameters according to a preset algorithm (such as the calculation of duration and reverse voltage in passive compensation, or the estimation of leakage current and the calculation of offset in active compensation). This module can be selectively integrated into the timing controller TCON, utilizing the computing resources and timing control capabilities already provided by the TCON, or it can be an independent computing chip.

[0095] (4) The compensation execution module 140, connected to the parameter calculation module 130, receives the compensation parameters and performs the compensation action during the vertical blanking period of the current frame. For passive compensation, this module controls the source driver to lengthen the blanking period and outputs a reverse compensation voltage; for active compensation, this module turns on the corresponding switching transistor T1 during the blanking period and outputs an active compensation voltage. The output terminal of the compensation execution module 140 is electrically connected to the data line to deliver the compensation voltage to the target pixel. Some functions of this module (such as blanking period length adjustment and gate turn-on pulse generation) can be directly completed by TCON, while the data voltage output is handled by the source driver.

[0096] Therefore, this embodiment, through the coordinated operation of the voltage detection module 110, the counting module 120, the parameter calculation module 130, and the compensation execution module 140, detects leakage current causes in real time, quantifies the time window, calculates the compensation amount, and completes the correction without occupying effective display time, thereby eliminating vertical crosstalk. This circuit does not require changes to the TFT structure of the pixel array and is easily integrated with existing display driving solutions.

[0097] Figure 10 The diagram shown is a circuit diagram of a voltage detection module 110 provided in an embodiment of this application; as follows: Figure 10As shown, the voltage detection module 110 of this embodiment includes a first diode D1, a delay resistor VR, a delay capacitor VC, a second diode D2, and a comparator U1; wherein, the anode of the first diode D1 is connected to the current data line; the first end of the delay resistor VR is connected to the current data line; the first end of the delay capacitor VC is connected to the second end of the delay resistor VR, and the second end of the delay capacitor VC is grounded; the anode of the second diode D2 is connected to the second end of the delay resistor VR; the first input terminal of the comparator U1 is connected to the cathode of the first diode D1, the second input terminal of the comparator U1 is connected to the cathode of the second diode D2, and the output terminal of the comparator U1 serves as the output terminal of the voltage detection module 110.

[0098] It should be noted that the voltage detection module 110 in this embodiment uses a delay network in conjunction with dual diode clamping and voltage comparator U1 to achieve real-time detection of voltage jumps on the data line. The specific working principle is as follows: (1) Signal path division: The data voltage Vdata is simultaneously connected to two paths: ① First path (direct path): The data voltage Vdata is input to the inverting input terminal (first input terminal) of comparator U1 via the first diode D1. The first diode D1 acts as a voltage clamp and isolation, enabling the input terminal of comparator U1 to quickly follow the changes in the data voltage Vdata. ② Second path (delay path): The data voltage Vdata passes through an RC low-pass filter composed of a delay resistor VR and a delay capacitor VC, and then is input to the non-inverting input terminal (second input terminal) of comparator U1 via the second diode D2. The other end of the delay capacitor VC is grounded, and the time constant τ = R×C of the delay resistor VR and the delay capacitor VC determines the response speed of the delay path.

[0099] (2) Steady-state (no voltage jump): When the data voltage Vdata remains constant, the direct path output V_fast = Vdata (there is a slight voltage drop after D1, but it is negligible). In the delay path, the delay capacitor VC has been charged to the same voltage as the data voltage Vdata, so V_slow = Vdata (the voltage drop after D2 is also negligible). The voltages at the two input terminals of comparator U1 are equal, and the output terminal remains low (invalid state).

[0100] (3) Positive transition (instantaneous change): When the data voltage Vdata undergoes a step change (e.g., from Vdata1 to Vdata2, and Vdata2>Vdata1): Direct path: Since there is no delay element, V_fast instantly follows the data voltage to Vdata2. Delayed path: Since the voltage across the delay capacitor VC cannot change abruptly, it needs to go through an RC time constant to gradually rise to Vdata2. Therefore, at the initial moment of the transition, V_slow remains near Vdata1, while V_fast has become Vdata2. At this time, the voltage at the inverting input terminal of comparator U1 (V_fast) is higher than the voltage at the non-inverting input terminal (V_slow), and the output of comparator U1 immediately becomes high (valid), generating a compensation trigger signal. After several RC time constants, the delay capacitor VC is fully charged, V_slow gradually approaches Vdata2, the voltages at the two input terminals of comparator U1 are equal again, and the output returns to low level.

[0101] (4) During reverse transition (Vdata2 < Vdata1): Similarly, when the data voltage Vdata transitions from high to low, the direct path V_fast drops immediately, while the delayed path V_slow drops slowly due to capacitor discharge. This causes the voltage at the inverting input of comparator U1 to be lower than that at the non-inverting input, and the output is also high (valid). Therefore, this circuit is sensitive to both forward and reverse transitions and can identify voltage changes in any direction.

[0102] In this embodiment, the first diode D1 and the second diode D2 are mainly used for clamping and protection to prevent the input terminal of comparator U1 from being subjected to voltages exceeding its allowable range, while avoiding reverse voltage damage to the device; in addition, the second diode D2, in conjunction with the RC network, can reduce the leakage path of capacitor charge and improve delay accuracy.

[0103] In summary, the voltage detection module 110 compares the voltage difference between the direct path and the delayed path through RC delay, collects transient events of voltage jumps on the data line, and converts the jump time and direction into electrical signal output to provide trigger signals for subsequent compensation.

[0104] Figure 11 The diagram shown is a structural schematic of another compensation circuit 100 provided in an embodiment of this application; as shown Figure 11 As shown, in this embodiment, a first buffer OP1 is added between the voltage detection module 110 and the counting module 120, and a second buffer OP2 is added between the parameter calculation module 130 and the compensation execution module 140. The first buffer OP1 and the second buffer OP2 in this embodiment serve as output buffers for the driver and shaping buffers for the comparator signals, thereby improving signal quality and driving capability.

[0105] In this embodiment, the parameter calculation module 130 is also connected to the control terminal of the switching transistor T1 in the pixel circuit, and is used to turn on the corresponding switching transistor T1 in active compensation so as to input the compensation voltage into the corresponding driving transistor T2.

[0106] Figure 12 The diagram shown is a structural schematic of another compensation circuit 100 provided in an embodiment of this application; as shown Figure 12 As shown, the compensation circuit 100 in this embodiment also includes a photosensitive element 150, which is connected to the parameter calculation module 130 and is used to sense the actual luminous brightness of the pixel corresponding to the current data line, so that the parameter calculation module 130 adjusts the compensation parameters according to the error between the actual luminous brightness and the target brightness.

[0107] It should be noted that the photosensitive element 150 (e.g., photodiode, phototransistor, or photosensitive TFT embedded in the pixel) in this embodiment is electrically connected to the parameter calculation module 130 and is usually arranged in the non-display area (border) of the display panel or processed on the same layer as the pixel array.

[0108] Specifically, within a preset time window after the vertical blanking period compensation voltage output of the current frame ends (e.g., a brief interval before the start of the next frame scan), the parameter calculation module 130 controls the photosensitive element 150 to sense the actual luminance of the compensated pixel area. The photosensitive element 150 converts the received light signal into a current or voltage signal and feeds it back to the parameter calculation module 130. The parameter calculation module 130 has a pre-stored target luminance value (i.e., the standard luminance corresponding to the first data voltage). The actual luminance signal is compared with the target luminance, and the absolute value of the error is calculated. If the error exceeds a preset luminance error threshold (e.g., 5%), it is determined to be undercompensation or overcompensation. The parameter calculation module 130 corrects the original compensation parameters according to the magnitude and direction of the error, using a proportional-integral or step adjustment method. The corrected compensation parameters will be output during the vertical blanking period of the next frame, and compensation will be re-executed.

[0109] Therefore, in this embodiment, through the feedback of the photosensitive element 150, the circuit can automatically calibrate compensation deviations caused by display panel aging, temperature drift, or process differences, maintaining calibration accuracy over a long period. This element can be adapted to passive or active compensation modes without changing the original compensation logic.

[0110] In one embodiment, the compensation circuit 100 further includes a selection module 160, which is connected to the parameter calculation module 130 and the control terminal of the switching transistor T1 in the pixel circuit, respectively, and is used to select between active compensation and passive compensation.

[0111] It should be noted that the selection module 160 in this embodiment can be an analog switch or a multiplexer. This embodiment takes the third transistor T3 as an example. The control terminal of the third transistor T3 receives a mode selection signal from the parameter calculation module 130 (e.g., high level for active mode, low level for passive mode). The first terminal of the third transistor T3 receives an active compensation control signal from the parameter calculation module 130, and the second terminal of the third transistor T3 is connected to the control terminal of the switching transistor T1. The specific working principle is as follows: (1) Active Mode: When the parameter calculation module 130 determines that the current leakage current is serious or requires rapid correction, it outputs an active mode selection signal, and the third transistor T3 is turned on, directly transmitting the active compensation control signal output by the parameter calculation module 130 to the control terminal of the switching transistor T1. At the same time, the compensation execution module 140 outputs an active compensation voltage to the data line. The switching transistor T1 is forcibly turned on during the blanking period, and the active compensation voltage is written to the gate of the driving transistor T2.

[0112] (2) Passive mode: When the parameter calculation module 130 determines that the leakage current level is moderate or the power consumption is reduced, it outputs a passive mode selection signal and the third transistor T3 is disconnected. At this time, the compensation circuit 100 works in a passive compensation mode, that is, it only adjusts the blanking period and outputs a reverse compensation voltage to naturally cancel the leakage current through the leakage path.

[0113] In summary, the photosensitive element 150 in this embodiment achieves closed-loop adaptive calibration, and the selection module 160 achieves flexible switching between dual modes. The two can be configured independently or in combination, enabling the compensation circuit 100 to adapt to different display content, environmental conditions, and image quality requirements, further improving the practicality and robustness of the solution.

[0114] In one embodiment, this application provides a display panel, the display panel including: a pixel array, the pixel array including multiple data lines and multiple gate lines, and multiple pixel units defined by the intersection of the data lines and gate lines; and a compensation circuit as described in the above embodiment, the voltage detection module of the compensation circuit being electrically connected to the data lines, and the output terminal of the compensation execution module of the compensation circuit being electrically connected to the data lines.

[0115] Furthermore, the terms "first," "second," and "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0116] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0117] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.

Claims

1. A compensation method, characterized in that, The compensation method includes: Detect the voltage jump of the data voltage on the current data line during the current frame scan period, and obtain the first data voltage before the jump and the second data voltage after the jump; If the voltage difference between the first data voltage and the second data voltage is greater than a preset threshold, the number of first row cycles corresponding to the duration of the first data voltage in the current frame and the number of second row cycles corresponding to the duration of the second data voltage in the current frame are obtained; wherein, the preset threshold corresponds to the minimum grayscale difference that generates perceptible vertical crosstalk on the display panel. The compensation parameters are determined based on the voltage difference, the number of the first row cycles, and / or the number of the second row cycles; During the vertical blanking period of the current frame, a compensation voltage is output to the current data line according to the compensation parameters.

2. The compensation method according to claim 1, characterized in that, Based on the voltage difference and the number of cycles in the second row, the compensation parameters are determined, including: The compensation duration is determined by multiplying the number of cycles in the second row by the number of cycles in a unit row. A reverse compensation voltage is determined based on the voltage difference; wherein, when the absolute value of the voltage difference is less than a preset threshold, the reverse compensation voltage is 0; when the absolute value of the voltage difference is greater than the preset threshold, the reverse compensation voltage is the reverse of the voltage difference. The reverse compensation voltage and the compensation duration are used as the compensation parameters.

3. The compensation method according to claim 2, characterized in that, During the vertical blanking period of the current frame, a compensation voltage is output to the current data line according to the compensation parameters, including: Based on the compensation parameters, the duration of the vertical blanking period of the current frame is adjusted to be equal to the compensation duration; During the adjusted vertical blanking period, the reverse compensation voltage is output to the current data line, and the start time of the output of the reverse compensation voltage is synchronized with the start time of the adjusted vertical blanking period. The duration of the output of the reverse compensation voltage is equal to the compensation duration. After the reverse compensation voltage output is completed, the voltage of the current data line is restored to the preset initial level.

4. The compensation method according to claim 1, characterized in that, Based on the voltage difference, the number of cycles in the first row, and the number of cycles in the second row, compensation parameters are determined, including: The leakage current estimate is calculated by multiplying the absolute value of the voltage difference by a preset proportionality coefficient. The leakage duration is calculated by multiplying the number of cycles in the second row by the duration of a single cycle. The theoretical voltage offset is calculated by multiplying the estimated leakage current by the leakage duration and combining it with the capacitance value of the storage capacitor in the pixel circuit. The final compensation offset is obtained based on the theoretical voltage offset and the correction factor; wherein the correction factor is negatively correlated with the number of cycles in the first row. When the second data voltage is greater than the first data voltage, the active compensation voltage is the first data voltage minus the final compensation offset; when the second data voltage is less than the first data voltage, the active compensation voltage is the first data voltage plus the final compensation offset. The active compensation voltage is used as the compensation parameter.

5. The compensation method according to claim 4, characterized in that, During the vertical blanking period of the current frame, a compensation voltage is output to the current data line according to the compensation parameters, including: During the vertical blanking period of the current frame, the switching transistor corresponding to the current data line is turned on, and the active compensation voltage is output to the current data line. After the active compensation voltage output is completed, the voltage of the current data line is restored to the preset initial level.

6. The compensation method according to any one of claims 1-5, characterized in that, During the vertical blanking period of the current frame, after outputting a compensation voltage to the current data line according to the compensation parameters, the compensation method further includes: Within a preset time window after the compensation voltage is output, the actual luminous brightness of the pixel corresponding to the current data line is sensed by a photosensitive element. If the absolute value of the error between the actual luminance and the target luminance exceeds a preset luminance error threshold, the compensation parameter is adjusted according to the error, and the adjusted compensation voltage is output during the vertical blanking period of the next frame; wherein, the target luminance is the luminance corresponding to the first data voltage.

7. A compensation circuit, characterized in that, The compensation circuit includes: The voltage detection module is electrically connected to the current data line and is used to detect the voltage jump of the data voltage on the current data line during the current frame scanning period. If the voltage difference between the first data voltage before the jump and the second data voltage after the jump is greater than a preset threshold, a compensation trigger signal is output. The counting module, connected to the output of the voltage detection module, is used to obtain, under the action of the compensation trigger signal, the number of first row cycles corresponding to the duration of the first data voltage in the current frame, and the number of second row cycles corresponding to the duration of the second data voltage in the current frame. A parameter calculation module, connected to the counting module, is used to determine compensation parameters based on the voltage difference, the number of cycles in the first row, and / or the number of cycles in the second row. The compensation execution module, connected to the parameter calculation module, is used to output a compensation voltage to the current data line according to the compensation parameters during the vertical blanking period of the current frame.

8. The compensation circuit according to claim 7, characterized in that, The voltage detection module includes: The first diode, the anode of which is connected to the current data line; A delay resistor, the first end of which is connected to the current data line; A delay capacitor, wherein the first terminal of the delay capacitor is connected to the second terminal of the delay resistor, and the second terminal of the delay capacitor is grounded; The second diode, the anode of which is connected to the second terminal of the delay resistor; The comparator has its first input terminal connected to the cathode of the first diode, its second input terminal connected to the cathode of the second diode, and its output terminal serving as the output terminal of the voltage detection module.

9. The compensation circuit according to claim 7 or 8, characterized in that, The compensation circuit further includes at least one of the following: A photosensitive element, connected to the parameter calculation module, is used to sense the actual luminous brightness of the pixel corresponding to the current data line, so that the parameter calculation module adjusts the compensation parameter according to the error between the actual luminous brightness and the target brightness. The selection module is connected to the control terminals of the parameter calculation module and the switching transistor in the pixel circuit, respectively, and is used to select between active compensation and passive compensation.

10. A display panel, characterized in that, The display panel includes: A pixel array, the pixel array comprising multiple data lines and multiple gate lines, and multiple pixel units defined by the intersection of the data lines and the gate lines; And the compensation circuit according to any one of claims 7 to 9, wherein the voltage detection module of the compensation circuit is electrically connected to the data line, and the output terminal of the compensation execution module of the compensation circuit is electrically connected to the data line.

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