Loop matching based channel switching system and regulation method

Abstract

This invention discloses a channel switching system and control method based on loop matching. The system includes a left channel module and a right channel module. The differential input P and N terminals of the left channel module receive differential signals, which are then sequentially processed by an integrator, a comparator, and a driver unit to generate differential drive signals and output to the speaker. The right channel module operates similarly. Several switches are connected in series between each differential input terminal and its corresponding output terminal of the driver unit. Switches SWA1 and SWA3 are connected in series between switches SWB1 and SWC3. Thus, by adding loop matching switches to the stereo dual-channel architecture, when switching to single-channel mode, the output signal of one channel is injected into the other channel. The power transistors of the two channels operate in parallel, driving the same speaker. This reduces output impedance and increases output power while introducing only negligible mismatch and distortion, enabling higher power single-channel output.

Description

Technical Field

[0001] This invention relates to the field of audio modulation and loop switching technology, and in particular to a channel switching system and control method based on loop matching. Background Technology

[0002] Compared to Class A and Class B audio amplifiers, Class D audio amplifiers have significant advantages in terms of high efficiency (theoretically exceeding 90%) and high output power. Their core principle is based on PWM (Pulse Width Modulation) technology, which "replicates" a distortion-free square wave signal at the output port, identical to the input. This square wave signal is then processed by a filtering circuit to drive the speaker and output audio. Currently, stereo products such as home audio systems and in-vehicle multimedia devices often use Class D audio amplifiers with a stereo dual-channel architecture. These amplifiers can output left and right channel audio signals through two identical loops, simulating a two-channel input.

[0003] Traditional stereo dual-channel architectures achieve single / dual-channel switching by connecting the gate terminals of power transistors and using switches and charge pumps at different nodes for regulation. This method introduces significant mismatch errors and signal distortion during channel switching, limiting the application of stereo dual-channel architectures in higher power output scenarios. Summary of the Invention

[0004] Embodiment 1 of the present invention discloses a channel switching system based on loop matching, specifically including: Left channel module and right channel module; The differential input P terminal of the left channel module is connected to comparator TL1 via integrator J1, and the differential input N terminal is connected to comparator TL2 via integrator J1. Comparator TL1 is connected to speaker VL via driver unit KL1, and comparator TL2 is connected to speaker VL via driver unit KL2. The differential input P terminal of the right channel module is connected to comparator TR1 via integrator J2, and the differential input N terminal is connected to comparator TR2 via integrator J2. Comparator TR1 is connected to speaker VR via driver unit KR1, and comparator TR2 is connected to speaker VR via driver unit KR2. Switches SWC1 and SWB1 are connected in series between the differential input P terminal of the left channel module and the output terminal of the drive unit KL1, and switches SWC2 and SWB2 are connected in series between the differential input N terminal and the output terminal of the drive unit KL2. Switches SWC3 and SWB3 are connected in series between the differential input P terminal of the right channel module and the output terminal of the drive unit KR1, and switches SWC4 and SWB4 are connected in series between the differential input N terminal and the output terminal of the drive unit KR2. Switch SWA1 and switch SWA3 are connected in series between switch SWB1 and switch SWC3.

[0005] As an optional implementation, a resistor R1 is provided between the differential input P terminal of the left channel module and the negative input terminal of the integrator J1, a capacitor C1 is provided between the resistor R1 and the positive input terminal of the comparator J1, and a resistor R2 is provided between the switch SWB1 and the output terminal of the drive unit KL1. A resistor R3 is provided between the differential input P terminal of the right channel module and the negative input terminal of the integrator J2, a capacitor C3 is provided between the resistor R3 and the positive input terminal of the comparator J2, and a resistor R4 is provided between the switch SWB3 and the output terminal of the drive unit KR1.

[0006] As an optional implementation, in dual-channel mode, switches SWC1, SWB1, SWC2, SWB2, SWC3, SWB3, SWC4, and SWB4 are turned on; The switches SWA1, SWA2, SWA3 and SWA4 are turned off.

[0007] As an optional implementation, the negative input terminal of the integrator J1 receives the differential signal INPL input from the differential input terminal P of the left channel module, performs integration processing, and outputs the integrated signal TPL to the positive input terminal of the comparator TL1. The comparator TL1 compares the integrated signal TPL with the triangular wave carrier and outputs the PWM signal PWMPL. The drive unit KL1 outputs the drive signal OUTPL to the speaker VL based on the PWM signal PWMPL. The negative input terminal of the integrator J1 receives the differential signal INNL input from the differential input N terminal of the left channel module, performs integration processing, and outputs the integrated signal TNL to the positive input terminal of the comparator TL2. The comparator TL2 compares the integrated signal TNL with the triangular wave carrier and outputs the PWM signal PWMNL. The drive unit KL2 outputs the drive signal OUTNL to the speaker VL based on the PWM signal PWMNL. The negative input terminal of the integrator J2 receives the differential signal INPR input from the differential input terminal P of the right channel module, performs integration processing, and outputs the integrated signal TPR to the positive input terminal of the comparator TR1. The comparator TR1 compares the integrated signal TPR with the triangular wave carrier and outputs the PWM signal PWMPR. The drive unit KR1 outputs the drive signal OUTPR to the speaker VR based on the PWM signal PWMPR. The negative input terminal of the integrator J2 receives the differential signal INNR input from the differential input N terminal of the right channel module, performs integration processing, and outputs the integrated signal TNR to the positive input terminal of the comparator TR2. The comparator TR2 compares the integrated signal TNR with the triangular wave carrier and outputs the PWM signal PWMNR. The drive unit KR2 outputs the drive signal OUTNR to the speaker VR based on the PWM signal PWMNR.

[0008] As an optional implementation, the left channel module works synchronously with the right channel module; The speaker VL of the left channel module outputs left channel audio based on the differential drive signals OUTPL and OUTNL. The speaker VR of the right channel module outputs right channel audio based on the differential drive signals OUTPR and OUTNR.

[0009] As an optional implementation, in single-channel mode, switches SWB1, SWA1, SWA3, SWC3, SWC4, and SWB4 are turned on; The switches SWC1, SWC2, SWA2, SWB2, SWB3, and SWA4 are turned off; The output of comparator TR1 in the right channel module is connected to drive unit KL1 and drive unit KL2 in the left channel module. The outputs of drive unit KL1 and drive unit KL2 are connected to the negative input of integrator J2 via switch SWB1, switch SWA1, switch SWA3 and switch SWC3. The negative output of integrator J2 is connected to the positive input of comparator TR2 in the right channel module. The output of comparator TR2 is connected to drive unit TR1 and drive unit TR2.

[0010] As an optional implementation, the output of the comparator TR1 synchronously outputs an integral signal TP to the driving unit KL1 and the driving unit KL2, and the driving unit KL1 and the driving unit KL2 synchronously output a driving signal OUTP. The negative input terminal of the integrator J2 acquires the drive signal OUTP and integrates it, and outputs the integrated signal TD to the positive input terminal of the comparator TR2. The comparator TR2 compares the integrated signal TD with the triangular wave carrier and outputs the PWM signal PWMD. The drive unit KR1 and the drive unit KR2 synchronously output the drive signal OUTN based on the PWM signal PWMD.

[0011] As an optional implementation, the loop of the left channel module is turned off, and the power transistors of the drive unit KL1 and the drive unit KL2 are connected in equivalent parallel with the power transistors of the drive unit KR1 and the drive unit KR2. The speaker VL or the speaker VR outputs mono audio based on the drive signal OUTP and the drive signal OUTN.

[0012] Embodiment 2 of the present invention discloses a control method, characterized in that it includes: Monitoring mode indicator; When the mode indicator switches to dual-channel mode, the left channel module and the right channel module operate independently. Based on the independent drive signals generated by the left channel module and the right channel module, the corresponding speakers are synchronously driven to play sound in two channels. When the mode flag indicates that the mode is switched to single-channel mode, the output terminal of the left channel module is connected in parallel with the input terminal of the right channel module. The multiplier drive signal generated by the right channel module drives a single speaker to play mono audio.

[0013] As an optional implementation, when in single-channel mode, the integrator and comparator of the left channel module are turned off, and any comparator of the right channel module outputs a PWM signal to the drive unit of the left channel module. The drive unit of the left channel module outputs a drive signal to the integrator of the right channel module.

[0014] Compared with the prior art, this embodiment has the following beneficial effects: 1. The left channel module and the right channel module use the same integrator, comparator and driver unit of the same specifications to form a completely consistent circuit structure design, so as to ensure the matching of the circuit performance of the two and avoid the synchronization problem of the drive signal output by the terminal.

[0015] 2. When the left and right channel modules operate independently based on their own loops, the system is in the common dual-channel mode. Both modules process the same differential signal and output drive signals synchronously to provide dual-channel stereo output.

[0016] 3. When high-power output is required on a single channel, only one channel is used for signal processing, and the power transistor of another channel is connected to the input terminal to achieve parallel operation. In this state, the output impedance will be reduced by half, and the output power will be doubled, achieving a higher power single-channel output. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this embodiment, the accompanying drawings used in the embodiment will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the circuit principle of a channel switching system based on loop matching disclosed in Embodiment 1; Figure 2 This is a schematic diagram of the circuit principle of a channel switching system based on loop matching disclosed in Embodiment 1 when it is in dual-channel mode; Figure 3 This is a schematic diagram of the circuit principle of a channel switching system based on loop matching disclosed in Embodiment 1 when it is in single-channel mode; Figure 4 This is a schematic diagram of the workflow of a control method disclosed in Example 2. Detailed Implementation

[0019] The technical solutions in this embodiment will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Example 1 Please see Figures 1-3 This embodiment discloses a channel switching system based on loop matching, comprising: Left channel module and right channel module; The differential input P terminal of the left channel module is connected to comparator TL1 via integrator J1, and the differential input N terminal is connected to comparator TL2 via integrator J1. Comparator TL1 is connected to speaker VL via driver unit KL1, and comparator TL2 is connected to speaker VL via driver unit KL2. The differential input P terminal of the right channel module is connected to comparator TR1 via integrator J2, and the differential input N terminal is connected to comparator TR2 via integrator J2. Comparator TR1 is connected to speaker VR via driver unit KR1, and comparator TR2 is connected to speaker VR via driver unit KR2. Switches SWC1 and SWB1 are connected in series between the differential input P terminal of the left channel module and the output terminal of the drive unit KL1, and switches SWC2 and SWB2 are connected in series between the differential input N terminal and the output terminal of the drive unit KL2. Switches SWC3 and SWB3 are connected in series between the differential input P terminal of the right channel module and the output terminal of the drive unit KR1, and switches SWC4 and SWB4 are connected in series between the differential input N terminal and the output terminal of the drive unit KR2. Switches SWA1 and SWA3 are connected in series between switches SWB1 and SWC3.

[0021] In this embodiment, the left channel module and the right channel module use integrators, comparators and driver units of the same specifications and models to form a completely consistent circuit structure design, so as to ensure the matching of the circuit performance of the two and avoid the synchronization problem of the drive signal output by the terminal.

[0022] When both modules operate independently based on their own loops, the system is in a common dual-channel mode. The left and right channel modules process the same differential signal and output drive signals synchronously, providing dual-channel stereo output.

[0023] When a single-channel high-power output is required, only one channel is used for signal processing, and the power transistor of another channel is connected to the input terminal to achieve parallel operation. In this state, since the left channel module and the right channel module use the same specifications of components, the overall output impedance will be reduced by half, and the output power will be doubled, achieving a higher power single-channel output.

[0024] like Figure 2 , 3 As shown, drive unit KL1 drives power transistors QL1A and QL1B, drive unit KL2 drives power transistors QL2A and QL2B, drive unit KR1 drives power transistors QR1A and QR1B, and drive unit KR2 drives power transistors QR2A and QR2B.

[0025] When the left channel module and the right channel module operate independently based on their own loops, in the left channel module, the drive unit KL1 drives the power transistors QL1A and QL1B to output the drive signal OUTPL to the speaker VL, and the drive unit KL2 drives the power transistors QL2A and QL2B to output the drive signal OUTNL to the speaker VL. The differential drive signals OUTPL and OUTNL drive the speaker VL to operate synchronously.

[0026] Similarly, in the right channel module, drive unit KR1 drives power transistors QR1A and QR1B to output drive signal OUTPR to speaker VR, and drive unit KR2 drives power transistors QR2A and QR2B to output drive signal OUTNR to speaker VR. The differential drive signal OUTPR and drive signal OUTNR synchronously drive speaker VR to operate.

[0027] At this point, the symmetrical left channel module and the right channel module operate synchronously to achieve dual-channel broadcasting.

[0028] When the left and right channel modules operate in single-channel mode, the power transistors QL1A and QL1B of drive unit KL1 and QL2A and QL2B of drive unit KL2 in the left channel module output power to the negative input of integrator J2 via switches SWB1, SWA1, SWA3, and SWC3. The positive output of integrator J2 then outputs the integration signal TP synchronously to drive units KL1 and KL2 via comparator TR1. Furthermore, the negative output of integrator J2 in the right channel module drives the power transistors QR1A and QR1B of drive unit KR1 and QR2A and QR2B of drive unit KR2 via comparator TR2.

[0029] Accordingly, power transistors QL1A and QL1B of drive unit KL1, and power transistors QL2A and QL2B of drive unit KL2, collaboratively output drive signal OUTP; power transistors QR1A and QR1B of drive unit KR1, and power transistors QR2A and QR2B of drive unit KR2, collaboratively output drive signal OUTN. The differential drive signals OUTP and OUTN drive a single loudspeaker to achieve high-power monophonic playback.

[0030] In dual-channel mode, speaker VL is driven by four power transistors: QL1A, QL1B, QL2A, and QL2B. Speaker VR is driven by four power transistors: QR1A, QR1B, QR2A, and QR2B.

[0031] In single-channel mode, a single speaker is driven by eight power transistors simultaneously: QL1A, QL1B, QL2A, QL2B, QR1A, QR1B, QR2A, and QR2B. This doubles the output power, resulting in excellent high-power output.

[0032] It can be seen that this channel switching system is based on a stereo dual-channel architecture with the addition of a loop matching switch.

[0033] In dual-channel mode, switches SWC1, SWB1, SWC2, SWB2, SWC3, SWB3, SWC4 and SWB4 are turned on, while switches SWA1, SWA2, SWA3 and SWA4 are turned off.

[0034] In single-channel mode, switches SWB1, SWA1, SWA3, SWC3, SWC4, and SWB4 are turned on, while switches SWC1, SWC2, SWA2, SWB2, SWB3, and SWA4 are turned off.

[0035] The opening / closing action of the above loop matching switch does not require connection to the gate of the power transistor, and there are no complex node switches and charge pump settings. Therefore, it can be obtained by upgrading and improving existing stereo dual-channel architecture products, reducing R&D and production costs.

[0036] Furthermore, since the switching between single and dual channels is based on loop matching, no additional resistors or capacitors are introduced. Therefore, the switching process only introduces a small amount of parasitic impedance, and the resulting mismatch error and signal distortion are negligible and will not affect the user's radio reception experience.

[0037] In summary, by adding a loop matching switch to the stereo dual-channel architecture, when switching to single-channel mode, the output signal of one channel is injected into the other channel, and the power transistors of the two channels operate in parallel to drive the same speaker. This reduces the output impedance and increases the output power, while introducing only negligible mismatch and distortion, thus enabling higher power single-channel output.

[0038] In this embodiment, a resistor R1 is provided between the differential input P terminal of the left channel module and the negative input terminal of the integrator J1, a capacitor C1 is provided between the resistor R1 and the positive input terminal of the comparator J1, and a resistor R2 is provided between the switch SWB1 and the output terminal of the drive unit KL1. A resistor R3 is placed between the differential input P terminal of the right channel module and the negative input terminal of the integrator J2. A capacitor C3 is placed between the resistor R3 and the positive input terminal of the comparator J2. A resistor R4 is placed between the switch SWB3 and the output terminal of the drive unit KR1.

[0039] Here, switches SWA1 and SWA3 are used to create a parallel loop between the left channel module and the right channel module.

[0040] As can be seen, by using a simple switch setup, power transistors can be connected in parallel, and some integrators and comparators can be shielded to avoid introducing mismatch errors and signal distortion by adding additional components, while reducing the control difficulty of the single-to-dual channel switching process.

[0041] In this embodiment, in dual-channel mode, switches SWC1, SWB1, SWC2, SWB2, SWC3, SWB3, SWC4, and SWB4 are turned on. Switches SWA1, SWA2, SWA3, and SWA4 are turned off.

[0042] As an optional implementation, the negative input terminal of integrator J1 obtains the differential signal INPL input from the differential input terminal P of the left channel module, performs integration processing, and outputs the integrated signal TPL to the positive input terminal of comparator TL1. Comparator TL1 compares the integrated signal TPL with the triangular wave carrier and outputs the PWM signal PWMPL. The drive unit KL1 outputs the drive signal OUTPL to the speaker VL based on the PWM signal PWMPL. The negative input terminal of integrator J1 acquires the differential signal INNL input from the differential input N terminal of the left channel module, performs integration processing, and outputs the integrated signal TNL to the positive input terminal of comparator TL2. Comparator TL2 compares the integrated signal TNL with the triangular wave carrier and outputs the PWM signal PWMNL. The drive unit KL2 outputs the drive signal OUTNL to the speaker VL based on the PWM signal PWMNL. The negative input terminal of integrator J2 acquires the differential signal INPR input from the differential input terminal P of the right channel module, performs integration processing, and outputs the integrated signal TPR to the positive input terminal of comparator TR1. Comparator TR1 compares the integrated signal TPR with the triangular wave carrier and outputs the PWM signal PWMPR. The drive unit KR1 outputs the drive signal OUTPR to the speaker VR based on the PWM signal PWMPR. The negative input terminal of integrator J2 acquires the differential signal INNR input from the differential input N terminal of the right channel module, performs integration processing, and outputs the integrated signal TNR to the positive input terminal of comparator TR2. Comparator TR2 compares the integrated signal TNR with the triangular wave carrier and outputs the PWM signal PWMNR. The drive unit KR2 outputs the drive signal OUTNR to the speaker VR based on the PWM signal PWMNR.

[0043] Specifically, in dual-channel mode, the left channel module and the right channel module form a traditional stereo dual-channel architecture. They output drive signals to drive different speakers to achieve stereo dual-channel output.

[0044] As an optional implementation, the left channel module works synchronously with the right channel module; The speaker VL of the left channel module outputs left channel audio based on the differential drive signals OUTPL and OUTNL; The speaker VR of the right channel module outputs right channel audio based on the differential drive signals OUTPR and OUTNR.

[0045] In this embodiment, in single-channel mode, switches SWB1, SWA1, SWA3, SWC3, SWC4 and SWB4 are turned on. Switches SWC1, SWC2, SWA2, SWB2, SWB3, and SWA4 are turned off. The output of comparator TR1 in the right channel module is connected to drive units KL1 and KL2 in the left channel module. The outputs of drive units KL1 and KL2 are connected to the negative input of integrator J2 via switches SWB1, SWA1, SWA3 and SWC3. The negative output of integrator J2 is connected to the positive input of comparator TR2 in the right channel module. The output of comparator TR2 is connected to drive units TR1 and TR2.

[0046] As an optional implementation, the output of comparator TR1 synchronously outputs an integral signal TP to drive unit KL1 and drive unit KL2, and drive unit KL1 and drive unit KL2 synchronously output a drive signal OUTP. The negative input terminal of integrator J2 acquires the drive signal OUTP and integrates it, outputting the integrated signal TD to the positive input terminal of comparator TR2. Comparator TR2 compares the integrated signal TD with the triangular wave carrier and outputs the PWM signal PWMD. Drive unit KR1 and drive unit KR2 synchronously output the drive signal OUTN based on the PWM signal PWMD.

[0047] Specifically, in single-channel mode, only one channel is used for signal processing, and the power transistor output of another channel is connected to the input terminal to achieve parallel operation.

[0048] As can be seen, in this state, the power transistor of the drive unit in the left channel module sends a power signal to the integrator of the right channel module based on the output of any comparator in the right channel module.

[0049] The right channel module also drives the power transistor of the internal drive unit through another comparator, and the input of the integrator receives the power signal output from the left channel module. At this time, the power transistors of the left channel module and the right channel module are equivalent to operating in parallel, which can reduce the output impedance by half and increase the output power by 100%.

[0050] For example, assuming the output power is 15W in dual-channel mode, under ideal conditions, the output power can reach 15W*2=30W after switching to single-channel mode, thus achieving significant single-channel high-power output.

[0051] As an optional implementation, the loop of the left channel module is turned off, and the power transistors of drive units KL1 and KL2 are connected in equivalent parallel with the power transistors of drive units KR1 and KR2. The speaker VL or speaker VR outputs mono audio based on the drive signal OUTP and the drive signal OUTN.

[0052] Here, in dual-channel mode, switches SWA2, SWB2, SWA4, and SWB4 are used to match the parasitic resistance and capacitance of the outputs of the left and right channel modules.

[0053] In single-channel mode, switches SWC1, SWC2, SWC3, and SWC4 are used to block the connection between the feedback terminals of the power transistors of each drive unit and the integrating capacitors C1, C2, C3, and C4, so as to prevent the integrating capacitors from affecting the feedback loop in single-channel mode.

[0054] Therefore, even with a significant increase in single-channel output power, the switching process only introduces a small amount of parasitic impedance, and the mismatch error and signal distortion generated during operation are negligible and will not affect the user's radio reception experience.

[0055] In this embodiment, a loop matching switch is added based on the stereo dual-channel architecture. When switching to single-channel mode, the output signal of one channel is injected into the other channel, and the power transistors of the two channels run in parallel to drive the same speaker. The output impedance is reduced and the output power is increased. At the same time, only negligible mismatch and distortion are introduced, which can achieve a higher power single-channel output.

[0056] Example 2 Please see Figure 4 The control method disclosed in this embodiment includes: a. Monitoring mode indicator.

[0057] In this embodiment, the operating modes include dual-channel mode and single-channel mode, and different mode flags are set for different operating modes.

[0058] For example, the mode flag for dual-channel mode can be PBTL=0, and the mode flag for single-channel mode can be PBTL=1.

[0059] Therefore, when the mode flag is detected to be 0, step b is executed; when the mode flag is detected to be 1, step d is executed.

[0060] b. The left channel module and the right channel module operate independently.

[0061] In this embodiment, the left channel module and the right channel module operate independently based on their own loops, and the system is in a common dual-channel mode, where the left channel module and the right channel module process the same differential signal.

[0062] c. Based on the independent drive signals generated by the left channel module and the right channel module, synchronously drive the corresponding speakers for dual-channel audio playback.

[0063] Here, the left channel module and the right channel module synchronously output drive signals to drive the corresponding speakers, providing dual-channel stereo output.

[0064] d. Connect the output of the left channel module in parallel with the input of the right channel module.

[0065] In this embodiment, only a single channel is used for signal processing, and the power transistor output of another channel is connected to the input terminal to achieve parallel operation.

[0066] e. Drive a single speaker with a mono sound output based on the magnification drive signal generated by the right channel module.

[0067] Here, with the power transistors of the left and right channel modules operating in parallel, the output impedance will be halved, while the output power will double, achieving a higher power single-channel output.

[0068] As an optional implementation, when in single-channel mode, the integrator and comparator of the left channel module are turned off, and any comparator of the right channel module outputs a PWM signal to the drive unit of the left channel module. The drive unit of the left channel module outputs a drive signal to the integrator of the right channel module.

[0069] As can be seen, in single-channel mode, the power transistors of the dual-ended drive unit are connected in parallel to perform single-channel output, which significantly improves the output power and at the same time greatly reduces the output impedance.

Claims

1. A channel switching system based on loop matching, characterized in that, include: Left channel module and right channel module; The differential input P terminal of the left channel module is connected to comparator TL1 via integrator J1, and the differential input N terminal is connected to comparator TL2 via integrator J1. Comparator TL1 is connected to speaker VL via driver unit KL1, and comparator TL2 is connected to speaker VL via driver unit KL2. The differential input P terminal of the right channel module is connected to comparator TR1 via integrator J2, and the differential input N terminal is connected to comparator TR2 via integrator J2. Comparator TR1 is connected to speaker VR via driver unit KR1, and comparator TR2 is connected to speaker VR via driver unit KR2. Switches SWC1 and SWB1 are connected in series between the differential input P terminal of the left channel module and the output terminal of the drive unit KL1, and switches SWC2 and SWB2 are connected in series between the differential input N terminal and the output terminal of the drive unit KL2. Switches SWC3 and SWB3 are connected in series between the differential input P terminal of the right channel module and the output terminal of the drive unit KR1, and switches SWC4 and SWB4 are connected in series between the differential input N terminal and the output terminal of the drive unit KR2. Switch SWA1 and switch SWA3 are connected in series between switch SWB1 and switch SWC3.

2. The channel switching system based on loop matching according to claim 1, characterized in that, include: A resistor R1 is provided between the differential input P terminal of the left channel module and the negative input terminal of the integrator J1, a capacitor C1 is provided between the resistor R1 and the positive input terminal of the comparator J1, and a resistor R2 is provided between the switch SWB1 and the output terminal of the drive unit KL1. A resistor R3 is provided between the differential input P terminal of the right channel module and the negative input terminal of the integrator J2, a capacitor C3 is provided between the resistor R3 and the positive input terminal of the comparator J2, and a resistor R4 is provided between the switch SWB3 and the output terminal of the drive unit KR1.

3. The channel switching system based on loop matching according to claim 1, characterized in that, include: In dual-channel mode, switches SWC1, SWB1, SWC2, SWB2, SWC3, SWB3, SWC4, and SWB4 are turned on. The switches SWA1, SWA2, SWA3 and SWA4 are turned off.

4. A channel switching system based on loop matching according to claim 2, characterized in that, include: The negative input terminal of the integrator J1 receives the differential signal INPL input from the differential input terminal P of the left channel module, performs integration processing, and outputs the integrated signal TPL to the positive input terminal of the comparator TL1. The comparator TL1 compares the integrated signal TPL with the triangular wave carrier and outputs the PWM signal PWMPL. The drive unit KL1 outputs the drive signal OUTPL to the speaker VL based on the PWM signal PWMPL. The negative input terminal of the integrator J1 receives the differential signal INNL input from the differential input N terminal of the left channel module, performs integration processing, and outputs the integrated signal TNL to the positive input terminal of the comparator TL2. The comparator TL2 compares the integrated signal TNL with the triangular wave carrier and outputs the PWM signal PWMNL. The drive unit KL2 outputs the drive signal OUTNL to the speaker VL based on the PWM signal PWMNL. The negative input terminal of the integrator J2 receives the differential signal INPR input from the differential input terminal P of the right channel module, performs integration processing, and outputs the integrated signal TPR to the positive input terminal of the comparator TR1. The comparator TR1 compares the integrated signal TPR with the triangular wave carrier and outputs the PWM signal PWMPR. The drive unit KR1 outputs the drive signal OUTPR to the speaker VR based on the PWM signal PWMPR. The negative input terminal of the integrator J2 receives the differential signal INNR input from the differential input N terminal of the right channel module, performs integration processing, and outputs the integrated signal TNR to the positive input terminal of the comparator TR2. The comparator TR2 compares the integrated signal TNR with the triangular wave carrier and outputs the PWM signal PWMNR. The drive unit KR2 outputs the drive signal OUTNR to the speaker VR based on the PWM signal PWMNR.

5. The channel switching system based on loop matching as described in claim 4, characterized in that, include: The left channel module works synchronously with the right channel module; The speaker VL of the left channel module outputs left channel audio based on the differential drive signals OUTPL and OUTNL. The speaker VR of the right channel module outputs right channel audio based on the differential drive signals OUTPR and OUTNR.

6. A channel switching system based on loop matching according to claim 2, characterized in that, include: In single-channel mode, switches SWB1, SWA1, SWA3, SWC3, SWC4, and SWB4 are turned on. The switches SWC1, SWC2, SWA2, SWB2, SWB3, and SWA4 are turned off; The output of comparator TR1 in the right channel module is connected to drive unit KL1 and drive unit KL2 in the left channel module. The outputs of drive unit KL1 and drive unit KL2 are connected to the negative input of integrator J2 via switch SWB1, switch SWA1, switch SWA3 and switch SWC3. The negative output of integrator J2 is connected to the positive input of comparator TR2 in the right channel module. The output of comparator TR2 is connected to drive unit TR1 and drive unit TR2.

7. A channel switching system based on loop matching according to claim 6, characterized in that, include: The output of the comparator TR1 synchronously outputs an integral signal TP to the drive unit KL1 and the drive unit KL2, and the drive unit KL1 and the drive unit KL2 synchronously output a drive signal OUTP. The negative input terminal of the integrator J2 acquires the drive signal OUTP and integrates it, and outputs the integrated signal TD to the positive input terminal of the comparator TR2. The comparator TR2 compares the integrated signal TD with the triangular wave carrier and outputs the PWM signal PWMD. The drive unit KR1 and the drive unit KR2 synchronously output the drive signal OUTN based on the PWM signal PWMD.

8. A channel switching system based on loop matching according to claim 7, characterized in that, include: When the loop of the left channel module is turned off, the power transistors of the drive unit KL1 and the drive unit KL2 are connected in equivalent parallel with the power transistors of the drive unit KR1 and the drive unit KR2. The speaker VL or the speaker VR outputs mono audio based on the drive signal OUTP and the drive signal OUTN.

9. A control method, characterized in that, include: Monitoring mode indicator; When the mode indicator switches to dual-channel mode, the left channel module and the right channel module operate independently. Based on the independent drive signals generated by the left channel module and the right channel module, the corresponding speakers are synchronously driven to play sound in two channels. When the mode flag indicates that the mode is switched to single-channel mode, the output terminal of the left channel module is connected in parallel with the input terminal of the right channel module. The multiplier drive signal generated by the right channel module drives a single speaker to play mono audio.

10. The control method according to claim 9, characterized in that, include: When in single-channel mode, the integrator and comparator of the left channel module are turned off, and any comparator of the right channel module outputs a PWM signal to the drive unit of the left channel module. The drive unit of the left channel module outputs a drive signal to the integrator of the right channel module.

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