Method for usb4 device to enter and exit d3 and computer readable storage medium

Abstract

This invention provides a method for a USB4 device to enter or exit D3 and a computer-readable storage medium. The method for a USB4 device to enter or exit D3 includes the following steps: Step S1: When the USB4 device is idle or the operating system is about to enter hibernation, the operating system's power management framework requests the USB4 device to enter D3 through the driver stack; Step S2: The USB4 device driver executes the USB4 device to enter D3, and the operating system firmware disables the DPC trigger enable of the DPC register of the USB4 port after the last USB4 device in the USB4 link enters D3; Step S3: When the operating system needs to use the USB4 device or the operating system is woken up, the operating system's power management framework requests the USB4 device to enter D0 from D3 through the driver stack; Step S4: The USB4 device driver executes the USB4 device to enter D0 from D3, and the operating system firmware enables the DPC trigger enable of the DPC register of the USB4 port after the last USB4 device in the USB4 link enters D0.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method for a USB4 device to enter or exit a D3 and a computer-readable storage medium. Background Technology

[0002] With the rapid development of information technology, high-speed data transmission interface technology has become the core of modern computing platforms. Traditionally, interface standards such as Universal Serial Bus (USB), PCIe, and DisplayPort (DP) have developed independently, leading to complex device connections, port redundancy, and limited overall efficiency. To integrate and improve data transmission performance, the USB4 interface standard, with its high bandwidth and multi-protocol convergence capabilities, emerged. The USB4 interface standard deeply integrates and extends the basic architecture of Intel Thunderbolt 3 technology at the physical and protocol layers. It not only inherits Thunderbolt 3's native support for USB, PCIe, and DP protocols, but also introduces efficient tunneling protocol technology to achieve dynamic aggregation and concurrent transmission of multiple data types on a single connection. The highest theoretical bandwidth of the USB4 specification (40 Gbps) is comparable to Thunderbolt 3, while also striving to achieve broader device compatibility and optimized resource scheduling efficiency, representing the development direction of the next generation of general-purpose high-speed interfaces.

[0003] ACPI (Advanced Configuration and Power Management Interface) provides operating system applications with interfaces for managing all power management functions, enabling system / device / processor power management, device and processor performance management, configuration / plug-and-play, and other functions. Computer devices conform to the ACPI specification, defining four device power states: D0, D1, D2, and D3. D0 is the active state where the device is fully functional; D1 and D2 are intermediate low-power sleep states; and D3 is the lowest power state. USB devices typically only map their link power states to D0 and D3, not independently implementing D1 / D2 states. When the device is idle or the system is in sleep mode, the operating system can request the device to enter the D3 state through the device driver to reduce power consumption. When the device is needed, it is restored from the D3 state to the D0 state, thus meeting the computer's energy consumption requirements.

[0004] Currently, due to the need for deep integration between the power management logic of the USB4 interface and platform-specific processors, chipsets, ACPI implementations, and operating system firmware (BIOS / UEFI), computer platforms using non-mainstream architectures (such as some domestically produced platforms) still experience some compatibility and stability issues when introducing the USB4 interface. A particularly prominent problem is that when the operating system attempts to move a device out of D3 state, the USB4 controller chip may fail to be correctly recognized by the system or may fail to be enumerated, leading to interruptions in high-speed data transfer (commonly known as device loss). This issue severely impacts the plug-and-play reliability of USB4 devices and the normal operation of system power management functions, affecting the user experience. Summary of the Invention

[0005] The purpose of this invention is to provide a method for transferring a USB4 device into or out of a D3 storage device and a computer-readable storage medium, which can prevent the loss of the device when transferring the USB4 device into or out of the D3 storage device.

[0006] To achieve the above objectives, the present invention provides a method for a USB4 device to enter or exit D3, comprising the following steps: Step S1: When the USB4 device is idle or the operating system is about to enter hibernation, the operating system's power management framework requests the USB4 device to enter D3 through the driver stack; Step S2: The USB4 device driver executes the USB4 device entry into D3. After the last USB4 device in the USB4 link enters D3, the operating system firmware (BIOS / UEFI) disables the DPC trigger enable of the DPC register of the USB4 port. Step S3: When the operating system needs to use the USB4 device or the operating system is woken up, the operating system's power management framework requests the USB4 device to move from D3 to D0 through the driver stack; Step S4: The USB4 device driver executes the USB4 device to enter D0 from D3. After the last USB4 device enters D0 in the USB4 link, the operating system firmware enables the DPC trigger of the DPC register of the USB4 port.

[0007] The DPC register is the DPC Control Register.

[0008] In step S2, the operating system firmware disables the DPC trigger enable of the DPC register in the ACPI method of the last USB4 device entering D3 in the USB4 link; in step S4, the operating system firmware enables the DPC trigger enable of the DPC register in the ACPI method of the last USB4 device entering D0 in the USB4 link.

[0009] The method for USB4 devices to enter and exit D3 according to the present invention is particularly suitable for Hygon platforms.

[0010] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method of the present invention for a USB4 device to enter or exit D3.

[0011] The beneficial effects of this invention are as follows: The method for a USB4 device to enter or exit D3 and the computer-readable storage medium of this invention, by disabling DPC triggering enable during the period from when the USB4 device enters D3 to when it enters D0, avoid the possibility of DPC being triggered by link anomalies, which could lead to the inability to access the USB4 device. Therefore, the method for a USB4 device to enter or exit D3 of this invention can meet the power consumption requirements of the computer while avoiding device loss during the process of entering or exiting D3, and can achieve the plug-and-play reliability of USB4 devices and the normal operation of system energy efficiency management functions, thereby improving the user experience. Attached Figure Description

[0012] To further understand the features and technical content of this invention, please refer to the following detailed description and accompanying drawings. However, the drawings are for reference and illustration only and are not intended to limit the invention. In the drawings,

[0013] Figure 1 This is a flowchart of the method for a USB4 device to enter and exit D3 according to the present invention. Detailed Implementation

[0014] To further illustrate the technical means and effects of the present invention, the following detailed description is provided in conjunction with the preferred embodiments of the present invention and their accompanying drawings.

[0015] See Figure 1 This invention provides a method for a USB4 device to enter or exit D3, comprising the following steps: Step S1: When the USB4 device is idle or the operating system is about to enter hibernation, the operating system's power management framework requests the USB4 device to enter D3 through the driver stack; Step S2: The USB4 device driver executes the USB4 device entry into D3. After the last USB4 device in the USB4 link enters D3, the operating system firmware (BIOS / UEFI) disables the DPC trigger enable of the DPC register of the USB4 port. Step S3: When the operating system needs to use the USB4 device or the operating system is woken up, the operating system's power management framework requests the USB4 device to move from D3 to D0 through the driver stack; Step S4: The USB4 device driver executes the USB4 device to enter D0 from D3. After the last USB4 device enters D0 in the USB4 link, the operating system firmware enables the DPC trigger of the DPC register of the USB4 port.

[0016] USB4 devices can map their link power states to two power states: D0 and D3. D0 represents the active state where the device is fully functional, while D3 represents the lowest power consumption state. When a USB4 device is idle or the system is preparing to enter sleep mode, the operating system's power management framework can request the USB4 device to enter the D3 state via the driver stack to reduce power consumption; this process is typically called "entering D3." When the operating system needs to reuse the USB4 device or is woken up, the operating system's power management framework can request the USB4 device to return from the D3 state to the fully functional D0 state via the driver stack; this process is typically called "exiting D3." By dynamically managing the power states of USB4 devices, the operating system can significantly reduce the power consumption of USB4 devices when idle or during system sleep, thereby achieving system-level energy efficiency optimization.

[0017] USB4 devices on a computer are typically connected to the computer's PCIe link. The DPC function (also known as DPC service) is a downstream port containment (suppression) function provided by PCIe. Essentially, it's a function similar to automatic hot-plugging, where, when an error is detected in the downstream port itself or an error message is reported by a device connected to that downstream port, the corresponding port can be closed, intercepting PCIe transmissions and preventing the error from spreading, thus ensuring other devices continue to function normally. DPC registers are the specific hardware registers that implement the DPC function, storing all DPC control and status bits. This invention disables DPC triggering enable during the period from when a USB4 device enters D3 to when it enters D0, preventing potential DPC triggering due to link anomalies that could render the USB4 device inaccessible. Therefore, the method for USB4 devices entering and exiting D3 in this invention can meet the computer's power consumption requirements while avoiding device loss during this process, ensuring plug-and-play reliability of USB4 devices and normal operation of system energy efficiency management functions, thus improving the user experience.

[0018] Specifically, the DPC register is the DPC Control Register, which is used to enable / disable DPC and configure trigger conditions.

[0019] Specific bits in the DPC control register indicate DPC trigger enable. For example, bits 0-1 in the DPC control register indicate DPC trigger enable. When set to 00b, the link does not receive error information during training; when set to 01b, it can receive FATAL error information; and when set to 10b, it can receive both non-FATAL error and FATAL error messages. Therefore, specific values ​​can be written to the DPC control register to enable / disable DPC trigger enable using software. In a preferred embodiment of the invention, in step S2, the operating system firmware disables the DPC trigger enable of the DPC register in the ACPI method of the last USB4 device entering D3 of the USB4 link; in step S4, the operating system firmware enables the DPC trigger enable of the DPC register in the ACPI method of the last USB4 device entering D0 of the USB4 link.

[0020] The method for USB4 devices to enter and exit D3 according to the present invention is particularly suitable for Hygon platforms.

[0021] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method of the present invention for a USB4 device to enter or exit D3.

[0022] In summary, the method for a USB4 device to enter or exit D3 and the computer-readable storage medium of the present invention, by disabling DPC triggering enable during the period from when the USB4 device enters D3 to when it enters D0, avoid the possibility of DPC being triggered by link anomalies, which could lead to the inability to access the USB4 device. Therefore, the method for a USB4 device to enter or exit D3 of the present invention can meet the power consumption requirements of the computer while avoiding device loss during the process of entering or exiting D3, and can achieve the plug-and-play reliability of USB4 devices and the normal operation of system energy efficiency management functions, thereby improving the user experience.

[0023] As described above, those skilled in the art can make various other corresponding changes and modifications based on the technical solutions and concepts of this invention, and all such changes and modifications should fall within the protection scope of the claims of this invention.

Claims

1. A method for a USB4 device to enter or exit D3, characterized in that, include: Step S1: When the USB4 device is idle or the operating system is about to enter hibernation, the operating system's power management framework requests the USB4 device to enter D3 through the driver stack; Step S2: The USB4 device driver executes USB4 device entry into D3. After the last USB4 device enters D3 in the USB4 link, the operating system firmware disables the DPC trigger enable of the DPC register of the USB4 port. Step S3: When the operating system needs to use the USB4 device or the operating system is woken up, the operating system's power management framework requests the USB4 device to move from D3 to D0 through the driver stack; Step S4: The USB4 device driver executes the USB4 device to enter D0 from D3. After the last USB4 device enters D0 in the USB4 link, the operating system firmware enables the DPC trigger of the DPC register of the USB4 port.

2. The method for a USB4 device to enter or exit D3 as described in claim 1, characterized in that, The DPC register is the DPC control register.

3. The method for a USB4 device to enter or exit D3 as described in claim 1, characterized in that, In step S2, the operating system firmware disables the DPC trigger enable of the DPC register in the ACPI method of the last USB4 device entering D3 in the USB4 link; in step S4, the operating system firmware enables the DPC trigger enable of the DPC register in the ACPI method of the last USB4 device entering D0 in the USB4 link.

4. The method for a USB4 device to enter or exit D3 as described in claim 1, characterized in that, Methods for USB4 devices to enter and exit D3 on the Hygon platform.

5. A computer-readable storage medium, characterized in that, The device stores a computer program that, when executed by a processor, implements the method for a USB4 device to enter or exit D3 as described in any one of claims 1-4.

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