A low-voltage area flexible interconnection device based on a nine-switch converter and a common-mode suppression method

Abstract

This invention proposes a low-voltage distribution area flexible interconnection device and common-mode suppression method based on a nine-switch converter, belonging to the field of distribution network flexible interconnection technology. The device employs a non-isolated nine-switch topology to achieve flexible interconnection and power regulation of the distribution area, reducing the number of switching devices in traditional flexible interconnection devices. Addressing the common-mode current problem of non-isolated flexible interconnection devices, a collaborative control method combining a voltage vector sequencing strategy and a DC bias compensation device is proposed. The method is characterized by effectively reducing the average common-mode voltage of the flexible interconnection device by reconstructing the voltage vector sequence and changing the duration of two zero vector segments. Simultaneously, a small-capacity DC bias compensation converter is connected in series between the neutral and ground lines to compensate for the inherent common-mode voltage DC bias generated by the nine-switch converter. The collaborative control of these two components effectively suppresses the common-mode current of the flexible interconnection device.

Description

Technical Field

[0001] This invention belongs to the field of flexible interconnection technology for distribution networks, specifically relating to a low-voltage distribution area flexible interconnection device based on a nine-switch converter and a common-mode suppression method. This method overcomes the common-mode current problem in non-isolated low-voltage flexible interconnection devices by reconstructing the voltage vector sequence and allocating the zero-vector action time, in coordination with a small-capacity DC bias compensation converter. Background Technology

[0002] With the high proportion of distributed energy integration, problems such as uneven load distribution, voltage exceeding limits, and harmonic pollution between low-voltage distribution networks are becoming increasingly prominent. Flexible interconnection devices can achieve bidirectional active regulation of power flow between distribution networks and coordinated power quality management, making them an important means to improve the flexibility and reliability of distribution network operation.

[0003] Traditional flexible interconnect devices mostly employ back-to-back converter solutions based on isolation transformers. While the control is mature, the transformers suffer from high losses and are bulky and expensive, reducing the overall system efficiency. To overcome these drawbacks, transformerless flexible interconnect devices are gaining attention due to their advantages such as low current harmonics, flexible power control, and fast dynamic response, showing promising application prospects, especially in distributed energy integration scenarios like photovoltaics. However, the non-isolated topology also introduces significant common-mode voltage issues, creating common-mode loops in the system and generating common-mode leakage current. This not only increases losses and affects power quality but may also cause electromagnetic interference and safety hazards. Furthermore, non-isolated flexible interconnect devices still require two full-power back-to-back converters, resulting in higher costs.

[0004] Since the voltages of the two transformer substations are very close in most cases, a nine-switch converter can be used instead of a traditional back-to-back converter. Its two AC port output voltages are close to the grid voltage, which can significantly reduce the DC bus voltage requirement. At the same time, theoretical analysis shows that its inherent DC bias amplitude is limited (usually below 50V), which is far lower than the insulation withstand voltage level of low-voltage electrical equipment at the kV level, and also less than the common zero-to-ground voltage deviation caused by grounding or load imbalance in the actual power grid, and will not pose a threat to insulation safety.

[0005] Low-voltage flexible interconnection devices based on nine-switch converters further reduce costs, but the common-mode rejection is more complex than that of traditional back-to-back converters due to the inherent switching coupling and DC bias issues of the nine-switch converters. Therefore, a low-voltage flexible interconnection device and control method that can effectively suppress common-mode current while reducing the number of switches and lowering costs is needed.

[0006] This invention proposes a common-mode suppression strategy based on voltage vector sorting and DC compensation for a nine-switch converter structure. By dynamically allocating the zero-vector action time and the access of a small-capacity DC bias compensation converter, the two work together to effectively suppress the common-mode current. This achieves a balance between economy, safety, and efficiency while ensuring stable system operation. Summary of the Invention

[0007] This invention proposes a low-voltage distribution network flexible interconnection device and common-mode suppression method based on a nine-switch converter, belonging to the field of distribution network flexible interconnection technology. The device employs a non-isolated nine-switch topology, effectively reducing the number of switching devices in traditional flexible interconnection devices. Addressing the common-mode current problem in flexible interconnection devices, a collaborative control method combining a voltage vector sequencing strategy and a DC bias compensation device is proposed. This method is characterized by controlling the operation of power switches by reconstructing the voltage vector sequence and allocating the zero-vector action time, effectively reducing the average common-mode voltage of the flexible interconnection device. Simultaneously, a small-capacity DC bias compensation converter is connected in series between the neutral and ground lines to compensate for the inherent, safe-range common-mode DC bias generated by the nine-switch converter. The collaborative control of these two components effectively suppresses the common-mode current of the flexible interconnection device.

[0008] The objective of this invention is achieved through the following technical solution: A low-voltage distribution area flexible interconnection device and common-mode suppression method based on a nine-switch converter, characterized in that it includes: The controller collects the three-phase line voltage on both the rectifier and inverter sides. , With line current , And collect DC side voltage These measurements, after being processed by Park transform and phase-locked loop, yield the phase angles between the rectifier and inverter sides. , and the dq axis components. Then, according to the DC voltage command... With power transfer command , The dq-axis current commands for the rectifier and inverter sides are calculated by a PI controller, and then the corresponding dq-axis voltage reference signals are generated through current closed-loop control. Finally, the voltage modulation signal in the αβ coordinate system is obtained through inverse coordinate transformation. , , , .

[0009] The voltage vector sorting strategy for the nine-switch converter includes: calculating the rectifier-side sector number. and the corresponding effective voltage vector number , Zero vector number Initialized to V0, zero vector number Initialize to V7; calculate inverter-side sector number. and the corresponding effective voltage vector number , Zero vector number Initialized to V0, zero vector number Initialize to V7. Calculate the effective vector action time on the rectifier side based on the volt-second balance principle. , Zero vector action time ; Calculate the effective vector on the inverter side , Zero vector action time . It has always been 0. Initialize to 0. Determine the size of the sector numbers on both sides; if... ,when hour, =0; when hour, .

[0010] like ,when and hour, ;when and hour, . judge and Size, when hour, ;when hour, Based on the order of each voltage vector and the modulation time, a modulation wave is generated and compared with the carrier wave to obtain the nine-switch converter drive signals PWM1-9.

[0011] The inherent common-mode voltage DC bias compensation method includes: the controller acquiring the phase current of the DC bias compensation converter a phase through a current sensor. b-phase current c-phase current The DC-side voltage of the DC bias compensation converter is acquired through a voltage sensor. The voltage between phases a and b is collected by a voltage sensor. The measured value , , , The data is transmitted to the controller. The rectifier-side phase angle is obtained via a phase-locked loop. θThen according to the DC voltage command via PI controller and sin θ The current command is calculated. 0 as Current, i.e., common-mode current I cm instruction, and A voltage reference is obtained through current closed-loop control. , The DC bias compensation converter drive signals G1-G6 are obtained by SVPWM modulation.

[0012] Compared with the prior art, the beneficial effects of the technical solution of the present invention are: 1. This invention uses a nine-switch converter topology to replace the traditional isolation transformer or two sets of full-power back-to-back converter structures, which significantly reduces the number of switching devices used, reduces the overall cost, size and loss of the device, and improves the economy of the system. 2. The voltage vector reconstruction of the nine-switch converter proposed in this invention ensures that the effective vector action time of SVPWM remains unchanged, and reduces the average common-mode voltage of the nine-switch converter to the minimum. At the same time, it works in coordination with the DC bias compensation converter to effectively suppress common-mode voltage and common-mode current, achieving a balance between low cost, high performance and safety. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of a low-voltage distribution area flexible interconnection device and common-mode suppression method based on a nine-switch converter, provided in an embodiment of the present invention. Figure 2 A block diagram of a controller for a low-voltage distribution area flexible interconnection device based on a nine-switch converter is provided in an embodiment of the present invention. Figure 3 A voltage vector diagram of a low-voltage distribution area flexible interconnection device based on a nine-switch converter is provided in this embodiment of the invention. Figure 4 A switching state and common-mode voltage diagram of a low-voltage distribution area flexible interconnection device based on a nine-switch converter is provided for an embodiment of the present invention. Figure 5 A voltage vector sorting flowchart for a low-voltage distribution area flexible interconnection device based on a nine-switch converter, provided in an embodiment of the present invention; Figure 6 A voltage vector sorting diagram of a low-voltage distribution area flexible interconnection device based on a nine-switch converter provided in an embodiment of the present invention; Figure 7 An equivalent circuit diagram of a low-voltage distribution area flexible interconnection device based on a nine-switch converter is provided for an embodiment of the present invention; Figure 8 The system simulation effect diagram provided for the embodiments of the present invention; Figure 9 This is a schematic diagram of a module of an embodiment of a low-voltage distribution area flexible interconnection device and common-mode suppression method based on a nine-switch converter provided by the present invention; Figure 10 This is a schematic diagram of a low-voltage distribution area flexible interconnection device and common-mode suppression method based on a nine-switch converter, provided in an embodiment of the present invention. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The specific operational methods in the method embodiments can also be applied to the device embodiments or system embodiments. It should be noted that in the description of this application, "at least one" refers to one or more, where "multiple" refers to two or more. Therefore, in the embodiments of this application, "multiple" can also be understood as "at least two". "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / ", unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, it should be understood that in the description of this application, terms such as "first" and "second" are only used for distinguishing the descriptive purpose and should not be construed as indicating or implying relative importance or order. The invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0015] The present invention proposes a low-voltage distribution area flexible interconnection device and common-mode suppression method based on a nine-switch converter, comprising the following steps: Please refer to Figure 1 A structure and control method for a low-voltage distribution area flexible interconnection device based on a nine-switch converter are disclosed. The device comprises: power switches (S1-S9), a voltage sensor, a current sensor, a low-voltage distribution area, a filter, a controller, a capacitor, and a DC bias compensation converter. Switches S1, S4, and S7 are connected in series between the first and second terminals of the capacitor, forming phase A; switches S2, S5, and S8 are connected in series between the first and second terminals of the capacitor, forming phase B; and switches S3, S6, and S9 are connected in series between the first and second terminals of the capacitor, forming phase C. Switches S1-S6 form the upper delta arm of the nine-switch converter, and switches S3-S9 form the lower delta arm.

[0016] The DC bias compensation converter's phase a bridge arm is connected to the positive terminal of the rectifier's phase A voltage source via a filter, phase b bridge arm is connected to the transformer's neutral point, and phase c bridge arm is grounded via a filter.

[0017] In the device, the heavy-load transformer area is connected to the midpoint (A1, B1, C1) of the upper triangular arm of the nine-switch converter via an LCL filter, which is defined below as the rectifier side. The heavy-load transformer area is connected to the midpoint (A2, B2, C2) of the lower triangular arm of the nine-switch converter via an LCL filter, which is defined below as the inverter side. The middle switch group (S4-S6) is shared by the two outputs. The two outputs share a DC bus and a DC capacitor. The neutral point of the rectifier side transformer is grounded through a small-capacity DC bias compensation converter, and the neutral point of the inverter side transformer is directly grounded. The equivalent resistance between the low-voltage transformer area, the filter, the power switch, the DC bias compensation converter, and the grounding point forms a common-mode circuit.

[0018] The control and common-mode suppression method for low-voltage distribution area flexible interconnection devices based on a nine-switch converter includes the following steps: Step S1: Sampling of voltage and current of the low-voltage flexible interconnection device based on the nine-switch converter.

[0019] The controller acquires the three-phase line voltage between the rectifier-side transformer and the filter via a voltage sensor. Three-phase line current is collected through a current sensor. Three-phase line voltages are collected between the inverter-side transformer and the filter using voltage sensors. The line current is collected by a current sensor on the three-phase inverter side. DC voltage is acquired by a voltage sensor on the DC side of the nine-switch converter. .

[0020] Step S2: Dual closed-loop control of the low-voltage distribution area flexible interconnection device based on the nine-switch converter.

[0021] Please refer to Figure 2 The diagram shows a block diagram of a low-voltage distribution area flexible interconnection device controller based on a nine-switch converter. The measured values... , , , The data is input to the controller and obtained through Park transformation. , , , , , , , The rectifier-side phase angle is obtained through a phase-locked loop. Phase angle with inverter side Then, according to the rectified DC voltage command With power transfer command , The PI controller calculates the current command in the dq coordinate system on the rectifier side. , Current command in the inverter side dq coordinate system , The voltage reference signal in the dq coordinate system is obtained through current closed-loop control. , , , The process is as follows: (1) (2) In the formula, and These are the proportional and integral coefficients of the outer voltage loop. and These are the proportional and integral coefficients of the inner current loop. and These are the proportional and integral coefficients of the power outer loop. , , , The voltage modulation signal in the αβ coordinate system is obtained through coordinate transformation. , , , .

[0022] Step S3: Sector determination and preliminary calculation of vector action time. First, based on the modulation voltage signal... v rα ref , v rβ ref , v iα ref , v iβ ref Calculate three reference values: (3) By judgment U 1n , U 2n , U 3n The combination of symbols determines the sector N to which the rectifier-side voltage vector belongs. The specific rule is: when... U 1n >0, U 2n >0, U3n When <0, it belongs to sector I; when U 1n >0, U 2n <0, U 3n When <0, it belongs to sector II; when U 1n >0, U 2n <0, U 3n When >0, it belongs to sector III; when U 1n <0, U 2n <0, U 3n When >0, it belongs to sector IV; when U 1n <0, U 2n >0, U 3n When >0, it belongs to sector V; when U 1n <0, U 2n >0, U 3n When <0, it belongs to sector VI. The rectifier-side sector number is calculated using the above rule. V r and inverter side sector number V i .

[0023] After determining the sector, the corresponding effective voltage vector on the rectifier side is calculated based on the volt-second balance principle. V r1 , V r2 The effective voltage vector corresponding to the inverter side V r1 , V i2 Zero vector number V r01 , V i01 Initialized to V0, zero vector number V r02 , V i02 Initialize to V7. Calculate the inverter-side sector number. V i and the corresponding effective voltage vector number V r1 , V i2 Zero vector number Vi01 Initialized to V0, zero vector number V i02 Initialize to V7. Calculate the effective vector on the rectifier side based on the volt-second balance principle. T r1 , T r2 Calculate the effective vector on the inverter side. T i1 , T i2 The volt-second balance is shown in the following equation: (4) In the formula T s The periodic time. The zero vector action time on the rectifier side. T r0 = T s - T r1 - T r2 = T r01 + T r02 Inverter side zero vector action time T i0 = T s - T i1 - T i2 = T i01 + T i02 . T r01 It has always been 0. T i01 Initialize to 0.

[0024] The voltage vector (synthesized voltage vector) of the nine-switch converter is synthesized from the rectifier-side voltage vector and the inverter-side voltage vector. Please refer to [reference needed]. Figure 3 The voltage vector diagrams of the synthesized voltage vectors fall on the rectifier side and the inverter side respectively. Each side has two effective vectors and two zero vectors to synthesize the voltage vector of the nine-switch converter.

[0025] Step S4: Calculate the average common-mode voltage on the rectifier side and the average common-mode voltage on the inverter side, as shown in the following formula: (5) When both the rectifier and inverter zero vectors 2 are 7, a = 1; when both the rectifier and inverter zero vectors 2 are 0, a = 0. Average common-mode voltage of flexible interconnect devices. V cm_are, defined as the difference between the average common-mode voltage on the rectifier side and the inverter side, as shown in the following formula: (6) In the formula, r represents the rectifier-side voltage vector sign. V rn i represents the inverter-side voltage vector number. V in , T ri Voltage vector V rn , V in Duration of action V cm_ri Voltage vector V rn , V in The generated common-mode voltage is defined as the difference between the common-mode voltages on both sides, as shown in the following formula: (7) In the formula, u A1N , u B1N , u C1N This refers to the voltage at the three-phase output ports of the rectifier side. u A2N , u B2N , u C2N For the three-phase output port voltage on the rectifier side, according to the nine-switch coupling condition, the voltage vector... V rn , V in The choices are limited and V cm_ri Always greater than 0. The states of switches (S1-S9) are related to... V rn , V in , V cm_ri Please refer to the relationship. Figure 4 .

[0026] The average common-mode voltage can be determined by voltage vector sorting and the selection of zero vector action time. V cm_are Reduced to a minimum, its inherent common-mode voltage is minimized by DC bias. V cmare_dc As shown in the following formula: (8) In the formula, V 1 、V2 represents the phase voltage amplitude on the rectifier side and the inverter side, respectively, and Δ θ This represents the phase angle difference between the two sides. V cmare_dc and V 1 、V 2 、 Δ θ Please refer to the relationship. Figure 8 (b)

[0027] Step S5: Based on the coupling relationship of the nine-switch converter and the principle of minimum average common-mode voltage, reconstruct the switching sequence.

[0028] Please refer to Figure 5 The voltage vector sorting rule is as follows: determine the size of the sector numbers on both sides, if... V r = V i ,when T r1 ≤ T i1 hour, T i01 =0; when T r1 > T i1 hour, T i01 = T r1 - T i1 .like V r ≠ V i ,when V r1 ≠ V i1 and V r2 = V i2 hour, T i01 = T r1 ;when V r1 = V i1 and V r2 ≠ V i2 hour, T i01 = T r1 + T r2 - T i1 . judge Tr02 and T i02 Size, when T r02 ≤ T i02 hour, V r02 = V i02 =0; when T r02 > T i02 hour, V r02 = V i02 =V7. Please refer to the voltage vector ordering and corresponding execution time for various cases. Figure 6 .

[0029] Step S6: Generate a modulation wave according to the order of each voltage vector and the modulation time, compare it with the carrier wave to obtain the nine-switch converter drive signal PWM1-9, obtain the upper three switch transistors (S1-S3) drive signal on the rectifier side, obtain the three switch transistors (S7-S9) drive signal after the modulation signal on the inverter side is negative, and obtain the middle three switch transistors (S4-S6) drive signal by XORing the upper and lower switch transistor signals.

[0030] Step S7: Compensate the inherent common-mode voltage DC bias using a DC bias compensation converter.

[0031] Please refer to Figure 1 Phase b is a reused bridge arm, and phases a and b are used to control and maintain the DC bus voltage. V dc2 The b and c phases are controlled in the common-mode circuit to compensate for the inherent common-mode voltage DC bias.

[0032] Please refer to Figure 7 An equivalent circuit diagram of a low-voltage flexible interconnection device based on a nine-switch converter is provided, characterized in that it includes: offsetting the inherent common-mode voltage DC bias generated by the nine-switch converter through a DC bias compensation converter, thereby reducing the common-mode leakage current in the common-mode circuit.

[0033] Please refer to Figure 2 The controller acquires the phase current of the DC bias compensation converter a phase through a current sensor. i a b-phase current i b c-phase current i c The DC-side voltage of the DC bias compensation converter is acquired through a voltage sensor. V dc2 The voltage between phases a and b is collected by a voltage sensor. Vab .

[0034] The measured value i a , i b , i c , V ab The data is transmitted to the controller. V ab The rectifier-side phase angle is obtained via a phase-locked loop. θ Then according to the DC voltage command V dc2 * via PI controller and sin θ The current command is calculated. i a * 0 as i c Current, i.e., common-mode current I cm instruction, i a and i c A voltage reference is obtained through current closed-loop control. V ba ref , V bc ref The process is as follows: (9) In the formula, k p4 and k i4 The proportional and integral coefficients of the voltage loops in phases a and b are, k The proportionality coefficients for the current loops of phases a and b are... k p5 and k i5 These are the proportional and integral coefficients of the current loops in phases b and c. V ba ref , V bc ref The DC bias compensation converter drive signals G1-G6 are obtained by SVPWM modulation.

[0035] Please refer to Figure 8 The figure shown is a simulation diagram of the system provided in the embodiment of the present invention. Stage 1 is the traditional SVPWM simulation, Stage 2 is the improved SVPWM simulation after voltage vector sorting, and Stage 3 is the simulation after connecting a DC bias compensation converter. Figure 8 (a) is a simulation diagram of the A-phase current on the inverter side. It can be seen that after voltage vector sorting, the current THD decreases from 5.18% to 3.71%, the current quality is improved, and the introduction of the DC bias compensation converter does not affect the normal operation of the device. Figure 8 (c) It can be seen that after voltage vector sorting, the average common-mode voltage of the nine-switch converter is significantly reduced. Figure 8 (d) It can be seen that after voltage vector sorting, the common-mode current of the device is significantly suppressed, but DC bias still exists. After introducing a DC bias compensation converter, the common-mode current is suppressed to less than 1A. It can be seen that by combining voltage vector sorting with a DC bias compensation converter, the common-mode current of the system is significantly suppressed.

[0036] This invention is not limited to the embodiments described above. The above description of specific embodiments is intended to illustrate and explain the technical solutions of this invention. The specific embodiments described above are merely illustrative and not restrictive. Without departing from the spirit and scope of the claims, those skilled in the art can make many specific modifications based on the teachings of this invention, and these modifications all fall within the scope of protection of this invention.

[0037] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0038] Example module Figure 9 As shown, a schematic diagram of an embodiment of a low-voltage distribution area flexible interconnection device and common-mode suppression method based on a nine-switch converter is presented, including: The sampling module 901 collects the three-phase voltage and current on the rectifier side, the three-phase voltage and current on the inverter side, the DC-side voltage of the nine-switch converter, the three-phase current of the DC bias compensation converter, and its DC-side voltage and phase-to-phase voltage based on the voltage sensor and current sensor, and sends the sampled signals to the controller as control input.

[0039] The power calculation and phase-locked loop module 902 performs Park transformation on the sampled voltage and current to obtain the dq axis components, and obtains the phase angle between the rectifier side and the inverter side through the phase-locked loop, providing accurate feedback and synchronous phase reference for dual closed-loop control.

[0040] The dual closed-loop control module 903 generates a current command based on the DC voltage command and the power transfer command through the voltage outer loop and power outer loop PI regulation, and then obtains the dq axis voltage reference through the current inner loop PI regulation, and generates an αβ coordinate system modulated voltage signal through inverse transformation.

[0041] The vector sorting and modulation module 904 determines the sectors and effective vectors on both sides based on the modulation voltage, calculates the action time, dynamically allocates the zero vector type and time according to the sorting rules, and reconstructs the switching sequence to generate the nine-switch converter drive signals PWM1-9.

[0042] The DC bias compensation module 905 controls phases a and b to maintain DC voltage based on the sampled values, and phases b and c perform current closed-loop control with zero common-mode current as the command. It generates voltage reference and obtains compensation converter drive signals G1-G6 through SVPWM modulation.

[0043] The aforementioned low-voltage distribution area flexible interconnection device and common-mode suppression method module based on a nine-switch converter may include, but is not limited to, a parallel inverter circuit 1001, a controller 1002, and a memory 1003. The flexible interconnection device 1001 consists of two converter circuits (a nine-switch flexible interconnection converter circuit #1 and a DC bias compensation converter circuit #2). Driven by the controller 1002, each circuit flexibly interconnects the heavy-load and heavy-power distribution areas, achieving bidirectional power regulation and energy transmission on both sides. Simultaneously, it suppresses common-mode current through voltage vector sorting and DC bias compensation coordinated control. The sampling circuit is used to collect key electrical quantities of each circuit in real time (including three-phase voltage and current, DC-side voltage, compensation converter current, and phase-to-phase voltage, etc.), and sends the sampled signals to the analog-to-digital conversion module for digital processing before inputting them into the controller 1002.

[0044] The controller 1002 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It includes sub-control units (such as controller #1 and controller #2) corresponding to each converter circuit. These sub-control units execute the dual closed-loop control, voltage vector sorting, and common-mode voltage DC bias compensation algorithms of this invention based on the sampled signals, outputting the drive signals PWM1-9 required by the nine-switch converter and the drive signals G1-G6 required by the DC bias compensation converter, thereby achieving flexible interconnection of distribution areas, bidirectional power regulation, and effective suppression of common-mode current.

[0045] The memory 1003 can be an internal storage unit of the flexible interconnect device, such as an external storage circuit of the flexible interconnect device. Examples include plug-in hard drives, SmartMediaCards (SMCs), Secure Digital (SD) cards, and FlashCards equipped on the converter device. Furthermore, the memory 1003 can include both internal storage units of the converter device and external storage devices. It stores a computer program 1004 and the data parameters required for its operation. The controller 1002 reads and executes the computer program 1004 to complete the aforementioned control functions.

[0046] Those skilled in the art will understand that Figure 10 This is merely a schematic diagram of the device structure. The actual device may have additional or fewer components added or removed according to engineering needs, or the sampling, conversion and control units may be integrated or separated without affecting the implementation of the technical solution of this invention.

[0047] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0048] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0049] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0050] In the embodiments provided by this invention, it should be understood that the disclosed apparatus / terminal devices and methods can be implemented in other ways. For example, the method / terminal device embodiments described above are merely illustrative. For instance, the division of the controller or modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, or indirect coupling or communication connection between devices or units, and may be electrical, mechanical, or other forms.

[0051] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some units can be selected to achieve the purpose of this embodiment according to actual needs.

[0052] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0053] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0054] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A connection structure for a low-voltage distribution area flexible interconnection device based on a nine-switch converter, characterized in that, include: The system includes power switches (S1-S9), a voltage sensor, a current sensor, a low-voltage control panel, a filter, a controller, a capacitor, and a DC bias compensation converter. Switches S1, S4, and S7 are connected in series between the first and second terminals of the capacitor, forming phase A. Switches S2, S5, and S8 are connected in series between the first and second terminals of the capacitor, forming phase B. Switches S3, S6, and S9 are connected in series between the first and second terminals of the capacitor, forming phase C. Switches S1-S6 form the upper delta arm of the nine-switch converter, and switches S3-S9 form the lower delta arm. The DC bias compensation converter's phase a bridge arm is connected to the positive terminal of the rectifier's phase A voltage source via a filter, phase b bridge arm is connected to the transformer's neutral point, and phase c bridge arm is grounded via a filter. In the device, the heavy-load transformer area is connected to the midpoint (A1, B1, C1) of the upper triangular arm of the nine-switch converter via an LCL filter, which is defined below as the rectifier side. The heavy-load transformer area is connected to the midpoint (A2, B2, C2) of the lower triangular arm of the nine-switch converter via an LCL filter, which is defined below as the inverter side. The middle switch group (S4-S6) is shared by the two outputs. The two outputs share a DC bus and a DC capacitor. The neutral point of the rectifier side transformer is grounded through a small-capacity DC bias compensation converter, and the neutral point of the inverter side transformer is directly grounded. The equivalent resistance between the low-voltage transformer area, the filter, the power switch, the DC bias compensation converter, and the grounding point forms a common-mode circuit.

2. A control method for a low-voltage distribution area flexible interconnection device based on a nine-switch converter, characterized in that, include: According to claim 1, the controller acquires the three-phase line voltage between the rectifier-side transformer and the filter via a voltage sensor. Three-phase line current is collected through a current sensor. Three-phase line voltages are collected between the inverter-side transformer and the filter using voltage sensors. The line current is collected by a current sensor on the three-phase inverter side. DC voltage is acquired by a voltage sensor on the DC side of the nine-switch converter. ; The measured value , , , The data is input to the controller and obtained through Park transformation. , , , , , , , The rectifier-side phase angle is obtained through a phase-locked loop. Phase angle with inverter side Then, according to the rectified DC voltage command With power transfer command , The PI controller calculates the current command in the dq coordinate system on the rectifier side. , Current command in the inverter side dq coordinate system , The voltage reference signal in the dq coordinate system is obtained through current closed-loop control. , , , The process is as follows: (1) (2) In the formula, and These are the proportional and integral coefficients of the outer voltage loop. and These are the proportional and integral coefficients of the inner current loop. and These are the proportional and integral coefficients of the power outer loop. , , , The voltage modulation signal in the αβ coordinate system is obtained through coordinate transformation. , , , .

3. A voltage vector sorting strategy for a low-voltage distribution area flexible interconnection device based on a nine-switch converter, characterized in that, include: The modulated voltage signal according to claim 2 , , , Calculate the rectifier-side sector number and the corresponding effective voltage vector number , Zero vector number Initialized to V0, zero vector number Initialize to V7; Calculate the inverter-side sector number and the corresponding effective voltage vector number , Zero vector number Initialized to V0, zero vector number Initialize to V7. Calculate the effective vector duration on the rectifier side based on the volt-second balance principle. , Zero vector action time ; Calculate the effective vector on the inverter side , Zero vector action time . It has always been 0. Initialize to 0; The average common-mode voltage on the rectifier side and the average common-mode voltage on the inverter side are calculated as follows: (3) When the rectifier side zero vector With inverter-side zero vector When both are V7, a=1; when the rectifier side zero vector With inverter-side zero vector When both are V0, a=0. Average common-mode voltage of flexible interconnect devices. , defined as the difference between the average common-mode voltage on the rectifier side and the inverter side, as shown in the following formula: (4) In the formula, r represents the rectifier-side voltage vector sign. i represents the inverter-side voltage vector number. , Voltage vector , Duration of action Voltage vector , The resulting common-mode voltage is defined as the difference between the common-mode voltages on both sides, as shown in the following formula: (5) In the formula, , , This refers to the voltage at the three-phase output ports of the rectifier side. , , For the three-phase output port voltage on the rectifier side, according to the nine-switch coupling condition, the voltage vector... , The choices are limited and The average common-mode voltage is always greater than 0. By sorting the voltage vectors and selecting the zero-vector action time, the average common-mode voltage can be... Reduced to a minimum, its inherent common-mode voltage is minimized by DC bias. As shown in the following formula: (6) In the formula, V 1 、V 2 represents the phase voltage amplitude on the rectifier side and the inverter side, respectively. The difference in phase angle between the two sides; The voltage vector sorting rule is as follows: Determine the size of the sector numbers on both sides, if... ,when hour, =0; when hour, .like ,when and hour, ;when and hour, . judge and Size, when hour, ;when hour, Based on the order of each voltage vector and the modulation time, a modulation wave is generated. It is compared with the carrier wave to obtain the nine-switch converter drive signals PWM1-9. The rectifier side obtains the drive signals for the upper three switches (S1-S3). The inverter side obtains the drive signals for the three switches (S7-S9) after the modulation signal is negated. The upper and lower switch signals are XORed to obtain the drive signals for the middle three switches (S4-S6).

4. A method for compensating the inherent common-mode voltage DC bias of a low-voltage distribution area flexible interconnection device based on a nine-switch converter, characterized in that, include: According to claim 1, phase b is a multiplexed bridge arm, and phases a and b are used to control and maintain the DC bus voltage. The b and c phases are controlled in the common-mode circuit to compensate for the inherent common-mode voltage DC bias. The controller acquires the phase current of the DC bias compensation converter a-phase current via a current sensor. b-phase current c-phase current The DC-side voltage of the DC bias compensation converter is acquired through a voltage sensor. The voltage between phases a and b is collected by a voltage sensor. ; The measured value , , , The data is transmitted to the controller. The rectifier-side phase angle is obtained via a phase-locked loop. θ Then according to the DC voltage command via PI controller and sin θ The current command is calculated. . Current, i.e., common-mode current I cm The instruction is set to 0. and The voltage reference is obtained through current closed-loop control. , The process is as follows: (7) In the formula, k p4 and k i4 The proportional and integral coefficients of the voltage loops in phases a and b are, k The proportionality coefficients for the current loops of phases a and b are... k p5 and k i5 These are the proportional and integral coefficients of the current loops in phases b and c. , The DC bias compensation converter drive signals G1-G6 are obtained by SVPWM modulation.

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