An AIDC power supply three-phase LLC collaborative control method, device, equipment and medium

Abstract

This application provides a method, device, equipment, and medium for coordinated control of three-phase LLC resonant converters in AIDC power supply. The method includes: acquiring the output voltage and current of the three-phase LLC resonant converter, and generating a resonant cavity current reference value by combining it with a target voltage; acquiring the actual resonant current through a current detection circuit and extracting the active current sampling value; comparing the active current sampling value with the resonant cavity current reference value to generate a first square wave signal to obtain a first pulse width modulation pulse signal, controlling the resonant converter to switch between multiple primary-side drive states; comparing the active current sampling value with a synchronous rectification threshold to generate a second square wave signal to obtain a second pulse width modulation pulse signal, so that the switching of the synchronous rectifier tube matches the period of the resonant cavity current. This method solves the problems of resonant cavity overcurrent, difficulty in synchronous rectification control, and three-phase uneven current caused by the large transformer turns ratio and large secondary current in three-phase interleaved LLC converters in AIDC power supply systems.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and more specifically, to a method, apparatus, device, and medium for three-phase LLC coordinated control of AIDC power supply. Background Technology

[0002] In an 800V AIDC power supply system, it is usually necessary to convert 800V to isolated low-voltage power supply such as 50V / 12V. The primary-to-secondary voltage ratio is large, the requirements for dynamic and overload capacity are increasing, and the requirements for system reliability are also increasing year by year.

[0003] Three-phase LLC resonant converters are widely used in AIDC power supplies due to their high efficiency, high power density, and soft-switching characteristics. They are used to convert high-voltage DC into low-voltage, high-current output required by loads such as servers and storage devices. In practical applications, to improve conversion efficiency, synchronous rectification technology is usually used on the secondary side instead of traditional diode rectification.

[0004] Traditional three-phase LLCs typically employ a primary-side "Y" and secondary-side "Y" design to achieve optimal current sharing characteristics. However, this leads to a large transformer gate ratio, design difficulties, and challenges in selecting synchronous converters due to high secondary-side current. Traditional three-phase LLCs often use a control strategy that prioritizes frequency modulation control, supplemented by phase and duty cycle adjustments. This strategy is insufficient to meet the increasing demands of AIDCs for dynamic and overload capabilities. Furthermore, traditional control methods cannot precisely control the resonant cavity current, making overcurrent prone and failing to meet the system reliability requirements of AIDCs. In traditional control, secondary-side synchronous rectification is controlled by the dead time of the primary-side drive, resulting in low efficiency and design difficulties. Summary of the Invention

[0005] In view of this, embodiments of this application provide a three-phase LLC collaborative control method, device, equipment, and medium for AIDC power supply. It uses a circuit topology with a primary-side "Y" connection and independent rectification of the secondary side followed by parallel connection, reducing the design difficulty of transformers and synchronous rectification. It uses a peak current control strategy to solve the requirements of AIDC for dynamics, overload capacity, and reliability, as well as the problem of three-phase current imbalance caused by parasitic parameters introduced by transformers and PCBs. It improves efficiency by controlling the synchronous rectifier tubes according to the primary-side current.

[0006] In a first aspect, embodiments of this application provide a three-phase LLC coordinated control method for AIDC power supply. The three-phase LLC resonant converter has a topology of primary-side star connection and secondary-side rectified and directly paralleled, used to supply power to AIDC. The method includes: The output voltage and output current of the three-phase LLC resonant converter are collected. A resonant cavity current reference value is generated based on the output voltage, the output current, and the preset target voltage. By setting a current detection circuit in the current path of each phase resonant cavity, the actual resonant current of the resonant cavity is collected respectively, and the active current component is extracted to obtain the active current sampling value of each phase. The active current sampling value of each phase is compared with the resonant cavity current reference value to generate a first square wave signal for each phase; and the active current sampling value of each phase is compared with the synchronous rectification threshold characterizing the zero crossing point of the resonant cavity current to generate a second square wave signal for each phase used to indicate the turn-on and turn-off times of the synchronous rectifier tube on the secondary side. Based on the first square wave signal of each phase, a first pulse width modulation pulse signal is generated by the first state machine to drive the power switch of the primary side, and the three-phase LLC resonant converter is controlled to switch between multiple preset primary side drive states cycle by cycle, so that the peak current of each phase resonant cavity is controlled within the allowable error range of the resonant cavity current reference value. Based on the second square wave signal of each phase, a second pulse width modulation pulse signal is generated by the second state machine to drive the synchronous rectifier tube, so that the switching action of the synchronous rectifier tube is matched with the resonant period of the resonant cavity current.

[0007] In one feasible implementation, the synchronous rectification threshold is the zero-crossing threshold of the resonant cavity current. The second square wave signal is generated according to the moment when the active current sampling value reaches the zero-crossing threshold, so that the synchronous rectifier tube is turned on and off at the moment when the resonant cavity current crosses zero, thereby reducing switching losses.

[0008] In one feasible implementation, the first state machine and the second state machine are integrated into the same decoupling module; The decoupling module receives the first square wave signal and the second square wave signal of each phase, and generates a first pulse width modulation pulse signal to drive the power switch and a second pulse width modulation pulse signal to drive the synchronous rectifier, respectively. The first state machine triggers the switching of the primary-side drive state based on the level change of the first square wave signal, and the second state machine triggers the switching on and off of the synchronous rectifier tube based on the level change of the second square wave signal.

[0009] In one feasible implementation, the plurality of preset primary edge driving states are cycled in a fixed order; Each primary-side drive state contains a fixed sequence of three-phase level combinations, and the duration of the last level combination in each primary-side drive state is determined by any of the following conditions: Whether the active current sampling value reaches the resonant cavity current reference value, or whether the active current sampling value exceeds the preset maximum current limit; When any condition is met, the last level combination of the current primary-side driving state is terminated and the system switches to the next primary-side driving state, thereby controlling the peak current of the resonant cavity within the allowable error range of the resonant cavity current reference value and limiting it to not exceed the maximum current limit.

[0010] In one feasible implementation, the second state machine includes three parallel and independent control channels, each corresponding to a phase synchronous rectifier tube; Each control channel contains multiple wave emission states that cycle sequentially, and each wave emission state corresponds to a set of drive level combinations of the synchronous rectifier tubes; In each control channel, when a level change is detected in the corresponding second square wave signal, the current wave transmission state is switched to the next wave transmission state; at the same time, if the duration of the current wave transmission state reaches a preset time threshold, the switch to the next wave transmission state is also triggered. By combining the level change trigger of the second square wave signal with the time threshold trigger, the switching action of each phase synchronous rectifier tube is kept synchronized with the zero-crossing point of the resonant cavity current.

[0011] In one feasible implementation, the active current component in the actual resonant current is extracted, including: The actual resonant current is rectified by a controllable rectifier circuit to remove the reactive current component. A slope compensation signal is introduced to suppress the subharmonic oscillation of the loop.

[0012] In one feasible implementation, generating the resonant cavity current reference value includes: The difference between the output voltage and the target voltage, and the output current used to characterize load changes, are input to a proportional-integral-derivative (PID) controller, and the output of the PID controller is used as the reference value for the resonant cavity current.

[0013] Secondly, this application also provides a three-phase LLC collaborative control device for AIDC power supply. The three-phase LLC resonant converter has a topology of primary-side star connection and secondary-side rectified and directly paralleled, used to supply power to AIDC. The device includes: The acquisition module is used to acquire the output voltage and output current of the three-phase LLC resonant converter; The generation module is used to generate a resonant cavity current reference value based on the output voltage, the output current, and the preset target voltage. The extraction module is used to collect the actual resonant current of the resonant cavity through the current detection circuit set in the current path of each phase resonant cavity, and extract the active current component to obtain the active current sampling value of each phase. The comparison module is used to compare the active current sampling value of each phase with the resonant cavity current reference value to generate a first square wave signal for each phase; and to compare the active current sampling value of each phase with the synchronous rectification threshold characterizing the zero crossing point of the resonant cavity current to generate a second square wave signal for each phase to indicate the turn-on and turn-off times of the synchronous rectifier tube on the secondary side. The first control module is used to generate a first pulse width modulation pulse signal to drive the power switch tube on the primary side through a first state machine based on the first square wave signal of each phase, and control the three-phase LLC resonant converter to switch between multiple preset primary side drive states cycle by cycle, so as to control the peak current of each phase resonant cavity within the allowable error range of the resonant cavity current reference value. The second control module is used to generate a second pulse width modulation pulse signal to drive the synchronous rectifier tube through a second state machine based on the second square wave signal of each phase, so that the switching action of the synchronous rectifier tube is matched with the resonant period of the resonant cavity current.

[0014] In one feasible implementation, the synchronous rectification threshold is the zero-crossing threshold of the resonant cavity current. The second square wave signal is generated according to the moment when the active current sampling value reaches the zero-crossing threshold, so that the synchronous rectifier tube is turned on and off at the moment when the resonant cavity current crosses zero, thereby reducing switching losses.

[0015] In one feasible implementation, the first state machine and the second state machine are integrated into the same decoupling module; The decoupling module receives the first square wave signal and the second square wave signal of each phase, and generates a first pulse width modulation pulse signal to drive the power switch and a second pulse width modulation pulse signal to drive the synchronous rectifier, respectively. The first state machine triggers the switching of the primary-side drive state based on the level change of the first square wave signal, and the second state machine triggers the switching on and off of the synchronous rectifier tube based on the level change of the second square wave signal.

[0016] In one feasible implementation, the plurality of preset primary edge driving states are cycled in a fixed order; Each primary-side drive state contains a fixed sequence of three-phase level combinations, and the duration of the last level combination in each primary-side drive state is determined by any of the following conditions: Whether the active current sampling value reaches the resonant cavity current reference value, or whether the active current sampling value exceeds the preset maximum current limit; When any condition is met, the last level combination of the current primary-side driving state is terminated and the system switches to the next primary-side driving state, thereby controlling the peak current of the resonant cavity within the allowable error range of the resonant cavity current reference value and limiting it to not exceed the maximum current limit.

[0017] In one feasible implementation, the second state machine includes three parallel and independent control channels, each corresponding to a phase synchronous rectifier tube; Each control channel contains multiple wave emission states that cycle sequentially, and each wave emission state corresponds to a set of drive level combinations of the synchronous rectifier tubes; In each control channel, when a level change is detected in the corresponding second square wave signal, the current wave transmission state is switched to the next wave transmission state; at the same time, if the duration of the current wave transmission state reaches a preset time threshold, the switch to the next wave transmission state is also triggered. By combining the level change trigger of the second square wave signal with the time threshold trigger, the switching action of each phase synchronous rectifier tube is kept synchronized with the zero-crossing point of the resonant cavity current.

[0018] In one feasible implementation, the extraction module is used to extract the active current component from the actual resonant current, for the following purposes: The actual resonant current is rectified by a controllable rectifier circuit to remove the reactive current component. A slope compensation signal is introduced to suppress the subharmonic oscillation of the loop.

[0019] In one feasible implementation, the generation module is used to generate a resonant cavity current reference value for: The difference between the output voltage and the target voltage, and the output current used to characterize load changes, are input to a proportional-integral-derivative (PID) controller, and the output of the PID controller is used as the reference value for the resonant cavity current.

[0020] Thirdly, embodiments of this application also provide an electronic device, including: a processor, a storage medium, and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor communicates with the storage medium via the bus, and the processor executes the machine-readable instructions to perform the steps of the three-phase LLC coordinated control method for AIDC power supply as described in any one of the first aspects.

[0021] Fourthly, embodiments of this application also provide a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the steps of the three-phase LLC coordinated control method for AIDC power supply as described in any one of the first aspects.

[0022] This application provides a three-phase LLC collaborative control method, device, equipment, and medium for AIDC power supply. It employs a primary-secondary side collaborative control architecture. By acquiring output voltage and output current, a resonant cavity current reference value is generated. Active current sampling values ​​are extracted using current detection circuits in each phase. On one hand, the active current sampling value is compared with the resonant cavity current reference value to generate a first square wave signal. This signal is then output as a primary-side PWM pulse via a first state machine, controlling the converter to switch between multiple preset drive states cycle by cycle, precisely controlling the peak current of each phase's resonant cavity within the allowable error range of the target value. On the other hand, the active current sampling value is compared with a synchronous rectification threshold characterizing the zero-crossing point of the resonant cavity current to generate a second square wave signal. This signal is then output as a secondary-side synchronous rectification PWM pulse via a second state machine, ensuring that the switching action of the synchronous rectifier diode matches the resonant cavity current's resonant period.

[0023] Compared to existing technologies where primary and secondary side control are independent and difficult to synchronize, the embodiments of this application achieve coordinated operation of primary side peak control and secondary side synchronous rectification by sharing the same current detection signal. This enables the secondary side switch to accurately track changes in the resonant cavity current at all times, effectively solving the problems of difficulty in synchronizing primary side dynamic response and secondary side synchronous rectification, as well as current imbalance caused by three-phase parameter deviations. To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0024] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 A flowchart of a three-phase LLC coordinated control method for AIDC power supply provided in an embodiment of this application is shown.

[0026] Figure 2 The diagram shows a main circuit topology of a three-phase LLC resonant converter provided in an embodiment of this application.

[0027] Figure 3 A circuit diagram of a resonant cavity current detection circuit provided in an embodiment of this application is shown.

[0028] Figure 4 This illustration shows a block diagram illustrating the principle of generating a square wave signal according to an embodiment of this application.

[0029] Figure 5 A flowchart illustrating a drive state switching method provided in an embodiment of this application is shown.

[0030] Figure 6 The flowchart illustrating the state machine switching diagram of the synchronous rectification drive decoupling provided in the embodiment of this application is shown.

[0031] Figure 7 A schematic diagram of the structure of a three-phase LLC collaborative control device for AIDC power supply provided in an embodiment of this application is shown.

[0032] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of this application is shown. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0034] With the rapid development of artificial intelligence and data centers (AIDC), core loads such as servers, storage devices, and AI computing chips place extremely high demands on the performance of power supplies. These loads not only require stable voltage output but also the ability to respond to drastic load changes on microsecond or even millisecond timescales—for example, when an AI chip instantly switches from light to heavy load, the current change rate can reach thousands of amperes per microsecond. Meanwhile, to improve overall energy efficiency, data center power supply systems generally adopt an architecture combining a high-voltage DC bus (e.g., 800V) with a step-down converter to convert the high-voltage DC into the low-voltage, high-current required by the load (e.g., 50V / 12V). In this architecture, the three-phase LLC resonant converter, due to its high efficiency, high power density, and soft-switching characteristics, has become an ideal choice for implementing this stage of step-down conversion.

[0035] In low-voltage, high-current output scenarios, three-phase LLC resonant converters typically employ synchronous rectification technology on the secondary side instead of traditional diode rectification to reduce conduction losses and improve conversion efficiency. The core of synchronous rectification lies in precisely controlling the turn-on and turn-off times of the secondary-side MOSFETs to match the resonant period of the resonant cavity current—turning on and off near the current zero-crossing point to achieve zero-voltage switching, minimizing switching losses, and maximizing the turn-on time of the synchronous rectifier diodes to reduce parasitic diode conduction losses. However, the switching times of the synchronous rectifier diodes are not fixed but dynamically change with load variations, input voltage fluctuations, and differences in resonant cavity parameters. This requires the control strategy to track changes in the resonant cavity current in real time and accurately issue switching commands.

[0036] In practical applications, three-phase LLC resonant converters face two key challenges: First, the coordination between dynamic response and synchronous rectification. When the load undergoes large dynamic switching, the primary-side resonant cavity current changes rapidly. If the secondary-side synchronous rectification control lags behind the primary-side current change, the switching timing of the synchronous rectifier diodes will deviate from the optimal point, increasing switching losses. It may even cause the body diode to conduct due to reverse current, resulting in decreased efficiency and increased device stress. Second, the imbalance caused by three-phase parameter deviations. Due to manufacturing limitations, the inductance, capacitance, and other parameters of the three-phase resonant cavities are difficult to be completely consistent. This parameter deviation leads to current imbalance in each phase. If a uniform control strategy is adopted, it will not only overload one phase current but also further deteriorate the synchronous rectification effect—because the resonant periods of each phase differ, a uniform synchronous rectification timing cannot simultaneously meet the optimal switching times of all three phases.

[0037] To address the aforementioned issues, traditional solutions often separate primary-side control and secondary-side synchronous rectification: the primary side uses frequency modulation or phase-shifting control to stabilize the output voltage, while the secondary side generates synchronous rectification timing by detecting the transformer secondary voltage or setting a dead time with the primary-side drive signal. However, this separate control method has inherent drawbacks—the secondary-side control cannot sense changes in the primary-side resonant cavity current in real time, making it difficult for the two to maintain synchronization when the load changes abruptly or parameters fluctuate. Therefore, a collaborative control method is needed that deeply integrates primary-side peak current control and secondary-side synchronous rectification control, enabling the secondary-side switching to be synchronized with the resonant cavity current in real time, while automatically achieving current balancing of the parallel output of the secondary side through independent control of the current in each phase of the primary side.

[0038] Based on this, this application provides a method, apparatus, device, and medium for coordinated control of three-phase LLC in AIDC power supply, solving problems such as large transformer gate ratio, large secondary current, easy overcurrent in the resonant cavity under large dynamic and overload conditions, insufficient phase margin of the control loop, difficulty in secondary synchronous rectification control, inability to achieve maximum efficiency, and uneven current caused by inconsistent parameters of the three-phase resonant cavity in 800V AIDC power supply systems. The following is a description through embodiments.

[0039] To facilitate understanding of this embodiment, a detailed description of a three-phase LLC coordinated control method for AIDC power supply disclosed in this application embodiment will be provided first. The three-phase LLC resonant converter has a topology with primary side star connection and secondary side rectified and directly connected in parallel, used for AIDC power supply. Figure 1 As shown, it includes the following steps: Step 101: Collect the output voltage and output current of the three-phase LLC resonant converter.

[0040] In step 101, the current operating status of the three-phase LLC resonant converter needs to be obtained first. This step involves acquiring two key parameters: one is the voltage value at the converter output terminal, which is the current voltage supplied to the load; the other is the current value at the output terminal, which is the current current consumed by the load. These two parameters are the basis for determining whether the system is operating in the expected state.

[0041] The output voltage is typically sampled after the converter's output filter capacitor, ensuring the sampled voltage accurately reflects the power supply status at the load. Output current can be sampled by connecting a current sampling resistor in series in the output circuit or by using a current sensor. The sampled voltage and current signals, after undergoing necessary conditioning circuitry (such as voltage divider, filter, and amplifier), are sent to the controller for further processing.

[0042] Acquiring these two parameters is a prerequisite for all subsequent control actions—only by knowing the current output voltage and load current can we determine whether and how to adjust them. The output current, in particular, not only reflects the severity of the load but, more importantly, it reveals the load's changing trend, providing a basis for rapid response.

[0043] Step 102: Generate a resonant cavity current reference value based on the output voltage, the output current, and the preset target voltage.

[0044] In step 102, based on the output voltage and output current collected in the previous step, and combined with a preset target voltage, an intermediate variable for subsequent control—the resonant cavity current reference value—needs to be generated.

[0045] First, it's important to clarify the preset target voltage. The target voltage is the voltage value that the system expects to achieve at the output, which is the voltage level we want the converter to output stably. It is usually set according to the power supply requirements of the load device. For example, in an AIDC power supply scenario, it might be a fixed value such as 50V or 12V.

[0046] Once the target voltage is obtained, it is compared with the actual output voltage. The difference between the two reflects the degree to which the current output voltage deviates from the expected value. This difference is the voltage error signal, which is the basic basis for deciding whether to increase or decrease the energy output. However, voltage error alone is not enough—when the load suddenly increases, the current has already increased before the output voltage has a chance to decrease. Therefore, the parameter of output current is also introduced in step 102.

[0047] The output current serves two purposes here: firstly, it reflects the intensity of the load, and secondly, it characterizes the trend of load changes. By incorporating the output current into the calculation, the system can detect load changes in advance and begin adjusting before the output voltage deviates significantly. This feedforward processing method can significantly improve the dynamic response speed of the system.

[0048] By combining the voltage error signal and the output current, and after specific processing, the reference value of the resonant cavity current is finally obtained. The physical meaning of this reference value can be understood as the target current that should flow through the resonant cavity to stabilize the output voltage near the target value. It is not a fixed value, but rather dynamically adjusted according to load changes and voltage fluctuations.

[0049] There are several ways to calculate the reference value for the resonant cavity current. A common approach is to process the voltage error using a proportional-integral-derivative (PID) controller, while simultaneously incorporating the output current as a feedforward. Alternatively, other control algorithms can be employed, as long as they can synthesize the voltage error and load information to generate a reasonable current command. This reference value is then fed into the subsequent current control loop as a comparison benchmark.

[0050] Step 103: By using the current detection circuit set in the current path of each phase resonant cavity, the actual resonant current of the resonant cavity is collected respectively, and the active current component is extracted to obtain the active current sampling value of each phase.

[0051] The actual resonant current referred to here is the alternating current flowing through the resonant inductor and resonant capacitor. In an LLC resonant converter, this current waveform is typically close to a sine wave, but it is not a standard sine wave. It contains both active components used for energy transfer and reactive components that do not participate in energy transfer. If the acquired raw current signal is directly used for control, the presence of reactive components will lead to control deviations and may even cause system oscillations.

[0052] Therefore, the current detection circuit not only needs to acquire the current signal but also process it to extract the active current component. Extracting the active component essentially involves separating the energy transfer-related part from the alternating resonant current. One feasible approach is to rectify the acquired resonant current using a controllable rectifier circuit, selectively retaining the active component and removing the reactive component. Furthermore, to ensure the stability of the control system, a slope compensation signal can be introduced into the detection circuit to suppress potential subharmonic oscillations.

[0053] After the above processing, the final result is the active current sampling value for each phase. This sampling value accurately reflects the current used for energy transfer in the resonant cavity of that phase and can be used as the basis for subsequent comparison control. Obtaining the active current sampling value is the foundation of the entire control method—only by accurately extracting the active component can effective control of the resonant cavity current be achieved.

[0054] The three current detection circuits can have identical circuit structures, only positioned at different phases. They can operate independently, each outputting the active current sample value for its respective phase, providing feedback information for subsequent phase-by-phase comparison and control.

[0055] This combination Figure 2 Please provide an explanation, such as Figure 2 As shown, the input of the three-phase LLC resonant converter is on the left and the output is on the right. The output voltage and output current acquired in step 101 are obtained through... Figure 2 The voltage and current sampling points at the output terminal on the right side of the image are obtained.

[0056] Figure 1 The resonant cavity current detection circuits 201, 202, and 203 are respectively installed on the current path of the three-phase resonant cavity, corresponding to phase A, phase B, and phase C. The circuit structures of these three detection circuits are exactly the same, only their installation positions are different, and they are used to collect the actual resonant current of their respective phases.

[0057] The actual resonant current referred to here is the alternating current flowing through the resonant inductor and resonant capacitor, which includes the active component used for energy transfer and the reactive component that does not participate in energy transfer. For each phase, the alternating current signal flowing through the resonant cavity of that phase can be collected through the resonant cavity current detection circuit.

[0058] Because the resonant cavity current waveform is complex, the directly acquired current signal cannot be used directly for peak current control. Therefore, it is necessary to extract the active current component from the actual resonant current. That is, the acquired resonant current is processed through a controllable rectification stage in the current detection circuit to remove the reactive component and retain only the active component related to energy transfer. In addition, to suppress potential subharmonic oscillations in the control loop, a slope compensation signal can be introduced into the detection circuit to ensure the stability of the control system.

[0059] After the above processing, the corresponding active current sampling values ​​are finally obtained. These sampling values ​​accurately reflect the current used for energy transfer in the resonant cavity of that phase and can be used as the basis for subsequent comparison control. Obtaining the active current sampling values ​​is the foundation of the entire peak current control. Only by accurately extracting the active component can effective control of the resonant cavity current be achieved.

[0060] In one feasible implementation, the active current component in the actual resonant current is extracted, including: The actual resonant current is rectified by a controllable rectifier circuit to remove the reactive current component.

[0061] In other words, the active current component in the actual resonant current can be extracted by using a controllable rectifier circuit to rectify the acquired resonant current. Since the resonant cavity current contains a reactive component, this part of the current does not participate in energy transfer, and directly using it for control would lead to control deviations. Through a controllable rectifier circuit, the active component of the current waveform can be selectively retained while the reactive component is removed, thus obtaining a current signal that truly reflects the energy transfer situation.

[0062] After the actual resonant current is rectified in a controllable manner, a slope compensation signal is introduced to suppress the subharmonic oscillation of the loop.

[0063] To further improve the stability of the control system, a slope compensation signal can be introduced after the resonant current is controlled and rectified. Slope compensation is a commonly used method to suppress subharmonic oscillations. By superimposing a slope waveform on the current detection signal, or by adjusting the reference level of the comparator, it can effectively avoid control loop instability under specific operating conditions and ensure reliable operation of the system over a wide load range.

[0064] The detection circuit typically includes a current sensor, a controllable rectifier, and an optional slope compensation circuit. The current sensor acquires the alternating current signal from the resonant cavity; the controllable rectifier processes the acquired signal to extract the active component; and the slope compensation circuit introduces a compensation signal when necessary to suppress potential subharmonic oscillations. Through the coordinated operation of these three parts, an accurate and stable active current sample value is ultimately output, providing reliable feedback information for subsequent peak current control.

[0065] This can be combined Figure 3 To understand, such as Figure 3 As shown, the resonant cavity current detection circuit includes a current sensor, a controllable rectification stage, a filtering stage, and a slope compensation circuit.

[0066] A current sensor is used to acquire the actual alternating current signal in the phase resonant cavity. The acquired signal enters a controllable rectification stage, where the reactive current component is removed, retaining only the active current component related to energy transfer. After smoothing by a filtering stage, the active current sample value that can be used for peak control is obtained.

[0067] The controllable rectifier stage has two input interfaces (interface 301 and interface 302): used to control the rectification to determine the direction of active current and eliminate reverse current.

[0068] Below the slope compensation circuit is an input interface (interface 303) for receiving compensation control signals. The slope compensation signal can be injected into the current detection path after controlled rectification to suppress potential subharmonic oscillations in the loop.

[0069] The active current sample value, after being processed by the filtering stage, is finally sent out through two output ports: one output is output after passing through a diode (port 310), and the other output is connected in parallel with the outputs of the other two current sampling circuits (port 310) and output to 417 (see...). Figure 4 One path is used to compare with the preset maximum current limit to achieve current limiting function; the other path is sent to the output terminal (port 311) after the slope compensation circuit to compare with the resonant cavity current reference value to generate the target square wave signal and achieve loop control function. Step 104: The active current sampling value of each phase is compared with the resonant cavity current reference value to generate the first square wave signal of each phase; and the active current sampling value of each phase is compared with the synchronous rectification threshold characterizing the zero crossing point of the resonant cavity current to generate the second square wave signal of each phase used to indicate the turn-on and turn-off time of the synchronous rectifier tube on the secondary side.

[0070] In step 104, the active current sampling value obtained in the previous step needs to be compared in two parallel paths to generate square wave signals for primary-side control and secondary-side control, respectively.

[0071] The first comparison involves comparing the active current sample value of each phase with its corresponding resonant cavity current reference value to a comparator. The comparator outputs a binary signal—one level when the active current sample value is lower than the resonant cavity current reference value, and another level when the active current sample value reaches or exceeds the resonant cavity current reference value. This binary signal is the first square wave signal. Since the three phases are compared independently, each phase generates its own corresponding first square wave signal. These square wave signals reflect the real-time relationship between the actual current and the target current in the resonant cavity of that phase, serving as the direct basis for subsequent control of the primary-side switching transistors. When the current reaches the target value, the square wave level flips, notifying the control system to take action to limit the current from rising further.

[0072] The second comparison compares the active current sample value of each phase with a special threshold—the synchronous rectification threshold that characterizes the zero-crossing point of the resonant cavity current. This threshold is not a fixed current magnitude, but rather corresponds to the moment when the current value in the resonant cavity current waveform becomes zero. The comparator output is also a binary signal: one level is output when the active current sample value is higher than the zero-crossing threshold, and another level is output when it is lower than the zero-crossing threshold. This binary signal is the second square wave signal, and each level flip corresponds to the moment when the resonant cavity current crosses zero.

[0073] The second square wave signal is used to indicate the turn-on and turn-off times of the secondary-side synchronous rectifier diode. In an LLC resonant converter, the optimal switching time for the synchronous rectifier diode is usually near the zero-crossing point of the resonant cavity current—turning on or off at the current zero-crossing point achieves zero-current switching, significantly reducing switching losses. Therefore, each transition of the second square wave signal can be used as a switching command for the synchronous rectifier diode: for example, the rising edge indicates turn-on, and the falling edge indicates turn-off, or vice versa depending on the specific design.

[0074] These two comparisons are performed in parallel, sharing the same set of active current sample values. That is, the same active current sample value is simultaneously fed into two comparators, compared with two different reference values ​​(the resonant cavity current reference value and the zero-crossing threshold), and simultaneously generates a first square wave signal and a second square wave signal. This parallel processing method allows the primary-side control and secondary-side control to be based on the same current feedback signal, laying the foundation for subsequent coordinated operation.

[0075] A comparator can be implemented as an analog comparator or as a software-implemented comparison function within a digital controller. Regardless of the implementation, the comparison result is essentially a logic level toggling signal, which is then fed into two subsequent state machines for processing.

[0076] Step 105: Based on the first square wave signal of each phase, a first pulse width modulation pulse signal is generated by the first state machine to drive the power switch of the primary side. The three-phase LLC resonant converter is controlled to switch between multiple preset primary side drive states cycle by cycle, and the peak current of each phase resonant cavity is controlled within the allowable error range of the resonant cavity current reference value.

[0077] This step requires converting the first square wave signal generated in the previous step into a pulse signal that actually drives the primary-side power switch. This is the execution stage of the entire peak current control.

[0078] First, the first square wave signal of each phase is sent to the first state machine. The first square wave signal represents the relationship between the active current sample value of that phase and the resonant cavity current reference value—when the active current sample value is lower than the reference value, the square wave is in one level state; when the active current sample value reaches or exceeds the reference value, the square wave flips to another level state. The first state machine determines the current state of the resonant cavity current of each phase in real time by monitoring the level changes of these square wave signals.

[0079] The first state machine internally presets multiple primary-side drive states, which cycle in a fixed sequence. Each primary-side drive state corresponds to a specific set of power switch conduction combinations, determining the turn-on and turn-off modes of the three-phase switches. For example, in some states, current flows in the forward direction; in others, current flows in the reverse direction or freewheeling. The alternating execution of these states forms the converter's duty cycle.

[0080] The first state machine determines when to switch from one driving state to the next based on the current magnitude reflected by the first square wave signal. Its basic control logic is as follows: when the active current sample value is lower than the resonant cavity current reference value, it indicates that the resonant cavity current still has room to rise, and the state machine maintains the current driving state; when the active current sample value reaches or exceeds the resonant cavity current reference value, it indicates that the current has reached the target value, and the first state machine immediately triggers a switch to enter the next driving state. Through this cycle-by-cycle switching, the peak current of each phase resonant cavity is controlled within the allowable error range of the resonant cavity current reference value.

[0081] During the switching of the drive state in the first state machine, a corresponding first pulse width modulation pulse signal is generated synchronously. These pulse signals are sent to the control terminals of the primary-side power switches in the three-phase LLC resonant converter, driving the switches to turn on and off according to a predetermined timing sequence. Through this cycle-by-cycle state switching, the operating mode of the converter is dynamically adjusted, ensuring that the actual current of each phase resonant cavity is always controlled within the allowable error range of the resonant cavity current reference value—when the current rises to the reference value, the state is switched in time to limit the current from rising further; when the current drops, the state is switched again to allow the current to rise again, and so on, achieving cycle-by-cycle precise control of the peak current of the resonant cavity.

[0082] This control method operates simultaneously on all three phases, with the active current sampled value of each phase independently participating in comparison and state switching decisions. Therefore, the peak current of each phase resonant cavity is independently controlled near the target value. When there are deviations in the three-phase parameters, this independent control can automatically adjust the switching sequence of each phase to keep the current of each phase relatively balanced, avoiding overcurrent problems in a certain phase caused by parameter differences.

[0083] Step 106: Based on the second square wave signal of each phase, a second pulse width modulation pulse signal is generated by the second state machine to drive the synchronous rectifier tube, so that the switching action of the synchronous rectifier tube is matched with the resonant period of the resonant cavity current.

[0084] In this step, the second square wave signal generated in the previous step needs to be converted into a pulse signal that actually drives the secondary synchronous rectifier tube. This is a key step in realizing synchronous rectification control.

[0085] For example, the synchronous rectification threshold is the resonant cavity current zero-crossing threshold. The second square wave signal is generated according to the moment when the active current sampling value reaches the zero-crossing threshold, so that the synchronous rectifier tube is turned on and off at the moment when the resonant cavity current crosses zero, thereby reducing switching losses.

[0086] The second square wave signal of each phase is sent to the second state machine. These second square wave signals are generated by comparing the active current sampling value with the synchronous rectification threshold characterizing the zero-crossing point of the resonant cavity current. Therefore, each level flip corresponds to the moment when the resonant cavity current crosses the zero point - the rising edge corresponds to the current crossing zero from negative to positive, the falling edge corresponds to the current crossing zero from positive to negative, or vice versa.

[0087] The function of the second state machine is to interpret these level-flipping signals and convert them into driving instructions for the synchronous rectifier diodes. Specifically, when the second square wave signal undergoes a level flip, it means that the resonant cavity current has just passed zero, which is the optimal time for the synchronous rectifier diodes to turn on or off. According to preset logic, the second state machine generates corresponding driving actions each time a level flip occurs—for example, turning on a synchronous rectifier diode on the rising edge and turning it off on the falling edge; or, depending on the current flow direction, alternately turning on and off different synchronous rectifier diodes.

[0088] The second pulse width modulation pulse signal output from the second state machine is sent to the control terminal of the secondary synchronous rectifier, directly controlling the switching on and off of the synchronous rectifier. Since the generation time of these driving pulses strictly corresponds to the zero-crossing point of the resonant cavity current, the switching action of the synchronous rectifier can be matched with the resonant period of the resonant cavity current—switching always occurs at the moment the current crosses zero, thus achieving zero-current switching.

[0089] This synchronous rectification control method, based on the same current detection signal, differs from traditional schemes that rely on secondary-side voltage detection or primary-side signal replication. It directly obtains the zero-crossing information of the resonant cavity current from the source, unaffected by load changes, input fluctuations, or parameter drift, and can adaptively track changes in the resonant period. Regardless of the resonant frequency fluctuations, the switching timing of the synchronous rectifier diode is always aligned with the current zero-crossing point, thus maintaining consistently low switching losses and parasitic diode conduction losses.

[0090] Meanwhile, since the second square wave signal of each phase is generated independently, the second state machine can process the zero-crossing information of each phase separately, generating independent drive pulses for the synchronous rectifier tubes of each phase. When deviations in the three-phase parameters cause slight differences in the resonant periods of each phase, this independent control can automatically adapt to the optimal switching time of each phase, avoiding efficiency losses caused by uniform timing.

[0091] This application provides a three-phase LLC collaborative control method, device, equipment, and medium for AIDC power supply. It employs a primary-secondary side collaborative control architecture. By acquiring output voltage and output current, a resonant cavity current reference value is generated. Active current sampling values ​​are extracted using current detection circuits in each phase. On one hand, the active current sampling value is compared with the resonant cavity current reference value to generate a first square wave signal. This signal is then output as a primary-side PWM pulse via a first state machine, controlling the converter to switch between multiple preset drive states cycle by cycle, precisely controlling the peak current of each phase's resonant cavity within the allowable error range of the target value. On the other hand, the active current sampling value is compared with a synchronous rectification threshold characterizing the zero-crossing point of the resonant cavity current to generate a second square wave signal. This signal is then output as a secondary-side synchronous rectification PWM pulse via a second state machine, ensuring that the switching action of the synchronous rectifier diode matches the resonant cavity current's resonant period.

[0092] Compared with the existing technology where the primary and secondary side controls are independent and difficult to synchronize, the embodiments of this application achieve the coordinated operation of primary side peak control and secondary side synchronous rectification by sharing the same current detection signal. This enables the secondary side switch to accurately track the changes in the resonant cavity current at all times, effectively solving the problems of difficulty in synchronizing the primary side dynamic response and secondary side synchronous rectification, as well as the current imbalance caused by the deviation of three-phase parameters.

[0093] In one feasible implementation, the first state machine and the second state machine are integrated into the same decoupling module.

[0094] The decoupling module receives the first square wave signal and the second square wave signal of each phase, and generates a first pulse width modulation pulse signal to drive the power switch and a second pulse width modulation pulse signal to drive the synchronous rectifier, respectively; wherein, the first state machine triggers the switching of the primary side drive state according to the level change of the first square wave signal, and the second state machine triggers the turn-on and turn-off of the synchronous rectifier according to the level change of the second square wave signal.

[0095] That is, the first state machine and the second state machine can be integrated into the same decoupling module. This decoupling module simultaneously receives the first square wave signal and the second square wave signal of each phase as its input.

[0096] The decoupling module contains two sets of parallel processing logic. The first state machine processes the first square wave signal—when a level change is detected in the first square wave signal, it means the active current sampling value has reached or exceeded the resonant cavity current reference value. This triggers the switching of the primary-side drive state, generating a corresponding first pulse width modulation (PWM) pulse signal to drive the primary-side power switch. The second state machine processes the second square wave signal—when a level change is detected in the second square wave signal, it means the resonant cavity current has passed zero. This triggers the switching on or off of the synchronous rectifier, generating a corresponding second PWM pulse signal to drive the secondary-side synchronous rectifier.

[0097] Integrating two state machines into the same decoupling module helps ensure that the primary-side control and the secondary-side control process the input signal at the same time, making their action timing more coordinated.

[0098] This combination Figure 4 To understand, such as Figure 4 As shown in the figure, this is the overall principle block diagram of signal processing and PWM generation in a three-phase LLC resonant converter. Figure 4 Each label in the table represents the input or output signal of the corresponding module, and the following descriptions are based on the signal flow direction.

[0099] Path 1: Current feedforward processing path.

[0100] 401 and 402 are output current sampling signals. Their AC and DC components are obtained through the AC component extraction module and the filtering module. After passing through the set virtual impedance, they are converted into voltage signal 406. Together with 407 / 408, they generate the given signal of output voltage, so that the output voltage has a monotonically linear characteristic with the output current to facilitate current sharing among multiple modules.

[0101] Path 2: Flow equalization control path.

[0102] 403 is the output current sampling signal, and 405 is the system average current sampling signal. The difference between these two signals is fed into the current sharing PI module, which is a current sharing proportional-integral controller. It is used for current balancing control when multiple machines are connected in parallel, and outputs signal 407 after processing.

[0103] Path 3: Output Voltage Processing Path 404 is the output voltage setting signal, which is sent to the soft-start module to obtain the 408 signal. This signal changes linearly and monotonically from the current output voltage to the value set by 404.

[0104] At this point, we have obtained three intermediate signals: 406, 407, and 408. These three signals are added together to obtain the actual reference value signal 409 for the output voltage. Signal 410 is the output voltage sample value. The difference between the sample value and 409 is used to generate the output voltage error value (signal 411), which is then fed into the PID module.

[0105] The 411 signal is sent to the PID controller, i.e., the proportional-integral-derivative controller. After performing proportional, integral, and derivative operations on the input signal, the PID controller outputs the 412 signal, i.e., the resonant cavity current reference value, which is sent to subsystem one.

[0106] At the same time, the system also generates another important signal 413, which comes from the system's preset maximum current limit, which is the maximum current of the resonant cavity when the system is operating with current limiting.

[0107] Signals 417, 418, and 419 are three input signals, respectively sent to subsystem three. These three signals are active current sample values, compared with the synchronous rectification threshold characterizing the zero-crossing point of the resonant cavity current. The comparison results generate three square wave signals, corresponding to the turn-on and turn-off times of the three-phase secondary-side synchronous rectifier diodes. These three square wave signals are then sent to the decoupling module, where the second state machine processes them to generate the actual synchronous rectifier diode drive pulses.

[0108] The decoupling module outputs 15 signals from 421 to 435, corresponding to all the switches that need to be controlled in the three-phase LLC resonant converter. In a three-phase LLC resonant converter, the primary side typically has 6 power switches (one for each phase's upper and lower bridge arms), while the secondary side synchronous rectifier diodes can be 6, 12, or other numbers depending on the rectifier topology. The specific allocation of the 15 output signals is as follows: 421 / 422 / 426 / 427 / 431 / 432: 6-channel primary-side power switch drive signals (corresponding to the upper and lower bridge arms of the three phases), which are also the control signals for active current extraction by the resonant cavity current detection module. Figure 3 (301 / 302 in the middle).

[0109] 423 / 424 / 428 / 429 / 433 / 434: 6-channel secondary-side synchronous rectifier drive signals (depending on the specific rectifier topology, each phase may have 2 (full-wave rectifier / current doubler rectifier) / 4 (full-bridge rectifier) ​​synchronous rectifiers, requiring 2 sets of drives).

[0110] 425 / 430 / 435: 3-channel slope compensation control signals; high level enables the slope compensation circuit, low level resets the slope compensation. Figure 3 303.

[0111] The function of the decoupling module is to convert the various square wave signals and protection signals input from subsystem 1, subsystem 2, and subsystem 3 into specific PWM drive pulses arranged in the correct timing sequence through two internal state machines, and send them to the control terminal of each switch to achieve precise control of the entire converter.

[0112] In one feasible implementation, the plurality of preset primary-side driving states are cycled in a fixed order.

[0113] Each primary-side drive state contains a fixed sequence of three-phase level combinations, and the duration of the last level combination in each primary-side drive state is determined by any of the following conditions: Whether the active current sampling value reaches the resonant cavity current reference value, or whether the active current sampling value exceeds the preset maximum current limit.

[0114] When any condition is met, the last level combination of the current primary-side driving state is terminated and the system switches to the next primary-side driving state, thereby controlling the peak current of the resonant cavity within the allowable error range of the resonant cavity current reference value and limiting it to not exceed the maximum current limit.

[0115] The function of the pulse width modulation (PWM) pulse signal is to control the three-phase LLC resonant converter to cycle through multiple preset drive states in a fixed sequence. Here, a drive state refers to a specific combination of conduction states of the power switches in the converter, with each drive state corresponding to a power transfer mode. These drive states are executed cyclically in a pre-set fixed sequence, forming a complete switching cycle.

[0116] Each drive state contains a fixed sequence of three-phase power level combinations. This sequence consists of multiple sequentially executed power level combinations, each corresponding to the specific conduction state of the 1st, 2nd, and 3rd phase power switches. During the execution of the drive state, the duration of the first few power level combinations is usually fixed, determined by the basic operating conditions of the circuit, such as the dead time to ensure safe switching of the switches, or the minimum conduction time to ensure normal operation of the resonant cavity.

[0117] The duration of the last level combination in each drive state is not fixed, but determined by comparing the real-time detected active current sample value with two thresholds: a resonant cavity current reference value for normal control and a maximum current limit for safety protection. The control logic continuously monitors the active current sample value. When it reaches the resonant cavity current reference value, it indicates that the resonant cavity current has reached the target value required by the current load, and the current drive state should be terminated to prevent the current from continuing to rise. When the active current sample value exceeds the maximum current limit, it indicates that an overcurrent condition has occurred, and the current drive state must be terminated immediately to protect the circuit safety.

[0118] Regardless of which of the two conditions mentioned above is met first, the last level combination of the current drive state will be immediately terminated, and the system will switch to the next drive state in a fixed sequence. This switching mechanism enables cycle-by-cycle control of the resonant cavity current: in each drive state, the current rise process is monitored in real time, and once the target value or limit is reached, it is terminated in time, and the current begins to decrease or enters the next energy transfer stage; in the next drive state, the current rises again and is monitored and terminated again. This cycle repeats continuously, ensuring that the peak value of the resonant cavity current is precisely controlled within the allowable error range of the resonant cavity current reference value, while ensuring that it will not exceed the preset maximum current limit under any circumstances. This satisfies the load's requirement for rapid dynamic response while ensuring the safe operation of the converter.

[0119] In one feasible implementation, the plurality of preset driving states include six driving states that cycle sequentially. Driving states one, three, and five have a first type of level combination sequence; driving states two, four, and six have a second type of level combination sequence.

[0120] Each level combination sequence contains three level combinations executed sequentially. The duration of the first two level combinations is determined by a preset dead time and / or a preset minimum on-time, respectively. The duration of the third level combination is determined by any of the following conditions: The active current sampling value reaches the resonant cavity current reference value; the active current sampling value exceeds the preset maximum current limit; the duration of the second level combination in the current driving state has reached the preset minimum conduction time; wherein, when any of the conditions are met, the third level combination of the current driving state is terminated and the first level combination of the next driving state is switched to achieve cycle-by-cycle control of the resonant cavity peak current.

[0121] In one feasible implementation, the preset drive states specifically include six sequentially cycling drive states, executed repeatedly in the order of drive state one, two, three, four, five, and six. These six drive states are not independent but are divided into two types: drive states one, three, and five belong to the same type, having a first-type level combination sequence; drive states two, four, and six belong to the other type, having a second-type level combination sequence. This alternating setting aims to achieve three-phase balance and avoid current imbalance caused by deviations in phase parameters.

[0122] Each type of level combination sequence contains three level combinations executed sequentially. Taking the first type of level combination sequence as an example, it consists of three specific three-phase level combinations in a fixed order; the second type of level combination sequence also consists of three specific three-phase level combinations in a fixed order, but it differs from the first type. Each level combination corresponds to a specific set of conduction states of the 1, 2, and 3-phase power switching transistors, which together determine the direction and magnitude of the current flow in the resonant cavity.

[0123] During the execution of each drive state, the duration control method for the three level combinations differs. The durations of the first two level combinations are fixed: the duration of the first level combination is determined by a preset dead time, which is a safety interval set to ensure that shoot-through does not occur when the two switches on the same phase are switching; the duration of the second level combination is determined by a preset minimum on-time, which is the shortest time required for the resonant cavity to establish current normally. These two fixed times ensure the safe switching of the switches and the basic operating conditions of the resonant cavity.

[0124] The duration of the third level combination is dynamically variable and determined by three conditions: the first condition is that the active current sampling value reaches the resonant cavity current reference value, indicating that the resonant cavity current has reached the target value required by the current load; the second condition is that the active current sampling value exceeds the preset maximum current limit, indicating that it is in an overcurrent state and needs immediate protection; the third condition is that the duration of the second level combination in the current drive state has reached the preset minimum conduction time, which is a backup condition to ensure that even if the current does not reach the target value or limit, the drive state will not remain in the third level combination indefinitely.

[0125] When any one of the above three conditions is met first, the third level combination of the current driving state will be terminated immediately, and the system will switch to the first level combination of the next driving state to begin a new round of driving state execution. For example, when the active current sampling value reaches the resonant cavity current reference value during the execution of the third level combination in driving state one, the third level combination of driving state one will be terminated, and the system will switch to the first level combination of driving state two to begin execution.

[0126] This control mechanism achieves precise cycle-by-cycle control of the resonant cavity peak current: in each driving state, the duration of the third level combination is dynamically determined by comparing the real-time current with the target value and the limit value. Switching occurs promptly when the current reaches the target value or is limited, ensuring the peak value of the resonant cavity current is controlled near the target value. The six driving states cycle repeatedly, with the duration of the third level combination in each state independently adjusted according to the current situation. This achieves fine-grained control of the three-phase resonant cavity current, ensuring both rapid dynamic response and current-limiting operation during overload, maximizing overload capacity.

[0127] The following combination Figure 5 Please provide an explanation, such as Figure 5 As shown, this figure is a table showing the correspondence between the six drive states and the PWM signals of each phase. The horizontal axis lists the six drive states from state 0 to state 5 from left to right, and the vertical axis lists the PWM control signals for phases 1, 2, and 3. Each phase contains three signals: signal A, signal B, and signal E. PWM1A (421), PWM1B (422), and PWM1E (425) correspond to phase 1, PWM2A (426), PWM2B (427), and PWM2E (430) correspond to phase 2, and PWM3A (431), PWM3B (432), and PWM3E (435) correspond to phase 3, respectively. Numbers 501 to 518 are the specific state identifiers or timing parameters for each signal under different states.

[0128] from Figure 5As can be seen, the six driving states cycle sequentially in the order of state 0, 1, 2, 3, 4, and 5. In each driving state, the A-channel signal, B-channel signal, and E-channel signal of each phase are configured according to a preset level combination, which together determine the on and off states of each power switch.

[0129] In each driving state, the waveforms of these PWM signals are executed according to a fixed sequence of level combinations. These level combinations constitute two types of modes: states 0, 2, and 4 have the same type of first-class level combination sequence (LLH—HLH—HLL), while states 1, 3, and 5 have the same type of second-class level combination sequence (LLH—LHH—LHL). This alternation is to achieve multiphase balance and avoid current imbalance caused by deviations in phase parameters.

[0130] Each drive state contains three sequentially executed level combinations. The durations of the first two level combinations (LLH-HLH in the first type of level combination sequence, or LLH-LHH in the second type of level combination sequence) are fixed: the duration of the first level combination (LLH) is determined by a preset dead time, which is a safety interval set to ensure that shoot-through does not occur when the two switches A and B in the same phase are switching; the duration of the second level combination (HLH or LHH) is determined by a preset minimum on-time, which is the shortest time required for the resonant cavity to establish current normally. These two fixed times ensure the safe switching of the switches and the basic operating conditions of the resonant cavity.

[0131] The duration of the third level combination (HLL or LHL) is dynamically variable and determined by three conditions: The first condition is that the active current sampling value reaches the resonant cavity current reference value, which indicates that the resonant cavity current has reached the target value required by the current load.

[0132] The second condition is that the active current sampling value reaches the preset maximum current limit, which indicates that it is in an overcurrent state and needs to be protected immediately.

[0133] The third condition is that the duration of the second level combination in the current drive state has reached the preset minimum on-time. This is a backup condition to ensure that the drive state will not remain indefinitely at the third level combination even if the current does not reach the target value or limit.

[0134] When any one of the above three conditions is met first, the third level combination of the current driving state will be terminated, and then proceed according to... Figure 5The sequence shown switches to the first level combination of the next driving state. For example, when the active current sampling value reaches the resonant cavity current reference value during the execution of the third level combination in state 0, the third level combination of state 0 will be terminated, and the execution will switch to the first level combination of state 1. The process continues from state 1 to state 2, from state 2 to state 3, and so on, until state 5 is completed and then the process switches back to state 0, forming a continuous cycle.

[0135] In summary, Figure 5 The relationship with peak current control can be summarized as follows: Figure 5 It provides the "skeleton" for the driving state cycle—a fixed order of six states and the basic configuration of the PWM signal in each state; while the real-time current comparison result serves as "dynamic filling," determining how long the third level combination in each state remains. When the active current sample value reaches the target value or limit, a state switch is immediately triggered, terminating the current current rise process. In this way, the PWM signal (target square wave signal) follows... Figure 5 The fixed sequence output drives the switching transistor to switch cycle by cycle, applying the three-phase input voltage to the resonant cavity in a predetermined sequence, thereby precisely controlling the peak current of the resonant cavity to be near the target value, while ensuring that it does not exceed the maximum current limit.

[0136] In an optional implementation, generating the resonant cavity current reference value includes: The difference between the output voltage and the target voltage, and the output current used to characterize load changes, are input to a proportional-integral-derivative (PID) controller, and the output of the PID controller is used as the reference value for the resonant cavity current.

[0137] In other words, the resonant cavity current reference value is generated as follows: the difference between the output voltage and the target voltage, as well as the output current used to characterize load changes, are input together into the proportional-integral-derivative (PID) controller, and the output of the PID controller is used as the resonant cavity current reference value.

[0138] It's important to note that the difference between the output voltage and the target voltage reflects the degree to which the current output voltage deviates from the desired value, and is the fundamental error signal for voltage closed-loop control. When the output voltage is lower than the target voltage, it indicates that more energy output is needed to boost the voltage; when the output voltage is higher than the target voltage, it indicates that less energy output is needed. This error signal is the basic input of the proportional-integral-derivative (PID) controller.

[0139] Meanwhile, the output current is also introduced into the proportional-integral-derivative (PID) controller. The magnitude of the output current directly reflects the load intensity: the heavier the load, the larger the output current; the lighter the load, the smaller the output current. More importantly, the rate of change of the output current reflects the dynamic fluctuations of the load. Introducing the output current into the controller is equivalent to adding a feedforward channel to the control system, enabling the controller to detect load changes in advance, without having to wait until the output voltage has deviated before making adjustments.

[0140] After receiving the two input signals, the proportional-integral-derivative (PID) controller performs proportional, integral, and derivative operations on them. The proportional part responds instantly to the current voltage error; the integral part compensates for the historical accumulation of voltage error, eliminating steady-state error; and the derivative part predicts the trend of voltage error changes, while also combining the load change information represented by the output current to further improve the dynamic response capability of the system. Through the combined effect of these three operations, the controller outputs a resonant cavity current reference value.

[0141] This resonant cavity current reference value is actually a control command that integrates voltage error and load information. It represents the target current that should flow through the resonant cavity to maintain the output voltage stable at the current target value. When the load suddenly increases, the increase in output current will cause the controller to adjust the resonant cavity current reference value in advance, preparing the resonant cavity to output more energy. When the output voltage deviates, the voltage error signal will cause the controller to further correct the current reference value until the voltage returns to stability.

[0142] The resonant cavity current reference value generated in this way includes both the regulation effect of the voltage closed loop and the prediction information of load changes, enabling the subsequent current inner loop to respond to load fluctuations more quickly, thereby improving the dynamic response performance of the entire converter.

[0143] In one feasible implementation, the second state machine includes three parallel and independent control channels, each corresponding to a phase synchronous rectifier tube; each control channel contains multiple wave generation states that cycle sequentially, each wave generation state corresponding to a set of drive level combinations of the synchronous rectifier tubes; in each control channel, when a level change is detected in the corresponding second square wave signal, the current wave generation state is triggered to switch to the next wave generation state; simultaneously, if the duration of the current wave generation state reaches a preset time threshold, the switch to the next wave generation state is also triggered; by combining the level change trigger of the second square wave signal with the time threshold trigger, the switching action of each phase synchronous rectifier tube is kept synchronized with the zero-crossing point of the resonant cavity current.

[0144] This can be combined Figure 6 To understand: such as Figure 6As shown, this diagram illustrates the state machine for decoupling the synchronous rectifier drive, used to control the switching timing of the three-phase synchronous rectifier diodes on the secondary side. The entire control structure contains three parallel and independent channels, corresponding to the synchronous rectifier diode drives of the first, second, and third phases, respectively, denoted as: First phase: PWM1C (423), PWM1D (424).

[0145] Second phase: PWM2C (428) PWM2D (429).

[0146] Third phase: PWM3C (433) PWM3D (434).

[0147] First phase channel (corresponding to the first phase upper synchronous rectifier drive signal and the first phase lower synchronous rectifier drive signal): The first phase channel starts in waveform state 0. Both the upper and lower synchronous rectifier drive signals of the first phase are low (LL), and both synchronous rectifiers of the first phase are in the off state. At this time, the resonant cavity current is negative, and the synchronous rectifiers are turned off to prevent current from flowing back to the primary side.

[0148] When condition one is met, i.e., the resonant cavity current is detected to be greater than the set value, the state switches from wave generation state 0 to wave generation state 3. At this time, the drive signal of the upper synchronous rectifier tube of the first phase becomes high level, the drive signal of the lower synchronous rectifier tube of the first phase remains low level (HL), and the upper synchronous rectifier tube of the first phase is turned on. At this time, the resonant cavity current is positive, and energy begins to be transferred to the secondary side, while slope compensation is activated.

[0149] In wave generation state 3, if condition 2 is met, i.e., the current state is wave generation state 3 and the duration exceeds half a resonance cycle, the state switches back to wave generation state 0, and the drive signals of the first phase upper synchronous rectifier tube and the first phase lower synchronous rectifier tube return to low level (LL). At this time, the resonant cavity current is negative, and the synchronous rectifier tube is turned off to prevent current from flowing back to the primary side.

[0150] In waveform generation state 0, if condition one is met, it will switch to waveform generation state 3. In waveform generation state 3, if condition one is met again, the state switches to another state: the drive signal of the upper synchronous rectifier tube of the first phase becomes low, and the drive signal of the lower synchronous rectifier tube of the first phase becomes high (LH), turning on the lower synchronous rectifier tube of the first phase. At this time, the resonant cavity current is positive, and energy begins to be transferred to the secondary side.

[0151] In the state after wave generation state 3, if condition 3 is met, that is, the current state is wave generation state 0 and the duration exceeds half a resonance cycle, then the state returns to wave generation state 0 and the two drive signals are restored to low level (LL).

[0152] Second phase channel (corresponding to the upper synchronous rectifier tube drive signal and the lower synchronous rectifier tube drive signal of the second phase): The second phase channel starts in waveform state 2. At this time, the drive signal of the upper synchronous rectifier tube in the second phase and the drive signal of the lower synchronous rectifier tube in the second phase are both low level (LL), and both synchronous rectifier tubes in the second phase are in the off state.

[0153] When condition one is met, the state switches from wave generation state 2 to wave generation state 5. At this time, the drive signal of the upper synchronous rectifier tube of the second phase becomes high level, the drive signal of the lower synchronous rectifier tube of the second phase remains low level (HL), and the upper synchronous rectifier tube of the second phase is turned on.

[0154] In wave generation state 5, if condition 4 is met, that is, the current wave generation state 5 is in the state and the duration exceeds half a resonance cycle, then the state switches back to wave generation state 2, and the drive signal of the upper synchronous rectifier tube of the second phase and the drive signal of the lower synchronous rectifier tube of the second phase are restored to low level (LL).

[0155] In waveform generation state 2, if condition 1 is met, the system will switch to waveform generation state 5. In waveform generation state 5, if condition 1 is met again, the system switches to another state, the upper synchronous rectifier drive signal of the second phase becomes low, the lower synchronous rectifier drive signal of the second phase becomes high (LH), and the lower synchronous rectifier of the second phase is turned on.

[0156] In the state after wave generation state 5, if condition 5 is met, that is, the current state is wave generation state 2 and the duration exceeds half a resonance cycle, then the state returns to wave generation state 2 and the two drive signals are restored to low level (LL).

[0157] Third phase channel (corresponding to the drive signal of the upper synchronous rectifier tube of the third phase and the drive signal of the lower synchronous rectifier tube of the third phase): The third phase channel starts in wave generation state 4. At this time, the drive signal of the upper synchronous rectifier tube in the third phase and the drive signal of the lower synchronous rectifier tube in the third phase are both low level (LL), and both synchronous rectifier tubes in the third phase are in the off state.

[0158] When condition one is met, the state switches from wave generation state 4 to wave generation state 1. At this time, the drive signal of the upper synchronous rectifier tube of the third phase becomes high level, the drive signal of the lower synchronous rectifier tube of the third phase remains low level (HL), and the upper synchronous rectifier tube of the third phase is turned on.

[0159] In wave generation state 1, if condition six is ​​met, that is, the current wave generation state 1 is in the state and the duration exceeds half a resonance cycle, then the state switches back to wave generation state 4, and the drive signal of the upper synchronous rectifier tube of the third phase and the drive signal of the lower synchronous rectifier tube of the third phase return to the low level (LL).

[0160] In waveform generation state 4, if condition 1 is met, it will switch to waveform generation state 1. In waveform generation state 1, if condition 1 is met again, the state switches to another state, the drive signal of the upper synchronous rectifier tube of the third phase becomes low level, the drive signal of the lower synchronous rectifier tube of the third phase becomes high level (LH), and the lower synchronous rectifier tube of the third phase is turned on.

[0161] In the state after wave generation state 1, if condition seven is met, that is, the current state is wave generation state 4 and the duration exceeds half a resonance cycle, then the state returns to wave generation state 4 and the two drive signals are restored to low level (LL).

[0162] The three channels operate independently and in parallel. The synchronous rectifier is triggered to switch the conduction state near the current zero crossing point by condition one (the resonant cavity current is greater than the set value). The switching action is kept synchronized with the resonant period by the time threshold conditions of each state (conditions two to seven), thereby achieving low-loss zero-current switching.

[0163] This application provides a three-phase LLC collaborative control method, device, equipment, and medium for AIDC power supply. It employs a primary-secondary side collaborative control architecture. By acquiring output voltage and output current, a resonant cavity current reference value is generated. Active current sampling values ​​are extracted using current detection circuits in each phase. On one hand, the active current sampling value is compared with the resonant cavity current reference value to generate a first square wave signal. This signal is then output as a primary-side PWM pulse via a first state machine, controlling the converter to switch between multiple preset drive states cycle by cycle, precisely controlling the peak current of each phase's resonant cavity within the allowable error range of the target value. On the other hand, the active current sampling value is compared with a synchronous rectification threshold characterizing the zero-crossing point of the resonant cavity current to generate a second square wave signal. This signal is then output as a secondary-side synchronous rectification PWM pulse via a second state machine, ensuring that the switching action of the synchronous rectifier diode matches the resonant cavity current's resonant period.

[0164] Compared with the existing technology where the primary and secondary side controls are independent and difficult to synchronize, the embodiments of this application achieve the coordinated operation of primary side peak control and secondary side synchronous rectification by sharing the same current detection signal. This enables the secondary side switch to accurately track the changes in the resonant cavity current at all times, effectively solving the problems of difficulty in synchronizing the primary side dynamic response and secondary side synchronous rectification, as well as the current imbalance caused by the deviation of three-phase parameters.

[0165] Based on the same technical concept, this application also provides a three-phase LLC collaborative control device for AIDC power supply. The three-phase LLC resonant converter has a topology of primary-side star connection and secondary-side rectified and directly paralleled, used to supply power to AIDC, such as... Figure 7 As shown, the device includes: The acquisition module 701 is used to acquire the output voltage and output current of the three-phase LLC resonant converter.

[0166] The generation module 702 is used to generate a resonant cavity current reference value based on the output voltage, the output current and the preset target voltage.

[0167] The extraction module 703 is used to collect the actual resonant current of the resonant cavity through the current detection circuit set in the current path of each phase resonant cavity, and extract the active current component to obtain the active current sampling value of each phase.

[0168] The comparison module 704 is used to compare the active current sampling value of each phase with the resonant cavity current reference value to generate a first square wave signal for each phase; and to compare the active current sampling value of each phase with the synchronous rectification threshold characterizing the zero-crossing point of the resonant cavity current to generate a second square wave signal for each phase to indicate the turn-on and turn-off times of the synchronous rectifier tube on the secondary side.

[0169] The first control module 705 is used to generate a first pulse width modulation pulse signal to drive the power switch tube on the primary side through a first state machine based on the first square wave signal of each phase, and control the three-phase LLC resonant converter to switch between multiple preset primary side drive states cycle by cycle, so as to control the peak current of each phase resonant cavity within the allowable error range of the resonant cavity current reference value.

[0170] The second control module 706 is used to generate a second pulse width modulation pulse signal to drive the synchronous rectifier tube through a second state machine based on the second square wave signal of each phase, so that the switching action of the synchronous rectifier tube is matched with the resonant period of the resonant cavity current.

[0171] In one feasible implementation, the synchronous rectification threshold is the zero-crossing threshold of the resonant cavity current. The second square wave signal is generated according to the moment when the active current sampling value reaches the zero-crossing threshold, so that the synchronous rectifier tube is turned on and off at the moment when the resonant cavity current crosses zero, thereby reducing switching losses.

[0172] In one feasible implementation, the first state machine and the second state machine are integrated into the same decoupling module.

[0173] The decoupling module receives the first square wave signal and the second square wave signal of each phase, and generates a first pulse width modulation pulse signal to drive the power switch and a second pulse width modulation pulse signal to drive the synchronous rectifier.

[0174] The first state machine triggers the switching of the primary-side drive state based on the level change of the first square wave signal, and the second state machine triggers the switching on and off of the synchronous rectifier tube based on the level change of the second square wave signal.

[0175] In one feasible implementation, the plurality of preset primary-side driving states are cycled in a fixed order.

[0176] Each primary-side drive state contains a fixed sequence of three-phase level combinations, and the duration of the last level combination in each primary-side drive state is determined by any of the following conditions: Whether the active current sampling value reaches the resonant cavity current reference value, or whether the active current sampling value exceeds the preset maximum current limit.

[0177] When any condition is met, the last level combination of the current primary-side driving state is terminated and the system switches to the next primary-side driving state, thereby controlling the peak current of the resonant cavity within the allowable error range of the resonant cavity current reference value and limiting it to not exceed the maximum current limit.

[0178] In one feasible implementation, the second state machine includes three parallel and independent control channels, each corresponding to a phase synchronous rectifier tube.

[0179] Each control channel contains multiple wave emission states that cycle sequentially, and each wave emission state corresponds to a set of drive level combinations of the synchronous rectifier tubes.

[0180] In each control channel, when a level change is detected in the corresponding second square wave signal, the current wave transmission state is switched to the next wave transmission state. At the same time, if the duration of the current wave transmission state reaches a preset time threshold, the switch to the next wave transmission state is also triggered.

[0181] By combining the level change trigger of the second square wave signal with the time threshold trigger, the switching action of each phase synchronous rectifier tube is kept synchronized with the zero-crossing point of the resonant cavity current.

[0182] In one feasible implementation, the extraction module is used to extract the active current component from the actual resonant current, for the following purposes: The actual resonant current is rectified by a controllable rectifier circuit to remove the reactive current component; a slope compensation signal is introduced to suppress the subharmonic oscillation of the loop.

[0183] In one feasible implementation, the generation module is used to generate a resonant cavity current reference value for: The difference between the output voltage and the target voltage, and the output current used to characterize load changes, are input to a proportional-integral-derivative (PID) controller, and the output of the PID controller is used as the reference value for the resonant cavity current.

[0184] This application provides a three-phase LLC collaborative control method, device, equipment, and medium for AIDC power supply. It employs a primary-secondary side collaborative control architecture. By acquiring output voltage and output current, a resonant cavity current reference value is generated. Active current sampling values ​​are extracted using current detection circuits in each phase. On one hand, the active current sampling value is compared with the resonant cavity current reference value to generate a first square wave signal. This signal is then output as a primary-side PWM pulse via a first state machine, controlling the converter to switch between multiple preset drive states cycle by cycle, precisely controlling the peak current of each phase's resonant cavity within the allowable error range of the target value. On the other hand, the active current sampling value is compared with a synchronous rectification threshold characterizing the zero-crossing point of the resonant cavity current to generate a second square wave signal. This signal is then output as a secondary-side synchronous rectification PWM pulse via a second state machine, ensuring that the switching action of the synchronous rectifier diode matches the resonant cavity current's resonant period.

[0185] Compared with the existing technology where the primary and secondary side controls are independent and difficult to synchronize, the embodiments of this application achieve the coordinated operation of primary side peak control and secondary side synchronous rectification by sharing the same current detection signal. This enables the secondary side switch to accurately track the changes in the resonant cavity current at all times, effectively solving the problems of difficulty in synchronizing the primary side dynamic response and secondary side synchronous rectification, as well as the current imbalance caused by the deviation of three-phase parameters.

[0186] Figure 8 A schematic diagram of an electronic device provided in this application embodiment includes: a processor 801, a storage medium 802, and a bus 803. The storage medium 802 stores machine-readable instructions executable by the processor 801. When the electronic device runs the three-phase LLC collaborative control method for AIDC power supply as described in the embodiment, the processor 801 communicates with the storage medium 802 through the bus 803, and the processor 801 executes the machine-readable instructions to perform the steps as described in the embodiment.

[0187] In this embodiment, the storage medium 802 may also execute other machine-readable instructions to perform other methods as described in the embodiment. For details on the specific execution steps and principles, please refer to the description of the embodiment, which will not be repeated here.

[0188] This application also provides a computer-readable storage medium storing a computer program that is executed by a processor to perform the steps as described in the embodiments.

[0189] In this embodiment, the computer program, when run by the processor, can also execute other machine-readable instructions to perform other methods as described in the embodiments. For details on the specific execution steps and principles, please refer to the description of the embodiments, which will not be repeated here.

[0190] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the coupling or direct coupling or communication connection shown or discussed may be through some communication interface; the indirect coupling or communication connection between apparatuses or modules may be electrical, mechanical, or other forms.

[0191] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0192] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0193] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0194] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A three-phase LLC coordinated control method for AIDC power supply, characterized in that, The three-phase LLC resonant converter has a primary-side star connection and a secondary-side rectified and directly parallel topology, used to power artificial intelligence data centers (AIDCs). The method includes: The output voltage and output current of the three-phase LLC resonant converter are collected. A resonant cavity current reference value is generated based on the output voltage, the output current, and the preset target voltage. By setting a current detection circuit in the current path of each phase resonant cavity, the actual resonant current of the resonant cavity is collected respectively, and the active current component is extracted to obtain the active current sampling value of each phase. The active current sampling value of each phase is compared with the resonant cavity current reference value to generate a first square wave signal for each phase; and the active current sampling value of each phase is compared with the synchronous rectification threshold characterizing the zero crossing point of the resonant cavity current to generate a second square wave signal for each phase used to indicate the turn-on and turn-off times of the synchronous rectifier tube on the secondary side. Based on the first square wave signal of each phase, a first pulse width modulation pulse signal is generated by the first state machine to drive the power switch of the primary side, and the three-phase LLC resonant converter is controlled to switch between multiple preset primary side drive states cycle by cycle, so that the peak current of each phase resonant cavity is controlled within the allowable error range of the resonant cavity current reference value. Based on the second square wave signal of each phase, a second pulse width modulation pulse signal is generated by the second state machine to drive the synchronous rectifier tube, so that the switching action of the synchronous rectifier tube is matched with the resonant period of the resonant cavity current.

2. The method according to claim 1, characterized in that, The synchronous rectification threshold is the zero-crossing threshold of the resonant cavity current. The second square wave signal is generated according to the moment when the active current sampling value reaches the zero-crossing threshold, so that the synchronous rectifier tube is turned on and off at the moment when the resonant cavity current crosses zero, thereby reducing switching losses.

3. The method according to claim 1, characterized in that, The first state machine and the second state machine are integrated into the same decoupling module; The decoupling module receives the first square wave signal and the second square wave signal of each phase, and generates a first pulse width modulation pulse signal to drive the power switch and a second pulse width modulation pulse signal to drive the synchronous rectifier, respectively. The first state machine triggers the switching of the primary-side drive state based on the level change of the first square wave signal, and the second state machine triggers the switching on and off of the synchronous rectifier tube based on the level change of the second square wave signal.

4. The method according to claim 1, characterized in that, The multiple preset primary-edge driving states cycle in a fixed order; Each primary-side drive state contains a fixed sequence of three-phase level combinations, and the duration of the last level combination in each primary-side drive state is determined by any of the following conditions: Whether the active current sampling value reaches the resonant cavity current reference value, or whether the active current sampling value exceeds the preset maximum current limit; When any condition is met, the last level combination of the current primary-side driving state is terminated and the system switches to the next primary-side driving state, thereby controlling the peak current of the resonant cavity within the allowable error range of the resonant cavity current reference value and limiting it to not exceed the maximum current limit.

5. The method according to claim 1, characterized in that, The second state machine includes three parallel and independent control channels, each corresponding to a phase synchronous rectifier tube; Each control channel contains multiple wave emission states that cycle sequentially, and each wave emission state corresponds to a set of drive level combinations of the synchronous rectifier tubes; In each control channel, when a level change is detected in the corresponding second square wave signal, the current wave transmission state is switched to the next wave transmission state; at the same time, if the duration of the current wave transmission state reaches a preset time threshold, the switch to the next wave transmission state is also triggered. By combining the level change trigger of the second square wave signal with the time threshold trigger, the switching action of each phase synchronous rectifier tube is kept synchronized with the zero-crossing point of the resonant cavity current.

6. The method according to claim 1, characterized in that, Extracting the active current component from the actual resonant current includes: The actual resonant current is rectified by a controllable rectifier circuit to remove the reactive current component. A slope compensation signal is introduced to suppress the subharmonic oscillation of the loop.

7. The method according to claim 1, characterized in that, The generated resonant cavity current reference value includes: The difference between the output voltage and the target voltage, and the output current used to characterize load changes, are input to a proportional-integral-derivative (PID) controller, and the output of the PID controller is used as the reference value for the resonant cavity current.

8. A three-phase LLC collaborative control device for AIDC power supply, characterized in that, The three-phase LLC resonant converter has a primary-side star connection and a secondary-side rectified and directly parallel topology, used to power artificial intelligence data centers (AIDCs). The device includes: The acquisition module is used to acquire the output voltage and output current of the three-phase LLC resonant converter; The generation module is used to generate a resonant cavity current reference value based on the output voltage, the output current, and the preset target voltage. The extraction module is used to collect the actual resonant current of the resonant cavity through the current detection circuit set in the current path of each phase resonant cavity, and extract the active current component to obtain the active current sampling value of each phase. The comparison module is used to compare the active current sampling value of each phase with the resonant cavity current reference value to generate a first square wave signal for each phase; and to compare the active current sampling value of each phase with the synchronous rectification threshold characterizing the zero crossing point of the resonant cavity current to generate a second square wave signal for each phase to indicate the turn-on and turn-off times of the synchronous rectifier tube on the secondary side. The first control module is used to generate a first pulse width modulation pulse signal to drive the power switch tube on the primary side through a first state machine based on the first square wave signal of each phase, and control the three-phase LLC resonant converter to switch between multiple preset primary side drive states cycle by cycle, so as to control the peak current of each phase resonant cavity within the allowable error range of the resonant cavity current reference value. The second control module is used to generate a second pulse width modulation pulse signal to drive the synchronous rectifier tube through a second state machine based on the second square wave signal of each phase, so that the switching action of the synchronous rectifier tube is matched with the resonant period of the resonant cavity current.

9. An electronic device, characterized in that, include: The device includes a processor, a storage medium, and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor communicates with the storage medium via the bus, and the processor executes the machine-readable instructions to perform the steps of the three-phase LLC coordinated control method for AIDC power supply as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, performs the steps of the three-phase LLC coordinated control method for AIDC power supply as described in any one of claims 1 to 7.

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