Charge control method and digital control system based on dual active bridge resonant converter

Abstract

The present invention discloses a charge control method and digital control system based on a dual-active bridge resonant converter, belonging to the field of dual-active bridge resonant converter control technology. The method uses a resettable integrator circuit to sample the resonant current and convert it into an integral voltage that is linearly related to the charge injection amount, and the integral capacitor is discharged to zero before each injection; the integral voltage is superimposed with a ramp voltage; the superimposed signal is compared with the threshold voltage output by the current loop through a comparator, and when the superimposed signal reaches the threshold, a PWM signal is triggered and the converter operating mode is switched; the switch tube action is controlled according to the PWM signal, and the switch timing is dynamically adjusted to achieve effective control of the transmission power, and a digital control system for implementing the method is established. By controlling the resonant current integral and the switch timing, the method achieves fast dynamic response, efficient power transmission and stable operation of the dual-active bridge resonant converter, effectively improving energy conversion efficiency and system reliability.

Description

Technical Field

[0001] The present invention relates to the technical field of dual active bridge resonant converter control, and in particular to a charge control method and a digital control system based on the dual active bridge resonant converter. Background Art

[0002] With the development of the new energy industry, power electronic converters are becoming increasingly important in the grid-connection of distributed power sources and the charging and discharging of energy storage systems. The dual active bridge resonant converter (SRDAB) is an ideal choice for new energy applications due to its advantages such as electrical isolation, bidirectional power transmission, and high power density. However, traditional modulation strategies, mostly phase-shift modulation and frequency modulation, have limitations in terms of dynamic response speed and power control accuracy. In particular, when power demand suddenly changes, the system's dynamic performance is insufficient and cannot respond quickly, resulting in voltage and current oscillations, affecting system stability and reliability.

[0003] Existing modulation strategies can easily lead to modulation failure and increased voltage fluctuations during transients due to the strong coupling between the nonlinear characteristics of the resonant cavity and the modulation parameters. For example, traditional direct phase-shift frequency conversion control can trigger a step response and high-frequency oscillation in the resonant cavity circuit when the phase shift angle and frequency change step, causing overvoltage and overcurrent, increasing the risk of device damage and triggering electromagnetic interference.

[0004] Furthermore, new pulse loads demand millisecond or even microsecond response speeds for power regulation. However, increasing the control bandwidth can excite resonant cavity oscillations, making it difficult to reconcile the trade-off between fast response and system stability. Existing control methods lack a deep understanding of the relationship between resonant current and charge injection, making it difficult to achieve precise energy regulation and limiting converter performance. Therefore, developing advanced control methods that balance fast dynamic response, stable operation, and precise energy control is a key issue in promoting the widespread application of dual-active-bridge resonant converters in the renewable energy sector. Summary of the Invention

[0005] The present invention aims to address the technical deficiencies described in the background and propose a charge control method and a digital control system based on a dual active bridge resonant converter, which is beneficial to improving the dynamic response capability of the converter.

[0006] The present invention is achieved by adopting the following technical solutions:

[0007] The charge control method based on the dual active bridge resonant converter, the dual active bridge resonant converter, that is, the main circuit has a bidirectional power transmission capability, and its topology includes: a DC voltage source V 1. DC voltage source V 2. DC voltage source V Input capacitance on side 1 C in , DC voltage sourceV Input capacitors on both sides C o , H full-bridge circuit on the primary side, half-bridge circuit on the secondary side, and high-frequency transformer in the middle T and resonant cavity, the primary side is composed of switch tube S 1. Switching tube S 2. Switching tube S 3. Switching tube S 4 form an H full bridge, the secondary side is composed of switch tube S 5. Switching tube S 6 form a half bridge, and the switch tubes each have a parasitic capacitance C s1 , parasitic capacitance C s2 , parasitic capacitance C s3 , parasitic capacitance C s4 , parasitic capacitance C s5 , parasitic capacitance C s6 and anti-parallel diodes, the transformer ratio is 1: n , the resonant cavity consists of a resonant capacitor C r and a resonant inductor L r The two switching tubes in each bridge arm are complementary turned on with a 50% duty cycle, and a dead time of 0.45μs is given on the primary side and a dead time of 0.65μs is given on the secondary side. The input voltage and output voltage are modulated at high frequency to obtain the midpoint voltage between the primary side inverter full bridge and the voltage converted to the secondary side through the transformer. v ab And the bridge midpoint voltage of the secondary full bridge v cd , defined by a DC voltage source V 1 to V 2 The transmission power is in forward transmission mode, and the DC voltage source V 2 to DC voltage source V 1 Transmission power is in reverse transmission mode;

[0008] The charge control method is implemented by the following steps:

[0009] Step S1: The resettable integration circuit samples the resonant current through the current transformer. i L and through the sampling resistor R s Integrate it and convert it into a voltage signal v s , and then generate an integral voltage that is linearly related to the charge injection amount Q through the integrating operational amplifier v Ci , and ensure that before each charge injection, the integral capacitor C iRapidly discharge to 0V by reset signal;

[0010] Step S2: v Ci With ramp voltage v Cramp Superposition generates superposition signals v sum ;

[0011] Step S3: The comparator in the control circuit superimposes the signal v sum The threshold of the current loop output v th For comparison, when v sum achieve v th When the logic module is triggered to generate the corresponding PWM signal, the converter is switched to one of the four working modes, which together constitute a complete cycle. v th is the output of the PI regulator, and the input of the PI regulator comes from the output current feedback signal of the converter I o With the given current reference value I ref Error I e ;

[0012] Step S4: The control circuit controls the on and off of the switch in the main circuit according to the generated PWM signal and the corresponding different working modes, and controls the transmission power by dynamically adjusting the switch timing.

[0013] Furthermore, the dual active bridge resonant converter has bidirectional power transmission capability, including operating in a forward power transmission mode to allow energy to flow from the primary side to the secondary side, and operating in a reverse power transmission mode to allow energy to return from the secondary side to the primary side. The forward transmission mode includes four stages:

[0014] Phase 1 t 0 is the starting time, t Resonant current at time 0 i L is 0A, when i L When crossing zero, the switch S 1. Switching tube S 5. Switching tube S 4 is activated, at this time v ab = nV 1, v cd = V 2 / 2,i L Starting from 0 and increasing in a positive direction, the integral capacitance C i Start charging, t 1 moment i L The amplitude is the largest when the capacitor voltage and the slope compensation superposition reach the set threshold voltage v th When the switch S 4 is turned off, the integral capacitor stops charging and resets, and the switch tube S 1 and switch tube S 4 The logic inversion of the driving signal is used as the reset signal of the capacitor. The corresponding phase shift angle at this stage is φ , the charge generated by the integration of the resonant current in stage 1 Q 1. Used for charge control;

[0015] Phase 2, switch tube S 1. Switching tube S 3. Switching tube S 5 is turned on, the switch tube S 4 Shutdown, integrating capacitor C i Rapid discharge, the voltage drops to 0V, at this time, v ab =0, v cd = V 2 / 2, the resonant current continues to resonate until the moment t 2 The resonant current crosses zero, the positive half cycle ends, and the charge generated by the integration of the resonant current in stage 2 Q 2;

[0016] Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The switch action in this phase is symmetrical to that in phase 1. S 1. Switching tube S 5. Switching tube S 4 Shutdown, v ab =- nV 1, v cd =- V 2 / 2, resonant current i L Increase in the opposite direction, t 3 moments i L When the amplitude is the largest, the integrating capacitor no longer performs the integrating operation and remains at 0V. The charge is 0, and the counter is used to count to achieve the time symmetry between stage 3 and stage 1.

[0017] Phase 4: The switching action of this phase corresponds to the symmetry of phase 2.S 1. Switching tube S 3. Switching tube S 5 Turn off, switch tube S 4 open, v ab =0, v cd =- V 2 / 2, the resonant current continues to resonate until t At moment 4, the current crosses zero, completing a complete switching cycle.

[0018] Furthermore, the reverse transmission mode includes four stages:

[0019] Phase 1 t 0 is the starting time, t Resonant current at time 0 i L is 0A, when i L When crossing zero, the switch S 1. Switching tube S 5. Switching tube S 3 is activated. v ab = nV 1, v cd = V 2 / 2, i L Starting from 0 and increasing in reverse, the integral capacitance C i Start charging, t 1 moment i L The amplitude is the largest when the capacitor voltage and the slope compensation superposition reach the set threshold voltage v th When the switch S 3. Turn off the switch. S 4 is turned on, the integral capacitor stops charging and resets, and the switch tube S 1 and switch tube S 3. The logic inversion of the driving signal is used as the reset signal of the capacitor. The corresponding phase shift angle at this stage is φ , the amount of charge generated by the integral of the resonant current Q 2. For charge control;

[0020] Phase 2, switch tube S 3. Turn off the switch. S 1. Switching tube S 5. Switching tube S 4 is turned on, integrating capacitor C i Rapid discharge, the voltage drops to 0V, at this time, vab =0, v cd = V 2 / 2, the resonant current continues to resonate until the moment t 2 The resonant current crosses zero, the positive half cycle ends, and the charge generated by the integration of the resonant current in stage 2 Q 1;

[0021] Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The switch action in this phase is symmetrical to that in phase 1. S 1. Switching tube S 5. Switching tube S 3 off, v ab =- nV 1, v cd =- V 2 / 2, resonant current i L Positive increase, t 3 moments i L The amplitude is the largest, but the integrating capacitor no longer integrates, and the counter is used to count to achieve the time symmetry between stage 3 and stage 1;

[0022] Phase 4: The switching action of this phase corresponds to the symmetry of phase 2. S 3 open, switch tube S 1. Switching tube S 5. Switching tube S 4 Shutdown, v ab =0, v cd =- V 2 / 2, the resonant current continues to resonate until t At moment 4, the current crosses zero, completing a complete switching cycle.

[0023] Furthermore, the four working mode steady-state trajectory models in step S3 are:

[0024] ,

[0025] in, V CrN is the resonant capacitor voltage, V oN is the ratio of output voltage to input voltage, i LN is the normalized resonant current, V Cr0N and I L0N for tThe normalized initial values ​​of capacitor voltage and inductor current at time 0, V Cr1N and I L1N for t The initial value of the capacitor voltage and the initial value of the inductor current after normalization at time 1, V Cr2N and I L2N for t 2. The normalized initial values ​​of capacitor voltage and inductor current, V Cr3N and I L3N for t 3. The normalized initial values ​​of the capacitor voltage and inductor current at time 3.

[0026] In addition, the present invention also proposes a digital control system based on a dual active bridge resonant converter, the system is used for a charge control method based on a dual active bridge resonant converter, and the digital control system based on a dual active bridge resonant converter includes:

[0027] Resettable integration circuit: consists of two-stage operational amplifier OP1, two-stage operational amplifier OP2, integration capacitor C i , sampling resistor R s , input resistance R 1 and input resistance R i 、 Feedback resistor R 2 and a reset switch; the current transformer CT is 1: N The resonant current signal is extracted through the sampling resistor R s Convert to voltage signal v s The voltage signal passes through the first-stage reverse amplifier OP1 to obtain a scaled voltage signal v ct , and then through the first-level integrating operational amplifier OP2, the integrated charge information of the current is converted into the integrated capacitance C i Voltage information on v Ci ; The OP2 non-inverting input terminal is connected to a DC voltage V ramp Realize slope compensation and generate current equivalently through superposition theorem I ramp Integrate and finally output a voltage signal including DC bias, slope compensation and current integration v sum; Used to convert the resonant current signal into an integrated voltage, realize charge quantization and slope compensation to provide key signals for control;

[0028] Current detection circuit: includes a scaling unit, a DC bias superposition module and a signal conditioning circuit; the scaling unit directly uses the voltage signal output by the resettable integration circuit v ct , voltage is added through the DC bias superposition module V bias It is converted into a positive value, and then filtered and amplified by the signal conditioning circuit and output to the digital controller. The digital signal processor DSP dynamically adjusts the current value required for soft switching according to the comparison result to achieve zero voltage opening, that is, to achieve soft switching. The voltage signal v ct It is a voltage signal scaled by the resonant cavity current and is consistent with the resonant current waveform;

[0029] Digital controller: It is composed of a digital signal processor (DSP) and a complex programmable logic device (CPLD). The DSP integrates an analog-to-digital converter module (ADC module), four digital-to-analog converter modules (DAC modules), four high-speed comparators, and a PI adjustment unit for sampling voltage and current signals and performing loop calculations. The CPLD includes an edge detection module, a state machine module, and a dead zone complementary module for converting the DSP output signal into a complementary PWM wave with a dead zone to control the operation of the switch tube.

[0030] Furthermore, the amplification factors of the two-stage operational amplifiers OP1 and OP2 in the resettable integration circuit are K 1. K 2. Output voltage signal v sum They are:

[0031] ,

[0032] in, k is the amplification factor from the resonant current to the integrating capacitor voltage, i L is the resonant current, R i is the input resistance, t 1 is the end time of phase 1.

[0033] Furthermore, the reset switch in the resettable integration circuit is controlled by the reset signal res output by the digital controller, which is used to reset the integration capacitor. C i Discharge operation, in half a cycle, the integral capacitor C i In the switch tubeS 1. Switching tube S 4. Synchronous integration is performed during the common on-time, and the remaining time is quickly discharged to 0V and maintained at 0V when res is high.

[0034] Furthermore, the ADC module in the digital controller samples the output current i o And with the set current I ref Make the difference and output the calculation result through the PI module loop V th , then converted into analog quantity by DAC and connected to the inverting input of high-speed comparator 1, and the non-inverting input of high-speed comparator 1 is connected to the external charge information signal v sum , when the charge information signal v sum Reaching the threshold voltage V th When the high-speed comparator 1 outputs the rising edge pulse signal CMP_OUT1 as the trigger signal of CPLD, CPLD controls the shutdown S 4 and open S 3. Here, DSP does not directly generate PWM waves.

[0035] Furthermore, the inverting input terminals of the high-speed comparator 2 and the high-speed comparator 3 in the digital controller are connected to the resonant current detection signal terminals of the two nodes respectively. V t1 and V t6 , after conversion, they represent t 1 moment and t The resonant current value at moment 6 is controlled by adjusting the DAC output value of the inverting input terminal of comparator 2 and comparator 3 to control the switching tube. S 1 and S 2 at the time of opening the resonant current value, to achieve the switch tube S 1 and S 2 soft switch; the inverting input of comparator 4 is connected to the DC bias voltage V bias , the non-inverting input is connected to the superimposed V bias The resonant current signal v cmp , by comparison V bias and v cmp , perform zero-crossing detection on the resonant current and control the switch tube S 5 and switch tube S6, and uses the dead time before the switch is turned on to release the junction capacitance charge before the switch is turned on, so as to realize the switching of the switch. S 5 and S 6 soft switch.

[0036] Furthermore, the operation of the CPLD in the digital controller is as follows: first, the pulse signal generated by the edge detection module is used as a trigger signal to drive the state machine module to generate a PWM wave. The PWM wave is the original PWM wave of all switch tubes and the reset signal res. The original PWM wave is a complementary square wave signal with a duty cycle of 50%, but does not include dead time. Then the dead zone module inserts a delay at the rising edge of the original PWM signal, and finally generates two complementary PWM waves with dead zones.

[0037] The present invention has the following beneficial technical effects:

[0038] (1) The present invention provides a charge control method and digital control system based on a dual active bridge resonant converter. Through a precise charge integration control strategy, when the power demand suddenly changes, the system response time can be shortened from multiple switching cycles of the traditional method to milliseconds or even microseconds, greatly reducing the oscillation time of the resonant circuit voltage and current, realizing instant adjustment of the output power, and improving the dynamic response capability.

[0039] (2) The present invention provides a charge control method and digital control system based on a dual-active bridge resonant converter. Through a precise charge integration control strategy and an innovative decoupling algorithm, the method effectively eliminates the impact of resonant current phase shift on the modulation strategy during transient conditions. When the phase shift angle and frequency undergo step changes, the method can quickly suppress high-frequency oscillations in the power circuit, ensuring the safe operation of power devices and significantly improving the transient stability of the system.

[0040] (3) The present invention provides a charge control method and digital control system based on a dual-active-bridge resonant converter. Through a precise charge integration control strategy, based on accurate matching of the switching tube action with the resonant current state, efficient soft-switching operation is achieved across the full load range and operating conditions. Compared with traditional control methods, this method reduces switching losses, reduces electrical stress on switching devices, extends service life, improves the overall efficiency and reliability of the converter, and reduces system maintenance costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 This is the control block diagram of the charge-controlled dual active bridge resonant converter;

[0042] Figure 2 This is the main waveform diagram for forward operation;

[0043] Figure 3 Control logic corresponding to forward operation;

[0044] Figure 4 This is the main waveform diagram for reverse operation;

[0045] Figure 5 Control logic corresponding to reverse operation;

[0046] Figure 6 It is the power regulation process diagram;

[0047] Figure 7 is the input power supply voltage disturbance response diagram;

[0048] Figure 8 is the equivalent circuit and working trajectory of mode 1;

[0049] Figure 9 is the equivalent circuit and working trajectory of mode 2;

[0050] Figure 10 is the equivalent circuit and working trajectory of mode three;

[0051] Figure 11 is the equivalent circuit and working trajectory of mode 4;

[0052] Figure 12 is the steady-state phase plane trajectory;

[0053] Figure 13 Loading state trajectory for charge control method;

[0054] Figure 14 Driving diagram for forward operation to achieve soft switching;

[0055] Figure 15 Driving diagram for reverse operation to achieve soft switching;

[0056] Figure 16 Design block diagrams for digital control system circuits;

[0057] Figure 17 It is a resettable integrator circuit;

[0058] Figure 18 is a current detection circuit;

[0059] Figure 19 This is the schematic diagram of DSP internal comparator 1;

[0060] Figure 20 This is the schematic diagram of comparator 2 and comparator 3 inside DSP;

[0061] Figure 21 This is the schematic diagram of the DSP internal comparator 4;

[0062] Figure 22 This is the schematic diagram of the internal circuit of CPLD;

[0063] Figure 23It is the schematic diagram of the state machine;

[0064] Figure 24 Output the corresponding waveform for the state machine;

[0065] Figure 25 This is the forward loading simulation waveform. DETAILED DESCRIPTION

[0066] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0067] The charge control method based on the dual active bridge resonant converter, the dual active bridge resonant converter, that is, the main circuit has a bidirectional power transmission capability, and its topology includes: a DC voltage source V 1. DC voltage source V 2. DC voltage source V Input capacitance on side 1 C in , DC voltage source V Input capacitors on both sides C o , H full-bridge circuit on the primary side, half-bridge circuit on the secondary side, and high-frequency transformer in the middle T and resonant cavity, the primary side is composed of switch tube S 1. Switching tube S 2. Switching tube S 3. Switching tube S 4 form an H full bridge, the secondary side is composed of switch tube S 5. Switching tube S 6 form a half bridge, and the switch tubes each have a parasitic capacitance C s1 , parasitic capacitance C s2 , parasitic capacitance C s3 , parasitic capacitance C s4 , parasitic capacitance C s5 , parasitic capacitance C s6 and anti-parallel diodes, the transformer ratio is 1: n , the resonant cavity consists of a resonant capacitor C r and a resonant inductor L r The two switching tubes in each bridge arm are complementary turned on with a 50% duty cycle, and a dead time of 0.45μs is given on the primary side and a dead time of 0.65μs is given on the secondary side. The input voltage and output voltage are modulated at high frequency to obtain the midpoint voltage between the primary side inverter full bridge and the voltage converted to the secondary side through the transformer. v ab And the bridge midpoint voltage of the secondary full bridgev cd , defined by a DC voltage source V 1 to V 2 The transmission power is in forward transmission mode, and the DC voltage source V 2 to DC voltage source V 1 Transmission power is in reverse transmission mode;

[0068] like Figure 1 As shown, the charge control method is implemented as follows:

[0069] Step S1: The resettable integration circuit samples the resonant current through the current transformer. i L and through the sampling resistor R s Integrate it and convert it into a voltage signal v s , and then generate an integral voltage that is linearly related to the charge injection amount Q through the integrating operational amplifier v Ci , and ensure that before each charge injection, the integral capacitor C i Rapidly discharge to 0V by reset signal;

[0070] Step S2: v Ci With ramp voltage v Cramp Superposition generates superposition signals v sum ;

[0071] Step S3: The comparator in the control circuit superimposes the signal v sum The threshold of the current loop output v th For comparison, when v sum achieve v th When the logic module is triggered to generate the corresponding PWM signal, the converter is switched to one of the four working modes, which together constitute a complete cycle. v th is the output of the PI regulator, and the input of the PI regulator comes from the output current feedback signal of the converter I o With the given current reference value I ref Error I e ;

[0072] Step S4: The control circuit controls the on and off of the switch in the main circuit according to the generated PWM signal and the corresponding different working modes, and controls the transmission power by dynamically adjusting the switch timing.

[0073] Furthermore, the dual active bridge resonant converter has a bidirectional power transmission capability, including working in a forward power transmission mode to allow energy to flow from the primary side to the secondary side, and working in a reverse power transmission mode to allow energy to return from the secondary side to the primary side. The forward transmission mode includes four stages. The key operating waveforms and control logic of the charge-controlled dual active bridge converter in the forward working mode are as follows: Figure 2 and Figure 3 As shown:

[0074] Phase 1 t 0 is the starting time, t Resonant current at time 0 i L is 0A, when i L When crossing zero, the switch S 1. Switching tube S 5. Switching tube S 4 is activated, at this time v ab = nV 1, v cd = V 2 / 2, i L Starting from 0 and increasing in a positive direction, the integral capacitance C i Start charging, t 1 moment i L The amplitude is the largest when the capacitor voltage and the slope compensation superposition reach the set threshold voltage v th When the switch S 4 is turned off, the integral capacitor stops charging and resets, and the switch tube S 1 and switch tube S 4 The logic inversion of the driving signal is used as the reset signal of the capacitor. The corresponding phase shift angle at this stage is φ , the charge generated by the integration of the resonant current in stage 1 Q 1. Used for charge control;

[0075] Phase 2, switch tube S 1. Switching tube S 3. Switching tube S 5 is turned on, the switch tube S 4 Shutdown, integrating capacitor C i Rapid discharge, the voltage drops to 0V, at this time, vab =0, v cd = V 2 / 2, the resonant current continues to resonate until the moment t 2 The resonant current crosses zero, the positive half cycle ends, and the charge generated by the integration of the resonant current in stage 2 Q 2;

[0076] Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The switch action in this phase is symmetrical to that in phase 1. S 1. Switching tube S 5. Switching tube S 4 Shutdown, v ab =- nV 1, v cd =- V 2 / 2, resonant current i L Increase in the opposite direction, t 3 moments i L When the amplitude is the largest, the integrating capacitor no longer performs the integrating operation and remains at 0V. The charge is 0, and the counter is used to count to achieve the time symmetry between stage 3 and stage 1.

[0077] Phase 4: The switching action of this phase corresponds to the symmetry of phase 2. S 1. Switching tube S 3. Switching tube S 5 Turn off, switch tube S 4 open, v ab =0, v cd =- V 2 / 2, the resonant current continues to resonate until t At moment 4, the current crosses zero, completing a complete switching cycle.

[0078] Furthermore, the reverse transmission mode includes four stages, such as Figure 4 and Figure 5 As shown:

[0079] Phase 1 t 0 is the starting time, t Resonant current at time 0 i L is 0A, when i L When crossing zero, the switch S 1. Switching tube S 5. Switching tube S 3 is activated. v ab = nV 1, v cd = V 2 / 2, i L Starting from 0 and increasing in reverse, the integral capacitance C i Start charging, t 1 moment i L The amplitude is the largest when the capacitor voltage and the slope compensation superposition reach the set threshold voltage v th When the switch S 3. Turn off the switch. S 4 is turned on, the integral capacitor stops charging and resets, and the switch tube S 1 and switch tube S 3. The logic inversion of the driving signal is used as the reset signal of the capacitor. The corresponding phase shift angle at this stage is φ , the amount of charge generated by the integral of the resonant current Q 2. For charge control;

[0080] Phase 2, switch tube S 3. Turn off the switch. S 1. Switching tube S 5. Switching tube S 4 is turned on, integrating capacitor C i Rapid discharge, the voltage drops to 0V, at this time, v ab =0, v cd = V 2 / 2, the resonant current continues to resonate until the moment t 2 The resonant current crosses zero, the positive half cycle ends, and the charge generated by the integration of the resonant current in stage 2 Q 1;

[0081] Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The switch action in this phase is symmetrical to that in phase 1. S 1. Switching tube S 5. Switching tube S 3 off, v ab =- nV 1, v cd =- V 2 / 2, resonant current i L Positive increase, t 3 moments i LThe amplitude is the largest, but the integrating capacitor no longer integrates, and the counter is used to count to achieve the time symmetry between stage 3 and stage 1;

[0082] Phase 4: The switching action of this phase corresponds to the symmetry of phase 2. S 3 open, switch tube S 1. Switching tube S 5. Switching tube S 4 Shutdown, v ab =0, v cd =- V 2 / 2, the resonant current continues to resonate until t At moment 4, the current crosses zero, completing a complete switching cycle.

[0083] Furthermore, the power regulation process is as follows Figure 6 As shown, the charge control method dynamically adjusts the phase shift angle φ Achieve fast power response. When power increases or load changes suddenly, the control system increases the charge comparison threshold v th Directly increase the outward phase angle φ , thereby quickly increasing the charge injection amount and current amplitude of the resonant cavity, achieving instantaneous response of the output current. On the contrary, when the power demand decreases, the system automatically reduces the external phase angle by reducing the resonant cavity charge control amount. φ , achieving rapid attenuation of the resonant current and output load current.

[0084] When the power supply voltage fluctuates, the regulation process is as follows Figure 7 As shown, the control system exhibits unique self-regulating capabilities. A drop in the power supply voltage slows the charge integration rate, automatically extending the switch on-time and passively increasing the phase-shift angle φ to maintain power balance. Conversely, when the power supply voltage rises, the charge integration rate accelerates, causing the system to reach the comparison threshold earlier and the phase-shift angle φ to automatically decrease. This control mechanism creates a fast-responding inner-loop regulation system that automatically adjusts operating parameters in real time during power supply disturbances, providing rapid dynamic response and ensuring stable system operation.

[0085] Furthermore, the operation of the dual active bridge resonant converter is divided into four typical working modes. The resonant cavity inductor current and capacitor voltage are selected as state variables to construct the steady-state trajectory equation of the system.

[0086] (1) Mode 1:

[0087] Its equivalent circuit is Figure 8 As shown, V Cr ( t ) is the resonant capacitor voltage, iL ( t ) is the inductor current. Based on the circuit characteristics, the following relationship can be established:

[0088] ,

[0089] in, C r is the resonant cavity capacitance, L r is the resonant cavity inductance.

[0090] Assume that a switching cycle is t 0 is the starting time, U 0 and I 0 are respectively t The initial values ​​of the capacitor voltage and inductor current at time 0, the differential equations obtained by combining the above equations can be used to obtain the inductor current and capacitor voltage values ​​in mode 1:

[0091] ,

[0092] in is the resonant frequency, f s is the switching frequency, ω s =2 f s is the switching angular frequency, F=f s / f r .

[0093] Normalize the resonant current and resonant capacitor voltage. The voltage normalization parameter is 1 / V 1. The current normalization parameter is V 1 / Z 0, the normalized resonant current is i LN , the resonant capacitor voltage is V CrN , the initial value of the resonant current is I 0N The initial value of the capacitor voltage is V Cr0N , the formula is:

[0094] ,

[0095] in V oN is the ratio of output voltage to input voltage:

[0096] ,

[0097] Finally, the phase plane trajectory equation is obtained:

[0098] ,

[0099] From the above formula, we can see that its trajectory is a circle, such as Figure 8 As shown, the center of the circle is (1- V oN / 2n, 0), its position is determined by the voltage applied across the resonance, while the radius of its motion trajectory is determined by the initial energy state in the resonant cavity, specifically by the initial value of the inductor current and the initial value of the resonant capacitor voltage.

[0100] (2) Mode 2:

[0101] The equivalent circuit of mode 2 is as follows Figure 9 As shown, t The initial values ​​of capacitor voltage and inductor current at time 1 are normalized to be V Cr1N and I L1N , the derived trajectory equation is:

[0102] ,

[0103] The position of the center of its phase plane trajectory circle is ( V oN / 2 n , 0).

[0104] (3) Mode 3:

[0105] The equivalent circuit of mode three is as follows Figure 10 As shown, t The initial values ​​of capacitor voltage and inductor current at time 2 are normalized as follows: V Cr2N and I L2N , the derived trajectory equation is:

[0106] ,

[0107] (4) Mode 4:

[0108] The equivalent circuit of mode 4 is as follows Figure 11 As shown, t The initial values ​​of capacitor voltage and inductor current at time 3 are normalized as follows: V Cr3N and I L3N , the derived trajectory equation is:

[0109] ,

[0110] According to the trajectory equations of modes 1 to 4, the phase plane trajectory of the dual active bridge resonant converter in steady-state operation in a complete cycle is obtained as follows: Figure 12 The two curves in the figure correspond to light-load and heavy-load steady-state operating conditions, respectively. The curve with the smaller radius corresponds to the light-load condition, while the curve with the larger radius corresponds to the heavy-load condition. During a complete switching cycle, the converter transitions from Mode 1 to Mode 2, Mode 3, and Mode 4, sequentially. The transitions between these modes are continuous, so the converter's trajectory during steady-state operation forms a closed arc-shaped polygon.

[0111] The radius of the arc is determined by the energy within the resonant cavity: the greater the transmitted power, the larger the radius; conversely, the smaller the transmitted power, the smaller the radius. This characteristic intuitively reflects the quantitative relationship between resonant cavity energy and transmitted power, providing an important graphical basis for analyzing the dynamic performance of the converter.

[0112] Figure 13 The state trajectory of the charge-controlled SRDAB during load switching is presented. The load shedding trajectory demonstrates the system's excellent dynamic performance: first, the steady-state switching process is completed in just three operating cycles, significantly faster than traditional control methods. Second, the resonant current exhibits a smooth transition during transient conditions, completely avoiding oscillations. Furthermore, voltage and current stresses are strictly limited to the full-load operating range, only slightly exceeding their maximum values ​​at full load.

[0113] The essential difference between the charge control method and direct phase-shift frequency conversion control lies in its dynamic regulation mechanism. Unlike the traditional method of sudden change regulation, charge control precisely controls the energy of the resonant cavity, allowing the system state to quickly converge to a new steady state along the optimal trajectory. Specifically, when the system is subjected to a step disturbance, this control method forces the state trajectory to transition along the shortest path by adjusting the charge input in each switching cycle in real time. This direct energy-based control method has two significant advantages: first, it completely circumvents the traditional LC oscillation process, shortening the transient time to a few switching cycles; second, its control effect is not affected by the initial state of the resonant cavity, and rapid stabilization can be achieved by simply ensuring the accuracy of energy control.

[0114] Compared to charge control, direct phase-shift frequency conversion control experiences a significant oscillation transition, requiring multiple cycles to reach a stable state. Furthermore, the trajectory sometimes exceeds the final steady-state trajectory, indicating that the system is subject to overvoltage and overcurrent risks during transient processes.

[0115] Furthermore, in order to achieve zero voltage turn-on of the switch tube, it is necessary to ensure that the drain-source voltage of the switch tube drops to zero when the switch tube is turned on. It is required that the current in the resonant cavity has sufficient energy during the dead time before the switch tube is turned on to release the charge on the output capacitor of the switch tube. Figure 14 As shown in the figure, the corresponding current waveform and switch tube drive signal timing diagram when all switch tubes are soft switched in the forward working mode are shown. When the dead time of the low-voltage side switch tube is t d1 , the dead time of the high-voltage side switch is t d2 Dead time t d1 Internal negative resonant current- I t1 right S 1 The junction capacitance is fully discharged, the positive resonant current I t4 right S 3 The junction capacitance is fully discharged, the dead time t d2 Internal, resonant current- I t3 right S The junction capacitance of 5 is completely discharged. The driving waveforms of the transistors under the same bridge arm are symmetrical, so all the switching transistors in the dual active bridge resonant converter can achieve soft switching when working in the forward direction;

[0116] Depend on Figure 14 It is known that the time node when the switch tube is turned on in half a cycle is t 1, t 3. t 4. In one switching cycle, the low-voltage side switch tube S1, switch tube S2, switch tube S3, switch tube S 4 Output capacitor is C oss1 , the output capacitance of the high-voltage side switch tube S5 and the switch tube S6 is C oss2 To achieve soft switching, the low voltage side S 2 and S The resonant cavity current when the drive of 4 is turned off needs to be large enough. The high-voltage side switch tube is turned off when the resonant current passes through zero. The current generated during the dead time is used for zero voltage turn-on. A sufficiently large dead time is required to achieve the conditions that all switches need to meet for zero voltage turn-on as shown in the following formula:

[0117] ,

[0118] When working in reverse, the current waveform and switch tube driving diagram corresponding to the soft switching of all switch tubes are as follows: Figure 15 As shown, the dead time t d1 Internal, positive resonant current I ' t1 The junction capacitance of S1 is completely discharged, and the negative resonant current I ' t4 right S4 The junction capacitance is fully discharged, the dead time t d2 Internal, negative resonant current S The junction capacitance of 5 is fully discharged, and the driving waveforms of the transistors under the same bridge arm are symmetrical, so all the switches in the dual active bridge resonant converter can achieve soft switching when working in reverse. The conditions that need to be met to achieve zero voltage turn-on of all switches are shown in the following formula:

[0119] ,

[0120] At different power levels and voltage levels, the output capacitance of the switch tube will change, and the energy required for the switch tube to achieve zero voltage turn-on will also be different. The detection current size and dead time should be changed according to the working conditions and main circuit hardware parameters for optimization.

[0121] In addition, the present invention also proposes a digital control system based on a dual active bridge resonant converter, characterized in that the system is used to implement the charge control method based on the dual active bridge resonant converter according to claims 1-4, and the digital control system based on the dual active bridge resonant converter includes a circuit design block diagram as shown in FIG. Figure 14 As shown:

[0122] Resettable integral circuit Figure 15 As shown: It consists of two-stage operational amplifiers OP1, OP2, and an integral capacitor C i , sampling resistor R s , input resistance R 1. R i 、 Feedback resistor R 2 and reset switch; the current transformer CT extracts the resonant current signal with a ratio of 1:N, and the sampling resistor R s Convert to voltage signal v s The voltage signal passes through the first-stage reverse amplifier OP1 and the first-stage integrating amplifier OP2 in turn, converting the integral charge information of the current into the integral capacitance C i Voltage information on v Ci ; The OP2 non-inverting input terminal is connected to a DC voltage V ramp Realize slope compensation and generate current equivalently through superposition theorem I ramp Integrate and finally output a voltage signal including DC bias, slope compensation and current integration v sum; Used to convert the resonant current signal into an integrated voltage, realize charge quantization and slope compensation to provide key signals for control;

[0123] Current detection circuit such as Figure 16 As shown: It includes a scaling unit, a DC bias superposition module and a signal conditioning circuit; the scaling unit directly uses the voltage signal output by the integration circuit v ct , an AC signal consistent with the resonant current waveform is added with a voltage through a DC bias superposition module V bias It is converted into a positive value, filtered and amplified by the signal conditioning circuit, and output to the digital controller for zero voltage turn-on detection and zero-crossing detection. It is used to detect the instantaneous value of the resonant current to achieve zero voltage turn-on of the switch tube, and at the same time process the signal to adapt it to the subsequent digital controller. The resonant cavity current collected by the current transformer is processed by the high-speed comparator in the current detection circuit and the sampling result is processed and combined with the subsequent DSP to dynamically adjust the current value required for soft switching according to the comparison result, so that the resonant cavity needs to have a large enough current in the dead time before the switch tube is turned on to offset the junction capacitance charge, thereby achieving full-range soft switching.

[0124] Digital controller: It is composed of a digital signal processor (DSP) and a complex programmable logic device (CPLD). The DSP integrates an analog-to-digital converter (ADC) module, four digital-to-analog converter (DAC) modules, four high-speed comparators, and a PI regulation unit for sampling voltage and current signals and performing loop calculations. The CPLD includes an edge detection module, a state machine module, and a dead zone complementary module for converting the DSP output signal into a complementary PWM wave with a dead zone to control the operation of the switch tube.

[0125] Furthermore, the amplification factors of the two-stage operational amplifiers OP1 and OP2 in the resettable integration circuit are K 1. K 2 are:

[0126] .

[0127] Furthermore, the reset switch in the resettable integration circuit is controlled by the reset signal res output by the digital controller, which is used to reset the integration capacitor. C i Discharge operation, in half a cycle, the integral capacitor C i Synchronous integration is performed during the time when the switches S1 and S4 are turned on together, and the voltage is quickly discharged to 0V during the rest of the time, and is maintained at 0V when res is high.

[0128] Furthermore, the ADC module in the digital controller samples the output currenti o And with the set current I ref Make the difference and output the calculation result through the PI module loop V th , then converted into analog quantity by DAC and connected to the inverting input of high-speed comparator 1, and the non-inverting input of high-speed comparator 1 is connected to the external charge information signal v sum , the schematic diagram is as follows Figure 17 When the charge information signal v sum Reaching the threshold voltage V th When , the output rising edge pulse signal CMP_OUT1 of the high-speed comparator 1 is used as the trigger signal of the CPLD, and the CPLD controls the shutdown of S4 and the opening of S3. Here, the DSP does not directly generate the PWM wave.

[0129] Furthermore, the non-inverting input terminals of the high-speed comparator 2 and the high-speed comparator 3 in the digital controller are connected to the resonant current detection signal terminals of the two nodes. V t1 and V t6 , after conversion, they represent t 1 moment and t The resonant current value at time 6 is obtained by adjusting the DAC output value of the inverting input terminal of comparator 2 and comparator 3, such as Figure 18 As shown, the resonant current value at the turn-on moment of the switch tubes S1 and S2 can be controlled, thereby realizing the soft switching of the low-voltage side switch tubes S1 and S2; the inverting input terminal of the comparator 4 is connected to the DC bias voltage V bias , and the non-inverting input is connected to the superimposed V bias The resonant current signal v cmp , by comparison V bias and v cmp , perform zero-crossing detection on the resonant current, such as Figure 19 As shown, the on and off of the switches S5 and S6 are controlled, and the dead time before the switches are turned on is utilized to release the charge of the junction capacitance before the switches are turned on, thereby achieving soft switching of the high-voltage side switches S5 and S6.

[0130] Furthermore, the operation of the CPLD in the digital controller is as follows: first, the pulse signal generated by the edge detection module is used as a trigger signal to drive the state machine module to generate a PWM wave. The PWM wave is the original PWM wave of all switching tubes and the reset signal res. The original PWM wave is a complementary square wave signal with a duty cycle of 50%, but does not include dead time. Then the dead zone module inserts a delay at the rising edge of the original PWM signal, and finally generates two complementary PWM waves with dead zones.

[0131] The internal schematic diagram of CPLD contains three main modules: edge detection module (Edge Detect), state machine module (State Machine) and dead band complementary module (Dead Band), such as Figure 20 When pulse signals from the digital signal processor (DSP) comparator are input to the CPLD, these signals cannot be directly used by the CPLD. Therefore, the edge detection module plays a key role. Its function is to convert rising or falling edge signals into triggerable pulse signals. These trigger signals then act on the state machine module.

[0132] Then, the state machine module starts working, and its main function is to generate the original PWM wave. The pulse signal generated by the edge detection module is used as a trigger signal to drive the state machine module to generate PWM waves. These PWM waves are all switching tubes and reset signals. res The original PWM wave is a complementary square wave with a 50% duty cycle, but does not include dead time. The original PWM wave is fed into the dead time module for processing. The dead time module inserts a delay on the rising edge of the original PWM signal to generate two complementary PWM waves with dead time.

[0133] Furthermore, the working principle of the state machine module will be described in detail below.

[0134] The internal principle design block diagram of the state machine is as follows Figure 21 As shown in the figure, the state machine mainly works in four states: the first state is the First Stage state, the second state is the Second Stage state, the third state is the Third Stage state and the fourth state is the Fourth Stage state. Each state represents the on / off state of the switch tube. Initially, the state machine is in the FirstStage state. At this time, the switch tube S 1 and S 4 is turned on, and the counters Count1 and Countq1 start counting automatically from 0 until they receive the edge signal Edge_D1 indicating that the charge integral reaches the threshold. The state machine then enters the Second Stage state. S4 transistors are turned off and counters Count2 and Countq1 are cleared. In the Second Stage state, Count1 continues to count until it reaches the maximum value PRD_MAX or receives the edge signal Edge_D3 of the current detection and Count1 is greater than the minimum count PRD_MIN, then counter Count1 stops counting and the state machine enters the Third Stage state. In the Third Stage state, S 1 and S 4 are all turned off, and counters Count2 and Countq2 start counting automatically from 0 until the count value of counter Countq2 reaches the value before counter Countq1 stops, and the state machine enters the Fourth Stage state. In the Fourth Stage state, S 4 is turned on, counters Count1 and Countq2 are cleared, and counter Count2 continues counting until it reaches the maximum value MAX or receives the edge signal Edge_D2 of the current detection and Count2 is greater than the minimum count PRD_MIN. Then counter Count2 stops counting and the state machine returns to the First Stage state.

[0135] In addition, if the current detection edge signal Edge_D3 is detected in the First Stage state, the state machine will skip the Second Stage state and directly enter the Third Stage state; if the current detection edge signal Edge_D2 is detected in the Third Stage state, the state machine will skip the Fourth Stage state and directly return to the First Stage state.

[0136] The CLPD in the digital controller completes the switching frequency limit function by setting the counting range of the counter. The waveform output by the state machine is as follows Figure 22 As shown in the figure, both counters Count1 and Count2 use up-counting mode, counting once per clock cycle. In the first half of the cycle, counter Count1 starts counting from 0. If counter Count1 reaches the maximum count value PRD_MAX without receiving the trigger signal Edge_D2, counter Count1 resets and enters the second half of the cycle, thereby limiting the upper frequency limit. If the trigger signal Edge_D2 is received during the counting process and the current count value is greater than the minimum count value PRD_MIN, counter Count1 immediately resets and enters the second half of the cycle. If the count value is still less than PRD_MIN when the trigger signal Edge_D2 is received, counter Count1 continues counting until it reaches PRD_MIN, thereby limiting the lower frequency limit.

[0137] In other words, only when the trigger signal Edge_D2 falls between the maximum count value PRD_MAX and the minimum count value PRD_MIN, the counter Count1 will be reset and enter the next half cycle. Figure 23 The value of PRD_MIN corresponds to the minimum half cycle, which is also the upper limit of the frequency; the value of PRD_MAX corresponds to the maximum half cycle, which is also the lower limit of the frequency. The working process of counter Count2 is similar to that of counter Count1 and will not be described in detail. Counter Count1 and counter Count2 are used to generate the switching transistor S 1 and S 2's original PWM wave signal.

[0138] The dynamic response waveform of the charge-controlled forward loading is as follows: Figure 23 As shown, direct phase-shift frequency conversion control changes the transmission power by directly changing the phase-shift angle and frequency through feedback, while charge control changes the charge integral, causing the phase-shift angle and switching frequency to change passively, and the transmission power to change accordingly. Under load, compared to the direct frequency conversion control method, the dual active bridge resonant converter using charge control has a significant improvement in dynamic response. It can be seen that it only takes a transient time of 150us to switch from 250W steady state to 500W steady state, which is 3.945ms faster than the direct phase-shift frequency conversion control method. The peak value of the resonant inductor current is 5.62A, which is 4.38A smaller than the direct phase-shift frequency conversion control method. The peak value of the resonant capacitor voltage is 273V, which is 137V smaller than the direct phase-shift frequency conversion control method.

[0139] The performance difference between charge control and direct phase-shift frequency conversion control is shown in Table 4.1.

[0140] Table 4.1 Comparison of charge control and direct phase-shift frequency conversion control

[0141]

[0142] The table compares the performance of dual-active-bridge resonant converters using direct phase-shift frequency conversion control and charge control. It shows that, during the half-load to full-load switching process, charge control reduces dynamic response time by 96.25%, resonant current stress by 30.6%, and resonant capacitor voltage stress by 33.4%, compared to direct phase-shift frequency conversion control. During the full-load to half-load switching process, charge control reduces dynamic response time by 96.25%, resonant current stress by 1.79%, and resonant capacitor voltage stress by 30.77%, compared to direct phase-shift frequency conversion control. Regardless of loading or unloading conditions, the voltage and current peaks of the charge-controlled dual-active-bridge resonant converter do not exceed the full-load rating during transients.

[0143] The technical means disclosed in the solutions of the present invention are not limited to those disclosed in the above-mentioned embodiments, but also include technical solutions composed of any combination of the above-mentioned technical features. It should be noted that those skilled in the art may make various improvements and modifications without departing from the principles of the present invention, and such improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A charge control method based on a dual active bridge resonant converter, characterized in that: The dual active bridge resonant converter, i.e. the main circuit, has bidirectional power transmission capability. Its topology includes: a DC voltage source V1, a DC voltage source V2, an input capacitor C on the DC voltage source V1 side, and a in , the input capacitor C on the DC voltage source V2 side o , an H full-bridge circuit on the primary side, a half-bridge circuit on the secondary side, a high-frequency transformer T in the middle and a resonant cavity. The primary side is composed of switch tubes S1, S2, S3 and S4 to form an H full-bridge, and the secondary side is composed of switch tubes S5 and S6 to form a half-bridge. The switch tubes each have a parasitic capacitance C s1 , parasitic capacitance C s2 , parasitic capacitance C s3 , parasitic capacitance C s4 , parasitic capacitance C s5 , parasitic capacitance C s6 and anti-parallel diodes, the transformer ratio is 1:n, and the resonant cavity consists of a resonant capacitor C r and a resonant inductor L r The two switching tubes in each bridge arm are complementary turned on with a 50% duty cycle, and a dead time of 0.45μs is given on the primary side and a dead time of 0.65μs is given on the secondary side. The input voltage and output voltage are modulated at high frequency to obtain the midpoint voltage between the primary side inverter full bridge and the voltage v converted to the secondary side by the transformer. ab And the bridge midpoint voltage v of the secondary full bridge cd , it is defined that the power transmission from the DC voltage source V1 to V2 is the forward transmission mode, and the power transmission from the DC voltage source V2 to the DC voltage source V1 is the reverse transmission mode; The charge control method is implemented by the following steps: Step S1: The resettable integration circuit samples the resonant current i through the current transformer. L and through the sampling resistor R s Integrate it and convert it into a voltage signal v s , and then generate an integral voltage v that is linearly related to the charge injection amount Q through the integrating operational amplifier Ci , and ensure that before each charge injection, the integrating capacitor C i Rapidly discharge to 0V by reset signal; Step S2: v Ci With the ramp voltage v Cramp Superposition generates superposition signal v sum ; Step S3: The comparator in the control circuit superimposes the signal v sum The threshold value v of the current loop output th For comparison, when v sum Reach v th When the logic module is triggered to generate the corresponding PWM signal, the converter is switched to one of the four working modes. The four working modes together constitute a complete cycle. The threshold value v th is the output of the PI regulator, and the input of the PI regulator comes from the output current feedback signal I o With the given current reference value I ref The error I e ; Step S4: The control circuit controls the on and off of the switch in the main circuit according to the generated PWM signal and the corresponding different working modes, and controls the transmission power by dynamically adjusting the switch timing.

2. The charge control method based on the dual active bridge resonant converter according to claim 1, characterized in that: The dual active bridge resonant converter has bidirectional power transmission capability, including operating in a forward power transmission mode to allow energy to flow from the primary side to the secondary side, and operating in a reverse power transmission mode to allow energy to return from the secondary side to the primary side. The forward transmission mode includes four stages: Phase 1, t0 is the starting time, the resonant current i at t0 L is 0A, when i L When crossing zero, the switch tubes S1, S5 and S4 are turned on. At this time, v ab =nV1,v cd =V2 / 2,i L Starting from 0 and increasing in a positive direction, the integral capacitor C i Start charging, at time t1 L The amplitude is the largest when the capacitor voltage and the slope compensation are superimposed to reach the set threshold voltage v th When , the switch tube S4 is turned off, the integral capacitor stops charging and resets, wherein the logic of the drive signal of the switch tube S1 and the switch tube S4 is inverted as the reset signal of the capacitor. The corresponding phase shift angle in this stage is φ. In stage 1, the resonant current integration generates a charge amount Q1, which is used for charge control; Phase 2: Switches S1, S3, and S5 are turned on, and S4 is turned off. The integral capacitor C i Rapid discharge, the voltage drops to 0V, at this time, v ab =0,v cd =V2 / 2, the resonant current continues to resonate until the resonant current crosses zero at time t2, the positive half cycle ends, and the resonant current integration in stage 2 generates charge Q2; Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The switch tube action in this phase is symmetrical with that in phase 1. Switch tubes S1, S5, and S4 are turned off, and v ab =-nV1,v cd =-V2 / 2, resonant current i L Increasing in the opposite direction, at time t3 i L When the amplitude is the largest, the integrating capacitor no longer performs the integrating operation and remains at 0V. The charge is 0, and the counter is used to count to achieve the time symmetry between stage 3 and stage 1. Phase 4: The switch tubes in this phase are symmetrical to those in phase 2. Switch tubes S1, S3, and S5 are turned off, and switch tube S4 is turned on. ab =0,v cd =-V2 / 2, the resonant current continues to resonate until the current crosses zero at time t4, completing a complete switching cycle.

3. The charge control method based on the dual active bridge resonant converter according to claim 2, characterized in that: The reverse transmission mode consists of four stages: Phase 1, t0 is the starting time, the resonant current i at t0 L is 0A, when i L When crossing zero, the switch tubes S1, S5 and S3 are turned on. At this time, v ab =nV1,v cd =V2 / 2,i L Starting from 0 and increasing in reverse, the integral capacitance C i Start charging, at time t1 L The amplitude is the largest when the capacitor voltage and the slope compensation are superimposed to reach the set threshold voltage v th When , switch S3 is turned off and switch S4 is turned on, the integral capacitor stops charging and resets. The logic of the drive signals of switch S1 and switch S3 is inverted as the reset signal of the capacitor. The corresponding phase shift angle in this stage is φ. The resonant current integration generates a charge Q2 for charge control. In stage 2, the switch tube S3 is turned off, the switch tubes S1, S5 and S4 are turned on, and the integral capacitor C i Rapid discharge, the voltage drops to 0V, at this time, v ab =0,v cd =V2 / 2, the resonant current continues to resonate until the resonant current crosses zero at time t2, the positive half cycle ends, and the resonant current integration in stage 2 generates charge Q1; Phase 3: When the resonant current changes from positive to negative, it enters the second half cycle. The switch tube action in this phase is symmetrical with that in phase 1. Switch tubes S1, S5, and S3 are turned off, and v ab =-nV1,v cd =-V2 / 2, resonant current i L Positive increase, t3 time i L The amplitude is the largest, but the integrating capacitor no longer integrates, and the counter is used to count to achieve the time symmetry between stage 3 and stage 1; Phase 4: The switch tube action in this phase is symmetrical to that in phase 2. Switch tube S3 is turned on, and switch tubes S1, S5, and S4 are turned off. ab =0,v cd =-V2 / 2, the resonant current continues to resonate until the current crosses zero at time t4, completing a complete switching cycle.

4. The charge control method based on the dual active bridge resonant converter according to claim 1, characterized in that: The four working mode steady-state trajectory models in step S3 are: [V CrN -(1-V oN / 2n)] 2 +i 2 LN =[V Cr0N -(1-V oN / 2n)] 2 +I 2 L0N (V CrN -V oN / 2n) 2 +i 2 LN =(V Cr1N -V oN / 2n) 2 +I 2 L1N [V CrN +(1-V oN / 2n)] 2 +i 2 LN =[V Cr2N +(1-V oN / 2n)] 2 +I 2 L2N (V CrN +V oN / 2n) 2 +i 2 LN =(V Cr3N +V oN / 2n) 2 +I 2 L3N Among them, V CrN is the resonant capacitor voltage, V oN is the ratio of output voltage to input voltage, i LN is the normalized resonant current, V Cr0N and I L0N is the normalized initial value of capacitor voltage and inductor current at time t0, V Cr1N and I L1N is the normalized initial value of capacitor voltage and inductor current at time t1, V Cr2N and I L2N is the normalized initial value of capacitor voltage and inductor current at time t2, V Cr3N and I L3N are the normalized initial values ​​of the capacitor voltage and inductor current at time t3.

5. A digital control system based on a dual active bridge resonant converter, characterized in that: The system is used to implement the charge control method based on the dual active bridge resonant converter according to any one of claims 1 to 4, and the digital control system based on the dual active bridge resonant converter includes: Resettable integration circuit: consists of two-stage operational amplifier OP1, two-stage operational amplifier OP2, and integration capacitor C i , sampling resistor R s , input resistor R1 and input resistor R i , feedback resistor R2 and reset switch; the current transformer CT extracts the resonant current signal with a ratio of 1:N, and the sampling resistor R s Converted into voltage signal v s The voltage signal passes through the first-stage reverse amplifier OP1 to obtain a scaled voltage signal v ct , and then through the first-level integrating operational amplifier OP2, the integrated charge information of the current is converted into the integral capacitor C i Voltage information v Ci ; The OP2 non-inverting input terminal is connected to the DC voltage V ramp Implement slope compensation and generate current I equivalently through superposition theorem ramp Integrate and finally output a voltage signal v including DC bias, slope compensation and current integration sum ; Used to convert the resonant current signal into an integrated voltage, realize charge quantization and slope compensation to provide key signals for control; Current detection circuit: includes a scaling unit, a DC bias superposition module and a signal conditioning circuit; the scaling unit directly uses the voltage signal v output by the resettable integration circuit ct , add voltage V through DC bias superposition module bias It is converted into a positive value, and then filtered and amplified by the signal conditioning circuit and output to the digital controller. The digital signal processor DSP dynamically adjusts the current value required for soft switching according to the comparison result to achieve zero voltage opening, that is, to achieve soft switching. The voltage signal v ct The voltage signal is scaled by the resonant cavity current and is consistent with the resonant current waveform; Digital controller: It is composed of a digital signal processor (DSP) and a complex programmable logic device (CPLD). The DSP integrates an analog-to-digital converter module (ADC module), four digital-to-analog converter modules (DAC modules), four high-speed comparators, and a PI adjustment unit for sampling voltage and current signals and performing loop calculations. The CPLD includes an edge detection module, a state machine module, and a dead zone complementary module for converting the DSP output signal into a complementary PWM wave with a dead zone to control the operation of the switch tube.

6. The digital control system based on the dual active bridge resonant converter according to claim 5, characterized in that: The amplification factors K1 and K2 of the two-stage operational amplifiers OP1 and OP2 in the resettable integration circuit, and the output voltage signal v sum They are: K1=R2 / R1 K2=1 / R i Where, k is the amplification factor from the resonant current to the integral capacitor voltage, i L is the resonant current, R i is the input resistance, and t1 is the termination time of phase 1.

7. The digital control system based on the dual active bridge resonant converter according to claim 5, characterized in that: The reset switch in the resettable integration circuit is controlled by the reset signal res output by the digital controller, and is used to reset the integration capacitor C i Discharge operation, in half a cycle, the integrating capacitor C i Synchronous integration is performed during the time when the switch tubes S1 and S4 are both turned on, and the voltage is quickly discharged to 0V during the rest of the time, and maintained at 0V when res is high.

8. The digital control system based on the dual active bridge resonant converter according to claim 5, characterized in that: The ADC module in the digital controller samples the output current i o And with the set current I ref The result of the calculation is output through the PI module loop V th , and then converted into analog quantity by DAC and connected to the inverting input of high-speed comparator 1, and the non-inverting input of high-speed comparator 1 is connected to the external charge information signal v sum , when the charge information signal v sum Reaching the threshold voltage V th When , the output rising edge pulse signal CMP_OUT1 of the high-speed comparator 1 is used as the trigger signal of the CPLD, and the CPLD controls the shutdown of S4 and the opening of S3. Here, the DSP does not directly generate the PWM wave.

9. The digital control system based on the dual active bridge resonant converter according to claim 5, characterized in that: The inverting input terminals of the high-speed comparator 2 and the high-speed comparator 3 in the digital controller are respectively connected to the resonant current detection signals V t1 and V t6 , after conversion, represent the resonant current values ​​at time t1 and time t6 respectively. By adjusting the DAC output values ​​of the inverting input terminals of comparators 2 and 3, the resonant current values ​​at the turn-on time of switches S1 and S2 are controlled to achieve soft switching of switches S1 and S2. The inverting input terminal of comparator 4 is connected to the DC bias voltage V bias , the non-inverting input is connected to the superimposed V bias The resonant current signal v cmp , by comparing V bias With v cmp , perform zero-crossing detection on the resonant current, control the on and off of the switch tubes S5 and S6, and use the dead time before the switch tube is turned on to release the charge of its junction capacitance before the switch tube is turned on, thereby realizing soft switching of the switch tubes S5 and S6.

10. The digital control system based on the dual active bridge resonant converter according to claim 5, characterized in that: The CPLD in the digital controller works as follows: first, the pulse signal generated by the edge detection module is used as a trigger signal to drive the state machine module to generate a PWM wave. The PWM wave is the original PWM wave of all switch tubes and the reset signal res. The original PWM wave is a complementary square wave signal with a duty cycle of 50%, but does not contain dead time. Then, the dead zone module inserts a delay at the rising edge of the original PWM signal, and finally generates two complementary PWM waves with dead zones.

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