Tamper-proof encryption transmission system based on quantum random number and chaotic signal

Abstract

This invention discloses a tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals. It obtains a publicly verifiable random number beacon source from the network and sets it as a random number beacon sequence. It pre-stores a unique private key and physical anti-tampering mechanisms for the device. The system reads the random number beacons from a local buffer storage module, generates a dynamic session key based on the device's unique private key and the random number beacons, converts it into an analog control voltage, and controls an analog chaotic oscillator to generate a chaotic carrier signal. The information to be transmitted is hidden within the chaotic carrier signal, and a data packet containing beacon index information is sent. The receiving end obtains a matching random number beacon based on the beacon index information in the data packet, generates a chaotic carrier signal synchronized with the transmitting end, and reconstructs the original transmitted information. By using verifiable true random numbers as a globally synchronized time-varying entropy source, combined with the locally stored dynamic session key, it drives an analog chaotic circuit to generate unpredictable carrier signals, achieving confidential information transmission.

Description

Technical Field

[0001] This invention belongs to the field of secure communication and information security technology, and in particular relates to an anti-tampering encrypted transmission system based on quantum random numbers and chaotic signals. Background Technology

[0002] Chaotic algorithms are extremely sensitive to initial values ​​and parameters, exhibiting high randomness and unpredictable iteration results, which aligns well with the field of information security technology. Therefore, they have been commonly used in encryption in recent years. Existing secure communication and random number generation technologies have evolved from pseudo-random algorithms to truly random physical methods, mainly including the following three technical approaches, whose product structures, working principles, and limitations are as follows: (1) Early chaotic communication systems (such as patent CN120529025A) use computer software algorithms (such as linear congruential method, Logistic mapping) to generate pseudo-random sequences as initial values ​​for chaotic systems. They have the characteristics of low cost and simple implementation; however, randomness depends on the seed, and the essence is a deterministic sequence, which is vulnerable to phase space reconstruction attacks. (2) Patent application number CN117835227A discloses a secure information transmission method, device, system and storage medium. It discloses chaotic sequence encryption information, and transmits "encrypted information" and "chaotic sequence parameters" through channels to improve the security of wireless communication and channel utilization. However, it does not mention the timeliness of timestamps / random numbers, making it difficult to resist replay attacks. (3) Patent application number CN100495958C discloses a chaotic encrypted communication cryptographic stream parameter control device and anti-damage method. It adopts a combination of hardware and software for chaotic encryption parameter control (computer circuit board), with redundant storage of cryptographic stream parameters, resistance to electrical shock / interference, and dynamic access parameters to improve anti-attack capability. However, it does not mention the latency problem of wireless transmission, and there is no time stamp / random number involved, making it difficult to avoid replay attacks.

[0003] In summary, existing chaotic encryption transmission schemes cannot simultaneously address the following core pain points: First, they cannot achieve global key synchronization between the sending and receiving ends without exchanging keys via a channel; second, they cannot achieve dynamic "one-time pad" changes in chaotic system parameters, making them vulnerable to phase space reconstruction attacks over long-term operation; third, private key storage lacks a physical-level anti-tampering and self-destruct mechanism, posing a risk of key leakage; and fourth, they lack an effective hardware tolerance compensation mechanism, making the simulated chaotic circuit prone to synchronization failure due to component differences. This invention proposes a complete solution to these pain points. Summary of the Invention

[0004] In view of this, the present invention provides a tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals. It uses publicly verifiable true random numbers as a globally synchronized time-varying entropy source, combined with a "tamper-proof unique private key" stored locally on the device, to generate a "one-time pad" session key, which then drives an analog chaotic circuit to generate an unpredictable carrier signal to achieve confidential information transmission. The specific technical solution adopted is as follows.

[0005] This invention provides a tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals, including a transmitter and a receiver that communicate with each other; The transmitter includes: The public entropy source acquisition module is used to acquire publicly verifiable public random number beacon sources on the network and configure the public beacon sources as random number beacon sequences; A local buffer storage module is used to pre-store the random number beacon sequence for real-time retrieval; The security key management module is used to store the device's unique private key and physical anti-tampering mechanisms to prevent the private key from being read illegally; The session key generation module is used to read a random number beacon at a preset time from the local buffer storage module, and generate a dynamic session key based on the device's unique private key and the random number beacon; An analog chaotic encryption circuit includes a digital-to-analog converter and an analog chaotic oscillator. The digital-to-analog converter converts the dynamic session key into an analog control voltage and controls the parameters of the analog chaotic oscillator according to the analog control voltage to generate a corresponding chaotic carrier signal. A signal modulation and transmission module is used to hide the information to be transmitted in the chaotic carrier signal and send a data packet containing beacon index information corresponding to the chaotic carrier signal. The receiving end is used to obtain a random number beacon of the same origin based on the beacon index information in the data packet, generate a chaotic carrier signal synchronized with the transmitting end, and restore the chaotic carrier signal to obtain the original transmission information.

[0006] As a preferred embodiment of the above technical solution, obtaining a publicly verifiable public beacon source on the network and configuring the public beacon source as a random number beacon sequence includes: The common beacon source is adopted based on quantum physics entropy sources or quantum tube noise. Obtain multiple verifiable random values ​​from the public beacon source; Construct a random number beacon sequence corresponding to the multiple random values.

[0007] As a preferred embodiment of the above technical solution, the random number beacon sequence includes a random value, a timestamp, and a pulse index. The random value is a 512-bit true random number generated by a physical entropy source. The timestamp is used to indicate the precise time when the random value was generated. The pulse index represents the unique number of the pulse in the sequence and is used for precise synchronization between the receiver and the transmitter.

[0008] As a preferred embodiment of the above technical solution, the execution process of the local buffer storage module includes: When the device is idle or charging, it can pre-download the currently generated public beacon data packets with time series via the network API unit for later use; Downloaded public beacon data packets are written into the cache chip to build a circular buffer; When data needs to be sent, the microcontroller reads the random number seed corresponding to the current time window from the cache chip through the high-speed SPI interface and performs zero-delay calling.

[0009] As a preferred embodiment of the above technical solution, the storage device's unique private key and physical anti-tampering mechanism prevent the private key from being illegally read, including: The device's unique private key is used as the root of trust to perform one-way derivation of the dynamic session key, and an anti-tampering storage mechanism is set up. The transmitter and receiver share a private key K_private stored inside the device. The private key K_private is used to drive the session key K_session of the chaotic circuit. The session key K_session is generated by the following algorithm: K_session = HMAC-SHA256(K_private, R_public), where K_private represents the device private key, which is stored in the backup register of the main control chip or the security chip; HMAC represents the hash message authentication code, HMAC-SHA256 represents the message authentication code algorithm based on the hash function; and R_public represents a public random number. The backup register is powered by the VBAT pin of an independent battery. The main control chip is connected to a micro switch or photoresistor on the device via a TAMP pin. When the device casing is disassembled, the micro switch releases and triggers a jump in the TAMP pin level of the main control chip. When an attacker connects a debugger, the main control chip automatically clears or erases all data in the backup register, and the device private key becomes zero or random gibberish. The security chip includes an active metal mesh disposed on the chip surface. When subjected to laser cutting or probe detection, the active metal mesh is damaged, causing the charge distribution to collapse and data to be lost. The main control chip sends R_public to the security chip.

[0010] As a preferred embodiment of the above technical solution, the main control chip calls mbedTLS or a hardware encryption library to perform SHA-256 operations, including: Padding: If the length of K_private is insufficient, padding is performed on K_private to obtain K_private'; Internal hash: Perform an internal hash operation on K_private' to obtain the result of the internal hash operation. The corresponding expression is: H((K_private' XOR opad) || H((K_private' XOR ipad) || R_public)), where H() represents hash operation, XOR represents XOR operation, opad represents external padding, and ipad represents internal padding. Output truncation: Generate a 256-bit hash value based on the internal hash operation result, and use the hash value as the session key K_session.

[0011] As a preferred embodiment of the above technical solution, the execution process of the simulated chaotic encryption circuit includes: Key component mapping: The 256-bit K_session is divided into multiple control components and output as multiple analog voltages through a digital-to-analog converter (DAC). These analog voltages are represented as V_k1, V_k2...V_kn, with the corresponding expressions: V_k1 = DAC(K_session[0:3]), V_k2 = DAC(K_session[4:7]). Analog voltages are introduced as perturbation terms into the standard Lorenz equation, and the equation simulating the physical state (x, y, z) of the chaotic encryption circuit as a function of time t is: dx / dt = σ. (yx)+V_k1,dy / dt=x (ρ-z)-y+V_k2,dz / dt=x y-β z, where typical parameters are: σ=10, ρ=28, β=8 / 3; x, y, z represent chaotic trajectories, and dx / dt represents the derivative of x with respect to time; when an attacker intercepts the signal and calculates that V_k1 has an error, the reconstructed chaotic waveform will have an error and the decryption will fail. Signal Scrambling and Transmission: The output state variable of the simulated chaotic encryption circuit is preset to be a chaotic masking carrier, denoted as C(t); the active signal S(t) to be transmitted is superimposed with the chaotic masking carrier, and the corresponding expression is T(t) = S(t) + γ. C(t), where T(t) is the signal transmitted through the antenna, γ represents the masking coefficient, and the power of chaotic noise is greater than that of the useful signal; the data packet includes a header, a plaintext index, and simulated ciphertext.

[0012] As a preferred embodiment of the above technical solution, the decryption process at the receiving end includes: The receiving end splits the received analog signal into two paths: one path enters the digital demodulation module to obtain the pulse index of the header, and the other path enters the analog signal delay unit for physical buffering. According to the pulse index, the corresponding R_public is extracted from the local buffer storage module, and K_private is read from the backup register of the security chip or the main control chip; K_session is obtained by performing HMAC-SHA256 operation based on R_public and K_private; The digital-to-analog converter outputs voltages V_k1 and V_k2. The chaotic circuit at the receiving end generates the same chaotic waveform C'(t) as the transmitting end under the drive of V_k1 and V_k2. Once the chaotic waveform C'(t) has stabilized, the analog signal delay unit outputs a buffered analog signal T(t). According to the chaos synchronization theorem, the original signal S'(t) is restored using signal subtraction. The expression for signal subtraction is S'(t) = T(t) - γ. C'(t).

[0013] As a preferred embodiment of the above technical solution, a hardware tolerance compensation mechanism is also included: during the system power-on initialization phase, the transmitting end sends a preset known test sequence; the receiving end receives and decrypts the known test sequence, compares the error between the decryption result and the known test sequence, and fine-tunes the bias voltage output by the digital-to-analog converter in the receiving end according to the error, so as to compensate for the hardware component tolerance of the analog chaotic circuit at both ends of the transmitting and receiving ends, and realizes chaotic soft synchronization at the physical layer.

[0014] As a preferred embodiment of the above technical solution, the public entropy source acquisition module is compatible with the local quantum random number generation unit. The local quantum random number generation unit can adopt a true random number generator based on quantum physical entropy sources such as quantum tunneling effect and quantum photon counting. The generated true random number sequence can replace the public random number beacon source for dynamic session key generation in offline environments without network access.

[0015] This invention provides a tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals. It comprises a public entropy source acquisition module, a local buffer storage module, a secure key management module, a session key generation module, a simulated chaotic encryption circuit, and a signal modulation and transmission module. The system acquires a publicly verifiable public random number beacon source from the network and configures it as a random number beacon sequence. It pre-stores the device's unique private key and a physical anti-tampering mechanism to prevent unauthorized reading of the private key. It reads random number beacons at preset times from the local buffer storage module and generates a dynamic session key based on the device's unique private key and the random number beacons. The dynamic session key is converted into an analog control voltage, which controls the parameters of a simulated chaotic oscillator to generate a chaotic carrier signal. The information to be transmitted is hidden within the chaotic carrier signal, and a data packet containing beacon index information is sent. A publicly verifiable true random number is used as a globally synchronized time-varying entropy source. Combined with the device's locally stored "tamper-proof unique private key," a "one-time pad" session key is generated, thereby driving the simulated chaotic circuit to generate an unpredictable carrier signal for confidential information transmission, improving the security and reliability of data transmission. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 The structural block diagram of the tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals provided by the present invention; Figure 2 The circuit schematic diagram of the common entropy source acquisition module provided by the present invention; Figure 3 The circuit schematic diagram of the local buffer storage module provided by the present invention; Figure 4 The circuit schematic diagram of the security key management module provided by the present invention; Figure 5 The circuit schematic diagram of the simulated chaotic encryption circuit provided by the present invention; Figure 6 The circuit schematic diagram of the signal modulation and transmission module provided by the present invention; Figure 7 A simulation diagram of the chaotic encryption circuit provided by this invention. Detailed Implementation

[0018] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0019] See Figure 1 This invention provides a tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals, including a transmitter and a receiver that communicate with each other; The transmitter includes: The public entropy source acquisition module is used to acquire publicly verifiable public random number beacon sources on the network and configure the public beacon sources as random number beacon sequences; A local buffer storage module is used to pre-store the random number beacon sequence for real-time retrieval; The security key management module is used to store the device's unique private key and physical anti-tampering mechanisms to prevent the private key from being read illegally; The session key generation module is used to read a random number beacon at a preset time from the local buffer storage module, and generate a dynamic session key based on the device's unique private key and the random number beacon; An analog chaotic encryption circuit includes a digital-to-analog converter and an analog chaotic oscillator. The digital-to-analog converter converts the dynamic session key into an analog control voltage and controls the parameters of the analog chaotic oscillator according to the analog control voltage to generate a corresponding chaotic carrier signal. A signal modulation and transmission module is used to hide the information to be transmitted in the chaotic carrier signal and send a data packet containing beacon index information corresponding to the chaotic carrier signal. The receiving end is used to obtain a random number beacon of the same origin based on the beacon index information in the data packet, generate a chaotic carrier signal synchronized with the transmitting end, and restore the original transmission information.

[0020] In this embodiment, obtaining a publicly verifiable public beacon source and configuring it as a random number beacon sequence includes: using a quantum physical entropy source or quantum tube noise as the public beacon source; obtaining multiple verifiable random values ​​from the public beacon source; and constructing a random number beacon sequence corresponding to the multiple random values. The random number beacon sequence includes a random value, a timestamp, and a pulse index. The random value is a 512-bit true random number generated by a physical entropy source. The timestamp indicates the precise time the random value was generated, and the pulse index represents the unique number of the pulse in the sequence and is used for precise synchronization between the receiver and transmitter. To solve the problem of achieving "key synchronization" between the transmitter and receiver without exchanging keys through a channel, this system introduces the concept of a "random number beacon." A public random number beacon is a public service that periodically broadcasts unpredictable random numbers with timestamps and digital signatures. Specifically, the NIST Randomness Beacon (based on quantum physics entropy sources) or Drand (a distributed entropy consortium based on quantum tube noise) is used as the public beacon source. The core of the entropy source adopts a "randomness beacon" architecture based on the NIST IR 8213 standard. According to NIST's definition, a randomness beacon is a public service whose main function is to create and publish new random numbers at regular time intervals. These random numbers are not generated internally by the system but are broadcast through public channels, allowing any internet user to obtain and verify them.

[0021] It should be noted that the execution process of the local buffer storage module includes: when the device is idle or charging, it pre-downloads currently generated public beacon data packets with time series via network API calls for backup; the downloaded public beacon data packets are written into the cache chip to construct a circular buffer; when data needs to be sent, the microcontroller reads the random number seed corresponding to the current time window from the cache chip via the high-speed SPI interface for zero-delay invocation. The basic data unit of the random number beacon output is set as a pulse. Each pulse not only contains the random value itself, but also a series of metadata to ensure data integrity and traceability. A standard pulse typically contains the following key information: a random value (Output Value), a 512-bit true random number generated by a physical entropy source (such as quantum effects); a timestamp (Time), indicating the precise time the random value was generated; and a pulse index, a unique number of the pulse in the random number beacon sequence, used for precise synchronization between the receiver and transmitter. According to the NIST standard, which emphasizes the need for "verifiability" of random numbers, the beacon service uses digital signatures to encrypt and sign each pulse. The verification mechanism in this system is as follows: The receiving end (device) uses the public key of the beacon service to independently verify that the downloaded random value originates from a trusted NIST server and has not been tampered with during transmission; tamper-proof chain: Pulses are interconnected through a hash chain, meaning the current pulse contains the hash value of the previous pulse. This chain structure further ensures the immutability of historical data; any modification to past data will cause all subsequent pulse verifications to fail. The NIST standard explicitly states that a fundamental attribute of beacons is unpredictability, meaning that before a pulse is released, no algorithm or individual (including the beacon operator) can predict future random values. This characteristic perfectly matches the requirement of the encrypted transmission system of this invention for a high-strength key seed, ensuring the physical layer security of the communication process.

[0022] It should be understood that by setting up a public entropy source acquisition module, a local buffer storage module, a security key management module, a session key generation module, a simulated chaotic encryption circuit, and a signal modulation transmission module, a publicly verifiable public random number beacon source is acquired from the network. This public beacon source is configured as a random number beacon sequence, and the random number beacon sequence is pre-stored for real-time invocation. The device's unique private key and physical anti-tampering mechanism are stored to prevent the private key from being illegally read. The random number beacon at a preset time is read from the local buffer storage module, and a dynamic session key is generated based on the device's unique private key and the random number beacon. The dynamic session key is converted into an analog control voltage, and the parameters of the simulated chaotic oscillator are controlled according to the analog control voltage to generate a chaotic carrier signal. The information to be transmitted is hidden in the chaotic carrier signal, and a data packet containing beacon index information is sent. A publicly verifiable true random number is used as a globally synchronized time-varying entropy source. Combined with the "tamper-proof unique private key" stored locally on the device, a "one-time pad" session key is generated, thereby driving the simulated chaotic circuit to generate an unpredictable carrier signal to achieve confidential information transmission, thus improving the security and reliability of data transmission.

[0023] Optionally, the storage device includes a unique private key and physical tamper-proof mechanisms to prevent unauthorized access to the private key, including: The device's unique private key is used as the root of trust to perform one-way derivation of the dynamic session key, and an anti-tampering storage mechanism is set up. The transmitter and receiver share a private key K_private stored inside the device. The private key K_private is used to drive the session key K_session of the chaotic circuit. The session key K_session is generated by the following algorithm: K_session = HMAC-SHA256(K_private, R_public), where K_private represents the device private key, which is stored in the backup register of the main control chip or the security chip; HMAC represents the hash message authentication code, and HMAC-SHA256 represents the message authentication code algorithm based on the hash function; R_public represents the public random number.

[0024] In this embodiment, the backup register is powered by the VBAT pin of an independent battery, and the main control chip is connected to a microswitch or photoresistor on the device via a TAMP pin. When the device casing is disassembled, the microswitch releases, triggering a level change in the TAMP pin of the main control chip. When an attacker connects a debugger, the main control chip automatically clears or erases all data in the backup register, and the device private key becomes zero or random gibberish. The security chip includes an active metal mesh on its surface. When subjected to laser cutting or probe detection, the active metal mesh breaks, causing charge distribution to collapse and data loss. The main control chip sends R_public to the security chip. The device key is 32 bytes (256 bits) long and is stored in the STM32's BKP (backup register) or the security chip, physically tamper-proof. The device key serves as the "Key" for the Hash Message Authentication Code (HMAC), ensuring that only devices possessing this private key can generate the correct session key. Storage with physical tamper-proof storage employs "read-and-burn" and "intrusion self-destruct" mechanisms to ensure physical security.

[0025] Specifically, the STM32 backup domain and intrusion detection process is as follows: The STM32 (the main control chip, i.e., the microcontroller) uses the BKP (backup register) area to store K_private. This area is powered by an independent battery (VBAT pin), ensuring data retention even when the main power is cut off. Trigger mechanism: The tamper-proof encrypted transmission system uses a TAMP (Tamper) pin connected to a microswitch or photoresistor on the device casing. Self-destruct logic: Once an attacker attempts to disassemble the casing, the microswitch is released, and the TAMP pin level changes. The STM32's hardware logic (independent of software) automatically clears / erases all data in the BKP register within nanoseconds. Result: When an attacker connects to the debugger, the private key has become all zeros or random gibberish, making recovery impossible.

[0026] It should be noted that the data acquisition of the common entropy source acquisition module and the buffering strategy of the local buffer storage module are based on the fact that network requests have a delay (millisecond level) while chaotic communication requires extremely high real-time performance (microsecond level). Directly calling the API online cannot meet the requirements. Therefore, a "pre-download-local storage" mechanism is designed. The specific process is as follows: (1) Synchronization stage: When the device (receiver or transmitter) is idle or charging, it downloads the currently generated public beacon data packets with time series in advance for backup; (2) Storage mechanism: The downloaded data (including Pulse_Index and Random_Value) is written into the onboard cache chip (such as W25Q128, 128M-bit Flash) and a circular buffer is constructed; (3) Calling logic: When transmitting chaotic carrier signals, the main control chip (STM32) directly reads the random number seed corresponding to the current time window from the cache chip (such as FLASH) through the high-speed SPI interface to achieve zero-delay calling.

[0027] To prevent the communication key from being predicted or replayed due to the public nature of the public random number beacon (R_public), this system abandons the traditional software-level static cryptography mechanism and introduces a device-unique private key (K_private) with hardware anti-tamper protection as the core trust root to perform one-way derivation of dynamic session keys.

[0028] Specifically, the process of deriving and applying the dynamic session key is as follows: Before each encrypted transmission is initiated, the main control chip or security chip extracts the public random number R_public corresponding to the current time window from the local buffer storage module as the high-frequency dynamic entropy input (Message), and at the same time calls the device's unique private key K_private stored in the device's internal backup register or security chip as the authentication key (Key).

[0029] The system hardware invokes the encryption engine to execute the Hash-based Message Authentication Code (HMAC) algorithm, whose mathematical expression is: K_session = HMAC-SHA256(K_private, R_public). The above process is completed in a closed loop at the device's physical layer, requiring no external interaction and relying on no database comparison. The generated 256-bit hash digest will be directly used as the "one-time pad" dynamic session key K_session. Since the plaintext K_private never leaves the secure storage area and is protected by a "physical intrusion self-destruct mechanism," and R_public is globally verifiable and unpredictable, even if an attacker intercepts a publicly available beacon sequence on the network, without the physical device's internal K_private, they absolutely cannot reverse engineer or forge a legitimate K_session. This ensures the absolute security of the control voltage parameters driving the subsequent simulated chaotic circuit.

[0030] Specifically, the security chip uses dedicated encryption chips such as ATECC608 or DS28E15, and the private key is written and locked at the factory. The surface of the security chip is covered with an active metal mesh (active shielding). If it is laser-cut or probed, the mesh will be damaged, causing the charge distribution to collapse and the data to be lost instantly. Black-box operation: STM32 only sends R_public to the security chip, and the security chip returns the calculated K_session. The plaintext private key never leaves the security chip. Among them, R_public (public random number) is a 512-bit (64-byte) true random number generated by the physical entropy source. It is a NIST or Drand quantum random number read from the local Flash. R_public, as the "Message" of HMAC, provides entropy that changes over time, ensuring that the key for each communication is completely different.

[0031] Optionally, the main control chip calls mbedTLS or a hardware encryption library to perform SHA-256 operations, including: Padding: If the length of K_private is insufficient, padding is performed on K_private to obtain K_private'; Internal hash: Perform an internal hash operation on K_private' to obtain the result of the internal hash operation. The corresponding expression is: H((K_private' XOR opad) || H((K_private' XOR ipad) || R_public)), where H() represents hash operation, XOR represents XOR operation, opad represents external padding, and ipad represents internal padding.

[0032] Output truncation: Generate a 256-bit hash value based on the internal hash operation result, and use the hash value as the session key K_session.

[0033] In this embodiment, the execution process of the simulated chaotic encryption circuit includes: Key component mapping: The 256-bit K_session is divided into multiple control components and output as multiple analog voltages through a digital-to-analog converter (DAC). The multiple analog voltages are represented as V_k1, V_k2...V_kn, and the corresponding expressions are: V_k1=DAC(K_session[0:3]), V_k2 = DAC(K_session[4:7]); Introducing a simulated voltage as a perturbation term into the standard Lorenz equation, the equation simulating the physical state (x, y, z) of a chaotic encryption circuit as a function of time t is: dx / dt = σ (yx)+V_k1,dy / dt=x (ρ-z)-y+V_k2,dz / dt=x y-β z, where typical parameters are: σ=10, ρ=28, β=8 / 3; x, y, z represent chaotic trajectories; When the attacker intercepts the signal and calculates that V_k1 has an error, the reconstructed chaotic waveform will contain errors and the decryption will fail. Signal Scrambling and Transmission: The output state variable of the simulated chaotic encryption circuit is preset to be a chaotic masking carrier, denoted as C(t); the active signal S(t) to be transmitted is superimposed with the chaotic masking carrier, and the corresponding expression is T(t) = S(t) + γ. C(t), where T(t) is the signal transmitted through the antenna, γ represents the masking coefficient, and the power of chaotic noise is greater than that of the useful signal; the data packet includes a header, a plaintext index, and simulated ciphertext.

[0034] It should be noted that the decryption process at the receiving end includes: The receiving end splits the received analog signal into two paths: one path enters the digital demodulation module to obtain the pulse index of the header, and the other path enters the analog signal delay unit for physical buffering. According to the pulse index, the corresponding R_public is extracted from the local buffer storage module, and K_private is read from the backup register of the security chip or the main control chip; K_session is obtained by performing HMAC-SHA256 operation based on R_public and K_private; The digital-to-analog converter outputs voltages V_k1 and V_k2. The chaotic circuit at the receiving end generates the same chaotic waveform C'(t) as the transmitting end under the drive of V_k1 and V_k2. Once the chaotic waveform C'(t) has stabilized, the analog signal delay unit outputs a buffered analog signal T(t). According to the chaos synchronization theorem, the original signal S'(t) is restored using signal subtraction. The expression for signal subtraction is S'(t) = T(t) - γ. C'(t).

[0035] Specifically, the analog-to-digital mapping and chaotic dynamics driving of simulated chaotic encryption circuits transform digital keys into "chaotic states" in the physical world. Analog signals cannot be directly encrypted with digital signals; the chaotic circuit must be driven through parameter perturbation. The Lorenz equations are as follows: dx / dt=σ(yx)dy / dt=x(ρ-z)-y, dz / dt=xy-βz, where x, y, and z are the system's state variables, t is time, and σ, ρ, and β are the system's parameters. This is a nonlinear dynamic system whose behavior depends on the system's initial conditions and parameters.

[0036] In this embodiment, the final execution process of physical layer encryption during signal scrambling and transmission includes chaotic carrier generation, analog addition encryption, and data packet transmission structure. Chaotic carrier generation involves the circuit outputting one of its state variables (e.g., x(t)) as a chaotic masking carrier, denoted as C(t). C(t) appears as white noise, with a wide and chaotic spectrum, lacking any regularity. Analog addition encryption involves superimposing the useful signal (such as audio or sensor data) S(t) to be transmitted onto the chaotic carrier. The data packet transmission structure is used to synchronize the receiving end. During system power-on initialization, the transmitting end sends a known test sequence (Pilot Signal), and the receiving end compares the decryption results, fine-tuning the bias voltage of the DAC output or the digital potentiometer (if any) to compensate for the tolerances of hardware components, achieving "soft synchronization" of the analog circuit.

[0037] In an optional offline, network-free embodiment, a local quantum random number generator module can be extended into the hardware circuit of this system. The module is connected to the main control chip via an SPI interface. The main control chip reads the locally generated quantum true random number sequence, replaces the pre-downloaded public random number beacon, and executes the subsequent session key generation and chaotic encryption process to achieve high-security encrypted transmission in offline scenarios.

[0038] It should be understood that the problem of clock synchronization and true random number acquisition in distributed systems is solved by introducing "publicly verifiable quantum beacons", the network latency problem is solved by using "local flash buffers", and military-grade anti-tampering private key protection is achieved through "STM32 BKP / security chip". Finally, combined with the physical encryption characteristics of "chaotic circuits", a secure transmission system that is difficult to predict, difficult to crack and has complete legal / patent compliance is constructed.

[0039] The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals described in this invention is not only suitable for conventional secure communication, but also extremely suitable for high-security wireless data interaction scenarios. For example, it can be used as an anti-sniffing wireless data link for hardware encrypted wallets, or for physical layer encrypted wireless transmission between confidential storage devices (such as military-grade encrypted hard drives) and host computers, as well as for communication between core IoT nodes with extremely high anti-tampering requirements, eliminating man-in-the-middle attacks and signal replay eavesdropping at the physical waveform level.

[0040] In one feasible embodiment, HMAC-SHA256 is a key-based encryption algorithm that combines a hash algorithm (such as SHA-256) with a key. This algorithm not only guarantees data integrity but can also be used for message authentication. The HMAC algorithm utilizes hash operations, taking a key and a message as input, and generating a message digest as output. Its security is built upon the hash encryption algorithm, requiring both communicating parties to share a key and agree on the algorithm. The working process of the HMAC-256 algorithm is as follows: (1) Key processing: If the key length is shorter than the block length (512 bits) of the SHA-256 algorithm, then pad the key with 0; if the key length exceeds this length, then use the SHA-256 algorithm to hash the key. (2) Internal padding (ipad): Perform an XOR operation between the processed key and the internal padding value; (3) Message append: Appends a message to the result of the XOR operation; (4) First hash operation: The result of the previous step is hashed using the SHA-256 algorithm; (5) External padding: XOR the processed key with the external padding value; (6) Second hash operation: The result of the first hash operation is appended to the result of the external padding, and then the SHA-256 algorithm is used again to perform a hash operation to obtain the final message digest.

[0041] In a specific hardware embodiment, the transmitter hardware circuit of this system includes a main control module, a local buffer storage module, a security key management module, a signal conditioning module, an electrical isolation module, an analog chaotic encryption circuit, a power and battery management module, and a wireless communication module. The circuit connections and working processes of each module are as follows: Main control module: The main control chip is an STM32F103C8T6, which is used to perform common random number beacon pre-download, session key generation, peripheral timing control and encryption process scheduling; the SWD interface of the main control chip is connected to the debugging interface to realize program download and debugging; the UART interface of the main control chip is connected to the wireless communication module to realize network communication and beacon pre-download; the main control chip has built-in multi-channel DAC peripherals for outputting analog control voltage to drive chaotic circuits.

[0042] Figure 2 The hardware structure, including a wireless communication unit and a power conversion circuit, is shown for implementing the physical reception of a quantum random number beacon; such as Figure 2As shown, the core of this module is the wireless communication transceiver unit (taking the wireless radio frequency module shown in J1 in the figure as an example). This module establishes a physical connection with the main control device through a standard UART serial bus (including TX / RX data lines). Its physical function is to act as the system's "sniffing antenna," listening to and capturing publicly broadcast quantum random number beacon data streams in the network in real time, providing a continuous external high-frequency physical entropy source for subsequent encryption derivation.

[0043] The local buffer storage module uses a W25Q128JV SPI Flash chip, connected to the SPI interface of the main control chip. The chip's CS pin is connected to the chip select pin of the main control chip, the CLK pin is connected to the SPI clock pin of the main control chip, and the DI / DO pins are connected to the SPI MOSI and MISO pins of the main control chip, respectively. This Flash chip is used to cache pre-downloaded public random number beacon sequences, constructing a circular buffer with time window mapping rules to achieve zero-delay access to the random number beacons. Figure 3 The flash memory chip and its SPI communication interface were demonstrated for constructing a physical circular buffer; such as Figure 3 As shown, the core of this module is a high-capacity non-volatile memory chip (such as the W25Q128 series Flash chip shown in U3). This component is directly connected to the main control chip via a high-speed SPI physical bus (including CS, CLK, MOSI, and MISO pins). Its physical function is to construct a "ring-shaped physical buffer" that resists network latency, pre-setting the beacon sequence within the future time window in the local silicon chip. This ensures that the system can read the beacons with "zero latency" when high-speed RF communication starts, meeting the stringent timing requirements of physical layer encryption.

[0044] Security Key Management Module: The main control chip's built-in BKP backup register stores the device's unique private key. This backup register is powered by an independent button battery via the main control chip's VBAT pin, ensuring the private key data is retained even when the main power supply is disconnected. The main control chip's TAMP intrusion detection pin is connected to a normally closed microswitch on the device casing. When the device casing is illegally disassembled, the microswitch opens, the TAMP pin level changes, and the main control chip's hardware logic automatically clears the private key data in the backup register, achieving self-destruction upon physical intrusion. Figure 4 The diagram illustrates the backup power supply circuit of the main control chip and its tamper-proof pin connection method, used to achieve physical secure storage of the private key; such as Figure 4As shown, this module focuses on demonstrating the "physical defense" topology of the main control chip. Its core components include an independent backup battery (such as the CR2032 coin cell battery shown in BT2) and the VBAT pin of the main control chip. Its physical function is to provide continuous power to the backup register (BKP) of the storage device's unique private key, physically isolated from the main power supply; simultaneously, combined with the tamper-proof detection pin of the casing TAMP (not shown in detail in the diagram), it constructs a hardware self-destruct defense line of "immediate full wipe upon physical power failure / intrusion".

[0045] Figure 4 The main control chip and its external clock circuit are shown, used to perform one-way derivation operations on the dynamic session key; for example... Figure 4 As shown, this module focuses on demonstrating the "computing power generation" topology of the main control chip. Its core components are the main control MCU and its external high-precision hardware clock source (such as the external crystal oscillator and matching capacitors C21 and C22 shown in Crystal). Its physical function is to provide a completely enclosed and timing-precise internal computing sandbox, where the main control core, driven by the hardware clock, extracts... Figure 3 random numbers and Figure 4 The private key is used to execute the HMAC-SHA256 one-way derivation algorithm, ultimately generating the dynamic session key that drives the subsequent chaotic circuit. The session key generation module and the security key management module correspond to those provided in the instruction manual. Figure 4 .

[0046] Signal conditioning module: Includes input terminals, an INA146 instrumentation amplifier, and a 74HC244 buffer; the baseband signal to be transmitted is input through the input terminals, differentially amplified and filtered by the instrumentation amplifier, then level-matched and electrically isolated by the input buffer before being output to the subsequent encryption circuit. Figure 6 The diagram illustrates a hardware topology including a phase-locked loop circuit and an analog adder transmit port for performing final aliasing of signals and wireless transmission; as shown. Figure 6 As shown, this module includes a signal phase-locked loop / voltage-controlled unit (such as the CD4046 chip shown in U2) and a multi-channel physical buffer driver (such as the 74HC244 chip shown in U5). Its physical function is to provide a high-impedance signal conditioning and level conversion interface, converting the original plaintext signal to be transmitted with... Figure 5 The output chaotic carrier is proportionally superimposed at the physical voltage level (based on the masking coefficient γ) to finally generate an unpredictable analog radio frequency waveform, which is sent to the radio frequency transmitting front end or physical transmission cable via the communication terminal (as shown in J2).

[0047] Electrical isolation module: A high-speed optocoupler of model 6N137 is used to achieve electrical isolation between the digital signal of the main control chip and the analog chaotic circuit, so as to avoid digital noise interference with the generation of the chaotic carrier signal; the input side of the optocoupler is connected to the output of the buffer through a current limiting resistor, and the output side is connected to the +5V power supply through a pull-up resistor, and the isolated signal is output to the analog chaotic encryption circuit.

[0048] Analog Chaotic Encryption Circuit: A chaotic oscillator based on the Lorenz dynamic equation is built using two OP07 operational amplifiers. The DAC peripheral of the main control chip divides the 256-bit session key K_session into two independent control components, which are converted into analog control voltages V_k1 and V_k2. These are used as perturbation terms input to the corresponding input terminals of the chaotic oscillator to generate a chaotic carrier signal C(t) that uniquely corresponds to the session key. The chaotic carrier signal and the baseband signal to be transmitted are superimposed by an adder circuit to generate an encrypted transmission signal, which is output to the RF transmission module through the CHAOS_OUT interface to realize wireless transmission. Figure 6 A Lorenz nonlinear physical oscillator circuit based on a high-speed optocoupler isolated input is shown for generating chaotic carriers; as... Figure 5 As shown, this module is the core execution layer of physical layer encryption. Its core components include a high-speed optocoupler (such as the 6N137 shown in U1) as a signal injection isolator, dual precision operational amplifiers (such as the OP07 shown in U9 and U10) constituting the main body of nonlinear dynamics, and energy storage elements that determine the phase space trajectory (such as the 18mH inductor and C11 capacitor shown in L1). Its physical function is to convert the digital session key into an analog control voltage, which is then injected into the operational amplifier loop via optocoupler isolation. As a nonlinear disturbance term, it breaks the original electromagnetic balance, forcing the analog hardware system composed of operational amplifiers, inductors, and capacitors to fall into and maintain a highly complex Lorenz chaotic attractor state, generating a wideband masking carrier (CHAOS_OUT).

[0049] The power and battery management module includes a +9V power input, an LM7805 +5V linear regulator, an AMS1117-3.3 +3.3V linear regulator, an ICL7660 negative voltage generator chip, and a TP4056 charging management chip. The +9V power supply is converted to +5V by the LM7805 regulator to power the buffer, optocoupler, and operational amplifier. The +5V power supply is converted to +3.3V by the AMS1117-3.3 regulator to power the main control chip, Flash chip, and wireless communication module. The ICL7660 chip converts the +9V input to a -9V negative voltage to provide dual power supply for the OP07 operational amplifier. The charging management chip connects to the backup lithium battery to provide charging management for the battery and also provides independent power to the VBAT pin of the main control chip.

[0050] Wireless communication module: The HC-05 Bluetooth module is used and connected to the UART interface of the main control chip. It is used to pre-download public random number beacon data packets over the network when the device is idle, and at the same time realizes device debugging and parameter configuration.

[0051] In this embodiment, the receiver adopts the same hardware circuit architecture as the transmitter to ensure the consistency of hardware parameters of the chaotic circuit. During the system power-on initialization phase, the transmitter sends a preset known test sequence, the receiver receives and decrypts the test sequence, compares the error between the decryption result and the original test sequence, fine-tunes the bias voltage of the receiver DAC output, and compensates for the tolerance and temperature drift error of the hardware components at both ends of the receiver and transmitter to achieve chaotic soft synchronization at the physical layer.

[0052] In an optional offline, network-free embodiment, a local quantum random number generator module can be extended into this hardware circuit. The module is connected to the main control chip via an SPI interface. The main control chip reads the locally generated quantum true random number sequence, replaces the pre-downloaded public random number beacon, and executes the subsequent session key generation and chaotic encryption process to achieve high-security encrypted transmission in offline scenarios.

[0053] Performance simulation verification of chaotic systems In this embodiment, the dynamic characteristics of the simulated chaotic oscillator were simulated and verified. The simulation result is a phase trajectory diagram of the output signal of the chaotic oscillator. The horizontal axis represents the output voltage V(n010) corresponding to the state variable of the chaotic system, ranging from 0V to 7V, and the vertical axis represents the differential signal d(V(n010)) of this voltage, ranging from -1.0MV / s to 1.0MV / s. The phase trajectory diagram clearly shows that the chaotic circuit of this invention generates a typical double-vortex chaotic attractor, possessing continuous wide-spectrum, noise-like, and extremely sensitive chaotic characteristics to initial values ​​and control parameters, which can meet the performance requirements of physical layer encryption for chaotic carrier signals. Simulation verification shows that the maximum Lyapunov exponent of the chaotic system of this invention is positive, exhibiting stable chaotic characteristics. When the control voltage corresponding to the session key undergoes a minimum unit change, the chaotic phase trajectory undergoes a completely random jump, making it impossible for attackers to reconstruct the chaotic system parameters through finite sampling, thus possessing extremely strong resistance to phase space reconstruction attacks.

[0054] It should be noted that, in Figures 2 to 6 The circuit topology shown does not explicitly list the "bipolar analog power supply module" as a separate logical claim module. In actual engineering implementation, those skilled in the art should understand that driving the analog chaotic encryption circuit (… Figure 5The operational amplifier in the Lorenz circuit requires an auxiliary charge pump or buck-boost regulator circuit (such as providing a symmetrical analog voltage of +9V / -9V) to ensure the symmetry and wide dynamic range of the chaotic trajectory. Furthermore, the component parameters mentioned in this paper and accompanying figures (such as 18mH inductor, partial RC network values, and bias voltage settings) are typical engineering reference values ​​under baseline conditions. In actual product PCB-level implementations, due to stray capacitance, parasitic inductance of traces, and the physical temperature drift effect of operational amplifier components, the actual Lorenz chaotic synchronization tolerance will inevitably deviate from the theoretical simulation environment. Therefore, during physical layer deployment, it is necessary to combine the "power-on initialization hardware tolerance compensation mechanism" described in this invention, dynamically fine-tuning the bias voltage parameters through a built-in DAC to offset physical parasitic effects and ensure that the chaotic dynamic trajectories of the hardware at both ends of the transmitter and receiver achieve strict physical-level soft synchronization. The aforementioned conventional parameter fine-tuning and power supply network design to adapt to the actual engineering environment are all reasonable derivatives within the scope of protection of this invention.

[0055] In one feasible embodiment, the core module of the wireless encrypted transmission system circuit includes: Main control module: Uses STM32F103C8T6 microcontroller, responsible for public random number beacon pre-download, session key generation, peripheral timing control and encryption process scheduling; program debugging and download are realized through SWD interface, and UART interface connects to Bluetooth module for network communication and device configuration; Local buffer storage module: It adopts W25Q128JV SPI Flash chip, which is connected to the main controller SPI interface. It is used to cache the pre-downloaded public random number beacon sequence, build a circular buffer with a time window, and realize zero-delay call of random number beacons; Security Key Management Module: Relying on the STM32's built-in BKP backup register to store the device's unique private key, the backup register is powered by an independent battery on the VBAT pin; the TAMP intrusion detection pin is reserved for connection to the device's tamper-proof switch, enabling automatic self-destruction of the private key in the event of physical intrusion; Signal conditioning module: Composed of INA146 instrumentation amplifier and 74HC244 buffer, it performs differential amplification, filtering and level isolation of baseband signal, and provides stable input for subsequent chaotic encryption circuit; Electrical isolation module: Employs 6N137 high-speed optocouplers to achieve electrical isolation between the main control digital signals and the analog chaotic circuits, preventing digital noise from interfering with the generation of chaotic carrier waves; Simulated Chaos Encryption Module: A Lorenz equation chaotic oscillator is built using two OP07 operational amplifiers. The main control DAC converts the session key into an analog control voltage, which is used as a perturbation term input to the chaotic circuit to generate a chaotic carrier signal that uniquely corresponds to the session key. Power and battery management module: LM7805 generates +5V power, AMS1117-3.3 generates +3.3V power, ICL7660 charge pump generates -9V negative voltage to provide dual power supply for operational amplifiers; TP4056 charging management chip powers backup battery while ensuring VBAT private key storage is not powered off. Wireless communication module: HC-05 Bluetooth module, used to pre-download public random number beacons when the device is idle, and to perform parameter debugging and status monitoring.

[0056] II. Simulation Description of Chaotic Systems: Simulation tool: LTspice XVII, used for time-domain and phase-space dynamics simulation of the chaotic encryption circuit of this invention; Simulation object: A simulated chaotic oscillator based on the Lorenz equation is used to verify the chaotic characteristics and anti-attack capability under session key control voltage perturbation.

[0057] Simulation results: See Figure 7 A typical double-vortex chaotic attractor phase diagram is generated, with the horizontal axis representing the output voltage V(n010) corresponding to the chaotic state variable, and the vertical axis representing the differential signal d(V(n010)) of the voltage. It is proven that the chaotic system possesses the following characteristics: extreme sensitivity to initial values / control parameters, broadband noise-like properties, and a positive Lyapunov exponent, thus satisfying the physical layer encryption requirements for masking and resisting reconstruction of chaotic carriers. Even a tiny change in the verification session key can cause a complete jump in the chaotic phase trajectory. Attackers cannot reconstruct system parameters through sampling, thus possessing extremely strong resistance to phase space reconstruction attacks.

[0058] In all examples shown and described herein, any specific values ​​should be interpreted as merely exemplary and not as limitations; therefore, other examples of exemplary embodiments may have different values.

[0059] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0060] The above-described embodiments are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention.

Claims

1. A tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals, characterized in that, This includes the transmitting and receiving ends that communicate with each other; The transmitter includes: The public entropy source acquisition module is used to acquire publicly verifiable public random number beacon sources on the network and configure the public beacon sources as random number beacon sequences; A local buffer storage module is used to pre-store the random number beacon sequence for real-time retrieval; The security key management module is used to store the device's unique private key shared by the transmitter and receiver, and is configured with a physical tamper-proof storage unit to prevent the private key from being read illegally; The session key generation module is used to read a random number beacon at a preset time from the local buffer storage module, and generate a dynamic session key based on the device's unique private key and the random number beacon; An analog chaotic encryption circuit includes a digital-to-analog converter and an analog chaotic oscillator. The digital-to-analog converter converts the dynamic session key into an analog control voltage and controls the parameters of the analog chaotic oscillator according to the analog control voltage to generate a corresponding chaotic carrier signal. A signal modulation and transmission module is used to hide the information to be transmitted in the chaotic carrier signal and send a data packet containing beacon index information corresponding to the chaotic carrier signal. The receiving end is used to obtain a random number beacon of the same origin based on the beacon index information in the data packet, generate a chaotic carrier signal synchronized with the transmitting end, and restore the chaotic carrier signal to obtain the original transmission information.

2. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 1, characterized in that, Obtaining publicly verifiable public beacon sources from the network and configuring these public beacon sources as random number beacon sequences includes: The common beacon source is adopted based on quantum physics entropy sources or quantum tube noise. Obtain multiple verifiable random values ​​from the public beacon source; Construct a random number beacon sequence corresponding to the multiple random values.

3. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 2, characterized in that, The random number beacon sequence includes a random value, a timestamp, and a pulse index. The random value is a 512-bit true random number generated by a physical entropy source. The timestamp is used to indicate the precise time when the random value was generated. The pulse index represents the unique number of the pulse in the sequence and is used for precise synchronization between the receiver and the transmitter.

4. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 1, characterized in that, The execution process of the local buffer storage module includes: When the device is idle or charging, it can pre-download the currently generated public beacon data packets with time series via the network API unit for later use; Downloaded public beacon data packets are written into the cache chip to build a circular buffer; When data needs to be sent, the microcontroller reads the random number seed corresponding to the current time window from the cache chip through the high-speed SPI interface and performs zero-delay calling.

5. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 1, characterized in that, The storage device has a unique private key and physical anti-tampering mechanisms to prevent the private key from being read illegally, including: The device's unique private key is used as the root of trust to perform one-way derivation of the dynamic session key, and an anti-tampering storage mechanism is set up. The transmitter and receiver share a private key K_private stored inside the device. The private key K_private is used to drive the session key K_session of the chaotic circuit. The session key K_session is generated by the following algorithm: K_session = HMAC-SHA256(K_private, R_public), where K_private represents the device private key, which is stored in the backup register of the main control chip or the security chip; HMAC represents the hash message authentication code, HMAC-SHA256 represents the message authentication code algorithm based on the hash function; and R_public represents a public random number. The backup register is powered by the VBAT pin of an independent battery. The main control chip is connected to a micro switch or photoresistor on the device via a TAMP pin. When the device casing is disassembled, the micro switch releases and triggers a jump in the TAMP pin level of the main control chip. When an attacker connects a debugger, the main control chip automatically clears or erases all data in the backup register, and the device private key becomes zero or random gibberish. The security chip includes an active metal mesh disposed on the chip surface. When subjected to laser cutting or probe detection, the active metal mesh is damaged, causing the charge distribution to collapse and data to be lost. The main control chip sends R_public to the security chip.

6. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 5, characterized in that, The main control chip calls mbedTLS or a hardware encryption library to perform SHA-256 operations, including: Padding: If the length of K_private is insufficient, padding is performed on K_private to obtain K_private'; Internal hash: Perform an internal hash operation on K_private' to obtain the result of the internal hash operation. The corresponding expression is: H((K_private'XOR opad) || H((K_private'XOR ipad) || R_public)), where H() represents hash operation, XOR represents XOR operation, opad represents external padding, and ipad represents internal padding. Output truncation: Generate a 256-bit hash value based on the internal hash operation result, and use the hash value as the session key K_session.

7. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 1, characterized in that, The execution process of a simulated chaotic encryption circuit includes: Key component mapping: The 256-bit K_session is divided into multiple control components and output as multiple analog voltages through a digital-to-analog converter (DAC). These analog voltages are represented as V_k1 = DAC(K_session[0:3]) and V_k2 = DAC(K_session[4:7]). Analog voltages are introduced as perturbation terms into the standard Lorenz equation, and the equation simulating the physical state (x, y, z) of the chaotic encryption circuit as a function of time t is: dx / dt = σ (yx)+V_k1,dy / dt=x (ρ-z)-y+V_k2,dz / dt=x y-β z, where typical parameters are: σ=10, ρ=28, β=8 / 3; x, y, z represent chaotic trajectories, and dx / dt represents the derivative of x with respect to time; when an attacker intercepts the signal and calculates that V_k1 has an error, the reconstructed chaotic waveform will have an error and the decryption will fail. Signal Scrambling and Transmission: The output state variable of the simulated chaotic encryption circuit is preset to be a chaotic masking carrier, denoted as C(t); the active signal S(t) to be transmitted is superimposed with the chaotic masking carrier, and the corresponding expression is T(t) = S(t) + γ. C(t), where T(t) is the signal transmitted through the antenna, γ represents the masking coefficient, and the power of chaotic noise is greater than that of the useful signal; the data packet includes a header, a plaintext index, and simulated ciphertext.

8. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 1, characterized in that, The decryption process at the receiving end includes: The receiving end splits the received analog signal into two paths: one path enters the digital demodulation module to obtain the pulse index of the header, and the other path enters the analog signal delay unit for physical buffering. According to the pulse index, the corresponding R_public is extracted from the local buffer storage module, and K_private is read from the backup register of the security chip or the main control chip; K_session is obtained by performing HMAC-SHA256 operation based on R_public and K_private; the digital-to-analog converter outputs voltages V_k1 and V_k2, and the chaotic circuit at the receiving end generates the same chaotic waveform C'(t) as the transmitting end under the drive of V_k1 and V_k2; Once the chaotic waveform C'(t) has stabilized, the analog signal delay unit outputs a buffered analog signal T(t). According to the chaos synchronization theorem, the original signal S'(t) is restored using signal subtraction. The expression for signal subtraction is S'(t) = T(t) - γ. C'(t).

9. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 8, characterized in that, It also includes a hardware tolerance compensation mechanism: during the system power-on initialization phase, the transmitting end sends a preset known test sequence; the receiving end receives and decrypts the known test sequence, compares the error between the decryption result and the known test sequence, and fine-tunes the bias voltage output by the digital-to-analog converter in the receiving end according to the error, so as to compensate for the hardware component tolerance of the analog chaotic circuit at both ends of the transmitting and receiving ends, and realizes chaotic soft synchronization at the physical layer.

10. The tamper-proof encrypted transmission system based on quantum random numbers and chaotic signals according to claim 1, characterized in that, The public entropy source acquisition module is compatible with the local quantum random number generation unit, which generates true random number sequences based on quantum physical entropy sources and can replace the public random number beacon source for generating dynamic session keys.

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