Interface logic follow hardware reset circuit
By designing an interface logic follow-up hardware reset circuit, the problems of unstable recognition and complex logic when the display's Type-C and Type-B interfaces share a follow-up were solved, achieving stable device recognition and shared use, and simplifying the device access process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- 彩迅工业(中山)有限公司
- Filing Date
- 2025-05-27
- Publication Date
- 2026-06-12
AI Technical Summary
When existing displays share the same Type-C and Type-B interfaces, there are issues with unstable recognition and complex logic, which prevents the device from being properly recognized and used.
An interface logic-following hardware reset circuit was designed, including a Type-C and Type-B plug-in/plug-out reset module, an access signal detection module, and a shared reading module. By detecting when the interface is plugged in or unplugged, a low-pulse reset signal is output to ensure device recognition and shared use.
It enables stable device recognition and shared use of the monitor in multi-functional application scenarios, reduces the cumbersome process of device access, ensures that the device can be recognized normally every time, and reduces the interface occupation of host mounting and mobile devices.
Smart Images

Figure CN224356090U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of interfaces, specifically an interface logic follow-up hardware reset circuit. Background Technology
[0002] Current monitors on the market have limited functionality and lack shared tracking functionality with Type-C and Type-B interfaces (they all use USB interfaces). This requires a microcontroller and software detection and control logic, which is costly and complex. Even if shared tracking with Type-C and Type-B interfaces exists, it is unstable and frequently fails to recognize the device. Therefore, the existing shared tracking functionality with Type-C and Type-B interfaces is ineffective and needs improvement. Utility Model Content
[0003] The purpose of this invention is to provide an interface logic follow-up hardware reset circuit to solve the problems mentioned in the background art.
[0004] To achieve the above objectives, this utility model provides the following technical solution:
[0005] An interface logic follow-up hardware reset circuit includes:
[0006] The Type-C plug-in / plug-out reset module is used to output a low-pulse reset signal when the Type-C interface is plugged into or unplugged from the host computer (host, main device, etc.).
[0007] The Type-B plug-in / plug-out reset module is used to output a low-pulse reset signal when the Type-B interface is plugged into or unplugged from the host computer (host, main device, etc.).
[0008] The access signal detection module is used to detect whether the type-c or type-b interface is inserted and to send a feedback signal to the shared reading module.
[0009] The shared read module is used for shared following based on feedback signals;
[0010] The Type-C plug-in reset module is connected to the access signal detection module, the Type-B plug-in reset module is connected to the access signal detection module, and the access signal detection module is connected to the shared reading module.
[0011] As a further improvement of this utility model: the Type-C plug-in reset module includes transistor Q1 and transistor QE11. The emitter of transistor Q1 is connected to one end of capacitor CU16 and the negative terminal of diode DC4. The collector of transistor Q1 is connected to one end of resistor RU14 and the first terminal of dual-input diode QC15. The base of transistor Q1 is connected to one end of resistor RU42. The other end of capacitor CU16 is grounded. The anode of diode DC4 is connected to one end of resistor RU40 and one end of resistor RU39. The other end of resistor RU40 is grounded. The other end of resistor RU39 is connected to the other end of resistor RU42. One end of capacitor CU17, one end of resistor RU43, and the Type-C interface signal CC_Connect are connected. The other end of resistor RU43 is grounded. The other end of capacitor CU17 is connected to one end of resistor RU44 and one end of resistor RU45. The other end of resistor RU44 is grounded. The other end of resistor RU45 is connected to the second end of dual-input diode QC15. The third end of dual-input diode QC15 is connected to the base of transistor QE11. The emitter of transistor QE11 is grounded. The collector of transistor QE11 is connected to one end of resistor RU46. The other end of resistor RU46 is connected to a 3.3V voltage.
[0012] As a further improvement of this utility model: the type-b plug-in reset module includes transistor Q2 and transistor QE12. The emitter of transistor Q2 is connected to one end of capacitor CU18 and the negative terminal of diode DC5. The collector of transistor Q2 is connected to one end of resistor RU49 and the first terminal of dual-input diode QC16. The base of transistor Q2 is connected to one end of resistor RU50. The other end of capacitor CU18 is grounded. The anode of diode DC5 is connected to one end of resistor RU48 and one end of resistor RU47. The other end of resistor RU48 is grounded. The other end of resistor RU47 is connected to the other end of resistor RU50 and one end of capacitor CU19. One end of resistor RU51 and one end of resistor RU56 are connected to the 5V_Host signal of the type-b interface. The other end of resistor RU51 is grounded. The other end of capacitor CU19 is connected to one end of resistor RU52 and one end of resistor RU53. The other end of resistor RU52 is grounded. The other end of resistor RU53 is connected to the second end of dual-input diode QC16. The third end of dual-input diode QC16 is connected to the base of transistor QE12. The emitter of transistor QE12 is grounded. The collector of transistor QE12 is connected to one end of resistor RU54. The other end of resistor RU54 is connected to a 3.3V voltage.
[0013] As a further improvement of this utility model: the access signal detection module includes chips UU3 and UU4, both of which are BL1532. Pin 10 of chip UU4 is connected to one end of resistor RU13. The other end of resistor RU13 is connected to the third terminal of dual-input diode QC1 and one end of resistor RU11. The other end of resistor RU11 is connected to a 3.3V voltage. The first terminal of dual-input diode QC1 is connected to the Type-C interface signal CC_Connect, and the second terminal of dual-input diode QC1 is connected to resistor RU24. One end of resistor RU25 is connected to ground, and the other end of resistor RU25 is connected to the type-b interface signal 5V_Host. Pins 7 and 6 of chip UU4 are connected to pins 1 and 2 of chip UU3, respectively. Pin 10 of chip UU3 is connected to one end of resistor RU10 and one end of resistor RU16 through resistor RU14. The other end of resistor RU16 is grounded, and the other end of resistor RU10 is connected to the type-b interface signal 5V_Host. Pins 4, 5, 6, and 7 of chip UU3 are connected to the shared read module.
[0014] As a further improvement of this utility model: the shared reading module includes an interface CN1, which is a USB-TP-C interface, and pins 6, 7, 18, and 19 of the interface CN1 are connected to the signal detection module.
[0015] Compared with the prior art, the beneficial effects of this utility model are: the access signal detection module and the shared reading module of this utility model solve the problem of avoiding cumbersome device access in multi-functional application scenarios. They can directly call the USB flash drive, camera, microphone and other devices of the display device for shared use, PPT presentation, document sharing, etc. In addition, through the reset function of the type-c plug-in reset module and the type-b plug-in reset module, it is ensured that the device can be recognized normally every time, reducing the interface occupation of host mounting and mobile devices. Attached Figure Description
[0016] Figure 1 This is the circuit diagram for the Type-C plug-in reset module.
[0017] Figure 2 This is the circuit diagram for the type-b plug-in reset module.
[0018] Figure 3 This is a circuit diagram for connecting to the signal detection module.
[0019] Figure 4 The circuit diagram is for the shared read module.
[0020] Figure 5 Circuit diagram for a USB expansion hub chip.
[0021] Figure 6 This is a circuit diagram for the USB downstream port A and the monitor type-B upstream interface. Detailed Implementation
[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the protection scope of the present utility model.
[0023] Please see Figure 1 An interface logic follow-up hardware reset circuit includes:
[0024] The Type-C plug-in / plug-out reset module is used to output a low-pulse reset signal when the Type-C interface is plugged into or unplugged from the host computer (host, main device, etc.).
[0025] The Type-B plug-in / plug-out reset module is used to output a low-pulse reset signal when the Type-B interface is plugged into or unplugged from the host computer (host, main device, etc.).
[0026] The access signal detection module is used to detect whether the type-c or type-b interface is inserted and to send a feedback signal to the shared reading module.
[0027] The shared read module is used for shared following based on feedback signals;
[0028] The Type-C plug-in reset module is connected to the access signal detection module, the Type-B plug-in reset module is connected to the access signal detection module, and the access signal detection module is connected to the shared reading module.
[0029] In a specific embodiment: Please refer to Figure 5 and Figure 6 The UU2 chip is a USB expansion hub chip, model GL3510. It has four USB downstream ports A-1, A-2, A-3, and A-4, which are the four USB slave device input interfaces and the display type-B upstream output interface. It is referred to as a 4-input 1-output HUB expansion chip.
[0030] In this embodiment: Please refer to Figure 1The Type-C plug-in reset module includes transistors Q1 and QE11. The emitter of transistor Q1 is connected to one end of capacitor CU16 and the cathode of diode DC4. The collector of transistor Q1 is connected to one end of resistor RU14 and the first terminal of dual-input diode QC15. The base of transistor Q1 is connected to one end of resistor RU42. The other end of capacitor CU16 is grounded. The anode of diode DC4 is connected to one end of resistor RU40 and one end of resistor RU39. The other end of resistor RU40 is grounded. The other end of resistor RU39 is connected to the other end of resistor RU42 and capacitor CU17. One end of the capacitor CU17 is connected to one end of the resistor RU43 and the Type-C interface signal CC_Connect. The other end of the resistor RU43 is grounded. The other end of the capacitor CU17 is connected to one end of the resistor RU44 and one end of the resistor RU45. The other end of the resistor RU44 is grounded. The other end of the resistor RU45 is connected to the second end of the dual-input diode QC15. The third end of the dual-input diode QC15 is connected to the base of the transistor QE11. The emitter of the transistor QE11 is grounded. The collector of the transistor QE11 is connected to one end of the resistor RU46. The other end of the resistor RU46 is connected to a 3.3V voltage.
[0031] When the monitor's Type-C interface is connected to the host or main device, the CC_Connect signal level will be pulled high to 3.3V. The voltage will flow to RU43, CU17, RU42, RU39, RU40 and diode DC4. Due to the voltage divider resistors RU39 and RU40, the voltage of diode DC4 is divided and its own voltage drop, so the emitter voltage of transistor Q1 is less than the base voltage of transistor Q1 by 0.7V, so transistor Q1 does not conduct. During this process, the voltage flows to diode DC4 to charge capacitor CU16. When the Type-C interface is connected transiently, the CC_Connect input voltage flows through capacitor CU17, resistor RU45, and dual-input diode QC15 to transistor QE11. Transistor QE11 is momentarily turned on, and the HUBRESET signal is momentarily pulled low, forming a low-pulse reset signal. When the Type-C interface is disconnected, all voltage gradually dissipates. At this time, capacitor CU16 begins to discharge, the emitter voltage of transistor Q1 remains unchanged, and the base voltage of transistor Q1 gradually decreases to 0V. When the emitter voltage of transistor Q1 is greater than the base voltage by 0.7V, transistor Q1 is momentarily turned on. At this time, the voltage flows to dual-input diode QC15, causing transistor QE11 to conduct to ground, forming a loop. HUBRESET is momentarily pulled low, forming a low-pulse reset signal. Therefore, a low-pulse reset signal is generated when the Type-C interface is inserted and disconnected, ensuring that the device can be recognized normally every time, reducing the interface occupation of the host and mobile devices.
[0032] In this embodiment: Please refer to Figure 2 The Type-B plug-in reset module includes transistors Q2 and QE12. The emitter of transistor Q2 is connected to one end of capacitor CU18 and the negative terminal of diode DC5. The collector of transistor Q2 is connected to one end of resistor RU49 and the first terminal of dual-input diode QC16. The base of transistor Q2 is connected to one end of resistor RU50. The other end of capacitor CU18 is grounded. The anode of diode DC5 is connected to one end of resistor RU48 and one end of resistor RU47. The other end of resistor RU48 is grounded. The other end of resistor RU47 is connected to the other end of resistor RU50, one end of capacitor CU19, and resistor RU51. One end of the capacitor CU19 is connected to one end of the resistor RU56, and the other end of the resistor RU56 is connected to the 5V_Host signal of the type-b interface. The other end of the resistor RU51 is grounded. The other end of the capacitor CU19 is connected to one end of the resistor RU52 and one end of the resistor RU53. The other end of the resistor RU52 is grounded. The other end of the resistor RU53 is connected to the second end of the dual-input diode QC16. The third end of the dual-input diode QC16 is connected to the base of the transistor QE12. The emitter of the transistor QE12 is grounded. The collector of the transistor QE12 is connected to one end of the resistor RU54. The other end of the resistor RU54 is connected to a 3.3V voltage.
[0033] The working principle of the Type-B plug-in reset module is similar to that of the Type-C plug-in reset module, and will not be repeated here. The main difference is that the Type-B uplink interface of the display is connected to the host or main device, and the 5V_Host voltage is pulled high to 5V.
[0034] In this embodiment: Please refer to Figure 3 The signal detection module includes chips UU3 and UU4, both model BL1532. Pin 10 of chip UU4 is connected to one end of resistor RU13. The other end of resistor RU13 is connected to the third terminal of dual-input diode QC1 and one end of resistor RU11. The other end of resistor RU11 is connected to a 3.3V voltage. The first terminal of dual-input diode QC1 is connected to the Type-C interface signal CC_Connect, and the second terminal of dual-input diode QC1 is connected to one end of resistor RU24 and resistor RU... One end of resistor RU25 is grounded, and the other end of resistor RU24 is connected to the type-b interface signal 5V_Host. Pins 7 and 6 of chip UU4 are connected to pins 1 and 2 of chip UU3, respectively. Pin 10 of chip UU3 is connected to one end of resistor RU10 and one end of resistor RU16 through resistor RU14. The other end of resistor RU16 is grounded, and the other end of resistor RU10 is connected to the type-b interface signal 5V_Host. Pins 4, 5, 6, and 7 of chip UU3 are connected to the shared read module.
[0035] In this embodiment: Please refer to Figure 4 The shared reading module includes interface CN1, which is a USB-TP-C interface. Pins 6, 7, 18, and 19 of interface CN1 are connected to the signal detection module.
[0036] USB solution sharing:
[0037] When the monitor's Type-C interface is connected to the host or main device, Figure 3 In the middle, CC_Connect is pulled high, flowing to the dual-input diode QC1, reaching the Switch, and then through resistor RU13 to pin 10 of chip UU4 (USB 2.0 switch, analog switch). When pin 10 of chip UU4 is high, Figure 5 The input signals from pins 36 and 37 of the USB uplink port UP-1 of chip UU2 are sent to pins 1 and 2 of chip UU4. Pins 7 and 6 of chip UU4 output signals to pins 1 and 2 of chip UU3. Since pin 10 of chip UU3 has no voltage at this time, the output is from pins 4 and 5 of chip UU3, directly to the USB port of the Type-C interface. Figure 4 As shown (corresponding to Type-C), it realizes 4 inputs and 1 output shared follow of Type-C access, and can directly call the display's USB downstream port A-1, USB downstream port A-2, USB downstream port A-3, USB downstream port A-4 to connect slave devices, such as USB flash drives, cameras, microphones, etc.
[0038] exist Figure 6 In the middle (corresponding to type-b), when the monitor's type-B uplink interface is connected to the host or main device, Figure 3 In the circuit, 5V_Host is pulled high to 5V, then divided to 3.3V by resistors RU24 and RU25, reaching the switch. It then passes through resistor RU13 to pin 10 of chip UU4. When pin 10 of chip UU4 is high... Figure 5 The input signal from pins 36 and 37 of the USB uplink port UP-1 of chip UU2 is sent to pins 1 and 2 of chip UU4. Pins 7 and 6 of chip UU4 output to pins 1 and 2 of chip UU3. Since 5V_Host is pulled high, pin 10 of chip UU3 is high, so the signal is output from pins 6 and 7 of chip UU3, directly reaching… Figure 6 The monitor's Type-B uplink interface forms a complete USB signal, enabling direct access to the monitor's USB downlink ports A-1, A-2, A-3, and A-4, connecting to slave devices such as USB flash drives, cameras, and microphones.
[0039] When neither the monitor's Type-C nor Type-B uplink interface is connected, pin 10 of chip UU4 is low. Pins 36 and 37 of the USB uplink port UP-1 of chip UU2 input signals to pins 1 and 2 of chip UU4, and pins 4 and 5 of chip UU4 output signals directly to the monitor's main chip. This enables the monitor to share and read the USB downlink ports A-1, A-2, A-3, and A-4 of chip UU2, connecting to slave devices such as USB flash drives, cameras, and microphones.
[0040] When the monitor is simultaneously connected to both the Type-C and Type-B uplink interfaces, CC_Connect and 5V_Host are pulled high simultaneously. When pin 10 of chip UU4 is high, pins 36 and 37 of the USB uplink port UP-1 of chip UU2 input signals to pins 1 and 2 of chip UU4, and pins 7 and 6 of chip UU4 output signals to pins 1 and 2 of chip UU3. Since 5V_Host is pulled high, pin 10 of chip UU3 is at a high level, so signals are output from pins 6 and 7 of chip UU3 to the monitor's Type-B uplink interface, forming a complete USB signal. This allows the monitor's Type-B uplink interface to directly access the monitor's USB downlink ports A-1, A-2, A-3, and A-4, connecting slave devices such as USB flash drives, cameras, and microphones. When both the monitor's Type-C and Type-B uplink interfaces are connected simultaneously, the Type-B output is prioritized to the host or host device.
[0041] The working principle of this utility model is as follows: the Type-C plug-in / plug-out reset module is used to detect when the Type-C interface is inserted into or removed from the host computer (host, main device, etc.) and outputs a low pulse reset signal; the Type-B plug-in / plug-out reset module is used to detect when the Type-B interface is inserted into or removed from the host computer (host, main device, etc.) and outputs a low pulse reset signal; the access signal detection module is used to detect whether the Type-C or Type-B interface is inserted and feeds back the signal to the shared reading module; the shared reading module is used to perform shared following based on the feedback signal.
[0042] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects.
[0043] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
Claims
1. An interface logic follow-up hardware reset circuit, characterized in that, The interface logic follows the hardware reset circuit, including: The Type-C plug-in / plug-out reset module is used to output a low-pulse reset signal when the Type-C interface is plugged into or unplugged from the host computer. The type-b plug-in / plug-out reset module is used to output a low pulse reset signal when the type-b interface is plugged into or unplugged from the host computer. The access signal detection module is used to detect whether the type-c or type-b interface is inserted and to send a feedback signal to the shared reading module. The shared read module is used for shared following based on feedback signals; The Type-C plug-in reset module is connected to the access signal detection module, the Type-B plug-in reset module is connected to the access signal detection module, and the access signal detection module is connected to the shared reading module.
2. The interface logic follows the hardware reset circuit according to claim 1, characterized in that, The Type-C plug-in reset module includes transistors Q1 and QE11. The emitter of transistor Q1 is connected to one end of capacitor CU16 and the negative terminal of diode DC4. The collector of transistor Q1 is connected to one end of resistor RU14 and the first terminal of dual-input diode QC15. The base of transistor Q1 is connected to one end of resistor RU42. The other end of capacitor CU16 is grounded. The anode of diode DC4 is connected to one end of resistor RU40 and one end of resistor RU39. The other end of resistor RU40 is grounded. The other end of resistor RU39 is connected to the other end of resistor RU42 and capacitor CU17. One end of resistor RU43 is connected to the Type-C interface signal CC_Connect. The other end of resistor RU43 is grounded. The other end of capacitor CU17 is connected to one end of resistor RU44 and one end of resistor RU45. The other end of resistor RU44 is grounded. The other end of resistor RU45 is connected to the second end of dual-input diode QC15. The third end of dual-input diode QC15 is connected to the base of transistor QE11. The emitter of transistor QE11 is grounded. The collector of transistor QE11 is connected to one end of resistor RU46. The other end of resistor RU46 is connected to a 3.3V voltage.
3. The interface logic follows the hardware reset circuit according to claim 1, characterized in that, The Type-B plug-in reset module includes transistors Q2 and QE12. The emitter of transistor Q2 is connected to one end of capacitor CU18 and the cathode of diode DC5. The collector of transistor Q2 is connected to one end of resistor RU49 and the first terminal of dual-input diode QC16. The base of transistor Q2 is connected to one end of resistor RU50. The other end of capacitor CU18 is grounded. The anode of diode DC5 is connected to one end of resistor RU48 and one end of resistor RU47. The other end of resistor RU48 is grounded. The other end of resistor RU47 is connected to the other end of resistor RU50, one end of capacitor CU19, and resistor RU51. One end of the capacitor CU19 is connected to one end of the resistor RU56, and the other end of the resistor RU56 is connected to the 5V_Host signal of the type-b interface. The other end of the resistor RU51 is grounded. The other end of the capacitor CU19 is connected to one end of the resistor RU52 and one end of the resistor RU53. The other end of the resistor RU52 is grounded. The other end of the resistor RU53 is connected to the second end of the dual-input diode QC16. The third end of the dual-input diode QC16 is connected to the base of the transistor QE12. The emitter of the transistor QE12 is grounded. The collector of the transistor QE12 is connected to one end of the resistor RU54. The other end of the resistor RU54 is connected to a 3.3V voltage.
4. The interface logic follows the hardware reset circuit according to claim 1, characterized in that, The access signal detection module includes chips UU3 and UU4, both model BL1532. Pin 10 of chip UU4 is connected to one end of resistor RU13. The other end of resistor RU13 is connected to the third terminal of dual-input diode QC1 and one end of resistor RU11. The other end of resistor RU11 is connected to a 3.3V voltage. The first terminal of dual-input diode QC1 is connected to the Type-C interface signal CC_Connect, and the second terminal of dual-input diode QC1 is connected to one end of resistor RU24 and resistor RU2... One end of resistor RU25 is grounded, and the other end of resistor RU24 is connected to the type-b interface signal 5V_Host. Pins 7 and 6 of chip UU4 are connected to pins 1 and 2 of chip UU3, respectively. Pin 10 of chip UU3 is connected to one end of resistor RU10 and one end of resistor RU16 through resistor RU14. The other end of resistor RU16 is grounded, and the other end of resistor RU10 is connected to the type-b interface signal 5V_Host. Pins 4, 5, 6, and 7 of chip UU3 are connected to the shared read module.
5. The interface logic follows the hardware reset circuit according to claim 4, characterized in that, The shared reading module includes interface CN1, which is a USB-TP-C interface. Pins 6, 7, 18, and 19 of interface CN1 are connected to the signal detection module.