Electrostatic induction thyristor drive circuit with negative voltage turn-off

Abstract

The application relates to a static induction thyristor driving circuit with negative pressure shutdown, which comprises a static induction thyristor SITH, an N-channel MOS tube Q1 and an N-channel MOS tube Q2; a signal PWM1 is connected to the gate of the N-channel MOS tube Q1 through a resistor R1, and a signal PWM2 is connected to the gate of the N-channel MOS tube Q2 through a resistor R2; the drain of the N-channel MOS tube Q1 is connected to a +5V voltage, and the source of the N-channel MOS tube Q2 is connected to a -20V voltage; the source of the N-channel MOS tube Q1 is connected to the drain of the N-channel MOS tube Q2, and is connected to the gate of the static induction thyristor SITH through a resistor R4; the two ends of the resistor R4 are also connected to the source and the drain of an N-channel MOS tube Q5; the N-channel MOS tube Q5 is a low-resistance N-channel MOS tube Q5 with an input signal PWM1; the anode of the static induction thyristor SITH is connected to an external voltage, and the cathode is connected to the ground. The driving circuit is high in flexibility and good in reliability.

Description

Technical Field

[0001] This utility model relates to the field of switch drive technology, specifically to an electrostatic induction thyristor drive circuit with negative voltage turn-off. Background Technology

[0002] With the development of new energy technologies, the demand for power devices in new energy vehicles and high-power consumer electronics is increasing. Electrostatic induction thyristors (SITHs), as voltage-controlled power electronic devices, possess excellent characteristics such as high blocking voltage, large conduction current, low on-state voltage drop, and fast switching speed, and have a very broad application prospect. However, SITHs require a large number of charge carriers to be extracted through the gate during the turn-off process, which necessitates that their drive circuits have a large current-carrying capacity. At the same time, although SITHs have a large reverse blocking voltage, their drive circuits require higher reverse turn-off voltages and greater peak current handling capacity compared to mainstream power electronic devices such as IGBTs and MOSFETs. Therefore, a dedicated drive circuit with high compatibility with SITHs is urgently needed. Summary of the Invention

[0003] To address the problems existing in the prior art, this utility model proposes a highly flexible and reliable electrostatic induction thyristor drive circuit with negative voltage turn-off.

[0004] The electrostatic induction thyristor driving circuit with negative voltage turn-off described in this application includes an electrostatic induction thyristor SITH and an N-channel MOS transistor Q1 and an N-channel MOS transistor Q2 connected to the gate of the electrostatic induction thyristor SITH.

[0005] Signal PWM1 is connected to the gate of the N-channel MOSFET Q1 through resistor R1, and signal PWM2 is connected to the gate of the N-channel MOSFET Q2 through resistor R2; the drain of the N-channel MOSFET Q1 is connected to a voltage of +5V, and the source of the N-channel MOSFET Q2 is connected to a voltage of -20V; the source of the N-channel MOSFET Q1 and the drain of the N-channel MOSFET Q2 are connected, and then connected to the gate of the electrostatic induction thyristor SITH through resistor R4;

[0006] The two ends of the resistor R4 are also connected to the source and drain of the N-channel MOS transistor Q5, respectively, and the drain of the N-channel MOS transistor Q5 is connected to the gate of the electrostatic induction thyristor SITH.

[0007] The N-channel MOSFET Q5 is a low-internal-resistance N-channel MOSFET Q5 with input signal PWM1;

[0008] The anode of the electrostatic induction thyristor SITH is connected to an external voltage, and the cathode is grounded.

[0009] Furthermore, in the electrostatic induction thyristor drive circuit with negative voltage turn-off described in this utility model, the signal PWM1 is connected to capacitor C1 and then to the base of NPN transistor Q3. The emitter of NPN transistor Q3 is grounded, and the collector of NPN transistor Q3 is connected to the drive voltage source through resistor R6.

[0010] The gate of the N-channel MOSFET Q5 is connected to the emitter of both the NPN transistor Q6 and the PNP transistor Q4. The collector of the PNP transistor Q4 is grounded, and the collector of the NPN transistor Q6 is connected to a driving voltage source. The bases of both the NPN transistor Q6 and the PNP transistor Q4 are connected to the collector of the NPN transistor Q3.

[0011] Furthermore, in the electrostatic induction thyristor drive circuit of this invention, the emitter and collector of the NPN transistor Q3 are respectively connected to the positive and negative terminals of the Zener diode DZ1.

[0012] Furthermore, a resistor R5 is connected in parallel across the capacitor C1 of the electrostatic induction thyristor drive circuit described in this utility model.

[0013] Furthermore, in the electrostatic induction thyristor drive circuit described in this invention, a resistor R3 is connected in parallel between the base and emitter of the NPN transistor Q3.

[0014] Furthermore, the driving voltage source of the electrostatic induction thyristor driving circuit described in this utility model is a +12V voltage.

[0015] Furthermore, the on-resistance range of the N-channel MOS transistor Q5 in the electrostatic induction thyristor drive circuit of this invention is 0.005 ohms to 0.01 ohms.

[0016] Furthermore, the signals PWM1 and PWM2 of the electrostatic induction thyristor drive circuit described in this utility model are complementary PWM signals with a dead time between them.

[0017] Compared with the prior art, the present invention has the following beneficial technical effects:

[0018] On the one hand, this invention addresses the characteristic of electrostatic induction thyristors (SITHs) requiring a large current to extract charge carriers for turn-off, significantly improving reverse blocking voltage capability through a negative voltage turn-off architecture. Compared to traditional drive circuits, this design better suits the physical mechanism of SITHs: negative voltage accelerates charge carrier extraction and shortens turn-off time; simultaneously, by precisely setting the -20V threshold, it maximizes the high-voltage blocking advantage of SITHs while avoiding the risk of gate-cathode breakdown. The positive voltage turn-on and negative voltage turn-off driving method adopted in this application better meets the driving requirements of SITHs, and its negative voltage turn-off voltage is higher than that of mainstream power electronic devices.

[0019] On the other hand, the electrostatic induction thyristor drive circuit described in this application is built based on discrete components, which has advantages such as high flexibility, easy maintenance and low cost compared to integrated chips.

[0020] In addition, this application has the following advantages:

[0021] It also employs dual-channel PWM (PWM1 and PWM2) control signals and sets a dead time to ensure the reliability and stability of the drive circuit.

[0022] By replacing the fixed-value resistor with a low-internal-resistance N-channel MOSFET Q5 during reverse pull-out turn-off, the current carrying capacity is greater, the power loss during turn-off is smaller, and the heat generation is less, thus effectively reducing the overall drive power.

[0023] In summary, the electrostatic induction thyristor driving circuit of this application not only meets the driving requirements of electrostatic induction thyristors, but also has the advantages of high adaptability and relatively low cost, which meets the needs of practical applications. Attached Figure Description

[0024] Figure 1 This is a circuit diagram of the electrostatic induction thyristor drive circuit with negative voltage turn-off described in this application;

[0025] Figure 2 This is a timing diagram of the PWM described in this application;

[0026] Figure 3 The simulation diagram is for the sentaurus simulation of SITH described in this application. Detailed Implementation

[0027] To provide a deeper and clearer understanding of the technical content and effects of this invention, detailed embodiments will be described with reference to the accompanying drawings. It should be noted that the embodiments described are merely one possible implementation of the invention and are not limited to all possible implementations. Under the guidance of this invention, those skilled in the art can derive all alternative implementations without inventive effort, and these alternative implementations also fall within the scope of protection covered by this invention. For parts of the derivational embodiments where conditions are not specifically specified, operation should be performed according to industry-standard conditions or conditions recommended by the manufacturer.

[0028] In the following description, unless otherwise specified, the same reference numerals generally refer to the same or similar elements. The embodiments provided herein do not reflect all implementations of the invention, but are merely exemplary embodiments illustrating apparatuses and methods consistent with certain aspects of the claims of the invention. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention.

[0029] An electrostatic induction thyristor drive circuit with negative voltage turn-off includes an electrostatic induction thyristor SITH and an N-channel MOS transistor Q1 and an N-channel MOS transistor Q2 connected to the gate of the electrostatic induction thyristor SITH.

[0030] Signal PWM1 is connected to the gate of the N-channel MOSFET Q1 through resistor R1, and signal PWM2 is connected to the gate of the N-channel MOSFET Q2 through resistor R2; the drain of the N-channel MOSFET Q1 is connected to a voltage of +5V, and the source of the N-channel MOSFET Q2 is connected to a voltage of -20V; the source of the N-channel MOSFET Q1 and the drain of the N-channel MOSFET Q2 are connected, and then connected to the gate of the electrostatic induction thyristor SITH through resistor R4;

[0031] The two ends of the resistor R4 are also connected to the source and drain of the N-channel MOS transistor Q5, respectively, and the drain of the N-channel MOS transistor Q5 is connected to the gate of the electrostatic induction thyristor SITH.

[0032] The N-channel MOSFET Q5 is a low-internal-resistance N-channel MOSFET Q5 with input signal PWM1;

[0033] The anode of the electrostatic induction thyristor SITH is connected to an external voltage, and the cathode is grounded.

[0034] In other embodiments, the signal PWM1 is connected to the base of NPN transistor Q3 after capacitor C1, the emitter of NPN transistor Q3 is grounded, and the collector of NPN transistor Q3 is connected to the drive voltage source through resistor R6.

[0035] The gate of the N-channel MOSFET Q5 is connected to the emitter of both the NPN transistor Q6 and the PNP transistor Q4. The collector of the PNP transistor Q4 is grounded, and the collector of the NPN transistor Q6 is connected to a driving voltage source. The bases of both the NPN transistor Q6 and the PNP transistor Q4 are connected to the collector of the NPN transistor Q3.

[0036] In other embodiments, the emitter and collector of the NPN transistor Q3 are connected to the positive and negative terminals of the Zener diode DZ1, respectively.

[0037] In other embodiments, a resistor R5 is connected in parallel across the two ends of the capacitor C1.

[0038] In other embodiments, a resistor R3 is connected in parallel between the base and emitter of the NPN transistor Q3.

[0039] In other embodiments, the driving voltage source is a +12V voltage.

[0040] In other embodiments, the on-resistance of the N-channel MOSFET Q5 is in the range of 0.005 ohms to 0.01 ohms.

[0041] In other embodiments, the signals PWM1 and PWM2 are complementary PWM signals with a dead time between them. Example 1:

[0042] The present invention provides an electrostatic induction thyristor drive circuit with negative voltage turn-off, such as... Figure 1 As shown, it includes an electrostatic induction thyristor SITH and N-channel MOS transistors Q1 and Q2 connected to the gate of the electrostatic induction thyristor SITH.

[0043] Signal PWM1 is connected to the gate of the N-channel MOSFET Q1 through resistor R1, and signal PWM2 is connected to the gate of the N-channel MOSFET Q2 through resistor R2; the drain of the N-channel MOSFET Q1 is connected to a voltage of +5V, and the source of the N-channel MOSFET Q2 is connected to a voltage of -20V; the source of the N-channel MOSFET Q1 and the drain of the N-channel MOSFET Q2 are connected, and then connected to the gate of the electrostatic induction thyristor SITH through resistor R4;

[0044] The two ends of the resistor R4 are also connected to the source and drain of the N-channel MOS transistor Q5, respectively, and the drain of the N-channel MOS transistor Q5 is connected to the gate of the electrostatic induction thyristor SITH.

[0045] The N-channel MOSFET Q5 is a low-internal-resistance N-channel MOSFET Q5 with input signal PWM1;

[0046] The anode of the electrostatic induction thyristor SITH is connected to an external voltage, and the cathode is grounded.

[0047] In this embodiment 1, the signal PWM1 is connected to the base of NPN transistor Q3 after capacitor C1, the emitter of NPN transistor Q3 is grounded, and the collector of NPN transistor Q3 is connected to the drive voltage source through resistor R6.

[0048] The gate of the N-channel MOSFET Q5 is connected to the emitter of both the NPN transistor Q6 and the PNP transistor Q4. The collector of the PNP transistor Q4 is grounded, and the collector of the NPN transistor Q6 is connected to a driving voltage source. The bases of both the NPN transistor Q6 and the PNP transistor Q4 are connected to the collector of the NPN transistor Q3.

[0049] The emitter and collector of the NPN transistor Q3 are connected to the positive and negative terminals of the Zener diode DZ1, respectively. A resistor R5 is connected in parallel across the capacitor C1. A resistor R3 is also connected in parallel between the base and emitter of the NPN transistor Q3.

[0050] In this embodiment 1, the driving voltage source is +12V. The on-resistance of the N-channel MOSFET Q5 is in the range of 0.005 ohms to 0.01 ohms. The signals PWM1 and PWM2 are complementary PWM signals with a dead time between them.

[0051] The electrostatic induction thyristor (SITH) described in this application exhibits a large injection effect when turned on, injecting a large number of charge carriers. When turned off, these injected charge carriers need to be extracted. Negative voltage can accelerate the extraction process, and using negative voltage drive can increase the blocking voltage of the SITH, thereby maximizing its actual design performance. This application employs a -20V negative voltage turn-off voltage, which meets the negative voltage requirements for the SITH turn-off.

[0052] like Figure 3 As shown, Figure 3 The graph shows the IV curve of a SITH simulated using Sentaurus. Different reverse gate voltages (Vg) are indicated by different colors for easy differentiation. The graph shows that the reverse blocking voltage of the SITH increases with increasing negative gate voltage. A negative gate voltage of -20V is sufficient to meet the driving requirements of most SITHs, allowing them to leverage their large reverse blocking voltage advantage. If the negative gate voltage continues to increase, the marginal effect becomes increasingly significant; further increasing the negative gate voltage will not significantly reduce the reverse turn-off time of the SITH. Simultaneously, further increasing the negative gate voltage can lead to breakdown between the gate and cathode of the SITH, causing it to lose its device function.

[0053] In this embodiment 1, signals PWM1 and PWM2 control the on and off states of N-channel MOSFETs Q1 and Q2, respectively. The two MOSFETs conduct alternately, thereby controlling the alternating switching of N-channel MOSFETs Q1 and Q2. N-channel MOSFETs Q1 and Q2 are connected to +5V and -20V DC voltage sources, respectively. The alternating switching of N-channel MOSFETs Q1 and Q2 causes the +5V and -20V voltages to be alternately transmitted to the gate of the electrostatic induction thyristor SITH, thereby controlling the on and off states of SITH, thus achieving control and drive of the electrostatic induction thyristor SITH.

[0054] In this embodiment 1, the N-channel MOSFET Q5 is driven by an inverting circuit. When the PWM1 signal is high, the N-channel MOSFET Q5 is off; when the PWM1 signal is low, the N-channel MOSFET Q5 is on. When the control signal PWM1 is high, the NPN transistor Q3 is on, and the +12V external voltage reaches GND through resistor R6 and the NPN transistor Q3. At this time, the bases of the PNP transistors Q4 and Q6 are at a low level. Therefore, the NPN transistor Q6 is off, the PNP transistor Q4 is on, and the gate of the N-channel MOSFET Q5 is connected to GND and is at a low level, meaning the N-channel MOSFET Q5 is in a cutoff state.

[0055] When the control signal PWM1 is low, NPN transistor Q3 is cut off. At this time, the bases of PNP transistors Q4 and Q6 are high, so NPN transistor Q6 is turned on and PNP transistor Q4 is cut off. The gate of N-channel MOSFET Q5 is connected to the +12V power supply and is high, so N-channel MOSFET Q5 is turned on.

[0056] Simultaneously, when signal PWM1 is high, N-channel MOSFET Q1 is turned on and N-channel MOSFET Q2 is turned off. At the same time, N-channel MOSFET Q5 is also turned off. The +5V voltage is transferred to the gate of the electrostatic induction thyristor SITH through N-channel MOSFET Q1, turning SITH on. Since the gate current of SITH is relatively large when it is turned off, the extremely low internal resistance N-channel MOSFET Q5 is needed to release the charge, effectively reducing the turn-off power consumption of SITH. When signal PWM1 is low, N-channel MOSFET Q1 is turned off and N-channel MOSFET Q2 is turned on. At this time, a -20V negative voltage is transferred to the gate of SITH. Due to the negative voltage, the injected carriers are quickly extracted from the gate through N-channel MOSFET Q5 during turn-on. Simultaneously, the negative voltage increases the potential barrier inside SITH, forcing SITH to enter the turn-off state.

[0057] like Figure 2 As shown, signals PWM1 and PWM2 are complementary PWM signals with a dead time between them. The dead time refers to the time during which neither N-channel MOSFET Q1 nor N-channel MOSFET Q2 is turned on. Both N-channel MOSFETs Q1 and Q2 are turned on when the external PWM signal is high and turned off when it is low. Therefore, it is necessary to avoid the simultaneous conduction of N-channel MOSFETs Q1 and Q2, as this would cause a short circuit and burn out many circuit components. Thus, signals PWM1 and PWM2 are used in an alternating conduction manner, and a dead time is set to prevent Q1 and Q2 from conducting simultaneously.

Claims

1. A drive circuit for an electrostatic induction thyristor with negative voltage turn-off, characterized in that, It includes an electrostatic induction thyristor SITH and N-channel MOS transistors Q1 and Q2 connected to the gate of the electrostatic induction thyristor SITH; Signal PWM1 is connected to the gate of the N-channel MOSFET Q1 through resistor R1, and signal PWM2 is connected to the gate of the N-channel MOSFET Q2 through resistor R2; the drain of the N-channel MOSFET Q1 is connected to a voltage of +5V, and the source of the N-channel MOSFET Q2 is connected to a voltage of -20V; the source of the N-channel MOSFET Q1 and the drain of the N-channel MOSFET Q2 are connected, and then connected to the gate of the electrostatic induction thyristor SITH through resistor R4; The two ends of the resistor R4 are also connected to the source and drain of the N-channel MOS transistor Q5, respectively, and the drain of the N-channel MOS transistor Q5 is connected to the gate of the electrostatic induction thyristor SITH. The N-channel MOSFET Q5 is a low-internal-resistance N-channel MOSFET Q5 with input signal PWM1; The anode of the electrostatic induction thyristor SITH is connected to an external voltage, and the cathode is grounded.

2. The electrostatic induction thyristor drive circuit with negative voltage turn-off according to claim 1, characterized in that, The signal PWM1 is connected to the base of NPN transistor Q3 after capacitor C1. The emitter of NPN transistor Q3 is grounded. The collector of NPN transistor Q3 is connected to the drive voltage source through resistor R6. The gate of the N-channel MOSFET Q5 is connected to the emitter of both the NPN transistor Q6 and the PNP transistor Q4. The collector of the PNP transistor Q4 is grounded, and the collector of the NPN transistor Q6 is connected to a driving voltage source. The bases of both the NPN transistor Q6 and the PNP transistor Q4 are connected to the collector of the NPN transistor Q3.

3. The electrostatic induction thyristor drive circuit with negative voltage turn-off according to claim 2, characterized in that, The emitter and collector of the NPN transistor Q3 are connected to the positive and negative terminals of the Zener diode DZ1, respectively.

4. The electrostatic induction thyristor drive circuit with negative voltage turn-off according to claim 2, characterized in that, A resistor R5 is connected in parallel across the two ends of the capacitor C1.

5. The electrostatic induction thyristor drive circuit with negative voltage turn-off according to claim 2, characterized in that, A resistor R3 is also connected in parallel between the base and emitter of the NPN transistor Q3.

6. The electrostatic induction thyristor drive circuit with negative voltage turn-off according to claim 2, characterized in that, The driving voltage source is a +12V voltage.

7. The electrostatic induction thyristor drive circuit with negative voltage turn-off according to claim 1, characterized in that, The on-resistance range of the N-channel MOSFET Q5 is 0.005 ohms to 0.01 ohms.

8. The electrostatic induction thyristor drive circuit with negative voltage turn-off according to claim 1, characterized in that, The signals PWM1 and PWM2 are complementary PWM signals with a dead time between them.

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