DEVICE FOR READING AND DECODING QUANTUM INFORMATION

Description

Domaine de l'invention

[0001] 1. The invention relates to the reading and decoding of quantum information, within the framework of the implementation of electronic or computer circuits based on quantum bits, or qubits. Etat de la technique

[0002] 2. Quantum computing is a developing technical field based on the use of a two-level measurable quantum state as an information vector, called a quantum bit or "quantum bit" in English, or commonly a qubit.

[0003] 3. Various implementation technologies exist, including superconducting qubits, based in particular on the use of Josephson junctions, such as charge qubits, notably transmons.

[0004] 4. Furthermore, spin qubit technology is well-established. These qubits consist of an electron or an electron hole (commonly called a hole), with spin 1 / 2, and whose two possible spin orientations define the measurable levels of information. Spin qubits can be formed in semiconductor materials, such as silicon, which have high integration potential. Electrons or holes are individually confined in quantum wells maintained at cryogenic temperatures in a cryostat and fabricated within electrostatically defined nanometer-sized confinement structures called "quantum dots."

[0005] 5. Spin qubit reading, like qubit reading in other technologies, faces numerous challenges. Primarily due to the operating temperature of qubits, generally below 1 K, the environment surrounding them is unfavorable for electronic reading circuits. Furthermore, it is necessary to read a large number of qubits, which implies constraints on power consumption and size. It is also necessary to mitigate electromagnetic noise and minimize read times relative to the coherence time of the qubits.

[0006] 6. Different solutions have been proposed. Electronic reading circuits have been proposed that are located as close as possible to the qubits and therefore at low temperature, or conversely, in a more distant and therefore less cold environment.

[0007] 7. It has also been proposed to use reading techniques either by reflectometry (the qubit is reached using a single cable – excitation and reading are performed using this single cable) or by electrometry, namely using an electrometer, that is, an electronic component that allows reading by measuring charge. Here, we are interested in electrometers called quantum electrometers because they interact with the qubit via quantum dots. Such an electrometer has a charge sensitivity determined by (at least) one pole called the gate, and two reading poles called the source and drain, allowing the creation of a current (or a voltage) by varying the conductance as a function of the charge in the quantum dot.

[0008] 8. With reflectometry reading methods, based on sending a wave of up to a few GHz towards the qubits (superconducting qubits or spin qubits), and on observing the reflected wave, it is generally necessary to bring out of the cryostat a number of wired connections (cables) equal to the number of qubits to be read, which becomes very difficult if the number of qubits is large.

[0009] 9. Alternatively, it is proposed to send several signals at different frequencies via the same wired connection (cable), according to the principle of frequency-division multiplexing, and to process these frequencies differently within the cryostat using adapted LC resonators placed inside it and coupled to each qubit. In this latter solution, the resonant frequency of the LC resonator associated with each qubit must be precisely different for each resonator, which is demanding in terms of hardware and readout time, and therefore currently represents a technological limitation. To generate these closely spaced signals, it is known to synthesize a low-frequency comb with an analog generator, then multiply it by a higher carrier frequency. The reflected signal is then demodulated by this carrier and digitized to extract the signal associated with each qubit.The number of qubits that can be examined is inevitably limited by the bandwidth of the analog generator and the analog-to-digital converter.

[0010] 10. Reflectometry reading methods are known from Park, 2021, Jerger 2012, Abdo 2018, Naaman, 2021 and Bronn, 2022.

[0011] 11. The charge-reading method (and therefore electrometry), for spin qubits, consists first of promoting a spin-to-charge conversion and then measuring an output current generated by capacitive electrostatic coupling with the quantum dot of the spin qubit in a quantum electrometer (i.e., a device measuring electric charge, comprising a quantum contact or quantum dot, which, for measurement purposes, is coupled to the quantum dot of the object to be measured, in this case, a qubit). The qubit's spin is thus converted into current information. A single-electron transistor (SET) or a quantum point contact (QPC) is used, which are non-limiting examples of quantum electrometers.Current detection (a few nanoamps at the output of a SET) is performed using a current-voltage amplifier, of the transimpedance amplifier (TIA) type. These amplifiers can be placed at room temperature (300K), or at a temperature close to 4K or below 1K, with compromises in power consumption and bandwidth.

[0012] 12. Electrometric reading methods are known from Williams, 2009, Gong, 2019 and Morel, 2022. Other electrometric reading techniques are being considered, which instead of being based on a current measurement, are based on a voltage measurement.

[0013] 13. Frequency-division multiplexing can be used to increase the number of qubits achievable for the read operation. This strategy uses a distribution of qubits across the read system's bandwidth by assigning each qubit a different frequency.

[0014] 14. This can be achieved by using hardware resonators coupled to qubits defining different frequencies in the case of reflectometry. A system with hardware resonators coupled to qubits defining different frequencies is known from Jerger (2012), which offers a solution for reducing the number of cables in the cryostat relative to the number of qubits in a reflectometry readout system. The demodulation method is adapted to double the number of qubits read compared to previous techniques, given the available bandwidth, by using one in-phase integration channel and one quadrature integration (IQ) channel, and by individually addressing the high and low bands of the spectrum.But this principle remains limited to a factor of 2 improvement, and also requires doubling the number of demodulation chains or doubling the reading time, whereas we would like to obtain greater simplification to read very many qubits.

[0015] 15. Frequency multiplexing can also be achieved by exciting the pairs formed by the electrometers and their associated qubits with separate circuits. This is advantageous because it allows for changing frequencies without changing the hardware. Morel (2022) proposes using several oscillator-type excitation signal application circuits and demultiplexing the signals with a single integrator per frequency. Unlike Jerger's (2012) system, Morel's (2022) system allows for frequency changes because they are not dictated by the physical components, and it avoids crosstalk between excitations by providing separate lines for the different frequencies.

[0016] 16. No implementation for reading more than 100 qubits using electronic circuits placed in a cryostat is yet known, primarily due to the system's energy consumption. However, error-correcting codes require several dozen, or even hundreds, of qubits to create a single "perfect" logical qubit. Therefore, the ability to read several thousand qubits, or even more, is necessary to develop high-performance quantum computers.

[0017] 17. In this context, and to solve the problems mentioned, it is proposed, according to certain known principles, a quantum device comprising a plurality of qubits, in a low temperature enclosure of the cryostat, and for each qubit of the plurality of qubits, an electrometer coupled to said qubit and subjected on its gate or on its drain to a periodic excitation to transmit to the quantum dot of charge measurement associated with the qubit said excitation, which makes it possible to extract a reading signal of a current state of the qubit, the reading signals of the qubits of the plurality being added on a common reading line of the quantum device, then transmitted to a demultiplexing circuit of the quantum device external to said low temperature enclosure.

[0018] 18. Thus, these principles can be expressed in the form of a reading of the charge by current (the quantum electrometer then has a conductance which varies according to the state of the qubit which is linked to it and it can be a SET, or a QPC, in particular), or by voltage if the electrometer provides a voltage as an output signal.

[0019] 19. But the quantum device is remarkable because the periodic excitations transmitted to a group of several electrometers of the device are transmitted with an identical frequency using a synchronized generation means of the quantum device external to said low temperature enclosure, the quantum device includes phase shifting and possibly amplitude attenuation means in said low temperature enclosure introducing phase shifts and possibly attenuations of distinct amplitudes in the excitations applied respectively to the electrometers of said group.

[0020] 20. Thanks to these characteristics, several qubits can be queried at a single frequency, which, for the same bandwidth, allows for a greater number of qubits to be read simultaneously, with a limited number of cables exiting the cryostat. The component footprint for signal demultiplexing is small, as only one demodulation chain is needed per frequency, thus enabling the querying of multiple qubits. Phase-and-amplitude multiplexing can be used in parallel with frequency-division multiplexing, and complements it (phase-and-amplitude multiplexing and frequency-division multiplexing are used simultaneously).

[0021] 21. Thus, more than one qubit is read per frequency by assigning the same excitation frequency to each qubit, but with a different phase and possibly a different amplitude each time. The output signal, composed of the sum of the output currents of the transistors (Iout), has a phase and amplitude that change depending on the state of each of the qubits excited at the relevant frequency. Finally, this phase and amplitude information is extracted using IQ demodulation. The combinations of qubit states then take the form of a constellation of symbols that can be interpreted, notably by digital decoding.

[0022] 22. To avoid symmetries, one can introduce some form of singularity which allows the symmetries to be eliminated and thus avoid the superposition of different combinations of states (or symbols) in the demodulated information, and consequently allows the latter to be interpreted unambiguously.

[0023] 23. Moreover, the architecture has the advantage of allowing a flexible choice of frequencies, these not being imposed by the hardware and being able to be modified from one use to another, without modifying the hardware.

[0024] 24. According to the invention, only one cable penetrating the cryostat's temperature chamber is required (at least for one frequency), since the phase-shifting and amplitude-attenuating means are located inside the temperature chamber, while the voltage generation means are conventionally at a higher temperature, for example, ambient temperature. The fact that only one cable penetrates the temperature chamber is noteworthy, as it simplifies circuit design and improves its thermal performance. The synchronized generation means is a single generator or a group of synchronized generators.

[0025] 25. In an advantageous and optional manner:26. - The means of phase shifting and possibly amplitude attenuation can be different cable lengths, adjustable phase shifters, injection oscillators, or chains of CMOS inverters. 27. - The electrometers can be divided into several groups, each group receiving an excitation with a frequency distinct from those of the other groups, and the common readout line being shared by the electrometers of the different groups. 28. - Each electrometer can comprise a single-electron transistor, the qubits being spin qubits, the periodic excitation being applied to the gate of the transistor or, more generally, the gate of the electrometer, and the transistor or, more generally, the electrometer and the associated qubit being coupled by capacitive coupling between their quantum dots. Thus, the spin of the qubit is converted into a charge, and then an output current generated by capacitive electrostatic coupling is measured.The spin of the qubit is thus converted into current information. 2 9. - the qubits can be spin qubits, and each qubit and associated electrometer pair are capacitively coupled by quantum dots of both.

[0026] 30. The phases assigned to qubits can be determined according to the following principles: 3 1. - The phases associated with the electrometers of said group can be essentially distributed regularly every 2π / n radians, n being a prime number greater than or equal to 3, and the distribution of the associated symbols in the IQ plane is made secondarily irregular by a singularity in said distribution which constitutes a perturbation in the regularity without calling into question its existence. 3 2. - For example, the number of electrometers in the group can be n-1, any one of the n 2π / n radian values ​​not being assigned to any electrometer in the group. The fact that one of the values ​​is not assigned is the singularity in the distribution. 3 3.- Or, as another example, the signals corresponding to symbols with a single value of 1 (the phases associated with the electrometers) can be distributed in the interval 0 to 2π radians according to a first-order (or at first glance) regular distribution, but including, in a lower order of magnitude (or in a second analysis), a phase shift aimed at eliminating the superposition between the combination of states, or symbol, containing only 0s and the combination of states, or symbol, containing only 1s. - A particular implementation of this principle, which is a non-limiting example, is that the number of electrometers in the group can be n; the phases of a pair of two phases opposite each other with respect to π radians are shifted towards each other with respect to the values ​​they would have had for a strictly regular phase distribution. The shift in values ​​is the singularity in the distribution. 3 4.- Or, as another example, the number of electrometers in the group can be n, with the amplitude of at least one of the excitations being decreased or increased relative to at least one other. The amplitudes are multiplexed (varying for each qubit according to the requirements) in order to limit the symmetries of the chosen phase distribution. This decrease or increase is a singularity, as mentioned above.

[0027] 35. The presence of a singularity allows, as already mentioned, the elimination of symmetries and thus avoids the superposition of different combinations of states (or symbols) in the demodulated information, and consequently allows the latter to be interpreted in a univocal way. 36. Alternatively, the phases associated with the electrometers of said group can be essentially distributed regularly every π / n radians, n being a natural number greater than or equal to 4, and being the maximum number of qubits and electrometers, and their distribution is made secondarily irregular if n is greater than or equal to 5. 37. Alternatively still, the amplitudes are assigned according to the rule starting from n = 1, for odd n, the same amplitude is assigned to qubit n and qubit n+1, and the amplitudes are assigned to each successive odd number by dividing the previous amplitude by 2, the phases associated with the electrometers of said group being successively incremented by π / 2 radians when moving from one qubit to the next, or alternately taking two shifted values ​​of π / 2.

[0028] 38. Other optional features are now mentioned: The low-temperature chamber can be the qubit temperature chamber. In this case, it is the minimum temperature chamber, and it is highly advantageous for few cables to pass through it, given the energy considerations. Alternatively, the low-temperature chamber can be an intermediate-temperature chamber, with the qubits housed in a cryostat chamber that is itself a lower temperature chamber than the low-temperature chamber and located within it. The phase-shifting and amplitude-attenuation devices are located outside the lower-temperature chamber but within the intermediate-temperature chamber, which also contains an amplifier to amplify the signal on the common readout line. This refers to a cryostat with successive chambers of decreasing size, the coldest chamber being installed within the intermediate-temperature chamber.The device can store, for example in computer memory, a prior characterization of the response of the quantum device through said quadrature demodulation means to the possible combinations of states of the qubits associated with the quantum electrometers of said group and at said identical frequency for said given phase shift distribution, the discrimination means using said prior characterization. Using the prior characterization that was obtained before operation and stored for the operation of the quantum device makes it possible to interpret the demodulated information and to identify the combinations of states of the qubits read during the operation of the device.

[0029] 42. The means of discrimination can be numerical and perform discriminations by region of interest or by nearest neighbor search to identify combinations of states in the complex plane.

[0030] 43. The quantum electrometer can be built on the basis of a one-electron transistor but it can also be built on the basis of a quantum point contact, the qubits being spin qubits.

[0031] 44. The quantum device may include, for transmitting information outside of a cryostat in which the qubits and quantum electrometers (typically SETs) are placed, to the demultiplexing circuit which is placed outside said cryostat, a single radio frequency transmission line.

[0032] 45. The quantum device may include on the transmission line an amplification chain with a bandwidth of 40 MHz, whose output signal-to-noise ratio is equal to 1.383 or more in order to ensure a reader fidelity of 99.99%, the demodulation means having a read time on the order of 1 µs.

[0033] 46. ​​The quantum device may also include on the transmission line a transimpedance amplifier, for example with a capacitive network, with shunt feedback, of the regulated cascode type, or of the push-pull type, amplifying the read signals of the qubits of the group and possibly of other qubits, in particular the qubits of another group of qubits, the associated electrometers receiving another frequency, before their transmission in amplified form to the demultiplexing circuit.

[0034] 47. Demultiplexing means may use quadrature demodulation methods and thus perform homodyne or heterodyne demodulation. They may also include a fast Fourier transform carried out after digitization of the read signal. Brève description des dessins

[0035] 48. The invention will be better understood and other advantages will become apparent upon reading the following description, given by way of non-limiting example, and with the help of the accompanying figures, among which: 49. The figures 1A et 1B are representations of a qubit reading circuit according to the principles of the invention. 50. The figure 2 shows a particular aspect of the invention. 51. The figure 3 shows a first example of the application of qubit reading according to the invention, in a case with 2 different phases for one frequency, arranged in a simple manner. 52. The figure 4 shows the implementation of an aspect of an embodiment of the invention in the case of the figure 3 53. The figure 5 On the left, it shows a 3-phase implementation which is not preferred but is used for explanation purposes, and on the right, an example of qubit reading according to the invention, for 2 phases and based on the distribution shown on the left for 3 phases. 54. The figure 6 shows an example of a constellation of possible combinations for a particular implementation with 4 phases per frequency. 55. The figure 7 shows an example of a constellation of possible combinations for a particular implementation with 6 phases per frequency. 56. The figure 8A shows another example of qubit reading according to the invention, but with three phases for one frequency, and a different implementation from that presented in figures 3 à 7 57. The figure 8B shows another example of qubit reading according to the invention, again with three phases for one frequency, and a different implementation from that shown in the preceding figures. 58. The figure 8C shows another example of the distribution of state combinations composed of a single 1 in the I,Q plane. 59. The figure 8D shows yet another example of the choice of stimuli, and the figure 8E the associated reading constellation in the IQ plane; and the figures 8F And 8G Here is yet another example. 60. The figures 9 à 12 show four technical variants of implementing a qubit reading circuit according to the invention. 61. The figure 13 shows a variant of the transistor connection circuit to one electron of the figure 1A or of the figure 1B . Description détaillée des dessins

[0036] 62. [ Fig. 1A In reference to the figure 1A A qubit reading circuit has been represented according to an embodiment of the invention. It is based on a charge reading, with frequency demultiplexing.

[0037] 63. It is built around silicon spin qubits, placed in a cryostat at very low temperature, and in the example described, less than one kelvin (1 K). The spin qubits are each capacitively coupled to a single-electron transistor (SET), placed in contact with it in the cryostat.

[0038] 64. Qubits are shown, forming two groups, and referenced for the first group as qubit 11, qubit 12, ... qubit 1M and for the second group as qubit 21, ... but the invention uses a larger number of qubits, for example on the order of tens, hundreds or more, grouped into a number n of groups each comprising a number M of qubits, M being a natural number at least equal to 2, which can vary from one group to another. The number n of groups is at least 1.

[0039] 65. The associated SETs, one per qubit, are respectively referenced as SET S11, SET S12, ... SET S1M and SET S21.... Each has one or more gates G, as well as a source S and a drain D, which are identified in the figure for SET S11. Depending on the spin of the qubit (i.e., its state, in the case of a spin qubit), the SET's conductance varies. This effect occurs through an interaction between the respective quantum dots of the qubit and the SET.

[0040] 66. The drains D of the SETs are connected to one or more constant (or possibly non-constant) potentials, and therefore, depending on the spin of the qubit, the SET delivers a current on its source S, or does not deliver one, or delivers, depending on the circumstances, one or the other of two distinct current levels, both non-zero.

[0041] 67. Qubit groups are also groups of SETs, each qubit being in fact linked to a SET which is specifically dedicated to it.

[0042] 68. The SETs are voltage-excited by voltage generators, typically sinusoidal (but which can be square or triangular), as shown on the left side of the figure. Each SET is excited separately by its gate G (shown in the figure) or by its drain D (not shown). The SETs in the same group are excited at the same frequency, generated by a voltage generator common to these SETs (or possibly by separate but synchronized generators). There are thus n sinusoidal voltage generators of different frequencies, one such generator (or set of separate but synchronized generators) per group of SETs. Thus, on the figure 1A , SETs S11, S12 ... and S1M are excited by a sinusoidal voltage generator V1 of frequency f1, and SET S21 is excited by a sinusoidal voltage generator V2 of frequency f2.

[0043] 69. In the embodiment presented, the n generators V1, V2... are placed at room temperature and emit signals of a few mV at frequencies ranging from 1 MHz to approximately 100 MHz. Each generator is connected by a transmission line entering the cryostat to the SETs of the qubits in the qubit group that receive the frequency generated by the generator in question. However, in a variant, it is also possible to place the n generators inside the cryostat, thus avoiding the need for excitation cables to enter the cryostat from outside. The invention nevertheless proposes that the phase shifters be at a lower temperature stage than the generators V1, V2...

[0044] 70. A phase shift (or simply phase, for simplicity) possibly associated with an amplitude attenuation, specific to each SET, is inserted between the generator of its group and the grid of the particular SET, by phase shifters D11, D12, ... D1M and D21.... These distinct shifts are equal in number to the SETs of the group in question, which, for the first group shown in the figure, is M, as already mentioned. Phases Phi1, Phi2... and PhiM (between 0 and 2π) are thus inserted between the generator V1 and each of the SETs S11... S1M, respectively. Other phases, identical to or different from Phi1, Phi2, and PhiM, are inserted between the generator V2 and the SETs of the second group, the first of which, in the figure, is SET 21, the only one shown for simplicity.Other phases are inserted, SET by SET, between voltage generators of other frequencies, different from f1 and f2, and the SETs of other groups of SETs, not shown in the figure. Passive phase shifters (such as a difference in interconnection length, for example, an additional length of cable, e.g., coaxial cable, inducing a phase shift and possibly significant amplitude attenuation) are, in one embodiment, used to very simply construct the phase shifters D11, D12, ... D1M and D21.... The phase shifters can also be injection oscillators or CMOS inverter chains.

[0045] 71. The output currents of the SETs, appearing at their source S and which are on the order of nanoamperes (nA), are collected and summed on a conductive line 50 in close proximity to the SETs, in the qubit cryostat. This line is common to all the qubits of a group of qubits (here qubits 11, 12, ... 1M for the first group), or even in the example shown in the figure, to the qubits of all the groups (here qubits 11, 12, ... 1M, 21 ...).

[0046] 72. The resulting current, the sum of the currents collected and added on this line, is amplified by an amplification chain 100 (comprising one or more amplifiers), then read by a demodulation circuit 200 shown on the right side of the figure. The reading time step is on the order of a microsecond (µs), related to the order of magnitude of the decoherence phenomenon of spin qubits on silicon.

[0047] 73. Thus, as described above, phase multiplexing is implemented on the transmission line 50 during current collection, and also, if there are at least two groups of qubits, as is the case in the figure, frequency multiplexing in addition to phase multiplexing. Several qubits are excited with a voltage at the same frequency, but with a phase specific to each qubit. In this way, the number of qubits per frequency is M.

[0048] 74. The choice of frequencies as before and, and this is new and original, the choice of phase distribution and amplitude attenuations are flexible, and can be decided after the circuit is manufactured, and also modified for the same circuit, since they are not imposed by the electrical components, especially the components placed in the cryostat.

[0049] 75. The demodulation chain(s) forming the demodulation circuit 200 can be constructed in integrated or non-integrated form and they can be chains by which the demultiplexing is analog or digital, the result being finally digitized in the proposed variants.

[0050] 76. The figure 1A shows separate chains by frequency (one chain for f1 in the upper part of the figure, then one chain for f2, and other chains for the other frequencies are not shown, but may be present), in which mixers generate the I component and the Q component using two waves of frequency f1 phase-shifted from each other by 90°, thus constituting quadrature demodulation means 198. The I and Q components are then processed, for each frequency, by analog-to-digital converters 199.

[0051] 77. The demodulation circuit 200 can be placed at different temperatures: the temperature of the qubits (less than 1K), the ambient temperature (around 300 K), or an intermediate temperature (for example 4K), in which case it may be advantageous, but not mandatory, to also place the frequency generators V1, V2, ... in the enclosure of the stage at this intermediate temperature, to make their signal available for the purpose of carrying out the mixing necessary to extract the I and Q components.

[0052] 78. The embodiment presented further combines phase and frequency multiplexing. For n different frequencies, with M different phases, n*M qubits can be read by generating only n frequencies and having only n IQ demodulation chains, namely one for each frequency.

[0053] 79. There may be only one output cable from the coldest temperature stage for nx M qubit, this output being able to be before or after the amplification chain 100, or between two successive segments thereof.

[0054] 80. There is little crosstalk between qubits because there is a physical separation of the excitations, which are done by distinct interconnections carrying the phase shifters D11, D12, ... D1M, D21 ..., different for each qubit, even within the same group of qubits excited at the same frequency.

[0055] 81. The amplification chain 100 includes a transimpedance amplifier (TIA) (which converts a current into a voltage) placed, for example, at the same temperature as the qubits, i.e., in the described embodiment, less than 1 K. In the embodiment of the figure 1A (ou figure 1B The gain of the read chain is entirely achieved by the TIA, which is capable of amplifying the output current of the SETs, which is on the order of a few nA. For this purpose, the TIA has a gain on the order of 1,000,000 V / A or more. Furthermore, given the read time on the order of microseconds, it has a bandwidth on the order of a few tens of MHz. A low-power TIA (on the order of a hundred microwatts) is chosen, which allows it to be placed in the cryostat as close as possible to the qubits, at the same temperature as them, i.e., at a temperature on the order of 100 mK. Naturally, a low-noise TIA is selected. A "capacitive feedback" TIA architecture, as disclosed by Razavi in ​​2000, is used in a particularly interesting variant.

[0056] 82. The signal on the radio frequency transmission line 50, before demodulation, but after conversion by the TIA is an output voltage.

[0057] 83. IQ demodulation extracts the complex I and Q components of the signal and transmits them to an analog-to-digital converter 199, which places the signal's amplitude and phase in the complex plane. These components are represented as constellations of points called symbols, corresponding to combinations of the states of the qubits excited at the frequency used for the relevant demodulation chain. These constellations will be discussed later.

[0058] 84. Preliminary characterizations of the response, as seen by the demodulation circuits 198, of the qubits to excitations at different frequencies f1, f2, ... as a function of the qubit states have been stored in memories 201 (or memory addresses) of the demultiplexing circuit 200 associated with each frequency f1, f2, ... These preliminary characterizations are compared, by discrimination means 202, to the measured complex components I and Q to recognize the current combination of states (the current symbol) of the qubits excited at the relevant frequency. The discrimination means 202 can be an ASIC (application-specific integrated circuit) or a DSP (digital signal processor).

[0059] 85. A similar discrimination method (not shown), which may be the same ASIC or DSP, is provided to process the information obtained by the demodulation chain focusing on frequency f2. It allows the state of qubit 21 and other qubits not shown in the figure to be deduced from the multiplexed signal. The same applies to the other frequencies used (not shown).

[0060] 86. [ Fig. 1B In reference to the figure 1B A qubit reading circuit is shown according to a second embodiment of the invention. It is based on a charge readout, with frequency demultiplexing, and incorporates elements of the circuit of the figure 1A .

[0061] 87. The qubits, SETs, generators, and phase shifters are arranged and connected together as in figure 1A An amplification chain 100 is present at the output of the SETs and this time leads to an analog-to-digital converter 180, which digitizes the output signal across the entire bandwidth. Thus, the analog-to-digital converter 180 processes the signals at different frequencies f1, f2, ... For this, a converter is chosen whose bandwidth extends up to a frequency twice the maximum bandwidth limit of the amplification chain (the TIA, and / or a voltage-to-voltage amplifier).

[0062] 88. The output of the analog-to-digital converter 180 is taken up and processed by a fast Fourier transform module 181, in an ASIC or a DSP, which provides (or projects) an amplitude and a phase in the complex plane separately for each of the frequencies f1, f2, ....

[0063] 89. [ Fig. 2 In figure 2 The IQ demodulation used, for the case of two phases separated by π / 2, is represented with respect to a single frequency f1. Other frequencies can be processed by parallel demodulation circuits downstream of the TIA transimpedance amplifier, which then allows reading several pairs of qubits arranged upstream of the TIA, with one frequency per pair of qubits.

[0064] 90. By stopping at the figure 2 where a single frequency is used, the same sinusoidal excitation voltage at frequency f1 is generated and sent to the gate of both SETs in the system. For one of the transistors, it is applied directly to the gate of the SET coupled to qubit 1. For the other transistor, it is phase-shifted by a different value Phi before being applied to the gate of the SET coupled to qubit 2. Here, the value Phi = π / 2.

[0065] 91. As mentioned in the introduction, SETs exhibit different behaviors depending on the state of the qubit to which they are attached. If the attached qubit is in state 1, the SET transmits the excitation applied to its gate as a current to its output, reproducing in particular the frequency f1 and the phase (here, 0 or π / 2). If the qubit attached to the SET is in state 0, the SET does not transmit its excitation, and no current is present at the SET output. The presence or absence of the excitation frequency and phase specific to the output of each SET is thus dependent on the state of the qubit attached to the SET.

[0066] 92. The currents of the SETs are summed and then the sum is applied to the input of the amplification chain 100 comprising a transimpedance amplifier TIA which converts it into voltage and amplifies the signal.

[0067] 93. The information constituted by the state of each qubit is then extracted from this signal. Two channels are used: one channel extracting the information contained in the signal that has not been phase-shifted, which is classically called signal I, and one channel extracting the information contained in the signal that has undergone quadrature phase shifting (of π / 2 or - π / 2) and which is classically called the Q signal.

[0068] 94. The figure 2 takes advantage of the fact that the phase brought to SET S12 is π / 2, which means that the same phase shifter is used in two distinct circumstances (the phase shift of one SET relative to the other, and then the IQ demodulation), but if this phase applied to the SET S12 is different, a phase shifter of π / 2 for demodulation and another, separate, phase Phi for SET S12 (which is envisaged in figure 1A (although with a higher number of phases).

[0069] 95. The demodulator uses two series chains, each consisting of a multiplier 210, an integrator filter 220, and a comparator 230, to convert the information contained in the two signals (I and Q) into two 1-bit binary words. A 1-bit analog-to-digital converter is thus formed by the series connection of the multiplier, integrator, and comparator. At the beginning of the chain are applied the amplified signal from the TIA and the sinusoidal reference voltage (phase-shifted from each other by π / 2) to which it is multiplied, and at the output of the chain, the information provided simultaneously by the two comparators 230 is counted for a sufficient time and then decoded by a digital threshold comparator 500 using lookup tables 510, for example by a region of interest type extraction, allowing the current combination 550 of the states of qubits 11 and 12 to be deduced unambiguously and reliably. The digital threshold comparator is implemented in the form of an ASIC or a DSP, and constitutes a means of discriminating the states of qubits excited at the frequency f1.

[0070] 96. In more detail, the output signal of the TIA (V out) is multiplied by the same excitation signals (with phase differences) as those applied to the respective SETs. This allows testing both channels to determine the presence or absence of the excitation frequency. If the frequency is present in V out, the output of the corresponding multiplier 210 exhibits a voltage with a DC component in addition to a sinusoidal component. If the frequency is absent, then the output of the multiplier is a sinusoidal signal without DC voltage (or even a zero signal).

[0071] 97. Integrator 220 integrates the DC component of the voltage, if present, as an output ramp that eventually reaches a calibrated threshold in comparator 230, whose output transitions from a high level (0) to a low level (1). If no DC voltage is present at the multiplier's output, then the integrator's output does not reach the comparator's threshold, and its output remains at 0 (high level).

[0072] 98. The state of the qubits is thus expressed at the output of the two comparators as two voltage levels that can be interpreted as two logic levels and therefore two binary words. The generated binary words are compared with pre-established thresholds stored in the lookup table 510 to determine the states of the qubits 550.

[0073] 99. [ Fig. 3 A constellation in the complex plane for two phases per frequency is presented in figure 3 Thus, two excitation signals at the same frequency are sent to a first and second SET respectively, but with a phase difference between the two signals. The figure represents the complex space IQ. The first phase is conventionally taken to be 0 radians, while the second phase, in this embodiment, is at π / 2 radians. Signals can be represented by points called symbols in the IQ plane or as vectors I+jQ.

[0074] 100. There are therefore four possible combinations of states depending on whether the first qubit is in state 0 or 1 and whether the second qubit is also in state 0 or 1. The figure shows the signal for these different possibilities. Qubit1 = 0 Qubit1 = 1 Qubit2 = 0 Signal A Signal B Qubit2 = 1 Signal C Signal D

[0075] 101. The phase and amplitude of the sum of the output signals of the different SETs (I out en figure 1A ) thus depend on the state of the qubits, in the form of an addition of complex numbers or vectors. Thus, the figure 3 shows that D = B + C.

[0076] 102. [ Fig. 4 In one embodiment, state combinations are discriminated in the complex plane using various techniques based on a prior calibration of the output constellation by applying each input state combination to multiple occurrences. From this statistically determined constellation, a unique method is established for identifying each state combination in the demodulated signal under the operating conditions of the quantum device.

[0077] 103. One method is to use boundaries in the complex plane, using the Region of Interest (ROI) technique. ROI can use square, circular, or elliptical boundaries, or any other shape that proves advantageous, in the complex plane. Inside these closed curves defining regions of the plane, a positive signal indicates the presence of the combination of states associated with that region, as determined by prior characterization. The characteristic size of the regions in the complex plane using ROI depends directly on the desired read fidelity, the read noise, and the signal integration time. Therefore, there is a trade-off between the number of qubits read simultaneously and the fidelity of each read, for a given TIA and read time.

[0078] 104. [ Fig. 5 If the number of SETs and qubits is larger, and there are then m different phases, there are 2^m (m power of 2) possible combinations of states.

[0079] 105. If the chosen phase distribution exhibits symmetry (which is possible as soon as two phases are used, but this has been avoided in figures 2 à 4 ), combinations of states overlap, making it impossible to read all the information present in the qubits. To overcome this difficulty, phase and amplitude distribution schemes are implemented to eliminate or reduce symmetries in the constellations of state combinations and thus read all the information present.

[0080] 106. In one embodiment, the number of different phases is a number less than the value 1 (i.e., less than one unit, or resulting from the difference of the chosen number and the number 1) than a chosen prime number greater than or equal to 3 (3, 5, 7, 11, ...).

[0081] 107. Once the number of phases has been determined, they are equally distributed in the interval 0 to 2π around the unit circle, but as if an additional phase were planned, and their number were indeed equal to the chosen prime number. One planned position is therefore left unoccupied.

[0082] 108. Thus, if the prime number used is p, we plan an equidistribution with a step of 2π / p radians, and we only put in place, on this distribution, p-1 phases, one of the places being unoccupied, for example the last one.

[0083] 109. Thanks to this method, the combination of states composed only of 0s, and the combination of states composed only of 1s are distinct, due to the unoccupied position of one of the places, and all combinations including 0s and 1s are also distinct, due to the prime nature of the chosen number.

[0084] 110. This is illustrated on the figure 5 For p = 3, the figure shows, on the left, the constellation of possible state combinations as long as all the positions defined for 3 phases are occupied. By leaving one or more of the 3 positions unoccupied, as is done on the right side of the figure, it is possible to obtain a distinct symbol for each state combination in the complex plane. In the figure, the symbols 010, 110, 000, and 100 are used; the symbols 011, 001, 111, and 101 no longer appear. If all the positions of the equidistributed state had been used, the symbols 000 and 111 would have been superimposed, which is undesirable. The third digit is always 0, and the four symbols appearing in the constellation are 01 in the upper left dial, 11 in the upper right dial, 00 in the center of the plane and 10 on the x-axis of the positive side.

[0085] 111. This is an alternative to the distribution proposed in figure 3 , which also had the property of discriminating between combinations for two phases.

[0086] 112. [ Fig. 6 This is also illustrated in figure 6 For p = 5, and using 4 phases, 5 being a prime number as we know. We have represented the constellation of possible state combinations with 4 phases per frequency following an equally distributed 5-phase arrangement.

[0087] 113. For this figure, a transimpedance amplifier gain of 10⁶ V / A, an amplifier bandwidth of 40 MHz, a current of 1 nA for the single-electron transistors, and an equivalent input noise of 0.1 x 10⁻²⁷ A² / Hz were also chosen. The symbols are clearly distinct and cannot be confused.

[0088] 114. The number of phases implemented for a given frequency is essentially limited by the noise of the amplification chain. Indeed, the standard deviation or dispersion of each symbol, and therefore the risk of partial overlap, is linked to the noise of the amplification chain, as well as to the reading time.

[0089] 115. [ Fig. 7 ] There figure 7 shows a constellation of 6 phases per frequency following an equal distribution for 7 phases (7 being a prime number as already mentioned), again for a transimpedance amplifier gain of 10 6< V / A, an amplifier bandwidth of 40 MHz, a current of one-electron transistors of 1 nA, and an equivalent input noise of a value of 0.1.10^-27 A 2< / Hz).

[0090] 116. [ Fig. 8A In another embodiment, illustrated in figure 8A , the signals corresponding to the symbols with a single value of 1 are distributed in the interval 0 to 2π radians according to a first order (or first approach) regular distribution but including, in a lower order of magnitude (or in second analysis), a phase shift aimed at eliminating the superposition between the symbols comprising only 0s and those comprising only 1s.

[0091] 117. The number of different qubits is this time a prime number greater than or equal to 3 (3, 5, 7, 11, ...), and the signals corresponding to the symbols with a single value of 1 are equally distributed in the interval 0 to 2π around the unit circle (with equal amplitudes), all the positions thus defined being occupied by a qubit. Thus, if the prime number is p, an equal distribution with a step size of 2π / p radians is planned, and the p signals corresponding to the symbols with a single value of 1 are placed on this distribution, all the positions being occupied.

[0092] 118. Thus, all combinations including both 0s and 1s are distinct, due to the prime nature of the chosen number.

[0093] 119. The shift mentioned above is implemented to distinguish the remaining combinations, namely the combination which includes only 0s, and the one which includes only 1s, which, due to symmetries, risk being superimposed if no action is taken.

[0094] 120. Thus, certain symbols with a single value of 1 are slightly shifted, so that symbols consisting only of 0s and symbols consisting only of 1s are no longer superimposed.

[0095] 121. An illustration is presented in figure 8A for the case where p = 3, for which we have moved (from the configuration of the left part of the figure 5 ) along the unit circle, to move them away from the point (I = 1 ; Q = 0), the second and third symbols have a single value of 1, which results in a displacement of the combinations of states 010 and 001 along the unit circle and of the combinations of states 110, 011 and 101 outside of it.

[0096] 122. These displacements do not call into question the possibility of distinguishing these combinations of states from others, and also result in the appearance of a shift between the combinations of states 111 and 000 (it is 111 that moves), which makes it possible to distinguish them, which was not possible without the shift implemented for qubits 2 and 3.

[0097] 123. Alternatively, one could simply shift more than one pair of phases. Or one of the phases towards the other, leaving the other phase unchanged.

[0098] 124. The figure provided does indeed present the case described, but the idea behind it is mainly the contribution of some singularity in the distribution.

[0099] 125. [ Fig. 8B In another embodiment, illustrated in figure 8B , the signals corresponding to the symbols with a single value of 1 are distributed in the interval 0 to 2π radians according to a regular distribution, but including an amplitude shift aimed at eliminating the superposition between the symbol containing only 0s and the symbol containing only 1s.

[0100] 126. The number of signals corresponding to symbols with a single value of 1 that differ (i.e., the number of qubits) is again a prime number greater than or equal to 3 (3, 5, 7, 11, ...), and the signals corresponding to symbols with a single value of 1 are equally distributed (as in figure 8A ), in first analysis, in the interval 0 to 2π around the trigonometric circle, all the places thus defined being occupied by a signal.

[0101] 127. An amplitude shift is introduced on one of the signals corresponding to a symbol with a single value of 1, such that the symbols consisting only of 0s and consisting only of 1s are no longer superimposed.

[0102] 128. An illustration is presented in figure 8B for the case where p = 3, for which we have moved outside the unit circle, to bring it closer to the point (I = 0 ; Q = 0), the signal 001, which results in a displacement of the symbols of the combinations of states 011, 101 and 111.

[0103] 129. These displacements do not call into question the possibility of distinguishing these combinations of states from others, and also result in the appearance of a shift between the combinations of states 111 and 000 (it is 111 that moves), which makes it possible to distinguish them, which was not possible without the shift implemented for qubit 3.

[0104] 130. [ Fig. 8C In another embodiment, four phases are evenly distributed over only one half of the unit circle by choosing phases equal to π / 8, 3 π / 8, 5 π / 8, 7 π / 8 for each of the signals corresponding to a symbol with a single value of 1. By distributing them over half of the trigonometric circle, we break the symmetry linking the combination of states 0..00 and the combination of states 1..11. In addition, by distributing them in a semicircle, the amplitudes no longer cancel each other out, but add up, which solves the symmetry problems linked to a choice of 4 phases per frequency.

[0105] 131. To generalize this trigonometric semicircle distribution technique to a maximum number of phases, minor adjustments are made. Indeed, beyond four phases per frequency, it is necessary to introduce a shift, for example, in the phase distribution of a single trigonometric quarter circle. Alternatively, as before for a full circle distribution, it is possible to introduce a shift on one or more phases. Thus, all symmetry is broken, and the distribution is normally compatible for any number of phases. It is also important to avoid placing a phase at the center of the semicircle when positioning an odd number of phases.

[0106] 132. The figure 8C shows a distribution on an equally distributed, off-center semicircle.

[0107] 133. Thus, as already mentioned, more than one qubit is read per frequency by assigning the same excitation frequency to each qubit, but with a different phase and amplitude each time. The output signal, composed of the sum of the output currents of the transistors (Iout), has a phase and amplitude that change according to the state of each of the qubits excited at the relevant frequency. Finally, this phase and amplitude information is extracted using IQ demodulation. The combinations of qubit states then take the form of a constellation of symbols that can be interpreted, notably by digital decoding.

[0108] 134. The figures 8D , 8E et 8F , 8G They show two other possible and interesting phase distributions. These both approach a QAM constellation, known to be optimized in terms of symbol spacing (or state combination).

[0109] 135. [ Fig. 8D In figure 8D An amplitude and phase distribution is established on the complete unit circle (360°). To assign a phase to the different ordered qubits, the phases are successively incremented by π / 2 radians when moving from one qubit to the next qubit in the list. The amplitudes, meanwhile, are chosen as follows: starting from n = 1, for odd n, the same amplitude is assigned to qubit n and qubit n+1, and the amplitudes are assigned to each successive odd number by dividing the previous amplitude by 2. The distribution obtained for 6 qubits is presented in figure 8D .

[0110] 136. [ Fig. 8E The resulting state combinations are represented in figure 8E It is possible to place any number of qubits per frequency, whether that number is prime or not. The IQ plane is optimally occupied.

[0111] 137. [ Fig. 8F In another variant, the phases are alternately 0 and π / 2 (or any other pair of phases separated by π / 2). Next, the amplitudes are assigned as before: starting from n = 1, for odd n, the same amplitude is assigned to qubit n and qubit n+1, and the amplitudes are assigned to each successive odd number by dividing the previous amplitude by 2. The distribution obtained for 6 qubits is shown in figure 8F .

[0112] 138. [ Fig. 8G The resulting state combinations are represented in figure 8G Again, it is possible to place any number of qubits per frequency, whether that number is prime or not. The first quadrant of the IQ plane is still optimally occupied.

[0113] 139. These two choices of quadrature phase distributions and power-of-2 amplitude distributions correspond respectively to interpreting the qubit states as negabinary words (phases at 0, π / 2, π and 3π / 2, the π and 3π / 2 phases being equivalent to amplitudes in powers of -2) or binary words (phases at 0 and π / 2) on each I and Q axis. 140. These phase and amplitude distributions are powerful in terms of occupancy of the IQ plane.

[0114] 141. In a circuit where the main objective is to achieve a read time of 1 to 2 µs, it is proposed to place 2 or 3 phases per frequency. In a circuit where increasing the number of qubits is the priority, even at the cost of a longer read time, it is proposed to place 4 or 5 phases per frequency for a read time of around ten µs.

[0115] 142. By using several frequencies, the read chain can reach a hundred qubits with a single electrical cable coming out of the cryostat enclosing the qubits, with a read time of 1 µs and a consumption of around 100 µW.

[0116] 143. [ Fig. 9 ] To figures 9 à 12 Two frequency generators, f1 and f2, are shown, along with two qubits for frequency generator f1 and one qubit for frequency generator f2. However, this number of qubits was chosen for ease of representation. The invention provides for a frequently higher number of frequencies and several, and often more than two, qubits per frequency. figures 9 à 12 They are not discussing this, but rather the temperature at which the amplification chain and phase inverters are installed. The two phase inverters shown for frequency f1 are labeled φ11 and φ12, and the phase inverters for frequency f2 are not shown. They are installed in a stage at a lower temperature than the frequency generators f1, f2, ..., and a single cable, per frequency, enters their temperature stage from outside that stage (i.e., entering a cryostatic chamber). This cable is then split into several parallel cables carrying the same frequency inside the temperature chamber of the phase inverters.

[0117] 144. The gain chain is, in an embodiment presented in figure 9 , consisting essentially of a TIA in the cryostat of the qubits and SETs, and therefore at a very low temperature T0 (less than 1K in one embodiment), as represented in figure 9 The input capacitance of the TIA (related to the input line length) can be low, which is advantageous, but conversely, the output capacitance (also related to the output line length) is inevitably quite high, which can be disadvantageous. Similarly, the TIA, which must offer a high gain on the order of 10⁶ V / A, must consume little power, on the order of 100 µW, and must not produce noise that would prevent a read accuracy greater than 99.99% in a few µs. This positioning of the TIA within the cryostat therefore imposes constraints on the TIA, which it is proposed to reduce by positioning the TIA outside the coldest temperature stage in an alternative embodiment.

[0118] 145. The signal-to-noise ratio at the output of a 40 MHz bandwidth amplification chain has a limiting value of 1.383 to ensure a reader fidelity of 99.99%, with the demodulation means having a read time on the order of 1 µs. The value of 1.383 is the signal-to-noise ratio required at the output of the 40 MHz bandwidth amplification chain to achieve a bit error rate (BER) of 0.01% for OOK (On-Off Keying) demodulation with a read time of 1 µs (and therefore an integration time of 1 µs). OOK demodulation corresponds to the case with only one phase per frequency. The relationship is as follows: BER = 1 / 2 erfc(√(SNR) / (2√2)).

[0119] 146. The phase shifters φ11 and φ12 and the other phase shifters are placed in the cryostat at temperature T0.

[0120] 147. [ Fig. 10 Alternatively, as represented in figure 10 The TIA is placed in an intermediate temperature environment T1 (for example, 4 K), between the temperature T0 of the spin qubit stage and ambient temperature. This is similar to a cryostat with successive chambers of decreasing size, the coldest chamber being installed within the intermediate temperature chamber. At such an intermediate temperature stage, the power budget is more permissive than below 1 K; therefore, this TIA is less constrained in terms of power consumption than the TIA in the previous embodiment, which was placed below 1 K. This placement of the TIA thus offers greater flexibility in its use than that of the previous embodiment.

[0121] 148. Again, the phase shifters φ11 and φ12 and the other phase shifters are placed in the cryostat at temperature T0, but they could be placed in the stage at temperature T1, especially if the frequency generators are in the stage at temperature T2.

[0122] 149. [ Fig. 11 In another embodiment, represented in figure 11 A first-gain TIA, for example 10,000 V / A, precedes on the (single, as before) read line an amplifier, for example a low-noise LNA (voltage / voltage) amplifier, with a second gain, for example 100. The combined effect of the two amplifiers provides an overall gain of 1,000,000 V / A. The two amplifiers are physically connected in series at an intermediate temperature T1, between the temperature of the spin qubit stage and ambient temperature. This is similar to a cryostat with successive chambers of decreasing size, the coldest chamber being installed inside the intermediate-temperature chamber. This design reduces the design and operating constraints on the TIA, which, with a lower gain, can have a larger bandwidth, on the order of 100 MHz, without increasing power consumption.The LNA can have a bandwidth of around 100 MHz and consume approximately 1 mW. The TIA, which is preferentially directly connected to the second amplifier to take advantage of the fact that they are in the same cryostatic chamber, and consequently has no transmission line at its output, has a lower output capacitance which allows for high performance.

[0123] 150. Again, the phase shifters φ11 and φ12 and the other phase shifters are placed in the cryostat at temperature T0, but they could be placed in the stage at temperature T1, especially if the frequency generators are in the stage at temperature T2.

[0124] 151. [ Fig. 12 In another embodiment, represented in figure 12 A TIA precedes a second amplifier, such as an LNA, on the read line. However, the two amplifiers are physically located in environments with different temperatures: the TIA is close to the qubits and SETs in the very low-temperature stage, for example, below 1K, and therefore has a low input capacitance, which is advantageous. On the other hand, having an intermediate-stage amplifier limits the output capacitance of the TIA, which is also beneficial. The second amplifier can be placed at an intermediate temperature.

[0125] 152. Again, the phase shifters φ11 and φ12 and the other phase shifters are placed in the cryostat at temperature T0, but they could be placed in the temperature stage T1, especially if the frequency generators are in the temperature stage T2. This again refers to a cryostat with successive chambers of decreasing size, the coldest chamber being installed in the intermediate temperature chamber.

[0126] 153. The amplification chain can be built using several discrete circuits, and / or using one or more integrated circuits.

[0127] 154. The IAD can have various architectures, including capacitive feedback or capacitive network, push-pull (or symmetrical configuration), shunt-feedback, or regulated cascode. These architectures are described in the publications Razavi, 2000 and Romanova, 2019. A preferred IAD has the widest possible bandwidth, the highest possible gain, low power consumption, and low noise generation.

[0128] 155. In the embodiments of figures 9 à 12 The frequency generators are preferably at the same temperature as the demodulation circuit. This temperature is denoted T2, and it can be ambient temperature (approximately 300 K), but it can also be T1.

[0129] 156. Thus, in another embodiment, the voltage generators are placed at an intermediate temperature level, between ambient temperature and the temperature of the qubits. This temperature choice can optimize the system's energy consumption and the placement of cables through the cryostat. In yet another embodiment, the voltage generators are placed at the temperature of the qubits, within the cryostat, which minimizes the number of cables passing through and entering the cryostat.

[0130] 157. Voltage generators are constructed using discrete or integrated circuits. A ring oscillator topology, also known as a square wave generator, is particularly suitable. In other embodiments, voltage generators are constructed as injection oscillators or relaxation oscillators. The excitation by these voltage generators is applied to the gate of the relevant SET transistor. Its frequency is adapted to each group of qubits to which a given frequency is assigned, and for each qubit, it is phase-shifted and attenuated by an amplitude according to the principles of the invention.

[0131] 158. The signals from all the SETs are combined before demodulation onto a common cable (a radio frequency transmission line transmitting a frequency-multiplexed signal). The demodulation circuits can therefore be located at room temperature, as the number of cables passing through the cryostat is limited, since there is only one cable. They can also be located at low temperatures if this is advantageous for implementation.

[0132] 159. In some embodiments, the demodulation chain is implemented in an intermediate temperature stage, for example between 4K and 10K. In these different situations, it is advantageous that the temperature stage for the qubits, which maintains a temperature below 1K, is traversed by only a single outgoing cable and does not contain the demodulation electronics.

[0133] 160. Demodulation can be homodynic (as described above) or heterodynic, in which case an intermediate frequency is used. In some implementations, the heterodynic solution allows for a reduction in noise in the demodulation chain and an increase in its bandwidth.

[0134] 161. An analog demodulation chain is used in one embodiment. In another embodiment, demodulation is performed using a digital signal processor (DSP), and in yet another embodiment, an ASIC is programmed to perform the demodulation.

[0135] 162. Discrimination is performed using a region of interest (ROI) technique, employing circles, ellipses, rectangles, or even squares as a form of discrimination in the plane. It can also be carried out by nearest neighbor identification.

[0136] 163. Thus, a large number of phases per frequency are used, despite the residual noise (after all design efforts to reduce it) of the amplification and demodulation chain.

[0137] 164. Phase-division multiplexing as presented above applies to a charge-reading of spin qubits on silicon, through SETs whose conductance varies according to the state of the qubit, and also to the reading of other quantum devices, such as spin qubits on silicon using a QPC whose conductance varies according to the state of the qubit.

[0138] 165. [ Fig. 13 ] SETs can be connected for excitation not through their gate but through their drain, as shown in figure 13 Then the gate is connected to a fixed or non-fixed potential. And the drain receives the periodic voltage, with the frequency assigned to a group of several qubits, and among these the phase specifically assigned to the qubit in question.

[0139] 166. It is further specified that the SETs, in figure 1A (and following) or in figure 13 They may include other grids. These are connected to a fixed or variable potential.

[0140] 167. It is also specified that the SETs can be replaced by electrometers providing a voltage response, and the output voltages of the electrometers are added together. To perform such an addition, while maintaining the parallel connection of the electrometers, a capacitor of a given value C (identical for each electrometer) is added in series to the output of each electrometer. The second terminals of the different capacitors are connected together at a node, and a capacitor of the same value is placed in parallel, one of its terminals to ground and its other terminal to the node mentioned above. Thus, if the electrometers have a potential output, the capacitors thus placed form a capacitive voltage divider, and the potential at the node is then proportional to the sum of the output potentials of the electrometers.

[0141] 168. Then the added voltages are amplified, for example by an LNA, and then demodulated to recover the signals of the different qubits, which are excited at the same frequency, but with phase shifts.

[0142] 169. The invention allows for the reading of more qubits while maintaining the same performance of an amplification block (a TIA and / or a voltage-to-voltage amplifier). The number of cables entering one of the temperature chambers, potentially the coldest temperature chamber, remains unchanged, which is remarkable. Liste des documents cités

[0143] Park, 2021 : Park et al., A fully integrated cryo-CMOS SoC for state manipulation, readout and high-speed gate pulsing of spin qubits, IEEE Journal of solid state circuits, vol. 56, n° 11, 3289-3306 Jerger, 2012: Jerger et al., Frequency division multiplexing readout and simultaneous manipulation of an array of flux qubits arXiv:1205.6375v2 Morel, 2022: EP4016402A1 Abdo, 2018: WO2018 / 185542 Naaman, 2021: WO2021 / 061776 Bronn, 2022: US2022 / 0140927 Gong, 2019: Gong et al. Design Considerations for Spin Readout Amplifiers in Monolithically Integrated Semiconductor Quantum Processors, 2019 IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts, 2 - 4 June 2019, IEEE Catalog Number: CFP19MMW-POD Razavi, 2000: "A 622 Mb / s 4.5 pA / / spl radic / Hz CMOS transimpedance amplifier," 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), San Francisco, CA, USA, 2000, pp. 162-163, doi: 10.1109 / ISSCC.2000.839732.Romanova, 2019: Romanova et Barzdenas "A Review of Modern CMOS Transimpedance Amplifiers for OTDR Applications. Electronics 2019, 8, 1073. https: / / doi.org / 10.3390 / electronics8101073 Williams, 2009 : EP2075745A1.

Claims

1. Quantum device comprising a cryostat, a plurality of qubits (11, 12, ... , 1M, 21...) in a temperature enclosure of the cryostat, and for each qubit of the plurality of qubits, an electrometer (511, S12, ... S1M, 521...) coupled to said qubit to extract a signal for reading a current state of the qubit, the signals for reading qubits of the plurality being added on a common reading line (50) of the quantum device, then transmitted to a demultiplexing circuit (200) of the quantum device, the periodic excitations transmitted to a group of several electrometers (S11, S12, ... S1M) of the device being it with an identical frequency (f1) using a synchronized generation means (V1, V2, ...) of the quantum device external to said temperature enclosure, the quantum device being, in addition, characterized in that it comprises phase shift and amplitude attenuation means (Phil, Phi2, ... PhiM) in said temperature enclosure introducing distinct phase shifts in the excitations applied respectively to the electrometers (S11, S12, ... S1M) of said group.

2. Quantum device according to claim 1, wherein the phase shift means (Phi1, Phi2, ... PhiM) are also amplitude attenuation means.

3. Quantum device according to claim 1 or claim 2, wherein the phase shift means (Phi1, Phi2, ... PhiM) are different cable lengths, adjustable phase shifters, injection oscillators or CMOS inverter chains.

4. Quantum device according to any one of claims 1 to 3, wherein the electrometers (S11, S12, ... S1M, 521...) are distributed into several groups, each group receiving an excitation with a frequency (f1, f2) distinct from those of the other groups, and the common reading line (50) being common to the electrometers of the different groups.

5. Quantum device according to any one of claims 1 to 4, wherein each electrometer (S11, S12, ... S1M, 521...) comprises a transistor with an electron, the reading signal being a current.

6. Quantum device according to any one of claims 1 to 5, wherein the qubits are spin qubits, and each qubit pair and associated electrometer is capacitively coupled by quantum dots to one another.

7. Quantum device according to any one of claims 1 to 6, wherein the phases associated with the electrometers of said group are mainly distributed regularly every 2π / n radians, n being a natural first integer greater than or equal to 3, and the distribution of the signals associated with the symbols in the plane IQ is made secondarily irregular.

8. Quantum device according to claim 7, wherein the number of electrometers of the group is n-1, any of the n values 2π / n radians not being attributed to any electrometer of the group.

9. Quantum device according to claim 7, wherein the number of electrometers of the group is n, and the phases associated with the electrometers are distributed in the interval 0 at 2π radians according to a regular first-order distribution, but comprising, in an order of magnitude less than a phase offset removing the superimposition between the symbol only comprising 0s and the symbol only comprising 1s.

10. Quantum device according to claim 7, wherein the number of electrometers of the group is n, the amplitude of one of the excitations at least being decreased or increased with respect to at least one other, in order to limit the symmetries of the chosen phase distribution.

11. Quantum device according to any one of claims 1 to 6, wherein the phases associated with the electrometers of said group are mainly distributed regularly every π / n radians, n being a natural integer greater than or equal to 4, and n being the maximum number of electrometers, and their distribution is made secondarily irregular, if n is greater than or equal to 5.

12. Quantum device according to any one of claims 1 to 6, wherein the amplitudes are attributed according to the rule from n = 1, for n odd, the same amplitude is attributed to the qubit n and to the qubit n+1, and the amplitudes are attributed to each successive odd number by dividing the preceding amplitude by 2, the phases associated with the electrometers of said group being successively incremented of π / 2 radians, by passing from one qubit to the next qubit, taking alternatively two offset values of π / 2.

13. Quantum device according to any one of claims 1 to 12, wherein said temperature enclosure is the temperature enclosure (T0) of the qubits.

14. Quantum device according to any one of claims 1 to 12, wherein said temperature enclosure is an intermediate temperature enclosure (T1), the qubits being in a lower temperature enclosure (T0) than said intermediate temperature enclosure (T1) and internal to it, and the phase shift means (Phil, Phi2, ... PhiM) being outside of the lower temperature enclosure (T0) but inside the intermediate temperature enclosure (T1), which also contains an amplifier (100) to amplify the signal on the common reading line (50).