Game machine

Abstract

To provide a game machine which can improve an interest in a game.SOLUTION: A first performance constituted by including at least a first display mode in a privilege game state in which at least a first state is set is executed by first performance execution means. When a specific condition is satisfied in a state in which the first performance is executed at least by the first performance execution means, the first display mode is updated by update means. Moreover, when a second specific condition different from the specific condition is satisfied, the first display mode is updated too. Therefore, it is possible to provide a game machine which can improve an interest in a game.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a gaming machine such as a pachinko machine. [Background technology]

[0002] Conventionally, in some games machines such as pachinko machines, when a game ball enters the start port provided on the game board surface, a lottery is made to win or not, and if the lottery result is a winning result, a bonus game is performed in an advantageous position for the player. [Prior Art Documents] [Patent Document]

[0003] [Patent Document 1] Japanese Unexamined Patent Publication No. 2001-17717 Summary of the invention [Problems to be solved by the invention]

[0004] However, there was a need for further improvement in the fun of the game.

[0005] The present invention has been made to solve the above-mentioned problems and the like, and an object of the present invention is to provide a gaming machine that can improve the fun of games. Means for solving the problem

[0006] In order to achieve this objective, the gaming machine according to claim 1 has a discrimination means for performing the determination based on the establishment of a given discrimination condition, and a bonus game state setting means for setting a bonus game state advantageous to the player based on the establishment of a predetermined specific discrimination result, and a first state setting means for setting a first state in which a predetermined first control is executed based on the establishment of a given setting condition, a firing means capable of firing a game ball, a passing means provided at a position where a game ball fired in a first direction can pass by the firing means, and a passing means based on the passing means of the game ball passing through the passing means. 固合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合用方法合

[0007] The gaming machine according to claim 2 is configured in the gaming machine according to claim 1, in which it is easier to fire a game ball in the first direction during a specified period after being set to the second state during the bonus game state than to fire a game ball in a second direction different from the first direction.

[0008] The gaming machine according to claim 3 is configured in the gaming machine according to claim 2, in a given state that is set to the second state but not in the bonus game state, it is easier to fire a game ball in the second direction than to fire a game ball in the first direction. [Effects of the invention]

[0009] According to the gaming machine as set forth in claim 1, the game machine has a discrimination means for performing the determination based on the establishment of a given discrimination condition, and a bonus game state setting means for setting a bonus game state advantageous to the player based on the establishment of a predetermined specific discrimination result, and the game state setting means for setting a first state in which a predetermined first control is executed based on the establishment of a given setting condition, a firing means capable of firing a game ball, a passing means provided at a position where a game ball fired in a first direction can pass by the firing means, and a passing means that can be established based on the passage of the game ball through the passing means. 固可以上述方法合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合物合

[0010] This has the effect of improving the fun of the game.

[0011] According to the gaming machine according to claim 2, in addition to the effects produced by the gaming machine according to claim 1, the following effects are achieved. That is, it is easier to fire the game ball in the first direction during the specified period after being set to the second state during the bonus game state than to fire the game ball in a second direction different from the first direction.

[0012] This has the effect of improving the fun of the game.

[0013] According to the gaming machine according to claim 3, in addition to the effects produced by the gaming machine according to claim 2, the following effects are achieved. That is, in a given state that is set to the second state but not to the bonus game state, it is easier to fire the game ball in the second direction than to fire the game ball in the first direction.

[0014] This has the effect of improving the fun of the game. [Brief description of the drawing]

[0015] [Figure 1] 1 is a front view of a pachinko machine in the first control example. [Figure 2] 1 is a front view of a pachinko machine game board. [Figure 3] 1 is a rear view of a pachinko machine in the first control example. [Figure 4] 1 is a front view of the gaming board of the pachinko machine in the first control example. [Figure 5] 10A is a schematic diagram showing a structure of a variable winning unit provided in the area under the front view of the game board of a pachinko machine in the first control example, and (b) is a schematic diagram showing a flow path of a ball that has been won in the variable winning unit in the first control example. [Figure 6] 10A is a diagram schematically showing area division settings and effective line settings of the display screen in the first control example, and (b) is a diagram illustrating an example of an actual display screen in the first control example. [Figure 7] 10A is a diagram showing an example of a display mode when the reach is established in the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode during which normal pattern changes are executed in the normal state displayed on the third pattern display device in the first control example. [Figure 8] 10A is a diagram showing an example of a display mode in which a game of a popular game (a game of a game of long open) is performed during the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode in which a chance zone is set during the normal state displayed on the third pattern display device in the first control example. [Figure 9] 10.

[0021] FIG. 10A is a diagram showing an example of a display mode in which the third pattern is temporarily stopped during the special change effect displayed on the third pattern display device in the first control example, and FIG. 10B is a diagram showing an example of a display mode in which the third pattern is restarted in the special change effect executed when the special change effect displayed on the third pattern display device in the first control example is acquired while the special change effect displayed on the third pattern display device is acquired. [Figure 10] 10 is a diagram showing an example of a display mode when the third pattern is restarted in a special variation effect executed when the special chart 2 pending ball displayed on the third pattern display device in the first control example is not acquired. [Figure 11] 1. (a) is a diagram showing an example of the display mode for the first half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of the display mode for the first half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example, and (c) is a diagram showing an example of the display mode for the second half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (d) is a diagram showing an example of the display mode for the second half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example. [Figure 12] 6A and 6B are diagrams showing an example of a display mode of a game state suggestion performance executed during the chance mode displayed on the third pattern display device in the first control example. [Figure 13]10.sub.1 (a) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the display mode is displayed during a period other than the high-speed fluctuation period (during the normal fluctuation period), and (b) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the frame button is operated during a period other than the high-speed fluctuation period (during the normal fluctuation period). [Figure 14] 10A is a diagram showing an example of the display mode of operational performance during the high-speed fluctuation period among the chance modes displayed on the third pattern display device in the first control example, and (b) shows an example of the display modes displayed on the third pattern display device in the first control example, when a frame button is operated during the operational performance during the high-speed fluctuation period. [Figure 15] 10. (a) is a diagram showing an example of a display mode in which the first special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of a display mode in which the second special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example. [Figure 16] 10 is a timing chart showing the flow of the performance when a fluctuation pattern in which a non-reach variation effect is set as a variation effect for the third pattern in the first control example, and (b) shows the flow of the performance when a fluctuation pattern in which a reach variation effect is set as a variation effect for the third pattern in the first control example. [Figure 17] (a) is a timing chart showing the flow of the performance during the ending period for a normal jackpot in the first control example, (b) is a timing chart showing the flow of the performance during the ending period for a special jackpot in the first control example, and (c) is a timing chart showing the flow of the performance during the ending period for a special jackpot in the first control example, and (c) is a timing chart showing the flow of the performance when the ball does not flow down the specific area (V gate) during the special jackpot game in the first control example. [Figure 18] (a) and (b) are timing charts showing the flow of the performance mode set after the jackpot game is completed in the first control example. [Figure 19] 6A and 6B are timing charts showing the flow of the operational performance in the chance mode in the first control example. [Figure 20] 14 is a diagram showing a game flow of a pachinko machine in the first control example. [Figure 21] 1 is a block diagram showing the electrical configuration of a pachinko machine in the first control example. [Figure 22] 1 is a diagram schematically showing the structure of various counters in the first control example. [Figure 23] 10 is a block diagram showing the configuration of the ROM of the main control device in the first control example, and (b) shows the configuration of the RAM of the main control device in the first control example. [Figure 24] 1A and 1B are diagrams schematically showing the specified contents of the first random number table set in the ROM of the main control device in the first control example, and (b) schematically shows the specified contents of the second random number table set in the ROM of the main control device in the first control example. [Figure 25] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table set in the ROM of the main control device in the first control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table set in the ROM of the main control device in the first control example. [Figure 26] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the normal table set in the ROM of the main control device in the first control example. [Figure 27] 14 is a diagram schematically showing the specified contents of the special-mode and time-saving table set in the ROM of the main control device in the first control example. [Figure 28] 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the first control example, and (b) shows the configuration of the RAM of the audio lamp control device in the first control example. [Figure 29] 10 is a diagram schematically showing the specified contents of the normal special diagram 2 performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 30] 14 is a diagram schematically showing the specified contents of the special-speed performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 31] 10A is a diagram schematically showing the specified contents of the continuous preview execution selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the V notification execution selection table set in the ROM of the audio lamp control device in the first control example. [Figure 32] 10 is a block diagram showing the configuration of a button operation performance selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the time-saving state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 33] 14 is a diagram schematically showing the specified contents of the special mode state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 34] 1 is a block diagram showing the electrical configuration of a display control device in the first control example. [Figure 35] 6A to 6C are explanatory diagrams for explaining images at the time of power-on in the first control example. [Figure 36] 10A is an explanatory diagram for explaining the back surface A in the first control example, and 10B is an explanatory diagram for explaining the back surfaces B to D in the first control example. [Figure 37] 1 is a diagram schematically showing an example of a display data table in the first control example. [Figure 38] 1 is a diagram schematically showing an example of a transfer data table in the first control example. [Figure 39] 14 is a diagram schematically showing an example of a drawing list in the first control example. [Figure 40] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the first control example. [Figure 41] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 42] 10 is a flow chart showing a special pattern jackpot determination process executed by the MPU within the main control device in the first control example. [Figure 43] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the first control example. [Figure 44] 10 is a flow chart showing update processing executed by the MPU in the main control device in the first control example. [Figure 45] 10 is a flow chart showing a start-up winning process executed by an MPU within the main control device in the first control example. [Figure 46] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the first control example. [Figure 47] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 48] 10 is a flow chart showing a process of passing through a through gate executed by an MPU within the main control device in the first control example. [Figure 49] 10 is a flow chart showing NMI interrupt processing executed by the MPU in the main control device in the first control example. [Figure 50] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the first control example. [Figure 51] 10 is a flow chart showing main processing executed by the MPU within the main control device in the first control example. [Figure 52] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the first control example. [Figure 53] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the first control example. [Figure 54] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the first control example. [Figure 55] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the first control example. [Figure 56] 10 is a flow chart showing abnormality processing executed by the MPU in the main control device in the first control example. [Figure 57] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the first control example. [Figure 58] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the first control example. [Figure 59]10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the first control example. [Figure 60] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the first control example. [Figure 61] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the first control example. [Figure 62] 10 is a flow chart showing a special chart winning information command process executed by the MPU in the audio lamp control device in the first control example. [Figure 63] 10 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 64] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 65] 10 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the first control example. [Figure 66] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the first control example. [Figure 67] 10 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 68] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 69] 10 is a flow chart showing the performance setting process in chance mode executed by the MPU in the audio lamp control device in the first control example. [Figure 70] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the first control example. [Figure 71] 10 is a flow chart showing the main processing executed by the MPU in the display control device in the first control example. [Figure 72] 10 is a flow chart showing a boot process executed by an MPU in the display control device in the first control example. [Figure 73] 10 is a flow chart showing the command interruption process executed by the MPU in the display control device in the first control example, and (b) shows the V interruption process executed by the MPU in the display control device in the first control example. [Figure 74] 10 is a flow chart showing command determination processing executed by the MPU in the display control device in the first control example. [Figure 75] 10 is a flow chart showing the variation pattern command processing executed by the MPU in the display control device in the first control example, and (b) shows the suspension type command processing executed by the MPU in the display control device in the first control example. [Figure 76] 10 is a flow chart showing the opening command processing executed by the MPU in the display control device in the first control example, and (b) shows the round number command processing executed by the MPU in the display control device in the first control example. [Figure 77] 10 is a flow chart showing ending command processing executed by the MPU in the display control device in the first control example. [Figure 78] 10 is a flow chart showing the fluctuation stop command processing executed by the MPU in the display control device in the first control example, and (b) shows the notification command processing executed by the MPU in the display control device in the first control example. [Figure 79] 10 is a flow chart showing the back image change command processing executed by the MPU in the display control device in the first control example, and (b) shows the error command processing executed by the MPU in the display control device in the first control example. [Figure 80] 10 is a flow chart showing display setting processing executed by the MPU in the display device in the first control example. [Figure 81] 10 is a flow chart showing warning image setting processing executed by the MPU in the display control device in the first control example. [Figure 82] 10 is a flow chart showing a pointer update process executed by the MPU in the display control device in the first control example. [Figure 83] 10 is a flow chart showing the transfer setting process executed by the MPU in the display control device in the first control example, and (b) shows the resident image transfer setting process executed by the MPU in the display control device in the first control example. [Figure 84] 10 is a flow chart showing normal image transfer setting processing executed by the MPU in the display control device in the first control example. [Figure 85] 10 is a flow chart showing drawing processes executed by the MPU in the display control device in the first control example. [Figure 86] 1 is a front view of the gaming board of the pachinko machine in the second control example. [Figure 87] 10A and 10B are diagrams showing an example of a display screen displayed during a jackpot game executed based on winning a jackpot in a special pattern lottery in the second control example, and (b) shows an example of a display screen displayed on the ending screen of a jackpot game in the second control example. [Figure 88] 10A and 10B are diagrams showing an example of a display screen displayed during the chance time in the second control example, and (b) shows an example of a display screen displayed during the chance time in the second control example. [Figure 89] 10A is a diagram showing an example of a display screen displayed when the pull-back zone in the second control example is started, and (b) shows an example of a display screen displayed when a time-saving winning is achieved during the pull-back zone in the second control example. [Figure 90] 10A and 10B are diagrams showing an example of a display screen during extended time, which is executed when the long time reduction in the second control example is set, and (b) shows an example of a display screen when the number of executions of special pattern variations executed during the long time reduction in the second control example reaches 9,900. [Figure 91] 10 is a diagram showing an example of a presentation screen for preparation time executed during the time-saving state in the second control example, after the end of the chance time. [Figure 92] 10A and 10B are diagrams showing the relationship between the background type displayed in the pull-back zone in the second control example and the contents shown by each background; FIG. 10B are diagrams showing the relationship between the type of suggested mode in the pull-back mode in the second control example and the contents shown by each of the suggested mode. [Figure 93] 14 is a diagram showing a game flow in the second control example. [Figure 94] 1 is a block diagram showing the electrical configuration of a pachinko machine in the second control example. [Figure 95] 1 is a diagram schematically showing the structure of various counters in the second control example. [Figure 96] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the second control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the second control example. [Figure 97] 1A and 1B are diagrams that schematically show the specified contents of the first random number table set in the ROM of the main control device in the second control example, and (b) are diagrams that schematically show the specified contents of the second random number table set in the ROM of the main control device in the second control example, and (c) are diagrams that schematically show the specified contents of the time-saving random number table set in the ROM of the main control device in the second control example. [Figure 98] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the second control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the second control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the second control example. [Figure 99] 10A (a) is a diagram schematically showing the specified contents of the variation pattern selection table set in the ROM of the main control device in the second control example, and (b) is a diagram schematically showing the specified contents of the normal and second special change table in the second control example. [Figure 100] 1A and 1B are diagrams schematically showing the specified contents of the table for special mode and time-saving in the second control example, and (b) are diagrams schematically showing the specified contents of the table for selecting time-saving in the ROM of the main control device in the second control example. [Figure 101] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the second control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the second control example. [Figure 102] 1 is a block diagram showing the configuration of a pull-back mode selection table set in the ROM of the audio lamp control device in the second control example. [Figure 103] 1 is a block diagram showing the structure of a suggestion mode selection table set in the ROM of the audio lamp control device in the second control example. [Figure 104]10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the second control example. [Figure 105] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the second control example. [Figure 106] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the second control example. [Figure 107] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the second control example. [Figure 108] 10 is a flow chart showing update processing executed by the MPU in the main control device in the second control example. [Figure 109] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the second control example. [Figure 110] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the second control example. [Figure 111] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the second control example. [Figure 112] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the second control example. [Figure 113] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the second control example. [Figure 114] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the second control example. [Figure 115] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the second control example. [Figure 116] 10 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the second control example. [Figure 117] 10 is a flow chart showing a pull-back mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 118] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the second control example. [Figure 119] 10 is a flow chart showing a second special mode state performance setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 120] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 121] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 122] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the second control example. [Figure 123] 10 is a diagram showing an example of a variation display screen when the lottery result of the Special Drawing 1 lottery is won or a time-saving win in the normal state of the first modification of the second control example, and (b) shows an example of a display screen when the lottery result of the First Special Drawing (Special Drawing 1 lottery) is won in the normal state (low probability state of special design, low probability state of ordinary design) in the first modification of the second control example. [Figure 124] 10A and 10B are diagrams showing an example of a display screen in a time-saving state when the variation time of Special Figure 1 is set to 30 seconds in the normal state in the first modification of the second control example, and (b) shows an example of a display screen in the case where the time-saving state in the first modification of the second control example is finished. [Figure 125] 10 is a diagram showing an example of a display screen when a time-saving winning is made while being held for Special Figure 2 in the first modification of the second control example. [Figure 126] 1A and 1B are diagrams schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the first modification of the second control example, and (b) is diagrams schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the first modification of the second control example. [Figure 127] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the first modification of the second control example. [Figure 128] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the second control example. [Figure 129] 10 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the first modification of the second control example. [Figure 130] 10 is a diagram showing an example of a display screen during the chance time acquisition performance that is executed when a jackpot is won in the special drawing 1 lottery in the normal state of the special drawing 1 lottery in the normal state of the second modification of the second control example, and (b) shows an example of a display screen during the chance time acquisition performance that is executed when a time acquisition performance that is given in the special drawing 1 lottery in the normal state of the second modification of the second control example. [Figure 131] 10 is a diagram showing an example of a fluctuation pattern when a jackpot is won and a time-saving winning pattern in the second modified example of the second control example. [Figure 132] 10A (a) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the second modification of the second control example, and (b) is a diagram schematically showing the specified contents of the jackpot table in the second modification of the second control example. [Figure 133] 14 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the second modification of the second control example. [Figure 134] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the second modified example of the second control example. [Figure 135] 1 is a front view of the gaming board of the pachinko machine in the third control example. [Figure 136] 1 is a partial enlarged view of the game board of the pachinko machine in the third control example. [Figure 137] 1 is a front perspective view of the V winning device in the third control example. [Figure 138] 1 is an exploded front perspective view of the V winning device in the third control example. [Figure 139] 1 is an operational view of the V winning device in the third control example seen from the rear side. [Figure 140] 10 is a schematic view of the V-winning door of the V-winning device in the third control example, in a plan view of the state in which the opening and closing door is closed, and (b) is a schematic view of the V-winning device in the third control example, in a plan view of the V-winning device in the third control example, in a plan view of the V-winning device in the third control example, in a plan view of the V-winning device in the third control example. [Figure 141] 10A is a diagram showing an example of a display screen in which a time-saving lottery result suggestion performance is performed during the change in Special Figure 1 in the third control example, and (b) shows an example of a display screen in which a time-saving lottery result suggestion is performed during the change in Special Figure 1 in the third control example. [Figure 142] 10A and 10B show an example of a display screen in which time-saving non-winning is suggested during the change in Special Figure 1 in the third control example, and (b) shows an example of a jackpot winning notification screen in which a duplicate win is received in the third control example. [Figure 143] (a) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot lottery is double-windled in the third control example, and (b) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the third control example, and (c) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the third control example. [Figure 144] 1 is a diagram schematically showing the structure of various counters in the third control example. [Figure 145] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the third control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the third control example. [Figure 146] 1. (a) is a block diagram showing the structure of the first random number table set in the ROM of the main control device in the third control example, (b) is a diagram schematically showing the specified contents of the first special symbol random number table in the third control example, and (c) is a diagram schematically showing the specified contents of the second special symbol random number table in the third control example. [Figure 147] 1. (a) is a block diagram showing the structure of the jackpot type selection table set in the ROM of the main control device in the third control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot type selection table in the third control example, (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot type selection table in the third control example, and (d) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the third control example. [Figure 148] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the third control example. [Figure 149] 10A is a diagram schematically showing the specified contents of the variation pattern table set in the ROM of the main control device in the third control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern table in the third control example. [Figure 150] 14 is a diagram schematically showing the specified contents of the time-saving fluctuation pattern table in the third control example. [Figure 151] 10A and 10B are diagrams schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the third control example, and (b) schematically shows the specified contents of the time-saving type selection table set in the ROM of the main control device in the third control example. [Figure 152] 1 is a block diagram showing the configuration of a ROM within the voice lamp control device of a pachinko machine in the third control example, and (b) is a block diagram showing the configuration of a RAM within the voice lamp control device of a pachinko machine in the third control example. [Figure 153] 14 is a diagram schematically showing the specified contents of a lottery result notification mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the third control example. [Figure 154] 14 is a diagram showing a game flow in the third control example. [Figure 155] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the third control example. [Figure 156] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the third control example. [Figure 157] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the third control example. [Figure 158] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the third control example. [Figure 159] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the third control example. [Figure 160] 10 is a flow chart showing update processing executed by the MPU in the main control device in the third control example. [Figure 161] 10 is a flow chart showing a small hit start setting process executed by an MPU within the main control device in the third control example. [Figure 162] 10 is a flow chart showing a time-saving update process for small hits executed by the MPU in the main control device in the third control example. [Figure 163] 10 is a flow chart showing V inlet passing processing executed by the MPU within the main control device in the third control example. [Figure 164] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the third control example. [Figure 165] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the third control example. [Figure 166] 10 is a flow chart showing main processing executed by the MPU within the main control device in the third control example. [Figure 167] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the third control example. [Figure 168] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the third control example. [Figure 169] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the third control example. [Figure 170] 10 is a diagram showing a modified configuration of a game board 13 included in the pachinko machine 10. FIG. [Figure 171] 1 is a front view schematically showing the game board of a pachinko machine in the fourth control example. [Figure 172] 1 is a schematic diagram schematically showing part of the contents of the ROM of the main control device in the fourth control example. [Figure 173] 1 is a schematic diagram schematically showing part of the contents of the RAM of the main control device in the fourth control example. [Figure 174] 1. (a) is a schematic diagram showing a first random number table in the fourth control example, (b) is a schematic diagram showing a second random number table in the fourth control example, (c) is a schematic diagram showing a time-saving random number table in the fourth control example, and (d) is a schematic diagram showing a small random number table in the fourth control example. [Figure 175] 10. (a) is a schematic diagram showing the contents of the jackpot type selection table in the fourth control example, and (b) is a schematic diagram showing the contents of the special diagram 1 jackpot table, which is part of the jackpot type selection table in the fourth control example. [Figure 176] 10 is a schematic diagram schematically showing the contents of a special diagram 2 jackpot table, which is part of a jackpot type selection table in the fourth control example. [Figure 177] 14 is a schematic diagram schematically showing the contents of a small hit type selection table in the fourth control example. [Figure 178] 14 is a schematic diagram schematically showing the contents of a variation pattern table in the fourth control example. [Figure 179] 14 is a schematic diagram schematically showing the contents of a normal state fluctuation pattern table, which is part of the fluctuation pattern table in the fourth control example. [Figure 180] 14 is a schematic diagram schematically showing the contents of a time-saving state fluctuation pattern table, which is part of the fluctuation pattern table in the fourth control example. [Figure 181] 10 is a schematic diagram schematically showing the contents of a time-saving winning variation state variation table, which is part of the variation pattern table in the fourth control example. [Figure 182] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the fourth control example. [Figure 183] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the fourth control example. [Figure 184] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the fourth control example. [Figure 185] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the fourth control example. [Figure 186] 10 is a flow chart showing a special diagram 1 time-saving lottery process executed by the MPU in the main control device in the fourth control example. [Figure 187] 10 is a flow chart showing game state update processing executed by the MPU in the main control device in the fourth control example. [Figure 188] 10 is a flow chart showing a process in progressing when first special pattern change is executed by the MPU in the main control device in the fourth control example. [Figure 189] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the fourth control example. [Figure 190] 10 is a flow chart showing the forced stopping process for Special Figure 1 executed by the MPU in the main control device in the fourth control example. [Figure 191] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the fourth control example. [Figure 192] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the fourth control example. [Figure 193] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the fourth control example. [Figure 194] 10 is a flow chart showing a special diagram 2 time-saving lottery process executed by the MPU in the main control device in the fourth control example. [Figure 195] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the fourth control example. [Figure 196] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the fourth control example. [Figure 197] 10 is a flow chart showing a process during execution of second special pattern change executed by the MPU in the main control device in the fourth control example. [Figure 198] 10 is a flow chart showing a second special pattern change stop process executed by the MPU in the main control device in the fourth control example. [Figure 199] 10 is a flow chart showing the forced stopping process for Special Diagram 2 executed by the MPU in the main control device in the fourth control example. [Figure 200] 10 is a flow chart showing a special diagram 2 small hit stop process executed by the MPU in the main control device in the fourth control example. [Figure 201] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the fourth control example. [Figure 202] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the fourth control example. [Figure 203] 10 is a flow chart showing a time-saving limit update process executed by the MPU within the main control device in the fourth control example. [Figure 204] 6A and 6B are diagrams showing an example of a ceiling-reaching indication display screen displayed on the third pattern display device in the fifth control example. [Figure 205]10A (a) is a diagram showing an example of a ceiling-reaching change-indication screen displayed on the third pattern display device in the fifth control example, and (b) is a diagram showing an example of a ceiling-reaching display screen displayed on the third pattern display device in the fifth control example. [Figure 206] 10 is a diagram showing an example of a ceiling-mounted display screen displayed on the third pattern display device in the fifth control example. [Figure 207] 10 is a transition diagram showing the flow of transition of each game state in the fifth control example. [Figure 208] 10.

[0021] FIG. 1 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the fifth control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the fifth control example. [Figure 209] 1. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the fifth control example, and (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the fifth control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the fifth control example. [Figure 210] 14 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the fifth control example. [Figure 211] 10.

[0011] FIG. 1 (a) is a block diagram showing the configuration of a time-saving type selection table set in the ROM of the main control device in the fifth control example, FIG. 1 (b) is a diagram showing the specified contents of the time-saving winning table in the fifth control example, and FIG. 1 (c) is a diagram showing the specified contents of the ceiling table in the fifth control example. [Figure 212] 10.

[0021] FIG. 1 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the fifth control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the fifth control example. [Figure 213] 10 is a diagram schematically showing the specified contents of the ceiling-reaching suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the fifth control example. [Figure 214] 10 is a diagram schematically showing the specified contents of the ceiling-reaching performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the fifth control example. [Figure 215] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the fifth control example. [Figure 216] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the fifth control example. [Figure 217] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the fifth control example. [Figure 218] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the fifth control example. [Figure 219] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the fifth control example. [Figure 220] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the fifth control example. [Figure 221] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the fifth control example. [Figure 222] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the fifth control example. [Figure 223] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 224] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 225] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 226] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 227] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 228] 10 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 229] 10A (a) is a diagram showing an example of a game state suggestion performance screen displayed on the third pattern display device in the first modification of the fifth control example, and (b) is a diagram showing an example of a display screen after it is notified that the first time-saving state has been set in the game state suggestion performance in the first modification of the fifth control example. [Figure 230] 10A (a) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the first modification of the fifth control example, and (b) is a diagram schematically showing the specified contents of the time-saving winning table in the first modification of the fifth control example. [Figure 231] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the fifth control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the fifth control example. [Figure 232] 10 is a diagram schematically showing the specified contents of the game state suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the fifth control example. [Figure 233] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the first modification of the fifth control example. [Figure 234] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the fifth control example. [Figure 235] 10 is a flow chart showing a normal mode performance setting process executed by an MPU in the audio lamp control device in the first modification of the fifth control example. [Figure 236] 1 is a front view schematically showing the game board of a pachinko machine in the sixth control example. [Figure 237] 10A is a diagram showing an example of a performance mode during the time-saving state B, which is set when the number of ceiling draws is reached in the sixth control example, and (b) shows an example of a performance mode when the time-saving state B is changed to the time-saving state A in the sixth control example. [Figure 238] 10 is a diagram showing an example of a performance mode when a jackpot is won during the time-saving state B in the sixth control example. [Figure 239] 10 is a diagram showing a method for transitioning between each game state in the sixth control example. [Figure 240] 1 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the sixth control example. [Figure 241] 1 is a block diagram showing the configuration of RAM in the main control device of a pachinko machine in the sixth control example. [Figure 242] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the sixth control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the sixth control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the sixth control example. [Figure 243] 1A and 6C are diagrams schematically showing the specified contents of the second random number table set in the ROM of the main control device in the sixth control example, and (b) is a block diagram showing the configuration of the variation pattern table set in the ROM of the main control device in the sixth control example, and (c) is diagrams schematically showing the specified contents of the first time-saving table in the sixth control example. [Figure 244] 1. (a) is a diagram schematically showing the specified contents of the small hit random number table set in the ROM of the main control device in the sixth control example, and (b) is a diagram schematically showing the specified contents of the small hit type selection table set in the ROM of the main control device in the sixth control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the sixth control example. [Figure 245] 10A is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the sixth control example, and (b) is a diagram schematically showing the specified contents of the variation pattern scenario table set in the ROM of the main control device in the sixth control example. [Figure 246] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the sixth control example. [Figure 247] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the sixth control example. [Figure 248] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the sixth control example. [Figure 249] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the sixth control example. [Figure 250] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the sixth control example. [Figure 251] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the sixth control example. [Figure 252] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the sixth control example. [Figure 253] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the sixth control example. [Figure 254] 10 is a flow chart showing a special diagram 1 miss-off stop processing executed by the MPU in the main control device in the sixth control example. [Figure 255] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the sixth control example. [Figure 256] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the sixth control example. [Figure 257] 10 is a flow chart showing a special diagram 2 time-saving lottery process executed by the MPU in the main control device in the sixth control example. [Figure 258] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the sixth control example. [Figure 259] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the sixth control example. [Figure 260] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the sixth control example. [Figure 261] 10 is a flow chart showing a special diagram 2 missing stop processing executed by the MPU in the main control device in the sixth control example. [Figure 262] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 263] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the sixth control example. [Figure 264] 1 is a front view of a pachinko machine in the seventh control example. [Figure 265] 1 is a front view of the gaming board of the pachinko machine in the seventh control example. [Figure 266] 1 is a rear view of a pachinko machine in the seventh control example. [Figure 267] 10 (a) is a front view of the performance button of the pachinko machine in the seventh control example, and (b) is a front view of the selection button of the pachinko machine 10 in the seventh control example. [Figure 268] 10A (a) is a schematic diagram showing a case in which the decorative movable object of the pachinko machine in the seventh control example is in the storage state, and (b) is a schematic diagram showing a case in which the decorative movable object of the pachinko machine in the seventh control example is in the movable state. [Figure 269] 1 is an exploded front perspective view of the V winning device in the seventh control example. [Figure 270] 1 is an operational view of the V winning device in the seventh control example seen from the rear side. [Figure 271] 10A (a) is a diagram showing an example of a display screen during special chart fluctuation in a state in which the role displayed on the third pattern display device in the seventh control example is stored, and (b) is a diagram showing an example of a display screen 1 in the case where the role displayed on the third pattern display device in the seventh control example is movable and the holding color is changed. [Figure 272] 10A (a) is a diagram showing an example of a display screen 2 in which the role displayed on the third pattern display device in the seventh control example is movable and the holding color is changed, and (b) is a diagram showing an example of a display screen 3 in which the role displayed on the third pattern display device in the seventh control example is movable and the holding color is changed. [Figure 273] 10A is a diagram showing an example of a display screen when a character is stored after the hold color displayed on the third pattern display device in the seventh control example is variable, and (b) shows an example of a display screen 1 in the case where the handle displayed on the third pattern display device in the seventh control example is movable, and part of the hold color is moved to the next hold. [Figure 274] 10A is a diagram showing an example of a display screen 2 in which the role displayed on the third pattern display device in the seventh control example is movable, and part of the holding color is moved to the next hold, and (b) is a diagram showing an example of a display screen in which the role is stored after the hold color displayed on the third pattern display device in the seventh control example is variable. [Figure 275] 10A is a diagram showing an example of a display screen in which the role displayed on the third pattern display device in the seventh control example moves and the hold pattern changes independently, and (b) shows an example of a display screen in which the hold color displayed on the third pattern display device in the seventh control example is changed independently, and the role is stored. [Figure 276] 10A is a diagram schematically showing the relationship between the color of the hold pattern in the seventh control example and the expected level of winning a jackpot, and (b) is a diagram schematically showing the variable color pattern of the hold pattern in the seventh control example. [Figure 277] 10A (a) is a diagram showing an example of a demo screen displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of a light amount adjustment screen (with a character) displayed on the third pattern display device in the seventh control example. [Figure 278] 10A (a) is a diagram showing an example of an adjustment end screen when the decision button displayed on the third pattern display device in the seventh control example is operated, and (b) is a diagram showing an example of a display screen in the case where special chart fluctuations start during adjustment of the amount of light displayed on the third pattern display device in the seventh control example. [Figure 279] 10 is a diagram showing an example of a light amount adjustment screen in the prohibition of the roles displayed on the third pattern display device in the seventh control example. [Figure 280] 10A is a diagram showing an example of a display screen displayed on the third pattern display device in the seventh control example when the shutter close reach is started, and (b) shows an example of a display screen displayed on the third pattern display device in the seventh control example when the shutter close reach is continued, and is displayed on the third pattern display device in the seventh control example. [Figure 281] 10A is a diagram showing an example of a display screen in the fifth stage of shutter closing reach displayed on the third pattern display device in the seventh control example, and (b) shows an example of a display screen in the sixth stage of shutter closing reach displayed on the third pattern display device in the seventh control example. [Figure 282] 10A is a diagram showing an example of a display screen in which a capsule is acquired in the third stage of shutter closing reach displayed on the third pattern display device in the seventh control example, and (b) shows an example of a display screen in which a capsule is opened in the fifth stage of shutter closing reach displayed on the third pattern display device in the seventh control example. [Figure 283] 10A is a diagram showing an example of a display screen when a branching effect is performed during a reach performance displayed on the third pattern display device in the seventh control example, and (b) shows an example of a display screen when a button operation is performed during a branching effect displayed on the third pattern display device in the seventh control example. [Figure 284] 11 is a diagram showing an example of a display screen at the end of a special movie when a button is not operated during the branching performance displayed on the third pattern display device in the seventh control example. [Figure 285] 1 is a timing chart schematically showing the relationship between the performance time of the special movie in the seventh control example and the fluctuation time of the special chart, ie (a) is a timing chart when a button is not operated during the branching performance in the seventh control example, and (b) is a timing chart when a button is operated during the branching performance in the seventh control example. [Figure 286] 1 is a block diagram showing the electrical configuration of a pachinko machine in the seventh control example. [Figure 287] 1 is a diagram schematically showing the structure of various counters in the seventh control example. [Figure 288] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the seventh control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the seventh control example. [Figure 289] 1 is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the seventh control example. [Figure 290] 1A and 7B are diagrams schematically showing the specified contents of the first hit type selection table set in the ROM of the main control device in the seventh control example, and (b) schematically shows the specified contents of the second hit random number table in the seventh control example. [Figure 291] 1. (a) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the seventh control example, (b) is a diagram schematically showing the specified contents of the jackpot variation pattern table in the seventh control example, (c) is a diagram schematically showing the specified contents of the deviation (normal) variation pattern table in the seventh control example, and (d) is a diagram schematically showing the specified contents of the deviation (special mode, time-saving) variation pattern table in the seventh control example. [Figure 292] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the seventh control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the seventh control example. [Figure 293]10A is a diagram schematically showing the specified contents of the hold-change effect lottery table set in the ROM of the audio lamp control device of the pachinko machine in the seventh control example, and (b) is a diagram schematically showing the specified contents of the hold-color selection table set in the ROM of the audio lamp control device of the pachinko machine in the seventh control example. [Figure 294] 10 is a diagram schematically showing the specified contents of a pending change scenario selection table set in the ROM of the audio lamp control device of a pachinko machine in the seventh control example. [Figure 295] 14 is a diagram schematically showing the specified contents of the shutter closure reach selection table set in the ROM of the audio lamp control device of a pachinko machine in the seventh control example. [Figure 296] 14 is a diagram schematically showing the specified contents of an operation scenario table set in the ROM of the audio lamp control device of a pachinko machine in the seventh control example. [Figure 297] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the seventh control example. [Figure 298] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the seventh control example. [Figure 299] 10 is a flow chart showing a special pattern jackpot determination process executed by the MPU within the main control device in the seventh control example. [Figure 300] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the seventh control example. [Figure 301] 10 is a flow chart showing update processing executed by the MPU in the main control device in the seventh control example. [Figure 302] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the seventh control example. [Figure 303] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the seventh control example. [Figure 304] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the seventh control example. [Figure 305] 10 is a flow chart showing a process of passing through gates executed by the MPU within the main control device in the seventh control example. [Figure 306] 10 is a flow chart showing NMI interrupt processing executed by the MPU in the main control device in the seventh control example. [Figure 307] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the seventh control example. [Figure 308] 10 is a flow chart showing main processing executed by the MPU within the main control device in the seventh control example. [Figure 309] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the seventh control example. [Figure 310] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the seventh control example. [Figure 311] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the seventh control example. [Figure 312] 10 is a flow chart showing notification processing executed by the MPU within the main control device in the seventh control example. [Figure 313] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the seventh control example. [Figure 314] 10 is a flow chart showing processes as long as they are executed by the MPU within the main control device in the seventh control example. [Figure 315] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the seventh control example. [Figure 316] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 317] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 318] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 319] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 320] 10 is a flow chart showing a special chart winning information command process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 321] 10 is a flow chart showing a hold performance setting process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 322] 10 is a flow chart showing a composite hold change effect setting process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 323] 10 is a flow chart showing a stop command process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 324] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the seventh control example. [Figure 325] 10 is a flow chart showing ending processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 326] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 327] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 328] 10 is a flow chart showing a normal state performance mode determination process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 329] 10 is a flow chart showing a hold-off effect execution process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 330] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 331] 10 is a flow chart showing decision button operation processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 332] 10 is a flow chart showing the performance button operation process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 333] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 334] 10A and 10B are diagrams showing a game machine in a movable state of the great sword role in a modified example of the seventh control example, and (b) shows an example of a display screen in which special chart changes are started while adjusting the amount of light displayed on the third pattern display device in the seventh control example. [Figure 335] 10A is a diagram showing an example of a display screen when the shutter closed reach is displayed on the third display device in a modified example of the seventh control example, and (b) shows an example of a display screen when the shutter closed reach is developed in a modified example of the third design display device in a modified example of the seventh control example. [Figure 336] 10A is a diagram showing an example of a display screen when the shutter closed reach is displayed on the third display device in a modification of the seventh control example, and (b) shows an example of a display screen when the shutter displayed on the third pattern display device in a modification of the seventh control example is fully opened. [Figure 337] 10A (a) is a diagram showing an example of a battle performance start screen displayed on the third pattern display device in the eighth control example, and (b) is a diagram showing an example of a battle performance preemptive attack screen displayed on the third pattern display device in the eighth control example. [Figure 338] 10A is a diagram showing an example of a battle performance button pressing instruction screen displayed on the third pattern display device in the eighth control example, and (b) shows an example of a battle performance button pressing instruction screen displayed on the third pattern display device in the eighth control example. [Figure 339] 11 is a diagram showing an example of a screen in which a long press of the battle performance button is displayed on the third pattern display device in the eighth control example. [Figure 340] 6A and 6B are diagrams showing an example of the flow of reducing the gauge when the button is repeatedly pressed, displayed on the third pattern display device in the eighth control example. [Figure 341] 6A to 6D are diagrams showing an example of the flow of reducing the gauge when a button is pressed and held down in the eighth control example, displayed on the third pattern display device. [Figure 342] 10A is a diagram showing an example of a display screen displayed on the third pattern display device in the eighth control example at the start of a defeating performance, and (b) is a diagram showing an example of a first start screen displayed on the third pattern display device in the eighth control example. [Figure 343] 10A (a) is a diagram showing an example of the first attack screen displayed on the third pattern display device in the eighth control example, and (b) is a diagram showing an example of the second start screen displayed on the third pattern display device in the eighth control example. [Figure 344]10A (a) is a diagram showing an example of the second attack screen displayed on the third pattern display device in the eighth control example, and (b) is a diagram showing an example of the third start screen displayed on the third pattern display device in the eighth control example. [Figure 345] 10 is a diagram showing an example of the third attack screen displayed on the third pattern display device in the eighth control example. [Figure 346] 10 is a diagram showing an example of a chance-up effect screen during normal fluctuations displayed on the third pattern display device in the eighth control example. [Figure 347] 10 is a diagram showing the number of special pattern changes in the eighth control example and the contents of the opportunity-up effect executed. [Figure 348] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the eighth control example. [Figure 349] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the eighth control example. [Figure 350] 10 is a diagram schematically showing the prescribed contents of a long-press performance scenario table set in the ROM of the audio lamp control device of a pachinko machine in the eighth control example. [Figure 351] 10A (a) is a diagram schematically showing the specified contents of the final HP selection table when the discrepancy is set in the ROM of the voice lamp control device of the pachinko machine in the eighth control example, and (b) is a diagram schematically showing the specified contents of the entry lottery table set in the ROM of the voice lamp control device of the pachinko machine in the eighth control example. [Figure 352] 10 is a diagram schematically showing the rules of the cancellation lottery table set in the ROM of the audio lamp control device of a pachinko machine in the eighth control example. [Figure 353] 14 is a diagram schematically showing the specified contents of the additional reduction value selection table set in the ROM of the audio lamp control device of the pachinko machine in the eighth control example. [Figure 354] 10A is a diagram schematically showing the rules of the chance preview lottery table set in the ROM of the voice lamp control device of the pachinko machine in the eighth control example, and (b) is a diagram schematically showing the rules of the chance mode selection table set in the ROM of the voice lamp control device of the pachinko machine in the eighth control example. [Figure 355] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 356] 10 is a flow chart showing a time-saving state performance mode determination process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 357] 10 is a flow chart showing a process for determining the special-mode state performance mode executed by the MPU in the audio lamp control device in the eighth control example. [Figure 358] 10 is a flow chart showing a normal state performance mode determination process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 359] 10 is a flow chart showing a defeat reach performance determination process executed by the MPU within the audio lamp control device in the eighth control example. [Figure 360] 10 is a flow chart showing a chance-up performance determination process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 361] 10 is a flow chart showing performance button operation processing executed by the MPU in the audio lamp control device in the eighth control example. [Figure 362] 10 is a flow chart showing a long-press performance setting process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 363] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 364] 10 is a flow chart showing long-pressing and pressing processes executed by the MPU in the audio lamp control device in the eighth control example. [Figure 365] 1 is a front view schematically showing the game board of a pachinko machine in the ninth control example. [Figure 366] 6A and 6B are diagrams showing an example of the opening performance of a jackpot displayed on the third pattern display device in the ninth control example. [Figure 367] 10A is a diagram showing an example of the opening performance of a jackpot displayed on the third pattern display device in the ninth control example, and (b) shows an example of the display mode displayed on the third pattern display device during the time-saving state in the ninth control example. [Figure 368] 6A and 6B are diagrams showing an example of the display mode of the third design display device when an additional time remaining time is performed during the time-saving state in the ninth control example. [Figure 369] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when the continuity rate increase effect is performed during the time-saving state in the ninth control example. [Figure 370] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when a final judgement performance is performed after the time-saving state in the ninth control example is completed. [Figure 371] 10 is a diagram showing changes over time in the performance mode after winning the jackpot in the ninth control example. [Figure 372] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the ninth control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the ninth control example. [Figure 373] 1. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the ninth control example, (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the ninth control example, (c) is a diagram schematically showing the specified contents of the small random number table set in the ROM of the main control device in the ninth control example, and (d) is a diagram schematically showing the specified contents of the direct hit table in the ninth control example. [Figure 374] 1 is a diagram schematically showing the specified contents of the V-ac-accepted table in the ninth control example. [Figure 375] 10 is a block diagram showing the structure of a variation pattern table set in the ROM of the main control device in the ninth control example, and (b) is a diagram schematically showing the specified contents of the S rank table in the ninth control example. [Figure 376] 10A (a) is a diagram schematically showing the specified contents of the A-rank table in the ninth control example, and (b) is a diagram schematically showing the specified contents of the table in the ninth control example when one change occurs after the time-saving ends. [Figure 377] 10A is a diagram schematically showing the specified contents of the normal state fluctuation pattern scenario table set in the ROM of the main control device in the ninth control example, and (b) is a diagram schematically showing the lash performance for each rank. [Figure 378] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the ninth control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the ninth control example. [Figure 379] 10.

[0011] FIG. 1A (a) is a diagram schematically showing the specified content of the rank-up performance table set in the ROM of the voice lamp control device of the pachinko machine in the ninth control example, and FIG. 1B) is a diagram schematically showing the specified content of the rank-up determination table set in the ROM of the voice lamp control device of the pachinko machine in the ninth control example. [Figure 380] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the ninth control example. [Figure 381] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the ninth control example. [Figure 382] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the ninth control example. [Figure 383] 10 is a flow chart showing a special diagram 1 game state update process executed by the MPU in the main control device in the ninth control example. [Figure 384] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the ninth control example. [Figure 385] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the ninth control example. [Figure 386] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the ninth control example. [Figure 387] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the ninth control example. [Figure 388] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the ninth control example. [Figure 389] 10 is a flow chart showing a special diagram 2 game state update process executed by the MPU in the main control device in the ninth control example. [Figure 390] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the ninth control example. [Figure 391] 10 is a flow chart showing a special diagram 2 missing stop processing executed by the MPU in the main control device in the ninth control example. [Figure 392] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the ninth control example. [Figure 393] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 394] 10 is a flow chart showing the final judgement performance process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 395] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the ninth control example. [Figure 396] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the ninth control example. [Figure 397] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 398] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 399] 1 is a front view schematically showing the game board of a pachinko machine in the tenth control example. [Figure 400] 10 (a) is a diagram showing an example of a display mode displayed on the third pattern display device during the special mode state in the 10th control example, and (b) is a diagram showing an example of a display mode of the third pattern display device when the special pattern display device changes during the special mode state in the 10th control example when the jackpot change of special diagram 1 starts during the special mode state in the 10th control example. [Figure 401] 10 control example (a) shows an example of a display mode displayed on the third pattern display device when the change time of the special chart 1 jackpot fluctuation begins during the special change state in the 10th control example, and when the change time of the special chart 1 jackpot fluctuation has passed, and (b) shows an example of a display mode displayed on the third pattern display device when the change time of the special chart 2 small pattern display device has passed before the change time of the special chart 2 small pattern display device before the change time of the special chart 1 jackpot fluctuation has passed. [Figure 402] 10. FIG. 10 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 10th control example, and FIG. 10th control example is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 10th control example. [Figure 403] 10. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 10th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 10th control example, and (c) is a diagram schematically showing the specified contents of the small random number table set in the ROM of the main control device in the 10th control example. [Figure 404] 10 is a block diagram showing the structure of a variation pattern table set in the ROM of the main control device in the 10th control example, and (b) is a diagram schematically showing the specified contents of the special-speed and time-saving table in the 10th control example. [Figure 405] 10 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the tenth control example. [Figure 406] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the tenth control example. [Figure 407] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the tenth control example. [Figure 408] 10 is a flow chart showing a first special pattern variation pattern selection process executed by an MPU within the main control device in the tenth control example. [Figure 409] 10 is a flow chart showing the change-initial update process executed by the MPU within the main control device in the tenth control example. [Figure 410] 10 (a) and 10 (b) are diagrams showing the timing of subtracting the number of times of time reduction in the 10th control example. [Figure 411] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the tenth control example. [Figure 412] 10 is a flow chart showing an update process when a fluctuation stops executed by an MPU within the main control device in the tenth control example. [Figure 413] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the tenth control example. [Figure 414] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the tenth control example. [Figure 415] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the tenth control example. [Figure 416] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the tenth control example. [Figure 417] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the tenth control example. [Figure 418] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the tenth control example. [Figure 419] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the tenth control example. [Figure 420] 11th control example shows an example of a display mode displayed on the third pattern display device when the special change state is set in the 11th control example, when the special change in the 11th control example is in the case where the special change in the 11th control example is performed when the special change in the 11th control example is performed and the pinch effect is performed when the special change in the 11th control example is performed when the special change in the 11th control example is performed and a pinch effect is performed. [Figure 421] 11 is a diagram showing an example of a display mode of the third pattern display device at the end of the pinch effect executed based on the execution of the special diagram 2 small hit fluctuation during the zone of increasing the special change ratio in the 11th control example. [Figure 422] 11. FIG. 11. is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 11th control example, and FIG. 11th control example is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 11th control example. [Figure 423] 11 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 11th control example. [Figure 424] 11. (a) is a block diagram showing the configuration of a variation pattern table set in the ROM of the main control device in the 11th control example, (b) is a diagram schematically showing the specified contents of the zone table in the 11th control example, and (c) is a diagram schematically showing the specified contents of the special-speed and time-saving table in the 11th control example. [Figure 425] 11 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the 11th control example. [Figure 426] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 11th control example. [Figure 427] 10 is a flow chart showing a first special pattern variation pattern selection process executed by an MPU within the main control device in the 11th control example. [Figure 428] 11 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 11th control example. [Figure 429] 11 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 11th control example. [Figure 430] 11 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the 11th control example. [Figure 431] 11 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 11th control example. [Figure 432] 12 (a) is a diagram showing an example of a display mode displayed on the third pattern display device during the special state in the 12th control example, and (b) is a diagram showing an example of a display mode displayed on the third pattern display device during the time-saving state in the 12th control example. [Figure 433] 12 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 12th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 12th control example. [Figure 434] 12 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 12th control example. [Figure 435] 12 is a block diagram showing the configuration of the variation pattern table set in the ROM of the main control device in the 12th control example, (b) is a diagram schematically showing the specified contents of the time-saving table in the 12th control example, and (c) is a diagram schematically showing the specified contents of the special-change table in the 12th control example. [Figure 436] 12 is a flow chart showing a first special pattern variation pattern selection process executed by the MPU within the main control device in the 12th control example. [Figure 437]12 is a flow chart showing the change-initial update process executed by the MPU in the main control device in the 12th control example. [Figure 438] 12 is a flow chart showing the update process when fluctuation stops executed by the MPU in the main control device in the 12th control example. [Figure 439] 12 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 12th control example. [Figure 440] 12 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the 12th control example. [Figure 441] 10.

[0011] FIG. 1 (a) is a diagram showing an example of the display mode of the third pattern display device in the time-saving state set based on the occurrence of a time-saving pattern winning during the normal state in the first modification of the ninth control example, and FIG. 10.

[0011] FIG. 10.

[0011] FIG. 10. In the first modification of the ninth control example, the display mode of the third pattern display device in the time-saving state, which is reset based on the occurrence of a time-saving pattern winning during the time-saving state in the first modification of the ninth control example. [Figure 442] 10A and 10B are diagrams showing an example of the display mode of the third pattern display device when a time-saving pattern winning occurs during the time-saving state in the second modification of the ninth control example. [Figure 443] 10A and 10B are diagrams showing an example of the display mode of the third pattern display device in the second modification of the ninth control example, when a rank notification effect is performed during a time-saving state that is reset based on the fact that a time-saving pattern winning has occurred during a time-saving state. [Figure 444] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the second modification of the ninth control example. [Figure 445] 10 is a flow chart showing the special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the second modification of the ninth control example. [Figure 446] 10 is a flow chart showing a secret performance setting process executed by the MPU in the audio lamp control device in the second modification of the ninth control example. [Figure 447] 10 is a flow chart showing a non-confidential performance setting process executed by the MPU in the audio lamp control device in the second modification of the ninth control example. [Figure 448] 10A (a) is a diagram showing an example of a battle performance start screen displayed on the third pattern display device in the first performance modification of the eighth control example, and (b) is a diagram showing an example of a battle performance preemptive attack screen displayed on the third pattern display device in the first performance modification of the eighth control example. [Figure 449] 6A to 6D are diagrams showing an example of display of long buttons in the first performance modification of the eighth control example. [Figure 450] 10 is a flow chart showing a time-saving state performance mode determination process executed by the MPU in the audio lamp control device in the first performance modification of the eighth control example. [Figure 451] 10A (a) is a diagram showing an example of an additional performance start screen displayed on the third design display device in the second performance modification of the eighth control example, and (b) is a diagram showing an example of an additional performance starting screen displayed on the third design display device in the second performance modification of the eighth control example. [Figure 452] 10. 10 is a diagram showing an example of a pseudo-MAX jackpot performance start screen displayed on the third pattern display device in the second performance modification of the eighth control example, and (b) shows an example of a pseudo-MAX jackpot performance during the performance modification of the eighth control example, and a diagram showing an example of a pseudo-MAX jackpot performance during the performance modification of the second performance modification of the eighth control example. [Figure 453] 10A (a) is a diagram showing an example of a pseudo-hold continuous performance start screen displayed on the third pattern display device in the second performance modification of the eighth control example, and (b) is a diagram showing an example of a pseudo-hold continuous performance during performance modification of the eighth control example, which is being performed on the third pattern display device in the second performance modification of the eighth control example. [Figure 454] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the second performance modification of the eighth control example. [Figure 455] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the second performance modification of the eighth control example. [Figure 456] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the second performance modification of the eighth control example. [Figure 457] 13 (a) is a diagram showing an example of a performance screen in a special state displayed on the third pattern display device in the 13th control example, and (b) is a diagram showing an example of a Jackpot performance screen in a special state displayed on the third pattern display device in the 13th control example. [Figure 458] 13 is a block diagram showing the structure of a variation pattern table for special modes that is included in the ROM in the main control device of a pachinko machine in the 13th control example. [Figure 459] 13 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 13th control example. [Figure 460] 14 is a flow chart showing a process for determining the special-mode state performance mode executed by the MPU in the audio lamp control device in the 13th control example. [Figure 461] 14 is a front view of the pachinko machine of the 14th control example. [Figure 462] 14 is a front view of the gaming board of the pachinko machine of the 14th control example. [Figure 463] 14 is a partial enlarged view of the gaming board of the pachinko machine of the 14th control example. [Figure 464] 14 is a front perspective view of the V-winning device of the 14th control example. [Figure 465] 14 is an exploded front perspective view of the V winning device of the 14th control example. [Figure 466] 14 is an operational view of the V-winning device of the 14th control example seen from the rear side. [Figure 467] 14 is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 14th control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the 14th control example in plan viewed in plan view. [Figure 468] 14 (a) is a front view of the performance button of the pachinko machine in the 14th control example, and (b) is a front view of the selection button of the pachinko machine in the 14th control example. [Figure 469] 14 is a rear view of the gaming board of the pachinko machine in the 14th control example. [Figure 470] 14 (a) is a diagram schematically showing area division settings and effective line settings of the display screen in the 14th control example, and (b) is a diagram illustrating an example of an actual display screen in the 14th control example. [Figure 471] 14th control example (a) shows an example of a jackpot performance screen after winning the normal state jackpot, displayed on the third pattern display device in the 14th control example, and (b) shows an example of an enemy performance screen displayed on the third pattern display device in the 14th control example. [Figure 472] 14th control example (a) shows an example of the screen during the interval after the second round, displayed on the third pattern display device in the 14th control example, and (b) shows an example of the screen during the successful screen during the six rounds (final round) displayed on the third pattern display device in the 14th control example. [Figure 473] 473(a) is a diagram showing an example of the third round performance screen displayed on the third pattern display device in the 14th control example, and (b) is a diagram showing an example of the display screen displayed on the third pattern display device in the 14th control example, when a button is pressed in FIG. 473(a) displayed on the third pattern display device in the 14th control example. [Figure 474] 473(a) is a diagram showing an example of a display screen in which a button is not pressed in FIG. 473(a) displayed on the third pattern display device in the 14th control example, and (b) is a diagram showing an example of a successful revival performance screen in the six rounds (final round) displayed on the third pattern display device in the 14th control example. [Figure 475] 14th control example (a) shows an example of a display screen in the time-saving state (in lashing) displayed on the third pattern display device in the 14th control example, and (b) shows an example of a hit screen in the time-saving state (in lashing) displayed on the third pattern display device in the 14th control example. [Figure 476] 14th control example (a) shows an example of a small-hit game screen in a time-saving state (during rush) displayed on the third pattern display device in the 14th control example, and (b) shows an example of a display screen in the case where V displayed on the third pattern display device in the 14th control example is aimed and V is won during the first performance period. [Figure 477] 476(b) displayed on the third pattern display device in the 14th control example, and shows an example of a display screen after V is targeted and the initial performance period has passed. [Figure 478] 14th control example (a) shows an example of a display screen for the final change (off) of the time-saving state (distance) displayed on the third pattern display device in the 14th control example, and (b) shows an example of a pull-back performance screen after the time-saving state is completed, displayed on the third pattern display device in the 14th control example. [Figure 479] 14th control example (a) shows an example of a pull-back performance end screen displayed on the third pattern display device in the 14th control example, and (b) shows an example of a lash result display screen displayed on the third pattern display device in the 14th control example. [Figure 480]14th control example (a) shows an example of a NEXT performance screen (2nd round of rush jackpots) displayed on the third pattern display device in the 14th control example, and (b) shows an example of a NEXT performance result screen (without hold consecutive or no round promotion) displayed on the third pattern display device in the 14th control example. [Figure 481] 14th control example (a) shows an example of a NEXT performance result screen (with round promotion) displayed on the third pattern display device in the 14th control example, and (b) shows an example of a NEXT performance result screen (with hold consecutive) displayed on the third pattern display device in the 14th control example. [Figure 482] 14th control example (a) shows an example of a small win game screen in a hold-continued state displayed on the third pattern display device in the 14th control example, and (b) shows an example of a NEXT performance screen in a hold-continued state displayed on the third pattern display device in the 14th control example (with hold-continued state). [Figure 483] 14 is a diagram showing an example of a display screen when the number of display rounds exceeds MAX (9 rounds) in the continuous hold sequence displayed on the third pattern display device in the 14th control example. [Figure 484] 14th control example (a) shows an example of a display screen in the standby state displayed on the third pattern display device in the 14th control example, and (b) shows an example of a display mode selection screen displayed on the third pattern display device in the 14th control example. [Figure 485] 14th control example (a) shows an example of a stage transition performance screen during special chart change displayed on the third pattern display device in the 14th control example, and (b) shows an example of a stage fixed operation screen during special chart change displayed on the third pattern display device in the 14th control example. [Figure 486] 14 is a diagram showing the game flow of a pachinko machine in the 14th control example. [Figure 487] 14 is a block diagram showing the electrical configuration of a pachinko machine in the 14th control example. [Figure 488] 14 is a diagram schematically showing the structure of various counters in the 14th control example. [Figure 489] 14 (a) is a block diagram showing the configuration of the ROM of the main control device in the 14th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 14th control example. [Figure 490] 14 (a) is a block diagram showing the structure of the first random number table set in the ROM of the main control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the special symbol 1 random number table set in the ROM of the main control device in the 14th control example, and (c) is a diagram schematically showing the specified contents of the special symbol 2 random number table set in the ROM of the main control device in the 14th control example. [Figure 491] 14 (a) is a block diagram showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 14th control example, and (b) is a diagram showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 14th control example. [Figure 492] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the 14th control example. [Figure 493] 14 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern table set in the ROM of the main control device in the 14th control example. [Figure 494] 14 (a) is a diagram schematically showing the specified contents of the time-saving fluctuation pattern table set in the ROM of the main control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern table set in the ROM of the main control device in the 14th control example, and (c) is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern table set in the ROM of the main control device in the 14th control example. [Figure 495] 14 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the 14th control example. [Figure 496] 14 (a) is a block diagram showing the configuration of the ROM of the audio lamp control device in the 14th control example, and (b) is a block diagram showing the configuration of the RAM of the audio lamp control device in the 14th control example. [Figure 497] 14 (a) is a diagram schematically showing the specified contents of the defeat number selection table set in the ROM of the voice lamp control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the defeat performance mode selection table set in the ROM of the voice lamp control device in the 14th control example. [Figure 498] 14 is a diagram schematically showing the specified contents of the additional reduction value selection table set in the ROM of the audio lamp control device in the 14th control example. [Figure 499] 14 (a) is a diagram schematically showing the specified contents of the performance stage data table set in the ROM of the audio lamp control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the game environment data table set in the ROM of the audio lamp control device in the 14th control example. [Figure 500] 11 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the 14th control example. [Figure 501] 14 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 14th control example. [Figure 502] 14 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 14th control example. [Figure 503] 14 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 14th control example. [Figure 504] 14 is a flow chart showing a small hit start setting process executed by the MPU in the main control device in the 14th control example. [Figure 505] 14 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 14th control example. [Figure 506] 14 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 14th control example. [Figure 507] 14 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 14th control example. [Figure 508] 11 is a flow chart showing a preliminary process executed by an MPU within the main control device in the 14th control example. [Figure 509] 14 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 14th control example. [Figure 510] 14 is a flow chart showing a process of passing through a through gate executed by an MPU within the main control device in the 14th control example. [Figure 511] 14 is a flow chart showing V inlet passing processing executed by the MPU in the main control device in the 14th control example. [Figure 512] 14 is a flow chart showing V-passing processing executed by the MPU within the main control device in the 14th control example. [Figure 513] 14 is a flow chart showing NMI processing executed by the MPU in the main control device in the 14th control example. [Figure 514] 14 is a flow chart showing the startup process executed by the MPU in the main control device in the 14th control example. [Figure 515] 14 is a flow chart showing main processing executed by the MPU within the main control device in the 14th control example. [Figure 516] 14 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 14th control example. [Figure 517] 14 is a flow chart showing small hit control processing executed by the MPU in the main control device in the 14th control example. [Figure 518] 14 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 519] 14 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 520] 14 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 521] 14 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 522] 14 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 523] 14 is a flow chart showing hit-related processes executed by the MPU in the audio lamp control device in the 14th control example. [Figure 524] 14 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 14th control example. [Figure 525] 14 is a flow chart showing an in-round performance process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 526]14 is a flow chart showing initial jackpot related processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 527] 14 is a flow chart showing a process for determining the defeat performance mode executed by the MPU in the audio lamp control device in the 14th control example. [Figure 528] 14 is a flow chart showing the initial jackpot round performance process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 529] 14 is a flow chart showing the initial interval performance process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 530] 14 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 14th control example. [Figure 531] 14 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 532] 14 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 533] 14 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 534] 14 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 535] 14 is a flow chart showing the update process during small-hit games executed by the MPU in the audio lamp control device in the 14th control example. [Figure 536] 14 is a flow chart showing frame button input monitoring and presentation processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 537] 14 is a flow chart showing fixed mode setting processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 538] 14 is a flow chart showing the performance button operation process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 539] 15 (a) is a diagram showing an example of a small win game screen (in the case of special 2 hold 0) of the hold players displayed on the third pattern display device in the 15th control example, and (b) is a diagram showing an example of a small win game screen (in the case of special 2 hold acquisition) of the hold players displayed on the third pattern display device in the 15th control example. [Figure 540] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 15th example of control. [Figure 541] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the 15th control example. [Figure 542] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 15th example of control. [Figure 543] 10 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 15th control example. [Figure 544] 10 is a flow chart showing a small hit and medium hold acquisition process executed by the MPU in the audio lamp control device in the 15th example of control. [Figure 545] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 15th control example. [Figure 546] 10 is a flow chart showing a small-stop guide mode setting process executed by an MPU within the audio lamp control device in the 15th control example. [Figure 547] 16th control example (a) shows an example of a display screen in which a third special chart hold is obtained during the change in special chart 1 displayed on the third pattern display device in the 16th control example, and (b) shows an example of a display screen in which only the third special chart hold pattern displayed on the third pattern display device in the 16th control example, the action is shifted. [Figure 548] 16th control example (a) shows an example of a special diagram 1 stop display screen displayed on the third pattern display device in the 16th control example, and (b) shows an example of a special diagram 1st order change start screen displayed on the third pattern display device in the 16th control example. [Figure 549] 16th control example (a) shows an example of a hold change action display screen displayed on the third pattern display device in the 16th control example, (b) shows an example of a hold change display screen displayed on the third pattern display device in the 16th control example, and (c) shows an example of a hold shift display screen displayed on the third pattern display device in the 16th control example. [Figure 550] 16th control example (a) shows an example of a display screen before stage change when synchronizing the hold pattern action displayed on the third pattern display device in the 16th control example, and (b) shows an example of a display screen after stage change when synchronizing the hold pattern action displayed on the third pattern display device in the 16th control example. [Figure 551] 16th control example (a) shows an example of a display screen before stage change during asynchronous pending pattern action displayed on the third pattern display device in the 16th control example, and (b) shows an example of a display screen during stage change during asynchronous pending pattern action displayed on the third pattern display device in the 16th control example, and (c) shows an example of a display screen after stage change during asynchronous pending pattern action displayed on the third pattern display device in the 16th control example. [Figure 552] 14 is a block diagram showing the configuration of a ROM of the audio lamp control device in the 16th control example. [Figure 553] 14 is a diagram schematically showing the specified contents of a pending action data table set in the ROM of the main control device in the 16th control example. [Figure 554] 14 is a block diagram showing the configuration of the RAM of the audio lamp control device in the 16th control example. [Figure 555] 11 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 16th control example. [Figure 556] 11 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the 16th control example. [Figure 557] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 558] 11 is a flow chart showing a pending mode determination process executed by the MPU in the audio lamp control device in the sixteenth control example. [Figure 559] 11 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 560] 11 is a flow chart showing a hold-effect update process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 561] 11 is a flow chart showing a fluctuating stage transition process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 562] 11 is a flow chart showing a special mode determination process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 563] 10 is a front view of the gaming board of the pachinko machine in the 17th control example. [Figure 564] 11 is a partial enlarged view of the game board of a pachinko machine in the 17th control example. [Figure 565] 1 is a front perspective view of the V winning device in the 17th control example. [Figure 566] 1 is an exploded front perspective view of the V winning device in the 17th control example. [Figure 567] 14 is an operational view of the V winning device in the 17th control example seen from the rear side. [Figure 568] 17 (a) is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 17th control example in plan viewed in a state in which the open / closed door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the 17th control example in plan viewed in FIG. [Figure 569] 17 (a) is a schematic diagram showing the state in which the decorative movable object in the 17th control example is in the storage position, and (b) is a schematic diagram showing the state in which the decorative movable object in the 17th control example is at a lower limit. [Figure 570] 17 (a) is a schematic diagram showing the right-centered piece of a decorative movable vehicle in the 17th control example, and (b) is a schematic diagram showing the right-centered piece of a decorative movable vehicle in the 17th control example, and the left-centered piece of a decorative movable vehicle in the 17th control example. [Figure 571] 1 is an exploded front perspective view of the decorative movable vehicle in the 17th control example. [Figure 572] 14 is an exploded rear perspective view of the decorative movable vehicle in the 17th control example. [Figure 573] 14 is an exploded front perspective view of the bar function in the 17th control example. [Figure 574] 14 is an exploded rear perspective view of the bar function in the 17th control example. [Figure 575] 14 is an exploded front perspective view of a rotor body in the 17th control example. [Figure 576] 14 is an exploded rear perspective view of the rotor body in the 17th control example. [Figure 577] 17 (a) is a diagram showing the structure of the third pattern row in the 17th control example, and (b) to (e) are diagrams schematically showing the stopping patterns of the rotary body parts in the 17th control example. [Figure 578] 17th control example (a) shows an example of a display screen when the special drawing is temporarily stopped, displayed on the third pattern display device in the 17th control example, and (b) shows an example of a display screen when the relief chance presentation is started, displayed on the third pattern display device in the 17th control example. [Figure 579] 17th control example (a) shows an example of a case where the relief opportunity presentation is successful displayed on the third pattern display device in the 17th control example, and (b) shows an example of a case where the relief chance presentation is failed displayed on the third pattern display device in the 17th control example. [Figure 580] 14 is a block diagram showing the electrical configuration of a pachinko machine in the 17th control example. [Figure 581] 17 (a) is a block diagram showing the configuration of the ROM of the audio lamp control device in the 17th control example, and (b) is a block diagram showing the configuration of the RAM of the audio lamp control device in the 17th control example. [Figure 582] 17 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern selection table set in the ROM of the audio lamp control device in the 17th control example. [Figure 583] 17. (a) is a diagram schematically showing the specified contents of the time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 17th control example, and (b) is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 17th control example, and (c) is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 17th control example. [Figure 584] 14 is a diagram schematically showing the specified contents of the operation scenario selection table set in the ROM of the audio lamp control device in the 17th control example. [Figure 585] 17 (a) is a diagram showing the specified contents of operation scenario A (bar function up and down drive) set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario A (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 17th control example. [Figure 586] 17 (a) is a diagram showing the specified contents of operation scenario B (bar function up and down drive) set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario B (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 17th control example. [Figure 587] 17 (a) is a diagram showing the specified contents of operation scenario C (bar function up and down drive) set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario C (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 17th control example. [Figure 588] 17 (a) is a diagram showing the specified contents of operation scenario D (bar function up and down drive) set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario D (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 17th control example. [Figure 589] 17 (a) is a diagram showing the specified contents of operation scenario E (bar function up and down drive) set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario E (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 17th control example. [Figure 590] 17 (a) is a diagram showing the specified contents of operation scenario F (bar function up and down drive) set in the ROM of the voice lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario F (rotary body function left and right drive, rotation drive) set in the ROM of the voice lamp control device in the 17th control example. [Figure 591] 17 (a) is a diagram showing the specified contents of operation scenario G (bar function up and down drive) set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario G (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 17th control example. [Figure 592] 17 (a) is a diagram showing the specified contents of operation scenario H (bar function up and down drive) set in the ROM of the audio lamp control device in the 17th control example, and (b) is a diagram showing the specified contents of operation scenario H (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 17th control example. [Figure 593] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the seventeenth control example. [Figure 594] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 17th control example. [Figure 595] 10 is a flow chart showing a design determination command process executed by the MPU in the audio lamp control device in the seventeenth control example. [Figure 596] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 17th control example. [Figure 597] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 17th control example. [Figure 598] 10 is a flow chart showing a me-liquid crystal performance execution management process executed by an MPU within the audio lamp control device in the seventeenth control example. [Figure 599] 11 is a flow chart showing the relief opportunity presentation start process executed by the MPU in the audio lamp control device in the 17th control example. [Figure 600] 11 is a flow chart showing a process during execution of a special scenario executed by an MPU in the audio lamp control device in the 17th control example. [Figure 601] 11 is a flow chart showing a process during execution of a relief opportunity performance executed by the MPU in the audio lamp control device in the 17th control example. [Figure 602] 17th control example (a) shows an example of a display screen at the start of relief opportunity presentation displayed on the third pattern display device in the first modification of the 17th control example, and (b) shows an example of a display screen at the successful successful relief opportunity presentation displayed on the third pattern display device in the first modification of the 17th control example. [Figure 603] 11 is a front view of the gaming board of the pachinko machine in the 18th control example. [Figure 604] 11 is a front view of the decorative movable vehicle operating unit in the 18th control example. [Figure 605] 18th control example (a) is a schematic diagram of the operating unit of the logo character in the 18th control example, and (b) is a schematic diagram of the operating unit of the A logo character in the 18th control example. [Figure 606] 11 is a schematic diagram of an operating unit of a shutter function in the 18th control example. [Figure 607] 18 is a diagram showing a state in which the logo function in the 18th control example is at a lower limit. [Figure 608] 18 is a diagram showing a state in which a logo function is dropped in the right middle part in the 18th control example. [Figure 609] 18 is a diagram showing the right-centered piece drop and left-handed piece drop of the logo character in the 18th control example. [Figure 610] 11 is a diagram showing a state in which the atomic object is at the elevation limit in the 18th control example. [Figure 611] 11 is a diagram showing the closed state of the shutter function in the 18th control example. [Figure 612] 11 is a diagram showing a case in which all the decorative movable elements in the 18th control example are in a movable state. [Figure 613] 11 is an exploded front perspective view of the logo function in the 18th control example. [Figure 614] 11 is an exploded rear perspective view of the logo function in the 18th control example. [Figure 615] 11 is an exploded front perspective view of the bar function in the 18th control example. [Figure 616] 11 is an exploded rear perspective view of the bar function in the 18th control example. [Figure 617] 11 is an exploded front perspective view of a rotor body in the 18th control example. [Figure 618] 11 is an exploded rear perspective view of the rotor body in the 18th control example. [Figure 619] 11 is an exploded front perspective view of the operating unit of the atomic object in the 18th control example. [Figure 620] 11 is an exploded rear perspective view of the operating unit of the atomic object in the 18th control example. [Figure 621] 11 is an exploded front perspective view of the rising role in the 18th control example. [Figure 622] 11 is an exploded rear perspective view of the rising body in the 18th control example. [Figure 623] 11 is an exploded front perspective view of the operating unit of the shutter function in the 18th control example. [Figure 624] 11 is an exploded front perspective view of the shutter function in the 18th control example. [Figure 625] 11 is an exploded rear perspective view of the shutter function in the 18th control example. [Figure 626]18th control example (a) shows an example of a display screen after 3 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 18th control example, and (b) shows an example of a display screen after 5 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 18th control example. [Figure 627] 18th control example (a) shows an example of a display screen after 7 seconds has passed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 18th control example, and (b) shows an example of a display screen after 3 seconds has passed since the start of the performance when the composite performance is started during the reach performance displayed on the third pattern display device in the 18th control example. [Figure 628] 18th control example (a) shows an example of a display screen after 5 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 18th control example, and (b) shows an example of a display screen after 7 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 18th control example. [Figure 629] 18th control example (a) shows an example of a display screen after 3 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 18th control example, and (b) shows an example of a display screen after 5 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 18th control example. [Figure 630] 11 is a diagram showing an example of a display screen after 7 seconds have passed since the start of the composite performance of the alternative pattern 2 displayed on the third pattern display device in the 18th control example. [Figure 631] 11 is a timing chart when a complex performance is performed during the pre-reach performance period in the 18th control example. [Figure 632] 11 is a timing chart when a compound performance of alternative pattern 1 is performed during the reach performance period in the 18th control example. [Figure 633] 11 is a timing chart when a compound performance of alternative pattern 2 is performed during the reach performance period in the 18th control example. [Figure 634] 14 is a block diagram showing the electrical configuration of a pachinko machine in the 18th control example. [Figure 635] 18th control example (a) is a block diagram showing the configuration of the ROM of the main control device in the 18th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 18th control example. [Figure 636] 18 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the audio lamp control device in the 18th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern selection table set in the ROM of the audio lamp control device in the 18th control example. [Figure 637] 18 (a) is a diagram schematically showing the specified contents of the time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 18th control example, and (b) is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 18th control example, and (c) is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 18th control example. [Figure 638] 18 (a) is a diagram showing the specified contents of the combined performance operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 18th control example, and (b) is a diagram showing the specified contents of the combined performance operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 18th control example. [Figure 639] 18 (a) is a diagram showing the specified contents of the compound performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 18th control example, and (b) is a diagram showing the specified contents of the compound performance operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 18th control example. [Figure 640] 18 (a) is a diagram showing the specified contents of the first alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 18th control example, and (b) is a diagram showing the specified contents of the first alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 18th control example. [Figure 641] 18 (a) is a diagram showing the specified contents of the first alternative performance operation scenario table (a function up and down drive) set in the ROM of the audio lamp control device in the 18th control example, and (b) is a diagram showing the specified contents of the first alternative operation scenario table (a function left and right drive) set in the ROM of the audio lamp control device in the 18th control example. [Figure 642] 18 (a) is a diagram showing the specified contents of the second alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 18th control example, and (b) is a diagram showing the specified contents of the second alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 18th control example. [Figure 643] 18 (a) is a diagram showing the specified contents of the second alternative performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 18th control example, and (b) is a diagram showing the specified contents of the second alternative operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 18th control example. [Figure 644] 11 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 645] 11 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 646] 11 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 647] 11 is a flow chart showing a me-liquid crystal performance execution management process executed by an MPU within the audio lamp control device in the 18th control example. [Figure 648] 11 is a flow chart showing a composite performance start process executed by the MPU in the audio lamp control device in the 18th control example. [Figure 649] 10 is a flow chart showing first operational processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 650] 11 is a flow chart showing second operation processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 651] 11 is a flow chart showing the movable role processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 652] 18th control example (a) shows an example of a combined performance of a geisha performance and a character role executed by the third design display device in the first modification of the 18th control example, and (b) shows an example of a display screen during the geisha performance being executed, displayed by the third design display device in the first modification of the 18th control example. [Figure 653] 18th control example (a) shows a case in which the character role in the first modification of the 18th control example is movable, and (b) shows a case in which the character role in the first modification of the 18th control example is movable. [Figure 654] 18th control example (a) shows an example of a composite performance in which the character role is placed on the front side of the key role displayed on the third pattern display device in the first modification of the 18th control example, and (b) shows an example of a composite performance in which the character role is placed on the back side of the key role displayed on the third pattern display device in the first modification of the 18th control example. [Figure 655] 10 is a block diagram showing the configuration of a ROM of the main control device in the 19th control example. [Figure 656] 10 is a block diagram showing the configuration of the RAM of the main control device in the 19th control example. [Figure 657] 19 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 19th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 1 table set in the ROM of the main control device in the 19th control example. [Figure 658] 19th control example (a) is a diagram schematically showing the specified contents of the normal variation pattern 2 table set in the ROM of the main control device in the 19th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 3 table set in the ROM of the main control device in the 19th control example. [Figure 659] 19 (a) is a diagram schematically showing the specified contents of the time-saving variation pattern 1 table set in the ROM of the main control device in the 19th control example, and (b) is a diagram schematically showing the specified contents of the time-saving variation pattern 2 table set in the ROM of the main control device in the 19th control example. [Figure 660] 10 is a diagram schematically showing the specified contents of the time-saving variation pattern 3 table set in the ROM of the main control device in the 19th control example. [Figure 661]19. FIG. 19 is a block diagram showing the configuration of a state transition table set in the ROM of the main control device in the 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, is a diagram showing the configuration of a state transition table set in the ROM of the main control device in the 19th control example, and FIG. 19th control example, FIG. 19th control example, FIG. 19th control example, FIG. [Figure 662] 19. FIG. 10A is a diagram schematically showing the specified contents of the state transition 4 table set in the ROM of the main control device in the 19th control example, FIG. 10A is a diagram schematically showing the specified contents of the state transition 5 table set in the ROM of the main control device in the 19th control example, and FIG. 10A is a diagram schematically showing the specified contents of the state transition 6 table set in the ROM of the main control device in the 19th control example. [Figure 663] 10 is a diagram schematically showing the specified contents of the jackpot transition setting table set in the ROM of the main control device in the 19th control example. [Figure 664] 11 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 19th control example. [Figure 665] 11 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 19th control example. [Figure 666] 11 is a flow chart showing a process for subtracting the number of variations executed by the MPU in the main control device in the 19th control example. [Figure 667] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 20th control example, and (b) is a diagram schematically showing the specified contents of the normal main variation pattern table set in the ROM of the main control device in the 20th control example. [Figure 668] 10A (a) is a diagram schematically showing the specified contents of the time-saving main fluctuation pattern table set in the ROM of the main control device in the 20th control example, and (b) is a diagram schematically showing the specified contents of the normal-saving main fluctuation pattern table set in the ROM of the main control device in the 20th control example. [Figure 669] 1 is a block diagram showing the configuration of the RAM of the main control device in the 20th control example. [Figure 670] 10 is a block diagram showing the configuration of a variable time counter set in the RAM of the main control device in the 20th control example. [Figure 671] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 20th control example. [Figure 672] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 20th control example. [Figure 673] 10 is a flow chart showing a variation time update process executed by the MPU within the main control device in the 20th control example. [Figure 674] 10A (a) is a diagram showing an example of a display screen during the third pattern change displayed on the third pattern display device in the 21st control example, and (b) is a diagram showing an example of a display screen when the delayed performance is started, displayed on the third pattern display device in the 21st control example. [Figure 675] 10A (a) is a diagram showing an example of a display screen for the expansion performance displayed on the third pattern display device in the 21st control example, and (b) is a diagram showing an example of a display screen for the horizontal rotation performance displayed on the third pattern display device in the 21st control example. [Figure 676] 1 is a block diagram showing the configuration of a ROM of the audio lamp control device in the 21st control example. [Figure 677] 14 is a diagram schematically showing the specified contents of the chance mode selection table set in the ROM of the audio lamp control device in the 21st control example. [Figure 678] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 21st control example. [Figure 679] 10 is a flow chart showing normal performance setting processing executed by the MPU in the audio lamp control device in the 21st control example. [Figure 680] 10 is a flow chart showing variation pattern command processing executed by the MPU in the audio lamp control device in the 21st control example. [Figure 681] 14 is an explanatory diagram showing the structure of a box pattern displayed on the third pattern display device in the 21st control example. [Figure 682] 10A (a) is a diagram showing the correspondence between box patterns and numerical patterns in the 21st control example, and (b) is a diagram showing the numerical pattern sequence display pattern in the 21st control example. [Figure 683] 6A to 6B are diagrams showing examples of pattern data set in the numerical pattern sequence in the 21st control example. [Figure 684] 10A (a) is a diagram showing an example of a display screen displayed on the third pattern display device in the 21st control example when the missed pattern is stopped, and (b) is a diagram showing an example of a display screen showing a horizontal rotation effect displayed on the third pattern display device in the 21st control example. [Figure 685] 10 is a diagram showing an example of the ending screen of a jackpot game displayed on the third pattern display device in the 21st control example. [Figure 686] 1 is a front view of the gaming board of the pachinko machine of the 22nd control example. [Figure 687] 10A is a diagram showing an example of the performance mode when a time-saving pattern winning occurs in the normal state of the 22nd control example, and (b) shows an example of the performance mode for the chance-time standby performance that is executed during the period from when the second time-saving pattern is moved in the second time-saving state of the 22nd control example until the hold ball of the first special pattern is exhausted. [Figure 688] 10 is a diagram showing an example of the performance mode when 10 times of time savings are notified in the chance time standby performance of the 22nd control example, and (b) shows an example of the performance mode when a hold ball with the first special pattern is selected as a big jackpot during the execution period of the chance time standby performance of the 22nd control example. [Figure 689] 10. 10 is a diagram showing an example of the performance mode of the variable display performance when winning a normal map B during the chance time in the 22nd control example, and (b) shows an example of the performance mode of the first suggestive display performance that is executed during the normal map win game when winning a normal map win during the chance time in the 22nd control example. [Figure 690] 6A and 6B are diagrams showing an example of the performance mode of the variable display performance corresponding to the second special pattern in the 22nd control example. [Figure 691] 10A is a diagram showing an example of the performance mode of the second suggestion performance performed during the small hit game of the second special pattern in the 22nd control example, and (b) shows an example of the performance mode set during the lash state in the 22nd control example. [Figure 692] 10A and 10B are diagrams showing an example of the performance mode when the through gate passes during the lash state in the 22nd control example. [Figure 693] 10 is a diagram showing the progression of performance modes before and after chance times in the 22nd control example. [Figure 694] 6A and 6B are diagrams showing the correspondence between the state of the special pattern during the chance time in the 22nd control example and the state of the ordinary pattern. [Figure 695] 10 is a diagram showing a method for transitioning between the game states in the 22nd control example. [Figure 696] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 22nd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 22nd control example. [Figure 697] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 22nd control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 22nd control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 22nd control example. [Figure 698] 12A and 2B are diagrams schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 22nd control example, and (b) are block diagrams showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 22nd control example, and (c) are diagrams schematically showing the specified contents of the normal table in the 22nd control example. [Figure 699] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the 22nd control example, and (b) is a diagram schematically showing the specified contents of the time-saving table in the 22nd control example. [Figure 700] 12. FIG. 12 is a diagram schematically showing the specified contents of the small-stop type selection table set in the ROM of the main control device in the 22nd control example, FIG. 12 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 22nd control example, and FIG. 12 is a diagram schematically showing the specified contents of the ordinary-stop type selection table set in the ROM of the main control device in the 22nd control example. [Figure 701] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 22nd control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 22nd control example. [Figure 702]14 is a diagram schematically showing the specified contents of the standby performance selection table set in the ROM of the audio lamp control device of the pachinko machine in the 22nd control example. [Figure 703] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 22nd control example. [Figure 704] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 22nd control example. [Figure 705] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 22nd control example. [Figure 706] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 22nd control example. [Figure 707] 10 is a flow chart showing a missed type determination process executed by the MPU within the main control device in the 22nd control example. [Figure 708] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 22nd control example. [Figure 709] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 22nd control example. [Figure 710] 10 is a flow chart showing the normal-picture-on-line processing executed by the MPU in the main control device in the 22nd control example, and (b) shows the third termination condition determination processing executed by the MPU in the main control device in the 22nd control example. [Figure 711] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 712] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 713] 10 is a flow chart showing a standby performance setting process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 714] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 715] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 716] 10 is a flow chart showing a command processing per-unit diagram executed by an MPU in the audio lamp control device in the 22nd control example. [Figure 717] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 718] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 719] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 720] 1 is a front view of the gaming board of the pachinko machine of the 23rd control example. [Figure 721] 10A is a diagram showing an example of the performance mode in which the 23rd control example moves to the time-saving state A after the first hit, and (b) shows an example of the performance mode in which the first change display of the second special pattern is started in the time-saving state A. [Figure 722] 10 is a diagram showing an example of the performance mode in which, after the first hit in the 23rd control example, the set number of hold balls for the second special symbol is accumulated and the time-saving end condition is satisfied, and (b) shows an example of the performance mode in which the second special symbol is displayed in the first time after the time-saving state B is set in the 23rd control example. [Figure 723] 10A is a diagram showing an example of the performance mode when the MAX bonus is won in the 23rd control example, and (b) shows an example of the performance mode for the simulated interval performance executed during the time-saving state C in the 23rd control example. [Figure 724] 10 is a diagram showing the correspondence between the progression of the performance mode after the first hit in the 23rd control example and the state of the second special pattern. [Figure 725] 10 is a diagram showing the progression of the performance mode from the time when the time-saving limit count is reached in the 23rd control example, when the time-saving limit is reached and the normal mode B is moved. [Figure 726] 10 is a diagram showing a method for transitioning between the game states in the 23rd control example. [Figure 727] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 23rd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 23rd control example. [Figure 728] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 23rd control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 23rd control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 23rd control example. [Figure 729] 1. (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 23rd control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 23rd control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 23rd control example. [Figure 730] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the 23rd control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the 23rd control example. [Figure 731] 10A (a) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 23rd control example, and (b) is a diagram schematically showing the specified contents of the small-jack type selection table set in the ROM of the main control device in the 23rd control example. [Figure 732] 10.

[0021] FIG. 10 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 23rd control example, and (b) is a diagram schematically showing the specified contents of the attack icon selection table set in the ROM of the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 733] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 734] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 23rd control example. [Figure 735] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 23rd control example. [Figure 736] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 23rd example of control. [Figure 737] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 23rd example of control. [Figure 738] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 23rd example of control. [Figure 739] 10 is a flow chart showing a processing for determining the number of pending balls executed by the MPU in the main control device in the 23rd example of control. [Figure 740] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 23rd example of control. [Figure 741] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the 23rd example of control. [Figure 742] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 23rd example of control. [Figure 743] 10 is a flow chart showing the jackpot end processing executed by the MPU in the main control device in the 23rd example of control. [Figure 744] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 745] 10 is a flow chart showing winning information command processing executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 746] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 747] 10 is a flow chart showing ending command processing executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 748] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 749] 10 is a diagram showing a method for transitioning between game states in the first modification of the 23rd control example. [Figure 750] 1 is a block diagram showing the configuration of the RAM of the main control device in the first modification of the 23rd control example. [Figure 751]10A (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the first modification of the 23rd control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the first modification of the 23rd control example. [Figure 752] 10A and 10B are diagrams schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the first modification of the 23rd control example. [Figure 753] 10A and 10B are diagrams showing an example of the performance mode in which the second modification of the 23rd control example is shifted to the time-saving state A after the first hit. [Figure 754] 10A and 10B show an example of the performance mode when the time-saving mode or pull-back mode is switched in the second modification of the 23rd control example, and (b) shows an example of the performance mode when the hit-variation performance is performed in the time-saving state C just before the time-saving limit count reaches after the time-saving mode is switched to the MAX bonus mode in the second modification of the 23rd control example. [Figure 755] 10 is a diagram showing correspondence between displaying a change in a normal pattern, a game of winning a normal pattern, and a display of a special pattern in a second modification of the 23rd control example during a time-saving state; [Figure 756] 10 is a diagram showing a method for transitioning between the game states in the second modification of the 23rd control example. [Figure 757] 10A (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the second modified example of the 23rd control example, and (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the second modified example of the 23rd control example. [Figure 758] 14 is a diagram schematically showing the specified contents of the normal table in the second modified example of the 23rd control example. [Figure 759] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the second modification of the 23rd control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the second modification of the 23rd control example. [Figure 760] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the second modification of the 23rd control example. [Figure 761] 10 is a flow chart showing special pattern variation processing executed by the MPU in the main control device in the second modification of the 23rd control example. [Figure 762] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the second modification of the 23rd control example. [Figure 763] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the second modification of the 23rd control example. [Figure 764] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the second modification of the 23rd control example. [Figure 765] 10 is a flow chart showing the miss-time type determination process executed by the MPU within the main control device in the second modification of the 23rd control example. [Figure 766] 10 is a flow chart showing normal pattern variation processing executed by the MPU in the main control device in the second modification of the 23rd control example. [Figure 767] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the second modification of the 23rd control example. [Figure 768] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the second modification of the 23rd control example. [Figure 769] 10A and 10B are diagrams showing an example of the performance mode of the remaining stock performance performed in a jackpot game other than the first hit in the 24th control example. [Figure 770] 10A (a) is a diagram showing an example of the performance mode at the time when a lash is started in the 24th control example, and (b) is a diagram showing an example of the performance mode at the time when a reach occurs during the lash in the 24th control example. [Figure 771] 10A is a diagram showing an example of the performance mode in which a non-V small win is selected during the lashing of the 24th control example, and (b) shows an example of the performance mode in which a non-V small win is selected during the lashing of the 24th control example, when the remaining portions corresponding to all non-V small wins become zero. [Figure 772] 6A and 6B are diagrams showing an example of the performance mode of the remaining recovery performance that is executed when the remaining increase condition is satisfied during the lashing of the 24th control example. [Figure 773] 10A is a diagram showing an example of the performance mode during which the reserved special chart 2 after the rush is completed in the 24th control example, and (b) shows an example of the performance mode when a hold of the hold has been acquired after the start of the final time-saving fluctuation in the 24th control example. [Figure 774] 14 is a diagram showing an example of a performance mode in the invincible mode in the 24th control example. [Figure 775] 10 is a diagram showing a method for transitioning between the game states in the 24th control example. [Figure 776] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 24th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 24th control example. [Figure 777] 10A (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 24th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 24th control example. [Figure 778] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 24th control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 24th control example. [Figure 779] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the 24th control example, and (b) is a diagram schematically showing the specified contents of the time-saving final fluctuation table in the 24th control example. [Figure 780] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 24th control example. [Figure 781] 14 is a diagram schematically showing the specified contents of the small hit type selection table set in the ROM of the main control device in the 24th control example. [Figure 782] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 24th control example. [Figure 783] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 24th control example. [Figure 784] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 24th control example. [Figure 785] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 24th control example. [Figure 786] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 24th control example. [Figure 787] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 788] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 24th control example. [Figure 789] 10 is a flow chart showing non-V small hit processing executed by the MPU in the audio lamp control device in the 24th control example. [Figure 790] 1 is a front view of the gaming board of the pachinko machine of the 25th control example. [Figure 791] 10A (a) is a diagram showing an example of a performance screen in the advantageous mode displayed on the third pattern display device in the 25th control example, and (b) is a diagram showing an example of a performance screen in the disadvantage mode displayed on the third pattern display device in the 25th control example. [Figure 792] 10. [00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 [Figure 793] 10. 10 is a diagram showing an example of a performance screen when a time-saving B (time-saving) is selected during the normal mode displayed on the third pattern display device in the 25th control example, and (b) shows an example of a performance screen when a time-saving B (time-saving) is selected during the advantageous mode displayed on the third pattern display device in the 25th control example. [Figure 794] 6A and 6B are diagrams showing an example of the performance during the remaining reserved period after the time-saving pattern is stopped, displayed on the third pattern display device in the 25th control example. [Figure 795] 10A (a) is a diagram showing an example of a time-saving performance screen displayed on the third pattern display device in the 25th control example, and (b) is a diagram showing an example of a time-saving performance screen displayed on the third pattern display device in the 25th control example, when a small win is won while the time-saving performance screen is displayed on the third pattern display device in the 25th control example. [Figure 796]10A is a diagram showing an example of a performance screen during ceiling reaching fluctuations in the normal mode displayed on the third pattern display device in the 25th control example, and (b) shows an example of a performance screen during ceiling reaching fluctuations in the advantageous mode displayed on the third pattern display device in the 25th control example. [Figure 797] 10 is a diagram showing a method for transitioning between the game states in the 25th control example. [Figure 798] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 25th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 25th control example. [Figure 799] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 25th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 25th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 25th control example. [Figure 800] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 25th control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 25th control example. [Figure 801] 14 is a diagram schematically showing the specified contents of the time-saving table in the 25th control example. [Figure 802] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 25th control example. [Figure 803] 10A is a diagram schematically showing the specified contents of the small-shot type selection table set in the ROM of the main control device in the 25th control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 25th control example. [Figure 804] 10.

[0021] FIG. 1 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 25th control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 25th control example. [Figure 805] 10 is a diagram schematically showing the specified contents of the background mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 25th control example. [Figure 806] 10 is a diagram schematically showing the specified contents of the performance pattern selection table set in the ROM of the audio lamp control device of a pachinko machine in the 25th control example. [Figure 807] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 25th control example. [Figure 808] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 25th control example. [Figure 809] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 25th control example. [Figure 810] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 25th control example. [Figure 811] 10 is a flow chart showing the miss-time type determination process executed by the MPU within the main control device in the 25th control example. [Figure 812] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 25th control example. [Figure 813] 10 is a flow chart showing ceiling update processing executed by the MPU in the main control device in the 25th control example. [Figure 814] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 815] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 816] 10 is a flow chart showing a standby performance setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 817] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 818] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 819] 10 is a flow chart showing the time-saving pattern determination process for performance executed by the MPU in the audio lamp control device in the 25th control example. [Figure 820] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 821] 1 is a front view of the gaming board of the pachinko machine of the 26th control example. [Figure 822] 10A (a) is a diagram showing an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 26th control example, while (b) is a diagram showing an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 26th control example, while a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 26th control example. [Figure 823] 10A (a) is a diagram showing an example of a performance screen during pseudo-left-handed play displayed on the third pattern display device in the 26th control example (difference chart 2 is changing), and (b) is a diagram showing an example of a performance screen indicating that the time-saving state has ended during pseudo-left-handed play displayed on the third pattern display device in the 26th control example. [Figure 824] 1 is a block diagram showing the configuration of a ROM of the main control device in the 26th control example. [Figure 825] 1 is a block diagram showing the configuration of the RAM of the main control device in the 26th control example. [Figure 826] 14 is a block diagram showing the structure of a variation pattern selection table set in the ROM of the main control device in the 26th control example. [Figure 827] 14 is a diagram schematically showing the specified contents of the normal state fluctuation pattern table in the 26th control example. [Figure 828] 14 is a diagram schematically showing the specified contents of the time-saving state fluctuation pattern table in the 26th control example. [Figure 829] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 26th control example. [Figure 830] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 26th control example. [Figure 831] 10 is a flow chart showing the first special pattern change start process executed by the MPU within the main control device in the 26th control example. [Figure 832] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 26th control example. [Figure 833] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 26th control example. [Figure 834] 10 is a flow chart showing a special diagram 1 time-saving lottery process executed by the MPU in the main control device in the 26th control example. [Figure 835] 10 is a flow chart showing game state update processing executed by the MPU in the main control device in the 26th control example. [Figure 836] 10 is a flow chart showing the first special pattern change execution process executed by the MPU within the main control device in the 26th control example. [Figure 837] 10 is a flow chart showing the first special pattern change stop processing executed by the MPU within the main control device in the 26th control example. [Figure 838] 10 is a flow chart showing the forced stopping process for Special Figure 1 executed by the MPU in the main control device in the 26th control example. [Figure 839] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 26th control example. [Figure 840] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the 26th control example. [Figure 841] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 26th control example. [Figure 842] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the 26th control example. [Figure 843] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 26th control example. [Figure 844] 10 is a flow chart showing a second special pattern change execution process executed by the MPU within the main control device in the 26th control example. [Figure 845] 10 is a flow chart showing a second special pattern change stop process executed by the MPU in the main control device in the 26th control example. [Figure 846] 10 is a flow chart showing the forced stopping process for Special Diagram 2 executed by the MPU in the main control device in the 26th control example. [Figure 847] 10 is a flow chart showing a special diagram 2 small hit stop process executed by the MPU in the main control device in the 26th control example. [Figure 848]10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 26th control example. [Figure 849] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 26th control example. [Figure 850] 10 is a flow chart showing a time-saving limit update process executed by the MPU within the main control device in the 26th control example. [Figure 851] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 852] 10 is a flow chart showing a special diagram 2 variational performance setting process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 853] 10 is a flow chart showing a special diagram 1 variational performance setting process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 854] 10A is a diagram showing an example of a performance screen when a time-saving A1 (once-time-saving) is won during the normal mode displayed on the third pattern display device in the 27th control example, and (b) shows an example of a performance screen (when a time-saving A2 is won) in the high accuracy mode displayed on the third pattern display device in the 27th control example. [Figure 855] 10. 10 is a diagram showing an example of a performance screen when the time-saving group A is won in the high accuracy mode displayed on the third pattern display device in the 27th control example, and (b) shows an example of a performance screen (internal second time-saving remaining 20 times) displayed on the high accuracy mode displayed on the third pattern display device in the 27th control example. [Figure 856] 10 is a diagram showing an example of a high accuracy mode transition screen displayed on the third pattern display device in the 27th control example when the screen is out of normal mode. [Figure 857] 10A and 10B are diagrams showing the flow of games and performance in the 27th control example. [Figure 858] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 27th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 27th control example. [Figure 859] 10 is a diagram schematically showing the specified contents of the second performance pattern selection table set in the ROM of the audio lamp control device of the pachinko machine in the 27th control example. [Figure 860] 10 is a diagram schematically showing the specified contents of the ceiling information selection table set in the ROM of the audio lamp control device of a pachinko machine in the 27th control example. [Figure 861] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 27th control example. [Figure 862] 10 is a flow chart showing a determination command process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 863] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 864] 10 is a flow chart showing a second performance pattern setting process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 865] 10 is a flow chart showing ceiling information notification setting processing executed by the MPU in the audio lamp control device in the 27th control example. [Figure 866] 1 is a front view of the gaming board of the pachinko machine of the 28th control example. [Figure 867] 10A (a) is a diagram showing an example of a performance screen in the chance zone displayed on the third pattern display device in the 28th control example, and (b) is a diagram showing an example of a performance screen in the case where a left-handed player passes through the chance zone displayed on the third pattern display device in the 28th control example. [Figure 868] 10.

[0044] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 28th control example, and (b) is a diagram schematically showing the specified contents of the remaining time-saving number of notification selection table set in the ROM of the voice lamp control device of the pachinko machine in the 28th control example. [Figure 869] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 28th control example. [Figure 870] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 28th control example. [Figure 871] 11 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 28th control example. [Figure 872] 10 is a flow chart showing a determination command process executed by the MPU in the audio lamp control device in the 28th control example. [Figure 873] 10 is a flow chart showing a through-pass processing executed by the MPU in the audio lamp control device in the 28th control example. [Figure 874] 10 is a flow chart showing a special diagram 2 variational performance setting process executed by the MPU in the audio lamp control device in the 28th control example. [Figure 875] 10 is a flow chart showing a non-time-saving limit-time performance setting process executed by the MPU in the audio lamp control device in the 28th control example. [Figure 876] 10 is a flow chart showing a special diagram 1 variational performance setting process executed by the MPU in the audio lamp control device in the 28th control example. [Figure 877] 1 is a diagram schematically showing the specified contents of the background mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 25th control example. [Figure 878] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the first modification of the 25th control example. [Figure 879] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the second modification of the 25th control example. [Figure 880] 10 is a flow chart showing the ceiling mode determination process executed by the MPU in the audio lamp control device in the second modification of the 25th control example. [Figure 881] 10.sub.10 is a diagram showing an example of the start screen for the final countdown performance displayed on the third pattern display device in the 29th control example, and (b) shows an example of the display screen (normal state, time-saving pattern B winning) when a time-saving pattern is won during the final countdown performance displayed on the third pattern display device in the 29th control example. [Figure 882] 10A (a) is a diagram showing an example of a small win winning screen during the final countdown performance displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a final countdown performance end screen (18 remaining time savings) displayed on the third pattern display device in the 29th control example. [Figure 883] 10. 10 is a diagram showing an example of the additional performance start screen displayed on the third pattern display device in the 29th control example, and (b) shows an example of the display screen (first time-saving state, time-saving pattern A winning) when a time-saving pattern is won during the final countdown performance displayed on the third pattern display device in the 29th control example. [Figure 884] 10A and 10B are diagrams showing the flow of the game state and the flow of the performance performed in the 29th control example. [Figure 885] 10 is a diagram showing the transition contents of each game state in the 29th control example. [Figure 886] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 29th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 29th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 29th control example. [Figure 887] 14 is a diagram schematically showing the specified contents of the normal table in the 29th control example. [Figure 888] 10A and 10B are diagrams that schematically show the specified contents of the time-saving grant table set in the ROM of the main control device in the 29th control example, and (b) are diagrams that schematically show the specified contents of the small-jack type selection table set in the ROM of the main control device in the 29th control example. [Figure 889] 10 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 29th control example. [Figure 890] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 29th control example. [Figure 891] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 892] 10 is a flow chart showing a second time-saving state transition process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 893] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 894] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 895]10 is a flow chart showing a second time-saving state performance setting process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 896] 11 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 897] 10A (a) is a diagram showing an example of a display screen for the long battle performance displayed on the third pattern display device in the first modification of the 29th control example, and (b) is a diagram showing an example of a display screen for the combination battle performance displayed on the third pattern display device in the first modification of the 29th control example. [Figure 898] 10 is a diagram showing an example of a display screen for the background change effect displayed on the third pattern display device in the first modification of the 29th control example. [Figure 899] 14 is a diagram schematically showing the specified contents of the normal table in the first modification of the 29th control example. [Figure 900] 10 is a flow chart showing a second time-saving state performance setting process executed by the MPU in the audio lamp control device in the first modification of the 29th control example. [Figure 901] 10 is a flow chart showing special background setting processing executed by the MPU in the audio lamp control device in the first modification of the 29th control example. [Figure 902] 10 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the 29th control example. [Figure 903] 10A is a diagram showing an example of a display screen for the super reach performance in the additional example, and (b) is a diagram showing an example of a display screen for the time-saving suggestion performance in the additional example. [Figure 904] 11 is a diagram showing an example of a display screen when switching the performance mode displayed on the third pattern display device in the additional example. [Figure 905] 10A and 10B are diagrams showing performance patterns in the additional example. [Figure 906] 1 is a front view of the gaming board of the pachinko machine of the 30th control example. [Figure 907] 10A is a diagram showing an example of the performance mode when the special mode state A is set in the 30th control example, and (b) shows an example of the pinch effect that is executed when a reach occurs in the special mode state A in the 30th control example. [Figure 908] 10A is a diagram showing an example of the performance mode when a jackpot is won in the special mode state A in the 30th control example, and (b) shows an example of the performance mode during the opening period of the challenge bonus in the 30th control example. [Figure 909] 10A (a) is a diagram showing an example of the performance mode when an opening performance that announces a normal jackpot is executed as the opening performance of the challenge bonus in the 30th control example, and (b) is a diagram showing an example of the performance mode when a promotion chance performance is executed in the special mode state A in the 30th control example. [Figure 910] 10A is a diagram showing an example of the performance mode when the promotion chance performance is executed in the special mode state A of the 30th control example, and (b) shows an example of the performance mode when the promotion chance performance that notifies a failure is executed in the special mode state A of the 30th control example. [Figure 911] 10A is a diagram showing an example of the performance mode in which a promotion chance performance is performed to notify success of promotion in the special mode state A of the 30th control example, and (b) is a diagram showing an example of the performance mode in which the 30th control example is set to invincible mode. [Figure 912] 10. (a) is a diagram showing an example of a performance mode in which the change display of the first special pattern and the change display of the second special pattern are performed in duplicate in the invincible mode of the 30th control example, and the change display of the first special pattern is a normal jackpot fluctuation; (b) is a diagram showing an example of a performance mode in which the normal jackpot fluctuation of the first special pattern is performed while the fluctuation of the second special pattern is stopped in the invincible mode of the 30th control example. [Figure 913] 10. (a) is a diagram showing an example of the performance mode in which a normal jackpot change of the first special pattern is executed while the fluctuation of the second special pattern is stopped in the invincible mode in the 30th control example, and (b) is a diagram showing an example of the performance mode in the blackout performance that is executed when the execution of the jackpot game for the second special pattern is confirmed in the invincible mode in the 30th control example. [Figure 914] 10 is a diagram showing an example of a performance mode when the 30th control example is set to the premium lash mode. [Figure 915] 10 is a diagram showing a method for transitioning between states in the 30th control example. [Figure 916] 1 is a block diagram showing the configuration of a ROM of the main control device in the 30th control example. [Figure 917] 1 is a block diagram showing the configuration of the RAM of the main control device in the 30th control example. [Figure 918] 10A (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 30th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 30th control example. [Figure 919] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 30th control example, and (b) is a block diagram showing the configuration of the variation pattern table set in the ROM of the main control device in the 30th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 30th control example. [Figure 920] 1 is a diagram schematically showing the specified contents of the table for time-saving and special-mode A in the 30th control example. [Figure 921] 14 is a diagram schematically showing the specified contents of the table for special mode B in the 30th control example. [Figure 922] 10A (a) is a diagram schematically showing the specified contents of the table for the special mode C in the 30th control example, and (b) is a diagram schematically showing the specified contents of the table for promotional performance in the 30th control example. [Figure 923] 10A (a) is a diagram schematically showing the specified contents of the small hit random number table set in the ROM of the main control device in the 30th control example, and (b) is a diagram schematically showing the specified contents of the variation pattern scenario table set in the ROM of the main control device in the 30th control example. [Figure 924] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 30th control example. [Figure 925] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the 30th control example. [Figure 926] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 30th control example. [Figure 927] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 30th control example. [Figure 928] 10 is a flow chart showing a special diagram 1 game state update process executed by the MPU in the main control device in the 30th control example. [Figure 929] 10 is a flow chart showing the first special pattern change stop processing executed by the MPU in the main control device in the 30th control example. [Figure 930] 10 is a flow chart showing a special diagram 1 miss-off stop process executed by an MPU within the main control device in the 30th control example. [Figure 931] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the 30th control example. [Figure 932] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 30th control example. [Figure 933] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 30th control example. [Figure 934] 10 is a flow chart showing a special diagram 2 game state update process executed by the MPU in the main control device in the 30th control example. [Figure 935] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the 30th control example. [Figure 936] 10 is a flow chart showing a special diagram 2 missing stop processing executed by an MPU within the main control device in the 30th control example. [Figure 937] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 30th control example. [Figure 938] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the 30th control example. [Figure 939] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 30th control example. [Figure 940] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the 30th control example. [Figure 941] 10 is a flow chart showing abnormality processing executed by the MPU in the main control device in the 30th control example. [Figure 942]10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 30th control example. [Figure 943] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 30th control example. [Figure 944] 10 is a flow chart showing the performance setting process during invincible mode executed by the MPU in the audio lamp control device in the 30th example, and (b) shows the performance setting process during premium rush execution by the MPU in the audio lamp control device in the 30th example. [Figure 945] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 30th control example. [Figure 946] 10A (a) is a diagram schematically showing the specified contents of the variation pattern table set in the ROM of the main control device in the first modification of the 30th control example, and (b) is a diagram schematically showing the specified contents of the table for the special mode B1 in the first modification of the 30th control example. [Figure 947] 10 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the first modification of the 30th control example. [Figure 948] 10. 10 is a diagram showing an example of the ending performance of the MAX bonus mode that is executed during the ending period of the jackpot winning for the fourth time in the MAX bonus mode in the 31st control example, and (b) shows an example of the performance mode when the MAX round breakthrough performance is performed in the ending performance of the MAX bonus mode in the 31st control example. [Figure 949] 10A and 10B are diagrams showing an example of the performance mode of the continuation judgment performance that is executed during the ending period of the jackpot winning in the MAX bonus mode after the MAX round breakthrough performance is performed in the 31st control example. [Figure 950] 10A is a diagram showing an example of a performance mode in which the 31st control example moves to a time-saving state A after the first hit, and (b) shows an example of a performance mode in which the first change display of the second special pattern is started in the time-saving state A of the 31st control example. [Figure 951] 10A is a diagram showing an example of the performance mode when the lottery result of the first second special pattern is wrong and A is eliminated in the time-saving state A in the 31st control example, and (b) shows an example of the performance mode when the lottery result of the first second special pattern is eliminated in the time-saving state B in the 31st control example, and A is displayed. [Figure 952] 10.sub.a (a) is a block diagram showing the configuration of the ROM of the main control device in the 31st control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 31st control example. [Figure 953] 11. (a) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 31st control example, and (b) is a diagram schematically showing the specified contents of the small-stop type selection table set in the ROM of the main control device in the 31st control example, and (c) is a diagram schematically showing the specified contents of the off-type selection table set in the ROM of the main control device in the 31st control example. [Figure 954] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 31st control example. [Figure 955] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 31st control example. [Figure 956] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 31st control example. [Figure 957] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 31st control example. [Figure 958] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 31st control example. [Figure 959] 10 is a flow chart showing winning information command processing executed by the MPU in the audio lamp control device in the 31st control example. [Figure 960] 10 is a flow chart showing an attack icon selection process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 961] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 31st control example. [Figure 962] 10 is a flow chart showing opening command processing executed by the MPU in the audio lamp control device in the 31st control example. [Figure 963] 10 is a flow chart showing ending command processing executed by the MPU in the audio lamp control device in the 31st control example. [Figure 964] 10 is a flow chart showing a MAX bonus termination process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 965] 10A and 10B are diagrams showing an example of the performance mode when a race performance is performed in the special mode state A in the second modification of the 30th control example. [Figure 966] 10.

[0044] FIG. 10A is a diagram showing an example of a performance mode in which a race performance that notifies you of a jackpot with the first special pattern is executed in the special mode state A in the second modification of the 30th control example, and (a) is a diagram showing an example of a performance mode in which a race performance that notifies you of a jackpot with the second special pattern is executed in the special mode state A in the second modification of the 30th control example. [Figure 967] 1 is a front view of a pachinko machine according to the tenth embodiment. [Figure 968] 1 is a front view of a pachinko machine game board. [Figure 969] 1 is a rear view of a pachinko machine. [Figure 970] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 971] 1 is an exploded front perspective view of the game board and the movement unit. FIG. [Figure 972] 1 is an exploded rear perspective view of the game board and the movement unit. FIG. [Figure 973] 1 is a front view of the operating unit. FIG. [Figure 974] 1 is a front view of the operating unit. FIG. [Figure 975] 1 is a front view of the operating unit. FIG. [Figure 976] 1 is a front view of the operating unit. FIG. [Figure 977] 1 is a front view of the operating unit. FIG. [Figure 978] 1 is a front view of the operating unit. FIG. [Figure 979] 1 is a front perspective view of the first operating unit. FIG. [Figure 980] 1 is a rear perspective view of the first operating unit. FIG. [Figure 981] 1 is an exploded front perspective view of the first operating unit. FIG. [Figure 982] 1 is an exploded rear perspective view of the first operating unit. FIG. [Figure 983] 1 is an exploded front perspective view of the rotating operating unit. FIG. [Figure 984] 1 is an exploded rear perspective view of the rotating operating unit. FIG. [Figure 985] 6A and 6B are rear views of the rotating operating unit. [Figure 986] 6A and 6B are rear views of the rotating operating unit. [Figure 987] 1 is a front view of the first operating unit. FIG. [Figure 988] 1 is a front view of the first operating unit. FIG. [Figure 989] 1 is a front view of the first operating unit. FIG. [Figure 990] 1 is a rear view of the first operating unit. FIG. [Figure 991] 1 is a rear view of the first operating unit. FIG. [Figure 992] 1 is a rear view of the first operating unit. FIG. [Figure 993] 1 is a front perspective view of the second operating unit. FIG. [Figure 994] 1 is a rear perspective view of the second operating unit. FIG. [Figure 995] 1 is an exploded front perspective view of the second operating unit. FIG. [Figure 996] 1 is an exploded rear perspective view of the second operating unit. FIG. [Figure 997] 1 is an exploded front perspective view of the rotating operating unit. FIG. [Figure 998] 1 is an exploded rear perspective view of the rotating operating unit. FIG. [Figure 999] 6A and 6B are rear views of the rotating operating unit. [Figure 1000] 6A and 6B are rear views of the rotating operating unit. [Figure 1001] 1 is a front perspective view of the third operating unit. FIG. [Figure 1002] 1 is a rear perspective view of the third operating unit. FIG. [Figure 1003] 1 is an exploded front perspective view of the third operating unit. FIG. [Figure 1004] 1 is an exploded rear perspective view of the third operating unit. FIG. [Figure 1005] 1 is an exploded front perspective view of the opening and closing operation unit; FIG. [Figure 1006] 1 is an exploded rear perspective view of the opening and closing operation unit; FIG. [Figure 1007]1 is a rear view of the opening / closing operation unit of the third operation unit; FIG. [Figure 1008] 1 is a rear view of the opening / closing operation unit of the third operation unit; FIG. [Figure 1009] 1 is an exploded front perspective view of the light guide plate unit. [Figure 1010] 1 is an exploded rear perspective view of the light guide plate unit. FIG. [Figure 1011] 1 is an exploded front perspective view of the auxiliary light guide plate unit. [Figure 1012] 1 is an exploded rear perspective view of the auxiliary light guide plate unit. [Figure 1013] 1 is a rear view of the auxiliary light guide plate unit. [Figure 1014] 1013, and (b) is a cross-sectional view of the auxiliary light guide plate unit along the MCDXVIa-MCDXVIa line of FIG. 1013, and (b) is a cross-sectional view of the auxiliary light guide plate unit along the MCDXVIb-MCDXVIb line of FIG. 1013. [Figure 1015] 6A to 6F are schematic front views of the auxiliary light guide plate unit. [Figure 1016] 1 is an exploded front perspective view of the game board. [Figure 1017] 1 is a perspective view of an exploded rear view of the game board. [Figure 1018] 1 is an exploded front perspective view of the auxiliary light guide plate unit. [Figure 1019] 1 is an exploded rear perspective view of the auxiliary light guide plate unit. [Figure 1020] 1 is a front view of the auxiliary light guide plate unit. [Figure 1021] 1020 is a cross-sectional view of the auxiliary light guide plate unit along the MCDXXIII-MCDXXIII line of FIG. 1020. [Figure 1022] 1 is an exploded front perspective view of the downstream guide member. [Figure 1023] 1 is an exploded rear perspective view of the downstream guide member. FIG. [Figure 1024] 1 is a schematic diagram schematically showing the structure of a visualization change sheet. [Figure 1025] 6A and 6B are schematic diagrams showing changes in the appearance of the downstream guide member due to differences in directional viewing. [Figure 1026] 1 is a rear view of the first operating unit according to the 11th embodiment. [Figure 1027] 1 is a schematic rear view of the first operating unit according to the 12th embodiment. [Figure 1028] 1 is a schematic rear view of the first operating unit. FIG. [Figure 1029] 1 is a schematic rear view of the first operating unit. FIG. [Figure 1030] 6A and 6B are cross-sectional views of the sphere guide unit in the 13th embodiment. [Figure 1031] 14 (a) and 14 (b) are rear views of the rotating operation unit according to the 14th embodiment. [Figure 1032] 14 is a cross-sectional view of the flow path front constituent member according to the fifteenth embodiment. [Figure 1033] 1 is a rear view of a pachinko machine according to the sixteenth embodiment. [Figure 1034] 1 is a front perspective view of the board box. [Figure 1035] 1 is a rear perspective view of the board box. [Figure 1036] 1 is a front view of the board box. [Figure 1037] 1037(a) is a rear view of the substrate box, and 1037(a) is a side view of the substrate box in the direction of the arrow MCDXXXIXb in FIG. 1037(a). [Figure 1038] 1A is a partial front perspective view of the substrate box, and 1B is a partial rear perspective view of the substrate box. [Figure 1039] 10A and 10B are partial front views of the substrate box, and (c) and (d) are partial rear views of the substrate box. [Figure 1040] 1039(b) is a partial cross-sectional view of the substrate box along the MCDXLIIa-MCDXLIIa lines of FIG. 1039(b), and (b) is a partial cross-sectional view of the substrate box along the MCDXLIIb-MCDXLIIb lines of FIG. 1039(b). [Figure 1041] 1A is a partial front view of the substrate box, and 1B is a partial rear view of the substrate box. [Figure 1042] 1041(b) is a partial cross-sectional view of the substrate box along the MCDXLIV-MCDXLIV line. [Figure 1043] 1A is a partial front view of the substrate box, and 1B is a partial rear view of the substrate box. [Figure 1044] 1044(a) is a partially rear view of the substrate box in the 17th embodiment, 1044(a) is a partially cross-sectional view of the substrate box along line MCDXLVIb-MCDXLVIb in FIG. 1044(a), and 1044(c) is a partially cross-sectional view of the protective cover in the 18th embodiment. [Figure 1045] 1045(a) is a partial rear view of the substrate box in the 19th embodiment; (b) is a partial cross-sectional view of the substrate box along line MCDXLVIIb-MCDXLVIIb of FIG. 1045(a), (c) is a partial cross-sectional view of the substrate box along line MCDXLVIIc-MCDXLVIIc of FIG. 1045(a), and (d) is a partial cross-sectional view of the substrate box along line MCDXLVIId-MCDXLVIId of FIG. 1045(a). [Figure 1046] 1039(b), and (d), are partial cross-sectional views of the substrate box in the 20th embodiment, corresponding to the cross-sectional view taken along line MCDXLVIIIa-MCDXLVIIIa in FIG. 1039(b), and (d) is a partial cross-sectional view of the substrate box in the 21st embodiment. [Figure 1047] 1047(a) is a partial rear view of the substrate box in the 22nd embodiment, and (b) is a partial cross-sectional view of the substrate box along the MCDXLIXb-MCDXLIXb line of FIG. 1047(a). [Figure 1048] 1048(b) is a partial cross-sectional view of the substrate box in the 23rd embodiment, (b) is a partial rear view of the substrate box in the 24th embodiment, and (c) is a partial cross-sectional view of the substrate box along the MCDLc-MCDLc line in FIG. 1048(b). [Figure 1049] 1049(a) is a partial cross-sectional view of the substrate box in the 25th embodiment, 1049(a) is a partial cross-sectional view of the substrate box along the MCDLIb-MCDLIb line in FIG. 1049(a), and 1049(c) is a partial cross-sectional view of the substrate box. [Figure 1050] 1050(a) is a front view of the protective cover of the substrate box according to the 26th embodiment, (b) is a side view of the protective cover in the direction of the arrow MCDLIIb in FIG. 1050(a), and (c) is a rear view of the protective cover in the direction of the arrow MCDLIIc in FIG. 1050(b). [Figure 1051] 1051(b) is a side view of the substrate box in the direction of the arrow MCDLIIIb in FIG. 1051(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLIIIc-MCDLIIIc line of FIG. 1051(b). [Figure 1052] 1039(b) is a side view of the protective cover of the substrate box according to the 27th embodiment, and (b) is a partial cross-sectional view of the substrate box along the line MCDXLIIb-MCDXLIIb of FIG. 1039(b). [Figure 1053] 1039(b) is a front view of the protective cover of the substrate box according to the 28th embodiment, (b) is a side view of the protective cover in the direction of the arrow MCDLVb in FIG. 1053(a), and (c) is a partial cross-sectional view of the substrate box along the line MCDXLIIb-MCDXLIIb in FIG. 1039(b). [Figure 1054] 1039(b) is a partially rear view of the protective cover of the substrate box in the 29th embodiment; (b) is a partially cross-sectional view of the substrate box along the MCDXLIIb line-MCDXLIIb line in FIG. 1039(b), (c) is a partially rear view of the protective cover in the 30th embodiment; and (d) is a partially cross-sectional view of the protective cover along the MCDLVId line-MCDLVId line in FIG. 1054(c). [Figure 1055] 1055(a) is a partial rear view of the protective cover according to the 31st embodiment, 1055(a) is a partial cross-sectional view of the protective cover along line MCDLVIIb-MCDLVIIb in FIG. 1055(a), and 1055(c) is a partial rear view of the substrate box according to the 32nd embodiment. [Figure 1056] 1056(b) is a side view of the protective cover of the substrate box according to the 33rd embodiment, 1056(b) is a side view of the substrate box, and 1056(b) is a cross-sectional view of the substrate box along the MCDLVIIIc-MCDLVIIIc line of FIG. 1056(b). [Figure 1057] 1057(a) is a partial rear view of the substrate box in the 34th embodiment, (b) is a partial side view of the substrate box in the direction of the arrow MCDLIXb in FIG. 1057(a), and (c) is a rear view of the protective cover. [Figure 1058] 1057(a), 1058(a), 1058(a), 1058(a), 1058(a), and 1058(d) is a partial cross-sectional view of the substrate box along the MCDLXb-MCDLXb line of FIG. 1058(a), and 1058(d) is a partial cross-sectional view of the substrate box along the MCDLXd-MCDLXd line of FIG. 1058(c). [Figure 1059] 1059(a) is a rear view of the substrate box in the MCDLXa section of FIG. 1057(a), and (b) is a partial cross-sectional view of the substrate box along the MCDLXIb-MCDLXIb line of FIG. 1059(a). [Figure 1060]1060(a) is a partial front view of the substrate box in the 35th embodiment, (b) is a partial cross-sectional view of the substrate box along the MCDLXIIb-MCDLXIIb line of FIG. 1060(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLXIIc line-MCDLXIIc line of FIG. 1060(a). [Figure 1061] 1060(a) and 1060(a) are partial cross-sectional views of the substrate box along the MCDLXIIb-MCDLXIIb line of FIG. 1060(a), and (b) and (d) are partial cross-sectional views of the substrate box along the MCDLXIIc line-MCDLXIIc line of FIG. 1060(a). [Figure 1062] 1062(a) is a partial rear view of the substrate box in the 36th embodiment; (b) is a partial cross-sectional view of the substrate box along line MCDLXIVb-MCDLXIVb of FIG. 1062(a), (c) is a partial cross-sectional view of the substrate box along line MCDLXIVc-MCDLXIVc of FIG. 1062(a), (d) is a rear view of the protective cover, and (e) is a cross-sectional view of the protective cover along line XCVIe-XCVIe of FIG. 1062(d). [Figure 1063] 1062(a) is a rear view of the substrate box in the MCDLXVa section of FIG. 1062(a), (b) is a partial cross-sectional view of the substrate box along the MCDLXIVb-MCDLXIVb line of FIG. 1062(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLXIVc-MCDLXIVc line of FIG. 1062(a). [Figure 1064] 1064(a) is a partial front view of the substrate box in the 37th embodiment, and (b) is a partial cross-sectional view of the substrate box along the MCDLXVIb line-MCDLXVIb in FIG. 1064(a). [Figure 1065] 1065(a) is a partial front view of the substrate box in the 38th embodiment, (b) is a side view of the protective cover in the direction of the arrow MCDLXVIIb in FIG. 1065(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLXVIIc-MCDLXVIIc line of FIG. 1065(a). [Figure 1066] 1066(a) is a partial rear view of the substrate box in the 39th embodiment, and (b) is a partial cross-sectional view of the substrate box along line MCDLXVIIIb-MCDLXVIIIb in FIG. 1066(a). [Figure 1067] 1 is a rear view of the protective cover according to the forty-fourth embodiment. [Figure 1068] 1068(a) is a partial rear view of the substrate box in the 41st embodiment, and (b) is a partial cross-sectional view of the substrate box along the MCDLXXb-MCDLXXb line of FIG. 1068(a). [Figure 1069] 10(a) is a partial cross-sectional view of the substrate box in the 42nd embodiment, and (b) is a partial cross-sectional view of the substrate box in the 43rd embodiment. [Figure 1070] 1070(a) is a partial rear view of the substrate box in the 44th embodiment, and (b) is a partial cross-sectional view of the substrate box along the lines MCDLXXIIb-MCDLXXIIb in FIG. 1070(a). [Figure 1071] 1 is a partial rear view of the substrate box according to the 45th embodiment. [Figure 1072] 1072(a) is a partial rear view of the substrate box in the 46th embodiment, and (b) is a partial cross-sectional view of the substrate box along the lines MCDLXXIVb-MCDLXXIVb of FIG. 1072(a). [Figure 1073] 1. (a) is a partial cross-sectional view of the substrate box in the 47th embodiment, (b) is a partial cross-sectional view of the substrate box in the 48th embodiment, and (c) is a partial rear view of the protective cover of the substrate box in the 49th embodiment. [Figure 1074] 1 is a front view of a pachinko machine according to the 50th embodiment. [Figure 1075] 1 is a front view of a pachinko machine game board. [Figure 1076] 1 is a rear view of a pachinko machine. [Figure 1077] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 1078] 1 is an exploded front perspective view of the route constructor. FIG. [Figure 1079] 1 is a partially enlarged front view of the route constructor. [Figure 1080] 1079 (a) and (b) are partial cross-sectional views of the route constructor along the MCDLXXXIIa-MCDLXXXIIa line. [Figure 1081] 1079 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. [Figure 1082] 1079 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. [Figure 1083] 1079 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. [Figure 1084] 1079 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. [Figure 1085] 1075 is a partial front view of the game board in the range MCDLXXXVII of FIG. 1075. [Figure 1086] 1. (a) is a block diagram showing the electrical configuration of the ROM within the main control device, (b) is a schematic diagram showing the correspondence relationship between the first win type counter and the jackpot type in the special pattern, and (c) is a schematic diagram showing the correspondence relationship between the second hit random number counter and the win type in the ordinary pattern. [Figure 1087] 10A to 10B are diagrams showing an example of detection of the passage of a ball at a normal winning port (through gate) and a time-keeping change in the state of the electric vehicle. [Figure 1088] 1 is an exploded front perspective view of the game board according to the 51st embodiment. [Figure 1089] 1A is a front view of the front unit, and 1B is a rear view of the front unit. [Figure 1090] 1 is an exploded front perspective view of the front unit. [Figure 1091] 1 is an exploded rear perspective view of the front unit. FIG. [Figure 1092] 1A is a front view of the allocation unit, and 1B is a rear view of the allocation unit. [Figure 1093] 1093(a) is a cross-sectional view of the allocation unit on the MCDXCVa-MCDXCVa line of FIG. 1092(a), and (b) is a cross-sectional view of the allocation unit on the MCDXCVb-MCDXCVb line of FIG. 1093(a). [Figure 1094] 1093(a) and 1093(a) are cross-sectional views of the allocation unit along the MCDXCVb-MCDXCVb line. [Figure 1095] 10A to 10B are diagrams showing examples of detection of the passage of a ball in the detection device and time-keeping changes in the state of the wing member. [Figure 1096] 1089(a) is a cross-sectional view of the game board along the MCDXCVIII-MCDXCVIII line. [Figure 1097] 1096 (a) and (b) are partial cross-sectional views of the winning port unit and the throw unit on the MCDXCIXa-MCDXCIXa line. [Figure 1098] 1 is a partial front view of the game board according to the 52nd embodiment. [Figure 1099] 1 is a partial front view of the game board according to the 53rd embodiment. [Figure 1100] 1 is a front view of the pachinko machine according to the 54th embodiment. [Figure 1101] 1 is a front view of a pachinko machine game board. [Figure 1102] 1 is a rear view of a pachinko machine. [Figure 1103] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 1104] 1 is a front perspective view of the winning unit. [Figure 1105] 1 is a rear perspective view of the winning unit. [Figure 1106] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 1107] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 1108] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 1109] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 1110] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 1111] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 1112] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 1113] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 1114] 1114(a) is a front view of the winning unit, 1114(a) is a side view of the winning unit in the direction of the arrow MDXVIc, and 1114(a) is a top view of the winning unit in the direction of the arrow MDXVIc, and 1114(a) is a top view of the winning unit in the direction of the arrow MDXVIc, 1114(a). [Figure 1115] 1114(c) are cross-sectional views of the winning units along the MDXVIIa-MDXVIIa line in FIG. 1114(c). [Figure 1116] 1114(c) is a cross-sectional view of the winning unit along line MDXVIII-MDXVIII. [Figure 1117] 1114(c) is a cross-sectional view of the winning unit on the MDXIX-MDXIX ray. [Figure 1118] 1114(c) is a cross-sectional view of the winning unit on the MDXX-MDXX ray. [Figure 1119] 1114(c) is a cross-sectional view of the winning unit along line MDXVIII-MDXVIII. [Figure 1120] 1114(c) is a cross-sectional view of the winning unit on the MDXIX-MDXIX ray. [Figure 1121] 1114(c) is a cross-sectional view of the winning unit on the MDXX-MDXX ray. [Figure 1122] 1114(c). (a) and (b) are cross-sectional views of the winning units along the MDXXIVa-MDXXIVa line in FIG. 1114(c). [Figure 1123] 10A to 10B are front perspective views of the winning unit. [Figure 1124] 10A to 10B are front perspective views of the winning unit. [Figure 1125] 10A to 10B are front perspective views of the winning unit. [Figure 1126] 10A to 10B are front perspective views of the winning unit. [Figure 1127] 6A and 6B are front perspective views of the winning unit. [Figure 1128] 1114(b) are partial cross-sectional views of the winning unit along the MDXXXa-MDXXXa line in FIG. 1114(b). [Figure 1129] 1114(b) are partial cross-sectional views of the winning unit along the MDXXXa-MDXXXa line in FIG. 1114(b). [Figure 1130] 10A to 10C are diagrams showing an example of time-keeping changes in the state of the electric vehicle. [Figure 1131] 10 is a diagram for explaining the relationship between the hold type, the game state, the type of special design and the variation time. [Figure 1132] 1122(a) is a cross-sectional view of the slide member, tilting member and transmission member on the MDXXXIV-MDXXXIV line. [Figure 1133] 1122(a) is a cross-sectional view of the slide member, tilting member and transmission member on the MDXXXIV-MDXXXIV line. [Figure 1134] 1122(a) is a cross-sectional view of the slide member, tilting member and transmission member on the MDXXXIV-MDXXXIV line. [Figure 1135] 1114(c) is a cross-sectional view of the plate member, base plate, slide member, tilt member and transmission member. [Figure 1136] 1101 (a) and 1104 are enlarged front views of the upper variable winning device in the range MDXXXVIIIa of FIG. 1101. [Figure 1137] 1101 (a) to (c) are enlarged front views of the upper variable winning device in the range MDXXXVIIIa of FIG. 1101. [Figure 1138] 1101 (a) to (c) are enlarged front views of the upper variable winning device in the range MDXXXVIIIa of FIG. 1101. [Figure 1139] 1136(a) to 1136(a) are cross-sectional views of the movable top cover member and the movable floor member along the MDXLIa-MDXLIa line in FIG. 1136(a). [Figure 1140] 1136(a) to 1136(a) are cross-sectional views of the movable top cover member and the movable floor member along the MDXLIa-MDXLIa line in FIG. 1136(a). [Figure 1141] 1. (a) is a diagram showing the time-keeping change of the second specific winning port in the first special operation pattern, (b) is a diagram showing the time-keeping change of the second specific winning port in the second special operation pattern, and (c) is a diagram showing the time-keeping change of the second specific winning port in the third special operation pattern. [Figure 1142] 1. (a) is a block diagram showing the electrical configuration of the ROM within the main control device, (b) is a schematic diagram showing the contents of the first hit random number table, (c) is a schematic diagram showing the correspondence relationship between the first hit random number counter and the determined value in the special pattern 1 random number table, and (d) is a schematic diagram showing the correspondence relationship between the first hit random number counter and the determined value in the special pattern 2 random number table. [Figure 1143] 10. (a) is a schematic diagram showing a correspondence relationship between the first win type counter in the first win type selection table and the jackpot type in the special pattern, and (b) is a schematic diagram showing a correspondence relationship between the second hit random number counter in the second hit random number table and the win in the ordinary pattern. [Figure 1144] 1 is a top view of the front frame and the outer frame. [Figure 1145] 10A is a diagram schematically showing area division settings and valid line settings of the display screen, and (b) is a diagram illustrating an example of an actual display screen. [Figure 1146] 10. (a) is a schematic diagram for explaining an example of the flow of a jackpot performance, and (b) is a schematic diagram for explaining an example of the flow of a jackpot performance, and (c), (d) and (e) are diagrams illustrating the display screen of the ending display performance displayed in the ending performance, which is part of the jackpot performance. [Figure 1147] 10A is a diagram illustrating a display screen for the company name display performance displayed in the ending performance, and (b) is a diagram illustrating a display screen for the card-forgotten display performance displayed in the ending performance. [Figure 1148] 10A (a) is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance, and (b) is a diagram illustrating a display screen immediately after the ending performance. [Figure 1149] 1 is a schematic diagram that schematically shows the correspondence between the ending performance and the jackpot type in the special design. [Figure 1150] 1114(c) is a cross-sectional view of the winning unit in the 55th embodiment of the MDXIX-MDXIX ray. [Figure 1151] 1114(c) is a cross-sectional view of the winning unit on the MDXIX-MDXIX ray. [Figure 1152] 10A is a schematic diagram showing a winning unit in the 56th embodiment, and (b) is a schematic diagram showing another example of winning units. [Figure 1153] 10A and 10B are schematic diagrams showing the winning units in the 57th embodiment. [Figure 1154] 1101, (a) and (b) are front views of the upper variable winning device in the 58th embodiment in the range MDXXXVIIIa of FIG. 1101. [Figure 1155] 6A and 6B are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance of the 59th embodiment. [Figure 1156] 10 is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 1157] 6A and 6B are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 1158] 6 (a) and (b) are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance of the 60th embodiment. [Figure 1159] 10 is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 1160] 6A and 6B are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance of the 61st embodiment. [Figure 1161] 10 is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 1162] 10 is a diagram showing an example of time-change in the frame button display in the card-forgotten display, time-change in the effectiveness of operation of the frame button, and operation of the frame button. [Figure 1163] 1 is a front view of the game board according to the 62nd embodiment. [Figure 1164] 1 is a front perspective view of the lower frame. FIG. [Figure 1165] 1 is a rear perspective view of the lower frame. FIG. [Figure 1166] 1 is an exploded front perspective view of the lower frame. [Figure 1167] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1168] 1 is a top view of the lower frame. [Figure 1169] 1 is a front view of the lower frame. [Figure 1170] 1 is a rear view of the lower frame. [Figure 1171] 1169 is a side view of the lower frame in the direction of the arrow MDLXXIIIa in FIG. 1169, and (b) is a side view of the lower frame in the direction of the arrow MDLXXIIIb in FIG. 1169. [Figure 1172] 1168 is a cross-sectional view of the lower frame along the MDLXXIV-MDLXXIV line. [Figure 1173] 1168 is a cross-sectional view of the lower frame along the MDLXXIV-MDLXXIV line. [Figure 1174] 1169 is a cross-sectional view of the lower frame along the MDLXXVI-MDLXXVI line. [Figure 1175] 1168 is a partially enlarged cross-sectional view of the lower frame at the MDLXXVIIa section of FIG. 1172, and (b) is a partially enlarged cross-sectional view of the lower frame at the MDLXXVIIb-MDLXXVIIb line in FIG. 1168. [Figure 1176]1168 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the line MDLXXIV-MDLXXIV in FIG. 1168. [Figure 1177] 1168 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the line MDLXXIV-MDLXXIV in FIG. 1168. [Figure 1178] 1168 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the line MDLXXIV-MDLXXIV in FIG. 1168. [Figure 1179] 1 is a front perspective view of the lower frame according to the 63rd embodiment. [Figure 1180] 1 is a rear perspective view of the lower frame. FIG. [Figure 1181] 1 is an exploded front perspective view of the lower frame. [Figure 1182] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1183] 1 is a top view of the lower frame. [Figure 1184] 1 is a front view of the lower frame. [Figure 1185] 1 is a rear view of the lower frame. [Figure 1186] 1184, and (b) is a side view of the lower frame in the direction of arrow MDLXXXVIIIa in FIG. 1184, and (b) is a side view of the lower frame in the direction of arrow MDLXXXVIIIb in FIG. 1184. [Figure 1187] 1183 is a cross-sectional view of the lower frame on the MDLXXXIX-MDLXXXIX line. [Figure 1188] 1183 is a cross-sectional view of the lower frame on the MDLXXXIX-MDLXXXIX line. [Figure 1189] 1185 is a partially enlarged cross-sectional view of the lower frame along the MDXCI-MDXCI line. FIG. [Figure 1190] 1185 is a partially enlarged cross-sectional view of the lower frame along the MDXCII-MDXCII line. [Figure 1191] 1183 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the MDLXXXIX-MDLXXXIX line in FIG. 1183. [Figure 1192] 1183 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the MDLXXXIX-MDLXXXIX line in FIG. 1183. [Figure 1193] 1183 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the MDLXXXIX-MDLXXXIX line in FIG. 1183. [Figure 1194] 1193(b) is a partially enlarged cross-sectional view of the lower frame along the MDXCVI-MDXCVI line. FIG. 1193(b). [Figure 1195] 1 is a partially enlarged cross-sectional view of the lower frame according to the 64th embodiment. [Figure 1196] 1 is a rear view of the lower frame. [Figure 1197] 1 is a partially enlarged cross-sectional view of the lower frame according to the 64th embodiment. [Figure 1198] 1 is a rear view of the lower frame. [Figure 1199] 1199(a) is a top view of the dish member in the 65th embodiment, (b) is a cross-sectional view of the dish member along the line MDCIb-MDCIb of FIG. 1199(a), and (c) is a cross-sectional view of the dish member along the line MDCIc-MDCIc of FIG. 1199(a). [Figure 1200] 1185, and (b) is a cross-sectional view of the lower frame in the 66th embodiment, and corresponds to the cross-section taken along the MDXCII-MDXCII line in FIG. 1185, and (b) is a cross-section taken along the MDXCII-MDXCII line in FIG. 1185. [Figure 1201] 1 is a front view of the game board according to the 68th embodiment. [Figure 1202] 1 is a front perspective view of the lower frame. FIG. [Figure 1203] 1 is a rear perspective view of the lower frame. FIG. [Figure 1204] 1 is an exploded front perspective view of the lower frame. [Figure 1205] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1206] 1 is a top view of the lower frame. [Figure 1207] 1 is a front view of the lower frame. [Figure 1208] 1 is a rear view of the lower frame. [Figure 1209] 1207, and (b) is a side view of the lower frame in the direction of the arrow MDCXIa in FIG. 1207, and (b) is a side view of the lower frame in the direction of the arrow MDCXIb in FIG. 1207. [Figure 1210] 1206 (a) is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along line MDCXIIa-MDCXIIa in FIG. 1206, and (b) is a partially enlarged rear view of the lower frame. [Figure 1211] 1206 (a) is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along line MDCXIIa-MDCXIIa in FIG. 1206, and (b) is a partially enlarged rear view of the lower frame. [Figure 1212] 1206 (a) is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along line MDCXIIa-MDCXIIa in FIG. 1206, and (b) is a partially enlarged rear view of the lower frame. [Figure 1213] 1206, (a) is a partially enlarged cross-sectional view of the lower frame along the MDCXVa line-MDCXVa in FIG. 1206, (b) is a partially enlarged cross-sectional view of the lower frame along the MDCXVb-MDCXVb line in FIG. 1206, and (c) is a partially enlarged cross-sectional view of the lower frame along the MDCXVc-MDCXVc line in FIG. 1210. [Figure 1214] 69 (a) and 69th embodiment are cross-sectional views of the lower frame. [Figure 1215] 6A and 6B are partially enlarged cross-sectional views of the lower frame according to the 70th embodiment. [Figure 1216] 10A and 10B are partially enlarged rear views of the lower frame according to the 71st embodiment. [Figure 1217] 1 is a partially enlarged rear view of the lower frame according to the 72nd embodiment. [Figure 1218] 1 is an exploded front perspective view of the lower frame according to the 73rd embodiment. [Figure 1219] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1220] 1 is a front view of the lower frame. [Figure 1221] 1206, and 1206, (b) are partially enlarged cross-sectional views of the lower frame, (a) corresponds to the cross-section taken along the MDCXIIa-MDCXIIa line in FIG. 1206, and (b) corresponds to the cross-section taken along the MDCXVc-MDCXVc line in FIG. 1210. [Figure 1222] 10A to 10C are partially enlarged rear views of the lower frame according to the 74th embodiment. [Figure 1223] 6A and 6B are partially enlarged cross-sectional views of the lower frame according to the 75th embodiment. [Figure 1224] 1223(a) is a partially enlarged cross-sectional view of the lower frame along the line MDCXXVIa-MDCXXVIa of FIG. 1223(a), and (b) is a partially enlarged cross-sectional view of the lower frame along the line MDCXXVIb-MDCXXVIb of FIG. 1223(b). [Figure 1225] 12 is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along the MDCXVc-MDCXVc line in FIG. 1210. [Figure 1226] 1 is a front view of the game board according to the 76th embodiment. [Figure 1227] 1 is a front perspective view of the lower frame. FIG. [Figure 1228] 1 is a rear perspective view of the lower frame. FIG. [Figure 1229] 1 is an exploded front perspective view of the lower frame. [Figure 1230] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1231] 1 is a top view of the lower frame. [Figure 1232] 1 is a front view of the lower frame. [Figure 1233] 1 is a rear view of the lower frame. [Figure 1234] 1232 is a side view of the lower frame in the direction of the arrow MDCXXXVIa in FIG. 1232, (b) is a side view of the lower frame in the direction of the arrow MDCXXXVIb in FIG. 1232, and (c) is a cross-sectional view of the lower frame in the direction of the arrow MDCXXXVIc in FIG. 1232. [Figure 1235] 10. 10 is a front view of the lower frame in a state where the front member is not shown, (b) is a partially enlarged rear view of the lower frame in a state where the rear cover member is not shown, and (c) is a top view of the lower frame. [Figure 1236] 1235(c), (b) is a cross-sectional view of the lower frame along the line MDCXXXVIIIa-MDCXXXVIIIa of FIG. 1235(c), (b) is a cross-sectional view of the lower frame along the line MDCXXXVIIIb-MDCXXXVIIIb of FIG. 1236(a), and (c) is a partially enlarged bottom view of the lower frame. [Figure 1237]10. 10 is a front view of the lower frame in a state where the front member is not shown, (b) is a partially enlarged rear view of the lower frame in a state where the rear cover member is not shown, and (c) is a top view of the lower frame. [Figure 1238] 1237(c), (b) is a cross-sectional view of the lower frame along the MDCXLb-MDCXLb line in FIG. 1238(a), and (c) is a cross-sectional view of the lower frame along the MDCXLb line in FIG. 1238(a), and (c) is a partially enlarged lower view of the lower frame. [Figure 1239] 1235 is a partially enlarged cross-sectional view of the lower frame in the 77th embodiment, and corresponds to the cross-section taken along line MDCXXXVIIIa-MDCXXXVIIIa in FIG. 1235. [Figure 1240] 1240(b) is a front perspective view of the distribution passage, FIG. 1240(a) is a front view of the distribution passage in the direction of the arrow MDCXLIIb in FIG. 1240(a), FIG. 1240(b) is a bottom view of the distribution passage in the direction of the arrow MDCXLIIc in FIG. 1240(b), and FIG. 1240(d) is a side view of the distribution passage in the direction of the arrow MDCXLIId in FIG. 1240(b). [Figure 1241] 1235(c) is a partially enlarged cross-sectional view of the lower frame according to the 78th embodiment, and corresponds to the cross-section taken along line MDCXXXVIIIa-MDCXXXVIIIa in FIG. 1235(c). [Figure 1242] 10.

[0034] FIG. 10 is a front view of the lower frame in the 79th embodiment, and (b) is a rear view of the lower frame. [Figure 1243] 10.

[0034] FIG. 10 is a front view of the lower frame in the 79th embodiment, and (b) is a rear view of the lower frame. [Figure 1244] 10(a) is a front view of the lower frame in the 80th embodiment, and (b) is a rear view of the lower frame. [Figure 1245] 1 is a top view of the lower frame. [Figure 1246] 10(a) is a front view of the lower frame in the 80th embodiment, and (b) is a rear view of the lower frame. [Figure 1247] 1 is a top view of the lower frame. [Figure 1248] 1237(c) is a partially enlarged cross-sectional view of the lower frame in the 81st embodiment, which corresponds to the cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1237(c), and (b) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1237(c), and (c) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1237(c), and (c) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1237(c). [Figure 1249] 10(a) is a partial top view of the lower frame in the 84th embodiment, and (b) is a partial top view of the lower frame in the 85th embodiment. [Figure 1250] 1237(c) is a front perspective view of the distribution passage in the 77th embodiment, (b) is a view perpendicular to the distribution passage in the 87th embodiment, (c) is a view perpendicular to the distribution passage in the 88th embodiment, (d) is a partially enlarged cross-sectional view of the distribution passage in the 89th embodiment, and (d) is a partially enlarged cross-sectional view of the distribution passage in the 89th embodiment, and corresponds to the cross-sectional view taken along the MDCXLa-MDCXLa line in FIG. 1237(c), and (e) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line in FIG. 1237(c), and (e) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line in FIG. 1237(c). [Figure 1251] 10(a) is a partially enlarged top view of the lower frame in the 91st embodiment, and (b) is a partially enlarged top view of the lower frame in the 92nd embodiment. [Figure 1252] 1 is a front view of the game board according to the 93rd embodiment. [Figure 1253] 1 is a front perspective view of the lower frame. FIG. [Figure 1254] 1 is a rear perspective view of the lower frame. FIG. [Figure 1255] 1 is an exploded front perspective view of the lower frame. [Figure 1256] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1257] 1A is an exploded front perspective view of the definitive passage, and 1B is an exploded front perspective view of the driving means. [Figure 1258] 1A is an exploded rear perspective view of the definitive passage, and 1B is an exploded rear perspective view of the driving means. [Figure 1259] 1 is a top view of the lower frame. [Figure 1260] 1 is a front view of the lower frame. [Figure 1261] 1 is a rear view of the lower frame. [Figure 1262] 1260 is a side view of the lower frame in the direction of arrow MDCLXIVa in FIG. 1260, (b) is a side view of the lower frame in the direction of arrow MDCLXIVb in FIG. 1260, and (c) is a cross-sectional view of the lower frame in the direction of arrow MDCLXIVb in FIG. 1260, and (c) is a cross-sectional view of the lower frame in the line MDCLXIVc-MDCLXIVc in FIG. [Figure 1263] 1A is a partially enlarged front view of the lower frame, and 1B is a partially enlarged rear view of the lower frame. [Figure 1264] 1A is a partially enlarged front view of the lower frame, and 1B is a partially enlarged rear view of the lower frame. [Figure 1265] 1 is a top view of the part of the displacement member. [Figure 1266] 1 is a front view of the lower frame. [Figure 1267] 1267(a) is a rear view of the lower frame, and 1267(a) is a side view of the lower frame in the direction of the arrow MDCLXIXb in FIG. 1267(a). [Figure 1268] 1 is a front view of the lower frame. [Figure 1269] 1269(a) is a rear view of the lower frame, and 1269(a) is a side view of the lower frame in the direction of the arrow MDCLXXIb in FIG. 1269(a). [Figure 1270] 10A and 10B are partially enlarged front views of the lower frame in the 94th embodiment, and (b) and (d) are partially enlarged top views of the lower frame. [Figure 1271] 10A and 10B are partially enlarged rear views of the lower frame according to the 95th embodiment. [Figure 1272] 10A is a top view of the lower frame in the 96th embodiment, and (b) is a partially enlarged front view of the lower frame. [Figure 1273] 1A is a top view of the lower frame, and 1B is a partially enlarged front view of the lower frame. [Figure 1274] 1 is a front view of the game board according to the 97th embodiment. [Figure 1275] 1 is a front perspective view of the lower frame. FIG. [Figure 1276] 1 is a rear perspective view of the lower frame. FIG. [Figure 1277] 1 is an exploded front perspective view of the lower frame. [Figure 1278] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1279] 1 is an exploded front perspective view of the displacement means. FIG. [Figure 1280] 1 is an exploded rear perspective view of the displacement means. FIG. [Figure 1281] 1 is a top view of the lower frame. [Figure 1282] 1 is a front view of the lower frame. [Figure 1283] 1 is a rear view of the lower frame. [Figure 1284] 1282 is a side view of the lower frame in the direction of arrow MDCLXXXVIa in FIG. 1282, (b) is a side view of the lower frame in the direction of arrow MDCLXXXVIb in FIG. 1282, and (c) is a cross-sectional view of the lower frame in the direction of arrow MDCLXXXVIc in FIG. 1282. [Figure 1285] 1A and 1B are front views of the lower frame, and 1B are rear views of the lower frame. [Figure 1286] 1A and 1B are front views of the lower frame, and 1B are rear views of the lower frame. [Figure 1287] 1A and 1B are front views of the lower frame, and 1B are rear views of the lower frame. [Figure 1288] 1 is a top view of the left displacement member partially. [Figure 1289] 1 is a front view of the game board according to the 98th embodiment. [Figure 1290] 1 is a front perspective view of the lower frame. FIG. [Figure 1291] 1 is a rear perspective view of the lower frame. FIG. [Figure 1292] 1 is an exploded front perspective view of the lower frame. [Figure 1293] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1294] 1 is an exploded front perspective view of the distribution means. [Figure 1295] 1 is an exploded rear perspective view of the distribution means. FIG. [Figure 1296] 1 is a top view of the lower frame. [Figure 1297] 1 is a front view of the lower frame. [Figure 1298] 1 is a rear view of the lower frame. [Figure 1299] 1297, (b) is a side view of the lower frame in the direction of the arrow MDCCIa in FIG. 1297, (b) is a side view of the lower frame in the direction of the arrow MDCCIb in FIG. 1297, and (c) is a cross-sectional view of the lower frame in the line MDCCIc-MDCCIc in FIG. 1297. [Figure 1300]1299(c) is a partially enlarged cross-sectional view of the lower frame along the line MDCCIIa-MDCCIIa in FIG. 1299(c), and (b) is a partially enlarged rear view of the lower frame. [Figure 1301] 1299(c) is a partially enlarged cross-sectional view of the lower frame along the line MDCCIIa-MDCCIIa in FIG. 1299(c), and (b) is a partially enlarged rear view of the lower frame. [Figure 1302] 1 is a top view of the lower frame. FIG. [Figure 1303] 1 is a top view of the lower frame. FIG. [Figure 1304] 10A and 10B are cross-sectional views of the lower frame in the 99th embodiment, and 10B are rear views of the lower frame. [Figure 1305] 1A is a cross-sectional view of the lower frame, and 1B is a rear view of the lower frame. [Figure 1306] 10A and 10B are schematic top views of the fourth passage portion of the sixth passage member, the rolling surface of the intermediate passage member, the displacement passage member of the displacement means, and the second displacement passage portion of the second displacement passage; (b), (d) and (f) are schematic front views of the fourth passage portion of the sixth passage member, the rolling surface of the intermediate passage member, the displacement passage member of the displacement means, and the second displacement passage portion of the second displacement passage. [Figure 1307] 1 is a partially enlarged top view of the lower frame according to the 100th embodiment. [Figure 1308] 101 (a) is a partially enlarged top view of the lower frame in the 101st embodiment, and (b) is a partially enlarged front view of the lower frame. [Figure 1309] 10A is a partially enlarged top view of the lower frame, and 10B is a partially enlarged front view of the lower frame. [Figure 1310] 102 (a) is a partially enlarged top view of the lower frame in the 102nd embodiment, and (b) is a partially enlarged front view of the lower frame. [Figure 1311] 103 is a rear perspective view of the lower frame according to the 103rd embodiment. [Figure 1312] 1 is a partially enlarged top view of the lower frame. [Figure 1313] 10 is a front view of the pachinko machine according to the 104th embodiment. [Figure 1314] 1 is a rear view of a pachinko machine. [Figure 1315] 1 is a front perspective view of a pachinko machine showing the inner frame open (distributed) from the outer frame. FIG. [Figure 1316] 1 is a front perspective view of a pachinko machine showing a state (development) in which the inner frame is opened from the outer frame and the back pack is opened from the inner frame (development). [Figure 1317] 1 is a front perspective view of a pachinko machine showing the inner frame closed with respect to the outer frame and the front frame open (distributed). [Figure 1318] 1 is a front view of the pachinko machine with the front frame removed. [Figure 1319] 1 is an exploded front perspective view of the game board and the inner frame. [Figure 1320] 1 is an exploded perspective front view of the front frame. [Figure 1321] 1 is an exploded perspective rear view of the front frame. FIG. [Figure 1322] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 1323] 1 is a front view of a pachinko machine according to the 105th embodiment. [Figure 1324] 1 is a front view of a pachinko machine game board. [Figure 1325] 1 is an exploded front perspective view of the game board and the movement unit. FIG. [Figure 1326] 1 is an exploded front perspective view of the game board. [Figure 1327] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 1328] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 1329] 1324 is a partially enlarged front view of the game board in the MDCCXXXI section of FIG. 1324. [Figure 1330] 1329 is a cross-sectional view of the game board along the MDCCXXXII-MDCCXXXII line of FIG. 1329. [Figure 1331] 1 is a perspective view of the winning unit. [Figure 1332] 1 is a perspective view of the winning unit. [Figure 1333] 1 is a perspective view of the winning unit. [Figure 1334] 1 is a perspective view of the winning unit. [Figure 1335] 1 is a perspective view of the rear of the game board. [Figure 1336] 1 is a perspective view of an exploded rear view of the game board. [Figure 1337] 1 is an exploded front perspective view of the operating unit; FIG. [Figure 1338] 1 is a front view of the operating unit. FIG. [Figure 1339] 1 is a front view of the operating unit. FIG. [Figure 1340] 1 is a front view of the operating unit. FIG. [Figure 1341] 1 is a front view of the operating unit. FIG. [Figure 1342] 1 is a front view of the operating unit. FIG. [Figure 1343] 1 is a front view of the operating unit. FIG. [Figure 1344] 1 is a front view of the operating unit. FIG. [Figure 1345] 1 is a front exploded perspective view of the front layer side movable device. FIG. [Figure 1346] 1 is an exploded perspective view of the rear surface of the front layer side movable device. FIG. [Figure 1347] 1 is an exploded front perspective view of the first movable device. [Figure 1348] 1 is an exploded rear perspective view of the first movable device. FIG. [Figure 1349] 1 is an exploded front perspective view of the lifting device. [Figure 1350] 1 is an exploded rear perspective view of the lifting device. [Figure 1351] 1 is an exploded front perspective view of the long device. [Figure 1352] 1 is an exploded rear perspective view of the long device. [Figure 1353] 1 is an exploded front perspective view of the mobile device. FIG. [Figure 1354] 1 is an exploded rear perspective view of the mobile device. FIG. [Figure 1355] 10A and 10B are partially enlarged front views of the front layer side movable device. [Figure 1356] 1 is a partially enlarged front view of the first movable device. [Figure 1357] 1 is a partially enlarged front view of the first movable device. [Figure 1358] 1 is a partially enlarged front view of the first movable device. [Figure 1359] 1 is a partially enlarged front view of the first movable device. [Figure 1360] 1 is a partially enlarged front view of the first movable device. [Figure 1361] 1 is a partially enlarged front view of the first movable device. [Figure 1362] 1 is a partially enlarged front view of the first movable device. [Figure 1363] 1 is a partially enlarged front view of the first movable device. [Figure 1364] 1 is a partially enlarged rear view of the first movable device. [Figure 1365] 1 is a partially enlarged rear view of the first movable device. [Figure 1366] 10A and 10B are partial front views of the first movable device. [Figure 1367] 1 is an exploded front perspective view of the second movable device. [Figure 1368] 1 is an exploded rear perspective view of the second movable device. FIG. [Figure 1369] 10A and 10B are front views of the second movable device. [Figure 1370] 10A and 10B are front views of the second movable device. [Figure 1371] 10A and 10B are front views of the second movable device. [Figure 1372] 10A and 10B are schematic front views of the upper and lower slide members, the trackable members and the interlocking members. [Figure 1373] 1 is an exploded front perspective view of the rear layer side movable device. FIG. [Figure 1374] 1 is an exploded rear perspective view of the rear layer side movable device. FIG. [Figure 1375] 1 is an exploded front perspective view of the third movable device. [Figure 1376] 1 is an exploded rear perspective view of the third movable device. [Figure 1377] 10A and 10B are front views of the upper rear cover member, the extended rotating member, the proximal slide member and the pinion. [Figure 1378] 1 is a partially enlarged front view of the rear layer side movable device. [Figure 1379] 1 is a front view of the rear layer side movable device. FIG. [Figure 1380] 1 is a front view of the rear layer side movable device. FIG. [Figure 1381] 1 is a front view of the rear layer side movable device. FIG. [Figure 1382] (a) to (f) are schematic front views of the pachinko machine. [Figure 1383] (a) to (e) are schematic front views of the pachinko machine. [Figure 1384] 10 is a rear view of the base plate and the light irradiation device according to the 106th embodiment. [Figure 1385] 1 is a rear perspective view of the base plate and the light irradiation device. [Figure 1386] 1 is an exploded rear perspective view of the base plate and the light irradiation device. [Figure 1387] 1 is an exploded front perspective view of the base plate and the light irradiation device. [Figure 1388] 1384 is a partial cross-sectional view of the base plate and the light irradiation device along the MDCCXC-MDCCXC line of FIG. 1384. [Figure 1389] 1 is a schematic front view of a pachinko machine. [Figure 1390] 10 is an exploded rear perspective view of the base plate and the light irradiation device according to the 107th embodiment. [Figure 1391] 1 is an exploded front perspective view of the base plate and the light irradiation device. [Figure 1392] 1384 is a partial cross-sectional view of the base plate and the light irradiation device along a line corresponding to the MDCCXC-MDCCXC line of FIG. 1384. [Figure 1393] 10 is a front view of the operating unit according to the 108th embodiment. [Figure 1394] 10A to 10B are front views of the mobile device. [Figure 1395] 1 is a partial rear view of the first movable device of the front layer side movable device. FIG. [Figure 1396] 1 is a partial rear view of the first movable device of the front layer side movable device. FIG. [Figure 1397] (a) to (c) are schematic front views of the pachinko machine. [Figure 1398] 1 is a schematic front view of a pachinko machine. [Figure 1399] 6A and 6B are partial front views of the pachinko machine. [Figure 1400] 1324 is an enlarged front view of the game board in a range corresponding to the MDCCXXXI section of FIG. 1324. FIG. [Figure 1401] (a) to (c) are schematic front views of the pachinko machine. [Figure 1402] (a) to (c) are schematic front views of the pachinko machine. [Figure 1403] (a) to (c) are schematic front views of the pachinko machine. [Figure 1404] (a) to (c) are schematic front views of the pachinko machine. [Figure 1405] (a) to (c) are schematic front views of the pachinko machine. [Figure 1406] (a) to (c) are schematic front views of the pachinko machine. [Figure 1407] (a) to (c) are schematic front views of the pachinko machine. [Figure 1408] (a) to (c) are schematic front views of the pachinko machine. [Figure 1409] 10A and 10B are front views of the second movable device. [Figure 1410] 1 is a front view of the second movable device. [Figure 1411] 1 is a schematic front view schematically showing the plate-like portion of the rear opening-closing member of the rear layer-side movable device, the plate-like portion of the middle opening-closing member, and the plate-like portion of the front opening-closing member. [Figure 1412] 1412(a) is a front view of the display area of ​​the third pattern display device, and (b) is a front view of the plate-like portion disposed on the front side of the display area of ​​the third pattern display device illustrated in FIG. 1412(a). [Figure 1413] 1413(a) is a front view of the display area of ​​the third pattern display device, and (b) is a front view of the plate-like portion disposed on the front side of the display area of ​​the third pattern display device shown in FIG. 1413(a). [Figure 1414] 1 is a schematic front view schematically showing the plate-like portion of the rear opening-closing member of the rear layer-side movable device, the plate-like portion of the middle opening-closing member, and the plate-like portion of the front opening-closing member. [Figure 1415] 10A to 10C are top views of the plate-like portions of the third pattern display device and the rear layer side movable device. [Figure 1416] 1397 (a) to (i) are partially enlarged front views of the pachinko machine in the MDCCCXVIII section of FIG. 1397 (a). [Figure 1417] 1397 (a) to (c) are partially enlarged front views of the pachinko machine in the MDCCCXVIII section of FIG. 1397 (a). [Figure 1418] 6A and 6B are schematic front views of the pachinko machine. [Figure 1419] (a) to (c) are schematic front views of the pachinko machine. [Figure 1420] 6A and 6B are schematic front views of the pachinko machine. [Figure 1421] 1 is a front view of the pachinko machine according to the 109th embodiment. [Figure 1422] 1 is a front view of a pachinko machine. [Figure 1423] 1 is a rear view of the game board. [Figure 1424] 1423 is a partial cross-sectional view of the game board along the MDCCCXXVI-MDCCXXVI line. FIG. 1423. [Figure 1425] 1 is a front view of a pachinko machine. [Figure 1426] 1 is a front view of a pachinko machine. [Figure 1427] 1 is a front view of a pachinko machine. [Figure 1428] 1 is a front view of a pachinko machine. [Figure 1429] 1 is a front view of the game board according to the 110th embodiment. [Figure 1430] 1430(b) is a partially enlarged front view of the game board in the MDCCCXXXIIa section of FIG. 1429, and FIG. 1430(b) is a partially enlarged front view of FIG. 1430(a). [Figure 1431] 1 is a front view of the gaming board of the pachinko machine of the 32nd control example. [Figure 1432] 10A (a) is a diagram showing an example of an even-numbered pattern reach display screen in the normal state of the 32nd control example, and (b) is a diagram showing an example of an example of a display screen after the SP reach has been developed in the 32nd control example. [Figure 1433] 10A (a) is a diagram showing an example of an even-numbered pattern reach display screen in the 32nd control example in the special mode, and (b) is a diagram showing an example of an example of a display screen after the SP reach has been developed in the 32nd control example. [Figure 1434] 10A (a) is a diagram showing an example of a display screen after the SP reach has been developed in the 32nd control example, and (b) is a diagram showing an example of a display screen when the designs are temporarily aligned in the 32nd control example. [Figure 1435] 10 is a diagram showing an example of a display screen when the design is stopped in the 32nd control example. [Figure 1436] 10 is a diagram showing an example of a display screen in which the SP reach is displayed in the 32nd control example. [Figure 1437] 10. The figure (a) is a diagram showing an example of a normal angle display screen in the 32nd control example, (b) is a diagram showing an example of a left angle display screen in the 32nd control example, and (c) is a diagram showing an example of a right angle display screen in the 32nd control example. [Figure 1438] 10A (a) is a diagram showing an example of a screen when special chart fluctuation stops in the left angle display in the 32nd control example, and (b) is a diagram showing an example of a screen when special chart fluctuation stops in the left angle display in the 32nd control example (when the next fluctuation reach) in the 32nd control example. [Figure 1439] 10A (a) is a diagram showing an example of the upper angle display screen in the 32nd control example, and (b) is a diagram showing an example of the normal angle display screen (a screen that suggests upper angle transition) in the 32nd control example. [Figure 1440] 10A and 10B are diagrams showing an example of a display screen during the normal state of the 32nd control example, during which the display screen is currently undergoing fluctuations in a normal state of the 32nd control example, and (b) shows an example of a display screen when the special chart is stopped just before the fluctuations in a normal state of the 32nd control example. [Figure 1441] 10A and 10B are diagrams showing an example of a display screen when the normal state of the 32nd control example is stopped, and (b) shows an example of a display screen when the ceiling reaches the 32nd control example is performed. [Figure 1442] 10A (a) is a diagram showing an example of a display screen at the end of a normal long-time during the ceiling time reduction in the 32nd control example, and (b) is a diagram showing an example of a display screen at the end of a ceiling time reduction in the 32nd control example. [Figure 1443] 10 is a diagram showing an example of a display screen in which the ceiling time is being fluctuated per long map in the 32nd control example when the ceiling time is shortened. [Figure 1444] 10A (a) is a diagram showing an example of a display screen in the 32nd control example where the same pattern is stopped for two consecutive times, and (b) is a diagram showing an example of a display screen in the 32nd control example where the same pattern is stopped for two consecutive times. [Figure 1445] 10A (a) is a diagram showing an example of a display screen during the first announcement performance in the 32nd control example, and (b) is a diagram showing an example of a display screen when a button is pressed during the first announcement performance in the 32nd control example. [Figure 1446] 10A (a) is a diagram showing an example of a performance screen after the advertising of the 32nd control example, and (b) is a diagram showing an example of a display screen in the case where a hit is not announced in the advertising of the advertising of the 32nd control example. [Figure 1447] 10A (a) is a diagram showing an example of the second stage announcement screen during the first announcement performance in the 32nd control example, and (b) is a diagram showing an example of a separate display screen (holding sequence) for the first announcement performance in the 32nd control example. [Figure 1448] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 32nd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 32nd control example. [Figure 1449]12. FIG. 12 is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 32nd control example, FIG. 12 is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 32nd control example, and FIG. 12 is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 32nd control example. [Figure 1450] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the 32nd control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 32nd control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the 32nd control example. [Figure 1451] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 32nd control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 32nd control example. [Figure 1452] 1A and 1B are diagrams that schematically show the specified contents of the special-speed table for the first time-saving table in the 32nd control example, and (b) are diagrams that schematically show the specified contents of the second time-saving table in the 32nd control example. [Figure 1453] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 32nd control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 32nd control example. [Figure 1454] 14 is a diagram schematically showing the specified contents of a reach mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 32nd control example. [Figure 1455] 14 is a diagram schematically showing the specified contents of the addition time mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 32nd control example. [Figure 1456] 1 is a diagram schematically showing the specified contents of a one-off notification mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 32nd control example. [Figure 1457] 1 is a block diagram showing the electrical configuration of a display control device in the 32nd control example. [Figure 1458] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 32nd control example. [Figure 1459] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 32nd control example. [Figure 1460] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 32nd control example. [Figure 1461] 10 is a flow chart showing update processing executed by the MPU in the main control device in the 32nd control example. [Figure 1462] 10 is a flow chart showing the ceiling time-saving update process executed by the MPU in the main control device in the 32nd control example. [Figure 1463] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 32nd control example. [Figure 1464] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 32nd control example. [Figure 1465] 10 is a flow chart showing the startup process (main control device) executed by the MPU within the main control device in the 32nd control example. [Figure 1466] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1467] 10 is a flow chart showing the main processing (audio lamp control device) executed by the MPU within the audio lamp control device in the 32nd control example. [Figure 1468] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1469] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1470] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1471] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1472] 10 is a flow chart showing a pre-reading performance setting process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1473] 10 is a flow chart showing a stopping performance setting process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1474] 10 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1475] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1476] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1477] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1478] 10 is a flow chart showing a continuous reach-time mode determination process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1479] 10 is a flow chart showing a detailed mode determination process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1480] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1481] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1482] 10 is a flow chart showing command determination processing (display control device) executed by the MPU within the display control device in the 32nd control example. [Figure 1483] 10 is a flow chart showing a stop type command process executed by the MPU in the display control device in the 32nd control example. [Figure 1484] 10A (a) is a diagram showing an example of the opening screen (even numbered pattern) of a jackpot game in the 33rd control example, and (b) is a diagram showing an example of a display screen in which a song is changed by pushing the button while the opening screen of a jackpot game in the 33rd control example is displayed. [Figure 1485] 10A and 10B are diagrams showing display screens displayed in the background change effect in the 33rd control example. [Figure 1486] 6A and 6B are diagrams showing the flow of the background change effect in the 33rd control example. [Figure 1487] 10A (a) is a diagram showing an example of a freeze effect display screen at the start of a change in the 33rd control example, and (b) is a diagram showing an example of a 6-second freeze effect display screen in the 33rd control example. [Figure 1488] 14 is a diagram schematically showing a combination of the freeze effect and the winning expectation level in the 33rd control example. [Figure 1489] 1 is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 33rd control example. [Figure 1490] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 33rd control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 33rd control example. [Figure 1491] 10.

[0011] FIG. 1A (a) is a diagram schematically showing the prescribed contents of the promotion lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 33rd control example, and FIG. 1B) is a diagram schematically showing the prescribed contents of the background change lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 33rd control example. [Figure 1492] 14 is a diagram schematically showing the specified contents of the addition time mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 33rd control example. [Figure 1493] 10 is a flow chart showing a stopping performance setting process executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1494] 10 is a flow chart showing the background change effect end processing executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1495] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1496] 10 is a flow chart showing an opening performance process executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 1497] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 1498]10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 1499] 10 is a flow chart showing a background change performance determination process executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1500] 10 is a flow chart showing a background change effect lottery process executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1501] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 1502] 10 is a flow chart showing a music selection process executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 1503] 10A (a) is a diagram showing an example of a display screen during flight performance in the 34th control example, and (b) is a diagram showing an example of a display screen during bird stock in the 34th control example. [Figure 1504] 10A (a) is a diagram showing an example of a display screen at the time of develop...

Claims

Claim 1: A game machine comprising: a launching means capable of launching game balls; a ball entry means provided at a position where a game ball launched at a first launching intensity by the launching means can enter, and at which a game ball launched at a second launching intensity different from the first launching intensity has difficulty in entering; wherein the game machine is configured to be able to constitute a plurality of game states including at least a first game state in which a first control can be executed and a second game state in which a second control different from the first control can be executed; when the second control is executed, it is configured such that a game ball can more easily enter the ball entry means when the game is played by a first game method in which game balls are continuously launched at the first launching intensity than when the first control is executed; it is configured to be able to shift from the predetermined second game state to the first game state when a specific period ends in the predetermined second game state; characterized in that, at least in the predetermined second game state, it is configured such that the degree of advantage is more likely to be higher when the game is played by the first game method than when the game is played by a second game method in which game balls are continuously launched at the second launching intensity.