Game machine

JP2025079719AActive Publication Date: 2025-05-22SAMMY CORPORATION
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Patent Information

Application Number
JP2023192571
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-11-10
Publication Date
2025-05-22
Estimated Expiration
2043-11-10

AI Technical Summary

Benefits of technology

【0007】 本発明によれば、1のプロセッサで演出制御手段と画像制御手段とを実現し、複数のプロセッサによる構成時と同等またはそれ以上の機能を提供することができる。

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Abstract

To achieve performance control means and image control means in a single processor and provide functionality equal to or greater than that of a configuration using multiple processors.SOLUTION: A sub-control board 1200 includes at least one processor having multiple processor cores and a storage device. A first process that controls the execution of a performance and a second process that executes a performance on the basis of instructions from the first process are assigned respectively to any one of the multiple processor cores to be operated. When a specific error is detected during development, the second process uses a shared area 1231 provided in the storage device to output an error code to a specific port of the sub-control board, causing an error to be notified from a display device externally connected to the specific port. When a specific error is detected during operation when the display device is not connected, the second process uses the shared area 1231 to output an error code that is not used in a game to the specific port.SELECTED DRAWING: Figure 65
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Claims

[Claim 1] A main control board that controls the progress of the game; A sub-control board that controls the performance based on information from the main control board; Equipped with The sub-control board has at least one processor having a plurality of processor cores capable of executing processes independently of each other, and a storage device capable of reading and writing data; A first process for controlling the execution of a performance and a second process for executing a performance based on an instruction from the first process are assigned to any one of the plurality of processor cores and run; a shared area accessible to both the first and second processes is provided in the storage device; When the first or second process detects a specific error during development of the gaming machine, the second process uses the shared area to output an error code to a specific port of the sub-control board, thereby causing a display externally connected to the specific port to notify the error; When the first or second process detects the specific error during operation of a gaming machine in which the display is not connected to the sub-control board, the second process uses the shared area to output an error code that is not used for gaming to the specific port. A gaming machine characterized by:

Citation Information

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