Gaming machine

Abstract

To provide a game machine capable of suppressing the decline of interest in a game.SOLUTION: A game machine capable of providing a benefit based on a result of a lottery, the game machine comprising: a presentation execution unit configured to execute a predetermined presentation; a presentation information storage unit configured to store presentation information necessary for execution of the predetermined presentation; and a presentation display unit configured to display an image based on the presentation information, wherein the game machine is configured to execute, as the predetermined presentation, a specific presentation in which a predetermined object is displayed in a normal mode and then changed to an expectation mode. The specific performance can be changed to an expectation mode after being changed to a display hierarchy different from a display hierarchy when displayed in a normal mode.SELECTED DRAWING: Figure 584

Description

Technical Field

[0001] The present invention relates to gaming machines such as pachinko machines (commonly also referred to as "pachinko machines") and rotary gaming machines (commonly also referred to as "pachislot machines").

Background Art

[0002] Among gaming machines represented by pachinko machines, there is one that detects that the prize medium obtained by the player is excessively supplied to the player with respect to the game medium consumed in the game (for example, see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the gaming machine disclosed in Patent Document 1, the difference (reference value) between the game medium consumed in the game and the prize medium obtained by the player was counted, and the game stop was determined based on the reference value. However, due to the occurrence of abnormalities in the gaming machine, etc., there was a risk that the proper game could not be continued and the interest of the game would be reduced.

[0005] The present invention has been made in view of the above circumstances, and an object thereof is to provide a gaming machine capable of suppressing a decrease in the interest of the game by enabling the proper continuation of the game.

Means for Solving the Problems

[0006] A gaming machine capable of generating a special game state based on the result of a lottery, having an out-of-area program stored in an area outside the area storing the program for controlling the progress of the game, prize medium awarding means for awarding a prize medium based on winning, The aforementioned program outside the domain calculates the difference based on the number of game media consumed in the game and the number of prize media awarded. A game stopping means that executes a setting to stop the game's progress based on the calculated difference, The game stop release means releases the game stop when the game has been stopped by the game stop means, An operating means operated to execute the aforementioned game stop release means, A display control means for controlling a display means capable of displaying predetermined information, Equipped with, The game stop release means allows the game to resume from its stopped state by operating the operating means while the game is stopped by the game stop means, and also initializes the difference. The display control means is capable of controlling the display means between a stopped display mode when the game is stopped by the game stopping means and a normal display mode before the game is stopped. If the difference in a particular game state satisfies a predetermined condition, the game state will continue, but the update of the difference will not be performed. A gaming machine characterized by the following features.

[0007] The above configuration can prevent players from continuing to play when the number of prize items acquired is excessive (see paragraphs

[4942] to

[5252] , etc.). [Effects of the Invention]

[0008] According to one embodiment of the present invention, the above problems can be solved and the decline in the enjoyment of the game can be suppressed. [Brief explanation of the drawing]

[0009] [Figure 1] This is a front view of a pachinko machine, which is one embodiment of the design. [Figure 2] This is a right-side view of a pachinko machine. [Figure 3]It is a plan view of a pachinko machine. [Figure 4] It is a rear view of a pachinko machine. [Figure 5] It is a perspective view of a pachinko machine seen from the front. [Figure 6] It is a perspective view of a pachinko machine seen from the back. [Figure 7] It is a perspective view of a pachinko machine seen from the front with the door frame opened from the main body frame and the main body frame opened from the outer frame. [Figure 8] It is an exploded perspective view of a pachinko machine disassembled into a door frame, a game board, a main body frame, and an outer frame and seen from the front. [Figure 9] It is an exploded perspective view of a pachinko machine disassembled into a door frame, a game board, a main body frame, and an outer frame and seen from the back. [Figure 10] It is a front view showing an example of a game board. [Figure 11] It is a perspective view of a game board seen from the front right. [Figure 12] It is a perspective view of a game board seen from the front left. [Figure 13] It is a perspective view of a game board seen from the back. [Figure 14] It is an exploded perspective view of a game board disassembled by each main component and seen from the front. [Figure 15] It is an exploded perspective view of a game board disassembled by each main component and seen from the back. [Figure 16] It is a front view of a front component and a front unit on a game board cut at approximately the center in the front - rear direction within the game area. [Figure 17] It is a block diagram schematically showing the control configuration of a pachinko machine. [Figure 18] It is a diagram showing the configuration within the main control MPU. [Figure 19] It is a diagram showing the configuration of an arithmetic circuit within the main control MPU. [Figure 20] It is a diagram showing the configuration of a serial communication circuit. [Figure 21] It is a flowchart showing an example of an initialization process. [Figure 22] It is a flowchart showing the continuation of the initialization process in FIG. 21. [Figure 23] This flowchart shows an example of timer interrupt handling. [Figure 24] This flowchart shows an example of the calculation and display process for the bonus item ratio. [Figure 25] This flowchart shows the continuation of the calculation and display process for the bonus item ratio in Figure 24. [Figure 26] This figure shows an example of the arrangement of programs (code) and data stored in the ROM and RAM built into the main control MPU. [Figure 27] This diagram shows the structure of the data stored in the area used for calculating the payout ratio. [Figure 28] This is a diagram showing the configuration of the bonus item ratio indicator. [Figure 29] This diagram shows the configuration of the driver circuit. [Figure 30] This is a timing diagram of the data input to the driver circuit. [Figure 31] This figure shows an example of the main control board's implementation. [Figure 32] This diagram shows the positional relationship between the main control MPU and the bonus ratio indicator. [Figure 33] This is a diagram showing the load register selection table. [Figure 34] This is a diagram showing the character generator decode table. [Figure 35] This is a state transition diagram of the driver circuit. [Figure 36] This figure shows an example of how the payout ratio is displayed. [Figure 37] This figure shows an example of how the payout ratio is displayed. [Figure 38] This is a block diagram illustrating the control configuration of a pachinko machine. [Figure 39] This flowchart shows an example of the process for updating the base calculation area. [Figure 40] This flowchart shows an example of the base calculation and display process. [Figure 41] This figure shows an example of the timing for updating the number of prize balls and calculating the base value. [Figure 42] This figure shows another example of the timing for updating the number of prize balls and calculating the base value. [Figure 43] This figure shows another example of the timing for updating the number of prize balls and calculating the base value. [Figure 44] This figure shows another example of the timing for updating the number of prize balls and calculating the base value. [Figure 45] This figure shows another example of the timing for updating the number of prize balls and calculating the base value. [Figure 46] This flowchart shows another example of the process for updating the base calculation area. [Figure 47] This flowchart shows another example of the base calculation and display process. [Figure 48] This flowchart shows another example of the process for updating the base calculation area. [Figure 49] This flowchart shows another example of the base calculation and display process. [Figure 50] This flowchart shows another example of the process for updating the base calculation area. [Figure 51] This flowchart shows another example of the base calculation and display process. [Figure 52] This diagram shows the structure of the data stored in the base calculation area. [Figure 53] This is a front view showing another example of a game board. [Figure 54] This flowchart shows another example of the process for updating the base calculation area. [Figure 55] This flowchart shows another example of the process for updating the base calculation area. [Figure 56] This flowchart shows another example of the base calculation and display process. [Figure 57] This flowchart shows another example of the base calculation and display process. [Figure 58] This flowchart shows another example of the base calculation and display process. [Figure 59]This flowchart shows another example of the base calculation and display process. [Figure 60] This flowchart shows an example of the processing that occurs when the peripheral control unit is powered on. [Figure 61] This flowchart shows an example of the V-blank interrupt processing in the peripheral control unit. [Figure 62] This flowchart shows an example of the peripheral control unit's 1ms timer interrupt processing. [Figure 63] This flowchart shows an example of the display selection process. [Figure 64] This figure shows an example of a display selection table. [Figure 65] This figure shows an example of a display selection table. [Figure 66] This figure shows an example of a display selection table. [Figure 67] This figure shows an example of a display selection table. [Figure 68] This figure shows an example of a display selection table. [Figure 69] This figure shows an example of a display screen. [Figure 70] This flowchart shows another example of the process for updating the base calculation area. [Figure 71] This flowchart shows another example of the process for updating the base calculation area. [Figure 72] This flowchart shows another example of the base calculation and display process. [Figure 73] This flowchart shows an example of the process for updating the base calculation area. [Figure 74] This flowchart shows another example of the process for updating the base calculation area. [Figure 75] This flowchart shows an example of timer interrupt handling. [Figure 76] This is a flowchart showing an example of base calculation process 1. [Figure 77] This flowchart shows an example of base calculation process 2. [Figure 78]This flowchart shows another example of base calculation process 1. [Figure 79] This flowchart shows another example of base calculation process 2. [Figure 80] This flowchart shows another example of timer interrupt handling. [Figure 81] This is a flowchart showing an example of base calculation process 3. [Figure 82] This is a flowchart showing an example of base calculation process 4. [Figure 83] This flowchart shows an example of the base display process. [Figure 84] This flowchart shows another example of base calculation process 3. [Figure 85] This flowchart shows another example of base calculation process 4. [Figure 86] This flowchart shows another example of the base display process. [Figure 87] This is a block diagram illustrating the control configuration of a pachinko machine. [Figure 88] This diagram shows the arrangement of the frame-side ball ejection sensors. [Figure 89] This diagram shows the arrangement of the frame-side ball ejection sensors. [Figure 90] This diagram shows an example of the connection between the ball ejection sensor and the main control board. [Figure 91] This is a front view showing an example of a game board. [Figure 92] This diagram shows the configuration of the main control input circuit. [Figure 93] This figure shows an example of the main control board's implementation. [Figure 94] This figure shows an example of the main control board's implementation. [Figure 95] This figure shows an example of the main control board's implementation. [Figure 96] This figure shows an example configuration of the main control I / O port. [Figure 97] This figure shows an example configuration of the main control I / O port. [Figure 98]Figure 97 shows a timing diagram for an example configuration of the main control I / O port. [Figure 99] This diagram shows the changes in the state (interval) involved in calculating the base value. [Figure 100] This figure shows examples of characters displayed on the base indicator. [Figure 101] This is a flowchart showing an example of the initialization process. [Figure 102] This flowchart shows the continuation of the initialization process shown in Figure 101. [Figure 103] This diagram shows the configuration of the base calculation area. [Figure 104] This flowchart shows an example of timer interrupt handling. [Figure 105] This flowchart shows an example of the base calculation process. [Figure 106] Figure 105 is a flowchart showing the continuation of the base calculation process. [Figure 107] This flowchart shows an example of the base display data generation process. [Figure 108] This flowchart shows a variation of the base calculation process. [Figure 109] This diagram shows the base calculation when the game state changes. [Figure 110] This diagram shows the memory area configuration within the internal structure of the main control MPU1311. [Figure 111] This figure shows an example of a program for timer interrupt handling and base calculation handling. [Figure 112] This figure shows an example of a program for timer interrupt handling and base calculation handling. [Figure 113] This figure shows an example of the arrangement of programs (code) and data stored in the ROM and RAM built into the main control MPU. [Figure 114] This figure shows an example of game history recorded in a gaming machine. [Figure 115] This figure shows an example of an error screen. [Figure 116] This figure shows an example of an error signal. [Figure 117] The figure shows an example of an error. [Figure 118] The figure shows an example of an error. [Figure 119] The figure shows an example of an error. [Figure 120] This flowchart shows an example of the processing that occurs when the peripheral control unit is powered on. [Figure 121] This figure shows an example of a table for setting conditions for recording game history. [Figure 122] This is a diagram showing an example of a game history. [Figure 123] This is a block diagram showing the peripheral control board and its surrounding components. [Figure 124] This is a block diagram showing the peripheral configuration of the peripheral control SRAM. [Figure 125] This figure shows a modified example of the game history recording conditions setting table. [Figure 126] This is a diagram showing a modified example of a game history. [Figure 127] This is a diagram showing a modified example of a game history. [Figure 128] This is a diagram showing a modified example of a game history. [Figure 129] This is a block diagram illustrating the control configuration of a pachinko machine that has a settings unit. [Figure 130] This is a perspective view of a pachinko machine with a settings section, seen from the rear with the doors open. [Figure 131] Figure 130 is a perspective view of the pachinko machine shown in the picture, with the doors closed, viewed from the rear. [Figure 132] This is a diagram showing the setting section of a pachinko machine, as shown in Figure 130. [Figure 133] This is a diagram showing a modified version of the settings section. [Figure 134] This is a block diagram illustrating the control configuration of a pachinko machine that has a settings unit. [Figure 135] This is a rear view of a game board with a settings section. [Figure 136] Figure 135 is a rear view perspective of a pachinko machine equipped with the game board shown. [Figure 137] This is a flowchart showing an example of the initialization process. [Figure 138] This flowchart shows an example of the settings change process and the settings display process. [Figure 139] This flowchart shows an example of the settings change process and the settings display process. [Figure 140] This flowchart shows an example of the procedure for controlling special symbols and special electric features. [Figure 141] This is a flowchart illustrating an example of the procedure for waiting for special symbol changes. [Figure 142] This flowchart shows an example of the procedure for setting special symbol variation patterns. [Figure 143] This flowchart shows an example of the procedure for determining the selection of a variation pattern. [Figure 144] (A) is an example of a variation pattern table selected when the game state is normal and the result of the special lottery is a loss. (B) is an example of a variation pattern table selected when the game state is normal and the result of the special lottery is a jackpot. [Figure 145] This is a schematic diagram showing an example of the effects performed in the off-beat variation patterns 20 and 24-29 in the variation pattern table in Figure 144(A). [Figure 146] This is a schematic diagram showing examples of the effects performed in the deviation patterns 1, 2, and 30 in the variation pattern table in Figure 144(A). [Figure 147] This is a schematic diagram showing examples of the effects performed in the losing variation pattern 31 and the winning variation pattern 34 in the variation pattern table of Figure 144(A). [Figure 148] This is a schematic diagram showing an example of the effects performed in the losing variation pattern 32 and the winning variation pattern 35 in the variation pattern table of Figure 144(A). [Figure 149](A) is an example of a variation pattern table selected when the game state is in a time-saving state and the result of the special lottery is a loss. (B) is an example of a variation pattern table selected when the game state is in a time-saving state and the result of the special lottery is a jackpot. [Figure 150] This figure shows an example of the main control board's implementation. [Figure 151] This figure shows another example of the main control board's implementation. [Figure 152] This is a cross-sectional view taken along line A-A' in Figure 151(B). [Figure 153] This figure shows another example of the main control board's implementation. [Figure 154] This is a flowchart showing an example of the initialization process. [Figure 155] This flowchart shows an example of timer interrupt handling. [Figure 156] This flowchart shows an example of the configuration confirmation process. [Figure 157] This is a timing diagram for security signals. [Figure 158] This flowchart shows another example of the initialization process, 4942. [Figure 159] This flowchart shows another example of the configuration confirmation process. [Figure 160] This is another example of a variation pattern table. [Figure 161] This is an example of a final reserved color table. [Figure 162] This is an example of a table showing the appearance rate of each final reserved color for each variation pattern in setting 1, when the variation pattern is determined by the variation pattern table in Figure 160 and the final reserved color is determined by the final reserved color table in Figure 161. [Figure 163] This is an example of a table showing the appearance rate of each final reserved color for each variation pattern in setting 3, when the variation pattern is determined by the variation pattern table in Figure 160 and the final reserved color is determined by the final reserved color table in Figure 161. [Figure 164]This is an example of a table showing the appearance rate of each final reserved color for each variation pattern of setting 5, when the variation pattern is determined by the variation pattern table in Figure 160 and the final reserved color is determined by the final reserved color table in Figure 161. [Figure 165] This is an example of a preview presentation table. [Figure 166] This is an example of a dialogue presentation table. [Figure 167] This is another example of a preview presentation table. [Figure 168] This is an example of a setting suggestion presentation table. [Figure 169] This is an explanatory diagram showing an example of the general outline of the setting suggestion effect. [Figure 170] This is an explanatory diagram illustrating an example of a setting hint effect used as a pre-announcement effect. [Figure 171] (A) is an example of a performance restriction table when the settings are being checked, and (B) is an example of a performance restriction table when an error occurs. [Figure 172] This is an example of a table showing the restrictions on the new prize-winning animations. [Figure 173] This is an example of processing table 1. [Figure 174] This is an example of processing table 2. [Figure 175] This is an example of processing table 3. [Figure 176] This is an example of processing table 4. [Figure 177] This is an example of processing table 5. [Figure 178] This is an example of a processing table 6. [Figure 179] This is a flowchart of the power-on process in Example 1. [Figure 180] This is a flowchart of the power-on process in Example 1. [Figure 181] This is a flowchart of the timer interrupt handling in alternative example 1. [Figure 182] This is a flowchart of the timer interrupt handling in alternative example 1. [Figure 183] This is a flowchart of the performance display process in Example 1. [Figure 184] This is a diagram showing the notification method for alternative example 1. [Figure 185] This diagram shows the notification priority in Example 1. [Figure 186] This is a flowchart of the power-on process in Example 1. [Figure 187] This is a flowchart of the power-on process in Example 1. [Figure 188] This is a flowchart of the main processing on the primary control side in alternative example 1. [Figure 189] This is a flowchart of the RAM initialization process in case of an error in another example (Example 1). [Figure 190] This is a flowchart of the timer interrupt handling in alternative example 1. [Figure 191] This is a flowchart of the timer interrupt handling in alternative example 1. [Figure 192] This is a flowchart of the setup process for Example 1. [Figure 193] This is a flowchart of the setting display process for Example 1. [Figure 194] This is a flowchart of the power-on setup process in Example 1. [Figure 195] This is a flowchart of the random number update process 2 in alternative example 1. [Figure 196] This is a flowchart of the timer interrupt handling in alternative example 1. [Figure 197] This is a flowchart of the switch input processing 1 in alternative example 1. [Figure 198] Figure 198(A) shows an example configuration of the switch entry information data table in Alternative Example 1, and Figure 198(B) shows an example configuration of the switch input level / edge data area in Alternative Example 1. [Figure 199] Figure 199(A) shows an alternative configuration example of the switch entry information data table in Alternative Example 1, and Figure 199(B) shows an alternative configuration example of the switch input level / edge data area in Alternative Example 1. [Figure 200] This is a flowchart of the setting change / confirmation process in Example 1. [Figure 201]Figure 201(A) shows an example configuration of switch input port 2 in Alternative Example 1, and Figure 201(B) shows an example configuration of the setting state management area in Alternative Example 1. [Figure 202] Figure 202(A) shows an example configuration of the power-on operation command in Example 1, Figure 202(B) shows an example configuration of the power-on status command in Example 1, Figure 202(C) shows an example configuration of the power-on restore destination command in Example 1, and Figure 202(D) shows an example configuration of the setting value command in Example 1. [Figure 203] This diagram shows the command transmission order for Example 1. [Figure 204] This diagram shows the state transitions of the setting state management area in Example 1. [Figure 205] This is a time chart showing the start and end of the settings change mode in Example 1. [Figure 206] This is a time chart showing the start and end of the settings confirmation mode in Example 1. [Figure 207] This is a time chart showing the start and end of the settings change mode in Example 1. [Figure 208] This is a time chart showing the start and end of the settings change mode in Example 1. [Figure 209] This is a time chart showing the start and end of the settings change mode in Example 1. [Figure 210] This figure shows an example of the configuration of the jackpot determination threshold table in Example 1. [Figure 211] This figure shows an example of the configuration of the jackpot determination threshold table in Example 1. [Figure 212] This figure shows an example of the configuration of the jackpot determination threshold table in Example 1. [Figure 213] This is a flowchart of the power-on process in Example 2. [Figure 214] This is a flowchart of the power-on process in Example 2. [Figure 215] This is a flowchart of the setting value verification process in Example 2. [Figure 216] This is a flowchart for the RAM check process outside the game area when the power is turned on, as in the alternative example 2. [Figure 217] This is a flowchart for handling RAM abnormalities outside the game area in another example (Example 2). [Figure 218] This is a flowchart of the RWM initialization process outside the used area in another example 2. [Figure 219] This is a flowchart of the power-on setup process in Example 2. [Figure 220] Figure 220(A) shows an example configuration of the setting state management area in Example 2, Figure 220(B) shows an example configuration of the power-on operation command in Example 2, and Figure 220(C) shows an example configuration of the power-on state command in Example 2. [Figure 221] This is a flowchart of the main processing on the primary control side in alternative example 2. [Figure 222] This is a flowchart of the process when the power is turned off, as in the alternative example 2. [Figure 223] This is a flowchart of the timer interrupt handling in alternative example 2. [Figure 224] This is a flowchart of the setup process for Example 2. [Figure 225] This is a flowchart of the setting display process for Example 2. [Figure 226] This is a flowchart of the power-on process in Example 3. [Figure 227] This is a flowchart of the power-on process in Example 3. [Figure 228] This is a flowchart of the main processing on the primary control side in alternative example 3. [Figure 229] This is a flowchart of the timer interrupt processing for the setting change process in Example 3. [Figure 230] This is a flowchart of the timer interrupt processing for normal gameplay in Example 3. [Figure 231] This is a flowchart of the main processing on the primary control side in alternative example 4. [Figure 232] This is a flowchart of the timer interrupt processing for the setting change process in Example 4. [Figure 233] This is a disassembled perspective view of the front unit of the game board, showing the center mechanism and the front display unit as viewed from the front. [Figure 234]This is a front view showing the front display unit with the first image illuminated. [Figure 235] This is a front view showing the display unit with the second image illuminated. [Figure 236] This is a diagram showing the structure of a light guide plate. [Figure 237] This diagram shows the structure of the reflective section provided on the light guide plate. [Figure 238] This diagram shows the structure of the reflective section provided on the light guide plate. [Figure 239] This is a diagram showing the structure of a light guide plate. [Figure 240] This diagram shows examples of images projected onto a light guide plate. [Figure 241] This diagram shows examples of images projected onto a light guide plate. [Figure 242] This diagram shows examples of images projected onto a light guide plate. [Figure 243] This is a diagram showing the structure of a light guide plate. [Figure 244] This diagram shows examples of images projected onto a light guide plate. [Figure 245] This diagram illustrates how a pattern is displayed in a two-dimensional view by a light guide plate. [Figure 246] This diagram illustrates how a pattern is displayed in a two-dimensional view by a light guide plate. [Figure 247] This diagram illustrates how a stereoscopic image is displayed using a light guide plate. [Figure 248] This diagram illustrates how a stereoscopic image is displayed using a light guide plate. [Figure 249] This figure shows an example of a visual display using a light guide plate. [Figure 250] This figure shows an example of a visual display using a light guide plate. [Figure 251] This figure shows an example of a visual display using a light guide plate. [Figure 252] This figure shows an example of a visual display using a light guide plate. [Figure 253] This figure shows an example of a visual display using a light guide plate. [Figure 254] This figure shows an example of a visual display using a light guide plate. [Figure 255] This figure shows an example of a visual display using a light guide plate. [Figure 256] This figure shows an example of a visual display using a light guide plate. [Figure 257] This is a circuit diagram of the synchronous serial interface surrounding the main control board. [Figure 258] This is a circuit diagram showing the connection between a serial-to-parallel conversion circuit and an LED. [Figure 259] This diagram shows the arrangement of the main control MPU and peripheral components on the main control board. [Figure 260] This diagram shows the port layout in the main control MPU. [Figure 261] This diagram shows the timing of data output and acquisition using synchronous serial signals. [Figure 262] This figure shows an alternative arrangement of the main control board in the main control board box. [Figure 263] This figure shows an alternative arrangement of the main control board in the main control board box. [Figure 264] This is a perspective view of slot machines. [Figure 265] This is a perspective view of a slot machine with the front panel open. [Figure 266] This is a block diagram showing the configuration of various mechanical elements, electronic devices, and operating components installed in a slot machine. [Figure 267] This figure shows the storage area provided by ROM, RAM, etc., in this embodiment, and details of the ROM area. [Figure 268] This figure shows the details of the RAM area in this embodiment. [Figure 269] This diagram shows the structure of the data stored in the area used for calculating the payout ratio. [Figure 270] This figure shows the details of the parameter information setting area in this embodiment. [Figure 271]This flowchart explains the procedure for the system reset startup process that is performed when a slot machine is reset. [Figure 272] This is a flowchart showing the procedure for periodic processing. [Figure 273] This flowchart shows the procedure for processing the information signal N output. [Figure 274] This is a flowchart of the initialization process in Example 5. [Figure 275] This flowchart shows the continuation of the initialization process in Example 5 of Figure 274. [Figure 276] This is a flowchart showing the timer interrupt processing in alternative example 5. [Figure 277] This diagram illustrates an example of prize information transmitted from the main control board to the ball information control board. [Figure 278] This diagram illustrates an example of a table that defines the number of prize balls corresponding to each winning slot. [Figure 279] This diagram shows an example of including the number of prize balls in the prize information. (A) shows the case where the number of prizes is tallied for each general prize slot, and (B) shows the case where the number of prizes is tallied by aggregating the general prize slots. [Figure 280] This figure shows an example of how award information is memorized in order of awards received. [Figure 281] This diagram shows an example of game information transmitted from the main control board to the ball information control board, where (A) is an example of winning information and (B) is an example of main control recognition information. [Figure 282] This figure shows another example of game information transmitted from the main control board to the ball information control board. [Figure 283] This diagram illustrates the communication between the main control board and the ball information control board when a gaming machine is started up. [Figure 284] This figure shows a scenario in communication between the main control board and the ball information control board where there is no response from the ball information control board to a notification from the main control board. [Figure 285] This figure shows another example of a situation in communication between the main control board and the ball information control board where the ball information control board does not respond to a notification from the main control board. [Figure 286]This figure shows an example of a memory area allocated to the main control's built-in RAM in game control. [Figure 287] This figure shows an example of a data area included in the input information storage area, where (A) is the input edge data 1 area (INPUT_EDG1) and (B) is the prize ball determination area (PAY_JDG_AR). [Figure 288] This flowchart shows an example of a switch input processing procedure for acquiring information detected by sensors and other devices installed in a gaming machine. [Figure 289] This is a flowchart explaining the procedure for opening the grand prize slot. [Figure 290] This is a timing chart explaining the processing of each configuration when a game ball enters the grand prize slot. [Figure 291] This is a timing chart explaining the processing of each configuration when a game ball enters the second starting gate. [Figure 292] This is a timing chart explaining the processing of each configuration when a game ball enters the probability variation area (V-AT area). [Figure 293] This diagram illustrates the outline of the bit transfer procedure. [Figure 294] This figure shows an example of the structure of instruction code for executing a bit transfer instruction. [Figure 295] This figure shows an example of the types of bit transfer instructions. [Figure 296] This figure shows an example flowchart of a process that uses the bit transfer instruction "RBT". [Figure 297] This figure shows an example of a program corresponding to the flowchart (Figure 296) of a process using the bit transfer instruction "RBT". [Figure 298] This is an example of a flowchart that subroutines the index creation process, where (A) is the process of the caller of the index creation process, and (B) is the subroutine-based index creation process. [Figure 299] This is a diagram illustrating an example of a table structure. [Figure 300]This diagram illustrates the detailed procedure for bit transfer instructions, specifically illustrating the case of reading a single piece of data from a referenced table. [Figure 301] This diagram illustrates the detailed procedure for bit transfer instructions, specifically showing how to read data sequentially from a referenced table. [Figure 302] This diagram illustrates bit transfer instructions for data larger than 1 byte; (A) shows the reference table, and (B) illustrates the procedure. [Figure 303] This diagram illustrates an example of the application of bit transfer instructions. (A) is a diagram illustrating the relationship between variation patterns and their corresponding ranges, (B) is program code showing a variation pattern table, and (C) is a diagram illustrating an example of the structure of the pre-compression and post-compression tables for the variation pattern table corresponding to (B). [Figure 304] This flowchart shows an example of the procedure for selecting a variation pattern. [Figure 305] This figure shows an example of a program for selecting a variation pattern. [Figure 306] This figure shows an example of an address map illustrating the configuration of the memory area of ​​the main control board of a gaming machine. [Figure 307] This figure shows an example of a program implementation of a processing address table, which stores the addresses of processing (subroutines). [Figure 308] This figure shows an example of program code that defines an index to identify the processing stored at an address in the processing address table. [Figure 309] This diagram illustrates the operation when the INVD instruction is executed. [Figure 310] This diagram illustrates the procedure for identifying the process to be called by the INVD instruction. [Figure 311] This figure shows an example program for port reading (PORT_RD). [Figure 312] This figure shows an example program for the data setting process (DAT_SET). [Figure 313]This figure shows an example program for the work area setting process 1 (WORK_AD). [Figure 314] This figure shows an example program for the work area setting process 2 (WORK_AD_INC_HL). [Figure 315] This figure shows an example program for 2-byte data search processing (LD_HLA_HL). [Figure 316] This figure shows example programs for setting the jackpot information command (TDINF_CMBF_SET), setting the command buffer 1 (CMBF_SET1), and storing the command (COM_SET). [Figure 317] This figure shows an example program for output determination common processing 1 (OHAN_SUB1). [Figure 318] This figure shows an example program for output determination common processing 2 (OHAN_SUB2). [Figure 319] This figure shows an example program for the output port data setting process (PORT_DAT_SET). [Figure 320] This figure shows an example program for the variable information number search process (TI_SRCH). [Figure 321] This figure shows an example program for the fraud notification setting process (ILG_OUTSET). [Figure 322] This figure shows an example program for data retrieval processing (HLA_SRCH). [Figure 323] This figure shows an example program for the multiplication value addition address acquisition process (MUL_WA_HL). [Figure 324] This figure shows an example program for SPI 2-byte output processing (SPI_TX__WA). [Figure 325] The diagram shows excerpts of a program that calls processing using the INVS instruction. (A) is an excerpt of the program that calls the solenoid drive processing and motor drive processing, (B) is an example program (partial) of the solenoid drive processing, and (C) is an example program (partial) of the motor drive processing. [Figure 326] This diagram illustrates the procedure for the INVI instruction. [Figure 327]This diagram shows an example of a PSW (Psychiatric Social Worker), with (A) representing the PSW's structure and (B) providing a description of each component. [Figure 328] This diagram shows an example program illustrating the arrangement of processes called by the INVI instruction. (A) shows an example program for the area where the process is read from, and (B) shows an example program for the actual process. [Figure 329] This flowchart shows an example of timer interrupt processing using various processing call commands. [Figure 330] This flowchart shows the procedure for processing when the game stops during timer interrupt processing. [Figure 331] This is an example of program code for handling the game stoppage process in timer interrupt handling. [Figure 332] This figure shows an example of a memory map of the program / data area within the ROM region of the main control board of a gaming machine. [Figure 333] This figure shows an example of program code for the variable pattern selection process (Hp_select). [Figure 334] This figure shows an example of an assembly diagram of the main control board of the gaming machine according to this embodiment. [Figure 335] This is a block diagram of the configuration for performing SPI communication with the main control MPU 1311 of the gaming machine in this embodiment. [Figure 336] This diagram illustrates the operating modes of SPI communication in the gaming machine of this embodiment. [Figure 337] This diagram illustrates the configuration of various registers for setting up SPI communication in the gaming machine of this embodiment, where (A) is control register 1 (SPICNA0), (B) is control register 2 (SPICNA1), and (C) is prescaler registers (SPICPSA0, SPICPSA1, SPICPSA2, SPICPSA3). [Figure 338] This is a time chart showing the state of the gaming machine of this embodiment from the time it is initialized until it can start SPI communication. [Figure 339] This diagram illustrates the configuration of the SPI communication B buffer register in this embodiment. [Figure 340] This figure shows an example of the SPI common output setting data (SPI_COMTX_B) for this embodiment. [Figure 341] This is a circuit diagram focusing on the configuration for receiving signals via SPI communication in the gaming machine of this embodiment. [Figure 342] This flowchart shows an example of a switch input processing procedure for acquiring information detected by sensors and the like in the gaming machine of this embodiment. [Figure 343] This figure shows an example of the program code for the switch input processing in this embodiment, and corresponds to the flowchart in Figure 342. [Figure 344] This is an example of program code for the setting data (SPI input setting data; SPI_SWRX_B) used when starting to receive input signals via SPI communication in this embodiment. [Figure 345] This is an example of program code for the setting data (SPI restart setting data; SPI_RESTART_B) used when initializing the SPI communication circuit in this embodiment. [Figure 346] This figure illustrates an example of SPI switch input information data in this embodiment. [Figure 347] This figure shows an example of the configuration of the area for storing level data and edge data in this embodiment. [Figure 348] This flowchart shows an example of the procedure for the SPI double reading process (TWICE_SPI) in this embodiment. [Figure 349] This figure shows an example of the program code for the SPI double-reading process (TWICE_SPI) in this embodiment, and corresponds to the flowchart in Figure 348. [Figure 350] This flowchart shows the procedure for creating level edge data according to this embodiment. [Figure 351] This figure shows an example of the program code for the level edge data creation process in this embodiment, and corresponds to the flowchart in Figure 350. [Figure 352]This is a time chart showing the process from the start of the switch input processing in this embodiment to the completion of data transmission via SPI communication, in chronological order. [Figure 353] This is a time chart showing the process in chronological order from the completion of data transmission via SPI communication to the start of the switch input process with the next timer interrupt in the switch input processing of this embodiment. [Figure 354] This flowchart shows the procedure for the game-play-ready processing performed by the timer interrupt processing in this embodiment. [Figure 355] This figure shows an example of the program code for the game-play-ready processing in this embodiment, and corresponds to the flowchart in Figure 354. [Figure 356] This diagram shows an example of a circuit diagram extracted from the configuration of the gaming machine of this embodiment, showing the input of signals output from the contact detection sensor (touch sensor) and the firing stop switch (firing stop button) to the main control MPU. [Figure 357] This flowchart shows the procedure for the switch-related control processing in this embodiment. [Figure 358] This diagram illustrates the data structure of the history area creation data in this embodiment. [Figure 359] This figure shows an example of the history area creation data in this embodiment. [Figure 360] This diagram shows the configuration of the data area, which stores the signals input to the main control MPU 1311 in this embodiment. [Figure 361] This flowchart shows the procedure for creating history monitoring switch data in this embodiment. [Figure 362] This is an example of program code for the history monitoring switch data creation process in this embodiment, and corresponds to the flowchart in Figure 361. [Figure 363] This diagram illustrates the process for creating the history monitoring switch data in this embodiment. [Figure 364] This diagram illustrates the data structure of the switch history command transmission determination data in this embodiment. [Figure 365]This figure shows an example of the switch history command transmission determination data in this embodiment. [Figure 366] This figure shows an example of switch history command transmission determination data corresponding to the input edge data of this embodiment. [Figure 367] This flowchart shows the procedure for determining whether to send a switch history command in this embodiment. [Figure 368] This is an example of the program code for the switch history command transmission determination process in this embodiment, and corresponds to the flowchart in Figure 367. [Figure 369] This figure shows an example of the configuration of the internal function registers of the main control MPU in this embodiment. [Figure 370] This figure shows an example of the random clock error history area creation data stored in the internal function register of the main control MPU of this embodiment. [Figure 371] This figure shows an example of applying the switch history command transmission determination data of this embodiment to an internal function register (random clock error). [Figure 372] This diagram illustrates the data structure of the switch pass command data in this embodiment. [Figure 373] This figure shows an example of switch pass command data in this embodiment. [Figure 374] This figure shows an example of switch address data in this embodiment. [Figure 375] This figure shows another example of the switch pass command data in this embodiment. [Figure 376] This flowchart shows the procedure for sending a switch pass command in this embodiment. [Figure 377] This is an example of program code for the switch pass command transmission process in this embodiment, and corresponds to the flowchart in Figure 376. [Figure 378] This flowchart shows the procedure for determining a safety switch malfunction in this embodiment. [Figure 379] This is an example of program code for the safe switch abnormality detection process in this embodiment, and corresponds to the flowchart in Figure 378. [Figure 380] This block diagram shows an example of the connection configuration of connection lines that supply power to various circuit boards that control the gaming machine of this embodiment. [Figure 381] This figure shows an example of an operation for performing the setting function of the gaming machine according to this embodiment. [Figure 382] This is a flowchart of the power-on processing for the gaming machine of this embodiment. [Figure 383] This flowchart shows the procedure for the power-on startup confirmation process in this embodiment. [Figure 384] This flowchart shows the procedure for determining whether the RAM was cleared in this embodiment. [Figure 385] This is an example of program code for the RAM clear determination process in this embodiment, and corresponds to the flowchart in Figure 384. [Figure 386] This flowchart shows the procedure for verifying the set values ​​in this embodiment. [Figure 387] This is an example of program code for the setting value verification process in this embodiment, and corresponds to the flowchart in Figure 386. [Figure 388] This is an example of program code corresponding to the definition of the memory area related to the power-off flag in this embodiment. [Figure 389] This is an example of program code corresponding to the definition of setting values ​​related to the settings of the gaming machine in this embodiment. [Figure 390] This flowchart shows the procedure for determining the setting operation in this embodiment. [Figure 391] This is an example of the program code for the setting operation determination process in this embodiment, and corresponds to the flowchart in Figure 390. [Figure 392] This flowchart shows the procedure for determining open circuit and short circuit abnormalities in this embodiment. [Figure 393] This timing chart illustrates the control system in the event of an unauthorized action in which the power supply is interrupted by disconnecting the wiring connected to the main control board of this embodiment, and then the power supply is restored after the wiring is reconnected, followed by the execution of a setting confirmation operation. [Figure 394]This timing chart illustrates the control system in the event that the power supply is interrupted by disconnecting the wiring connected to the main control board of this embodiment, and then the power supply is restored after the wiring is reconnected, followed by an unauthorized action to perform a setting change operation. [Figure 395] This timing chart illustrates the control process when the wiring connected to the main control board of this embodiment is disconnected, but the power supply is not interrupted, and the wiring is reconnected, and the setting change operation is performed when the power is turned back on to resume gameplay. [Figure 396] This timing chart illustrates the control process in the gaming machine of this embodiment when a wire connected to the main control board is disconnected and then reconnected while a minor error occurs. [Figure 397] This is a timing chart illustrating the control for transitioning to a time-saving state due to special conditions in the gaming machine of this embodiment. [Figure 398] This timing chart illustrates an example of control when the gaming machine of this embodiment is powered on after performing the first operation. [Figure 399] This timing chart illustrates an example of control when the gaming machine of this embodiment is powered on by performing a second operation. [Figure 400] This figure shows an example of a command transmitted from the main control board to the peripheral control board in the gaming machine of this embodiment. [Figure 401] This figure shows an example of screen transitions when transitioning to a time-saving state due to special conditions in the gaming machine of this embodiment. [Figure 402] This figure shows an example of the screen transitions at the end of the time-saving state in the gaming machine of this embodiment. [Figure 403] This diagram shows a modified example of the game board of the gaming machine according to this embodiment. [Figure 404] This figure shows an example of a ball counting slot located on the game board 5 of the gaming machine according to this embodiment. [Figure 405] This figure shows a cross-sectional view of an example of a ball counting input unit arranged in a modified version of the game board of the gaming machine of this embodiment. [Figure 406]This diagram shows the movement path of game balls when the ball counting and ball entry unit of a modified embodiment is in the ball entry permission state, where (A) is a cross-sectional perspective view and (B) is a cross-sectional view. [Figure 407] This diagram shows the movement path of game balls when the ball counting and ball entry unit of a modified embodiment is in a state where ball entry is not permitted, where (A) is a cross-sectional perspective view and (B) is a cross-sectional view. [Figure 408] This is a timing chart showing the change in the time-saving transition count in a modified version of the gaming machine of this embodiment. [Figure 409] This is a timing chart for a modified version of the gaming machine of this embodiment in which the second starting prize entry point functions as a ball counting entry point. [Figure 410] This flowchart illustrates the procedure for determining whether or not to transition to a different game state in the gaming machine of this embodiment. [Figure 411] This flowchart shows the procedure for the state transition process in this embodiment. [Figure 412] This figure shows an example of state transition data in this embodiment. [Figure 413] This figure shows an example configuration of the work area for storing state transition data in this embodiment. [Figure 414] This figure shows a modified example of the state transition data in this embodiment. [Figure 415] This is a timing chart illustrating the control for transitioning to a time-saving state due to special conditions in the gaming machine of this embodiment. [Figure 416] This figure shows an example of the arrangement of values ​​stored in the memory area provided by the main control RAM of the gaming machine of this embodiment. [Figure 417] This diagram illustrates the operation of the RAM clear switch and the memory area that is cleared when a RAM abnormality occurs in the gaming machine of this embodiment. [Figure 418] This figure shows an example of the initial interval transition setting data for big wins that is set when a player wins a special lottery in the gaming machine of this embodiment and transitions to a big win state. [Figure 419]It is a diagram showing an example of big winning opening closing setting data set when closing the big winning opening in the big winning game state of the gaming machine of the present embodiment. [Figure 420] It is a sample module that performs initial settings based on the big winning opening closing setting data in the gaming machine of the present embodiment. [Figure 421] It is a diagram showing an example of a program of the data initialization process (DAT_SET_CLR) of the present embodiment. [Figure 422] It is a sample module that performs initial settings in the conventional procedure based on the big winning opening closing setting data in the gaming machine of the present embodiment. [Figure 423] It is a diagram showing an example of a setting state management area in the gaming machine of the present embodiment and values set in the setting state management area. [Figure 424] It is a diagram showing an example of a table for selecting initialization setting data when initializing the gaming machine of the present embodiment. [Figure 425] It is a time chart showing the output timing of an external output signal related to the time shortening state due to the special condition time shortening in the gaming machine of the present embodiment. [Figure 426] It is a modified example of a time chart showing the output timing of an external output signal related to the time shortening state due to the special condition time shortening in the gaming machine of the present embodiment. [Figure 427] It is a block diagram showing the control configuration of the peripheral control board. [Figure 428A] It is an example of a memory map of a storage area accessed by the VDP. [Figure 428B] It is a diagram explaining the allocation of a storage area provided by the effect data ROM. [Figure 429] It is a flowchart showing the process executed when the peripheral control board is powered on. [Figure 430] It is a diagram showing an example of the configuration of modules and the like used in the effect control by the peripheral control board of the gaming machine of the present embodiment. [Figure 431] It is a diagram explaining the outline of the effect control of the first half variation (normal variation for 12 seconds) of the variation pattern "10H03H". [Figure 432] This figure shows an example of a function in the performance control of the gaming machine according to this embodiment. [Figure 433] This diagram explains the mechanism of 3D display using the lenticular method, with (A) showing the area visible to the left eye (L) and (B) showing the area visible to the right eye (R). [Figure 434] This figure shows an example of a lenticular image in the gaming machine of this embodiment. [Figure 435] This diagram illustrates the arrangement of images stored in the image data area; (A) shows the overall arrangement of the image data area, and (B) shows the detailed arrangement of the area where 3D images are stored. [Figure 436] This diagram illustrates the arrangement of layers on which images are drawn for display on the performance display device of the gaming machine in this embodiment. [Figure 437] This diagram illustrates the procedure for writing an image to be displayed on the display device of the gaming machine of this embodiment to the frame buffer. [Figure 438] This diagram illustrates the procedure for generating a 3D display image (lenticular image) by combining a 3D image with images for the left and right eyes side-by-side onto a side-by-side 2D image (such as a background image). [Figure 439] This diagram illustrates the procedure for creating image data for 3D display effects in the gaming machine of this embodiment. [Figure 440] This is a diagram illustrating the first method for generating side-by-side images. [Figure 441] This diagram illustrates a second method for generating side-by-side images. [Figure 442] This diagram illustrates a third method for generating side-by-side images. [Figure 443] This diagram illustrates the procedure for compositing a full-screen image from side-by-side images. [Figure 444] This figure shows an example of a layer structure when there is only one 3D layer. [Figure 445] This is a flowchart illustrating the procedure for drawing on each layer in the layer structure shown in Figure 444. [Figure 446] This is a diagram showing an example of a layer structure when there are multiple 3D layers. [Figure 447] This is a flowchart explaining the procedure for drawing on each layer in the layer structure of FIG. 446. [Figure 448] This is a diagram showing an example of the screen of the effect selection mode of the gaming machine of the present embodiment. [Figure 449] This is a diagram explaining the procedure for using an image for 3D display effects in the 2D display effect mode in the gaming machine of the present embodiment. [Figure 450] This is a flowchart showing the procedure for using an image for 3D display effects in the 2D display effect mode shown in FIG. 449. [Figure 451] This is a diagram showing an example of an abnormality notification screen to be displayed when an abnormality occurs during the execution of 3D display effects. [Figure 452] This is a timing chart showing the states of each component when the power supply to the main control board is cut off during 3D display effects. [Figure 453] This is a diagram showing an example of screen transition when the power supply to the main control board is cut off during 3D display effects. [Figure 454] This is a timing chart showing the states of each component when the power supply to the peripheral control board is cut off during 3D display effects in the big win gaming state. [Figure 455] This is a diagram showing an example of screen transition when the power supply to the peripheral control board is cut off during 3D display effects in the big win gaming state. [Figure 456] This is a diagram showing an example of a structure for storing frame data for generating a video. [Figure 457] This is a graph showing the relationship between the interval at which one reference frame data is arranged and the data amount. [Figure 458] This is a diagram showing an example of the arrangement of the area for displaying an image. [Figure 459] This is a diagram explaining the images corresponding to each area. The upper part shows the images corresponding to each area, and the lower part shows the generated display image as a result of drawing the images corresponding to all areas. [Figure 460] This is a table showing the configuration information for each area. [Figure 461] This diagram explains the relationships between each layer. [Figure 462] This diagram illustrates the first step in generating a video. [Figure 463] This diagram illustrates the required decoding buffer capacity when generating a video using the first procedure. [Figure 464] This figure shows an example of the spacing of reference frame data when generating a video in the second step. [Figure 465] This diagram illustrates the second step in generating the video. [Figure 466] This diagram illustrates the required decoding buffer capacity when generating a video using the second procedure. [Figure 467] This diagram illustrates the required decoding buffer capacity when generating a video by combining the first and second procedures. [Figure 468] This figure shows an example of image management information. [Figure 469] This is a block diagram showing an excerpt of the configuration for testing external RAM. [Figure 470] This figure shows an example of a command for checking external RAM. [Figure 471] This diagram illustrates the registers configured to perform an external RAM inspection using a RAM diagnostic circuit. [Figure 472] This is a flowchart showing the procedure for checking external RAM (glitch margin check) in the boot program. [Figure 473] This is a flowchart showing the procedure for testing (read / write testing) external RAM in a peripheral control program. [Figure 474] This flowchart shows the procedure for the external RAM inspection process (glitch margin check and R / W test) that is performed after power-on. [Figure 475] This diagram illustrates the types of winning combinations in the gaming machine of this embodiment. [Figure 476]This diagram illustrates the random number generation used for determining a win in the gaming machine of this embodiment, where (A) is pattern 1 and (B) is pattern 2. [Figure 477] This flowchart shows the procedure for detecting fraudulent activity in the gaming machine of this embodiment. [Figure 478] This flowchart shows the procedure for detecting fraudulent activity at the jackpot in the gaming machine of this embodiment. [Figure 479] This flowchart shows the procedure for setting up fraud detection in the gaming machine of this embodiment. [Figure 480] This diagram shows the timing chart when a first win is achieved in the gaming machine of this embodiment. [Figure 481] This diagram shows the timing chart for when a second win occurs in the gaming machine of this embodiment before the number of consecutive first wins reaches the upper limit. [Figure 482] This diagram shows the timing chart for when a second win occurs in the gaming machine of this embodiment. [Figure 483] This is a timing chart explaining the operation of a gaming machine that maintains its game state when a minor win is achieved, specifically when a game ball passes through a particular area upon winning a minor win. [Figure 484] This timing chart explains the timing for updating the number of consecutive time-saving rounds in a gaming machine that transitions to a non-time-saving state (normal game state) when a minor win is achieved. The chart shows the case when the game ball does not pass through a specific area when a minor win is achieved. [Figure 485] This timing chart explains the timing for updating the number of consecutive time-saving rounds in a gaming machine that transitions to a non-time-saving state when a minor win is achieved. The chart shows the case when a game ball passes through a specific area after a minor win is achieved. [Figure 486] This timing chart shows an improved timing for updating the number of consecutive time-saving rounds in a gaming machine that transitions to a non-time-saving state when a minor win is achieved, specifically illustrating the case when a game ball passes through a specific area when a minor win is achieved. [Figure 487]This timing chart explains the behavior of a gaming machine in which, upon winning a minor prize, the game transitions to a non-shortened time state, and after the special game state resulting from the minor prize ends, a special game state resulting from a major prize begins, when a game ball passes through a specific area upon winning a minor prize. [Figure 488] This diagram illustrates the types of variation pattern tables that are set when the special symbols of the gaming machine of this embodiment are displayed in a variation pattern. [Figure 489] This figure shows an example of a pattern in which a variable pattern table is selected based on the remaining number of times until the maximum number of consecutive time-saving states can occur. [Figure 490] This figure shows an example of the type of random number and the range of random values ​​obtained when a game ball enters the starting slot. [Figure 491] This diagram shows an example of the range in which the special lottery results for each setting of the gaming machine will result in a jackpot. [Figure 492] This flowchart shows the procedure for controlling special symbols and special electric features in the gaming machine of this embodiment. [Figure 493] This flowchart shows the procedure for waiting for special symbol variations in the gaming machine of this embodiment. [Figure 494] This flowchart shows the procedure for setting special symbols and flags in the gaming machine of this embodiment. [Figure 495] This flowchart shows the procedure for determining special symbols in the gaming machine of this embodiment. [Figure 496] This diagram illustrates the means for determining the lottery results. (A) is a table for determining the result of the special symbol 2 fluctuation display (special lottery) when the game machine is set to 6 in a high-probability state. (B) is a table for determining the result of the special symbol 2 fluctuation display (special lottery) when the game machine is set to 1 in a high-probability state. (C) is a table for determining the result of the special symbol 1 fluctuation display (special lottery) when the game machine is set to 6 in a high-probability state. (D) is a table for determining the result of the special symbol 2 fluctuation display (special lottery) when the game machine is set to 6 in a low-probability state. (E) is a table for determining the result of the special symbol 2 fluctuation display (special lottery) when the game machine is set to 1 in a low-probability state. [Figure 497] This diagram illustrates the process by which some bits of the random number used for determining a jackpot are changed due to factors such as noise, resulting in a value outside the normal range. [Figure 498] This figure shows an example of data used for determining special symbols; (A) shows the case of special symbol 1, and (B) shows the case of special symbol 2. [Figure 499] This diagram explains the types of symbols that correspond to the special symbol random numbers, with (A) showing the case of special symbol 1 and (B) showing the case of special symbol 2. [Figure 500] This flowchart shows an example of the procedure for setting special symbol variation patterns. [Figure 501] This flowchart shows an example of the procedure for determining the selection of a variation pattern. [Figure 502] This figure shows an example of reach variation pattern selection data. [Figure 503] This diagram illustrates the comparative values ​​used to operate the excessive prize ball suppression mechanism. [Figure 504] This figure shows an example of a table illustrating the relationship between commands and remaining quantities. [Figure 505] This is a timing chart explaining the process of releasing the game suspension using the first game suspension release method. [Figure 506] This is a timing chart explaining the process of releasing the game suspension using the second game suspension release method. [Figure 507] This timing chart shows an example of a control mechanism that resets the game when the power is turned back on when the door is opened. [Figure 508] This timing chart shows an example of a control system that does not resume gameplay by restarting the power supply when the door is closed. [Figure 509] This timing chart shows an example of a control system that performs a setting change while opening the door after the game has stopped. [Figure 510] This timing chart shows an example of a control system where the door is opened while the settings are changed after the game stops, and then the door is closed after the game machine is started up again. [Figure 511]This timing chart shows an example of a control system that performs a setting change while closing the door after the game has stopped. [Figure 512] This timing chart shows an example of a control system that performs a settings check while opening the door after the game has stopped. [Figure 513] This timing chart shows an example of a control system that performs a settings check while closing the door after the game has stopped. [Figure 514] This timing chart shows an example of a control system where opening the door is used as a condition for releasing the game stop and for initiating a setting change. [Figure 515] This figure shows an example configuration for performing a bell-ringing effect in the gaming machine of this embodiment. [Figure 516] This is a front view (surface view of the door frame) of a pachinko machine, which is one embodiment of the present invention. [Figure 517] This diagram shows a disc unit including the control panel. (A) is a front view of the disc unit in its normal state, (B) is a front view of the disc unit when the pressing control panel is in the raised position, and (C) is a front view of the disc unit when the central pressing control panel of the pressing control panel is pressed. [Figure 518] This diagram shows the initial position of the control panel; (A) is a plan view, and (B) is a cross-sectional view taken from a plane including the center. [Figure 519] This diagram shows the raised position of the control panel; (A) is a plan view, and (B) is a cross-sectional view taken from a plane including the center. [Figure 520] This diagram illustrates the operation of the rotary control unit when the pressing control unit is lifted. (A) shows the state in which the pressing control unit is lifted, and (B) shows the state in which the rotary control unit has rotated due to the lifting of the pressing control unit. [Figure 521] This diagram shows an example of the screen transitions that occur when one worshipper successfully rings the bell once. [Figure 522] This diagram shows an example of the screen transitions that occur when a worshipper attempts to ring the bell once and fails. [Figure 523]This diagram illustrates the amount of rotation of the rotating control unit and the movement of the bell in a bell-ringing performance, corresponding to the intensity of the bell strike. (A) represents a "strong" intensity, (B) represents a "medium" intensity, (C) represents a "weak" intensity, and (D) represents a failure where the bell cannot be struck because the intensity is below a predetermined level. [Figure 524] This diagram shows an example of screen transitions when the intensity of the bell-ringing is specified in a bell-ringing animation where each worshipper rings the bell once. [Figure 525] This diagram shows an example of the screen transitions in a bell-ringing animation where multiple worshippers successively ring the bell. [Figure 526] This figure shows an example configuration for executing the bell-ringing point effect in the gaming machine of this embodiment. [Figure 527] This diagram explains the settings for point-based effects. [Figure 528] This diagram illustrates the progression of points earned from the start of the point-earning event. [Figure 529] This figure shows an example of screen transitions for point-based presentations. [Figure 530] This diagram shows an example of a pre-announcement animation that is executed based on the total points earned through point-based animations. (A) shows the case when the total points are 0, (B) shows the case when the total points are 20, and (C) shows the case when the total points are 50. [Figure 531] This figure shows an example of the intensity of bell-ringing based on the attributes of the worshippers. [Figure 532] This diagram illustrates the progression of points earned from the start of the point-scoring event when the intensity of bell-ringing is specified based on the attributes of the worshippers. [Figure 533] This flowchart shows the first half of the procedure for processing when the power is turned on to the payout control unit. [Figure 534] This flowchart shows the latter half of the procedure for processing when the power is turned on to the payout control unit. [Figure 535] This flowchart shows the procedure for the prize ball control process. [Figure 536] This flowchart shows an example of the procedure for updating the reference value counter. [Figure 537]This flowchart shows the procedure for RAM clear determination processing corresponding to the initialization of a reference value (comparison value) based on a game stop error flag. [Figure 538] This figure shows an example of advance notification for the excessive prize ball suppression mechanism (complete function). [Figure 539] This figure shows an example of notification of the operation of the excessive prize ball suppression mechanism. [Figure 540] This figure shows an example of screen transitions when the excessive prize ball suppression mechanism is activated after the jackpot game state ends. [Figure 541] This figure shows an example of screen transitions when the pre-notification conditions and activation conditions are met during a jackpot game state, and the excessive prize ball suppression mechanism is activated after the jackpot game state ends. [Figure 542] This diagram shows an example of a screen displaying a malfunction in a gaming machine while the pre-notification of the excessive prize ball suppression mechanism is being performed. (A) shows the state when the malfunction occurs, and (B) shows the state after the machine has recovered due to power interruption and re-powering. [Figure 543] This flowchart shows the procedure for power-on processing in the gaming machine of this embodiment. [Figure 544] The diagrams show an overview of the memory area layout. (A) is a schematic diagram of the memory area layout, (B) is a dump list when the starting address outside the game area is "5060h", and (C) is a dump list when the starting address outside the game area is "5065h". [Figure 545] This flowchart shows the procedure for processing at the start of a game. [Figure 546] This flowchart shows the procedure for processing when setting up the game to start. [Figure 547] This is a flowchart showing the procedure for setting up excessive prize ball suppression. [Figure 548] This flowchart shows the procedure for determining when to stop the game. [Figure 549] This figure shows an example of program code for determining when to stop a game. [Figure 550] This diagram illustrates whether or not the mechanism for suppressing excessive prize balls, corresponding to the progress of the game, can be activated. [Figure 551]This is a flowchart showing the procedure for handling timer interrupts. [Figure 552] This flowchart shows the procedure for the game-play-ready processing performed by the timer interrupt processing in this embodiment. [Figure 553] This flowchart outlines the procedure for the performance display monitoring process executed by the timer interrupt processing in this embodiment. [Figure 554] This is a flowchart showing the procedure for suppressing excessive prize balls. [Figure 555] This figure shows an example of a target switch information data table. [Figure 556] This is a flowchart showing the procedure for adding the reference value. [Figure 557] This flowchart shows the procedure for subtracting the reference value. [Figure 558] This diagram illustrates an example of how to skip a specific animation sequence after a reach occurs by operating a control device during that sequence. [Figure 559] This is a timing chart corresponding to the example performance shown in Figure 558. [Figure 560] This diagram illustrates another example of how to skip a specific animation sequence after a reach has occurred by operating a control device during that sequence. [Figure 561] This is a timing chart corresponding to the example performance shown in Figure 560. [Figure 562] This figure shows an example where a prompt to take action is displayed after a reach occurs, and the animation changes depending on whether or not an action is taken. [Figure 563] This is a timing chart corresponding to the example performance shown in Figure 562. [Figure 564] This figure shows an example of a penalty animation that is executed when an input is not received in a configuration that requires operation by a single means of operation. [Figure 565] This is a timing chart corresponding to the example performance shown in Figure 564. [Figure 566] This diagram shows an example of a performance animation that executes a penalty animation when an operation input is not accepted in a configuration that requires operation of multiple types of operation means. [Figure 567] This is a timing chart corresponding to the example performance shown in Figure 566. [Figure 568] This figure shows an example of a performance (first half) that includes configurations requiring the operation of a single type of operating means and the operation of multiple types of operating means. [Figure 569] This figure shows an example of a performance (second half) that includes configurations requiring the operation of a single type of operating means and the operation of multiple types of operating means. [Figure 570] These are timing charts corresponding to the performance examples shown in Figures 568 and 569. [Figure 571] This figure shows an example of the relationship between the pattern variation and the visual effects. [Figure 572] This diagram shows an example of the screen layout for a long jump event. [Figure 573] This diagram shows an example of character movements for a long jump performance. [Figure 574] This figure shows an example of a display mode corresponding to the expectation level of a character in a long jump performance. [Figure 575] This diagram shows an example of the layer configuration for the long jump animation. [Figure 576] This figure shows an example of information used to define the layers when displaying images in a long jump animation. [Figure 577] This diagram illustrates the layer arrangement (display hierarchy) in the gaming machine of this embodiment. [Figure 578] This figure shows an example of image data stored in an image ROM. [Figure 579] This diagram illustrates the procedure for combining layers and creating a display screen. [Figure 580] This diagram shows an example of a screen transition where the layer on which an object is displayed does not change from the time the object is shown until it is hidden. [Figure 581] This diagram illustrates the layer switching timing for the effects shown in Figure 580. [Figure 582]This figure shows an example of a screen transition in an animation where the layer on which an object is displayed changes from the time the object is shown until it is hidden. [Figure 583] Figure 582 illustrates the timing of the layer switching in the effects shown. [Figure 584] This diagram illustrates a performance pattern in which a special effect is executed after transitioning to a specific state. [Figure 585] This diagram shows the screen transitions when an animation is executed across multiple pattern changes. [Modes for carrying out the invention]

[0010] A pachinko machine 1, which is one embodiment of the present invention, will be described in detail with reference to the drawings. First, the overall configuration of the pachinko machine 1 of this embodiment will be described with reference to Figures 1 to 9. Figure 1 is a front view of the pachinko machine, which is one embodiment of the present invention. Figure 2 is a right side view of the pachinko machine, Figure 3 is a top view of the pachinko machine, and Figure 4 is a rear view of the pachinko machine. Figure 5 is a perspective view of the pachinko machine from the front, and Figure 6 is a perspective view of the pachinko machine from the rear. Figure 7 is a perspective view of the pachinko machine from the front with the door frame 3 open from the main frame and the main frame 4 open from the outer frame 2. Figure 8 is an exploded perspective view of the pachinko machine from the front with the pachinko machine disassembled into the door frame 3, game board 5, main frame 4, and outer frame 2, and Figure 9 is an exploded perspective view of the pachinko machine from the rear with the pachinko machine disassembled into the door frame 3, game board 5, main frame 4, and outer frame 2.

[0011] The pachinko machine 1 of this embodiment comprises a frame-shaped outer frame 2 installed on an island (not shown) in a gaming hall, a door frame 3 that can be opened and closed to close the front of the outer frame 2, a main body frame 4 that can be opened and closed to support the door frame 3 and is also attached to the outer frame 2 in an open and closed manner, and a game board 5 that is detachably attached to the main body frame 4 from the front and is visible to the player through the door frame 3, and has a game area 5a into which the player puts game balls.

[0012] As shown in Figures 8 and 9, the outer frame 2 of the pachinko machine 1 comprises an upper frame member 10 and a lower frame member 20 that are spaced apart vertically and extend horizontally, and a left frame member 30 and a right frame member 40 that connect both ends of the upper frame member 10 and the lower frame member 20 and extend vertically. The upper frame member 10, the lower frame member 20, the left frame member 30, and the right frame member 40 are formed to have the same width from front to back. In addition, the vertical length of the left frame member 30 and the right frame member 40 is longer than the horizontal length of the upper frame member 10 and the lower frame member 20.

[0013] Furthermore, the outer frame 2 includes a fascia member 50 that connects the lower ends of the left frame member 30 and the right frame member 40 and is attached to the front side of the lower frame member 20, an outer frame side upper hinge member 60 attached to the left end side of the upper frame member 10 when viewed from the front, and an outer frame side lower hinge member 70 attached to the upper left end of the fascia member 50 when viewed from the front and to the left frame member 30. The outer frame side upper hinge member 60 and the outer frame side lower hinge member 70 of the outer frame 2 allow the main frame 4 and the door frame 3 to be opened and closed.

[0014] The door frame 3 of the pachinko machine 1 comprises a frame-shaped door frame base unit 100 having a rectangular outer shape when viewed from the front and a through-hole 111 that penetrates from front to back; a tray unit 200 attached to the lower front of the door frame base unit 100 and having an upper tray 201 and a lower tray 202 capable of storing game balls; a top unit 350 attached to the upper front of the door frame base unit 100; a left side unit 400 attached to the left front of the door frame base unit 100; a right side unit 450 attached to the right front of the door frame base unit 100; and an upper tray attached to the lower right front of the door frame base unit 100, penetrating the tray unit 200. The machine includes a handle unit 500 that can be operated by the player to launch game balls stored in 201 into the game area of ​​the game board 5, a foul cover unit 520 attached to the lower rear of the door frame base unit 100 to receive game balls that miss into the game area and discharge them into the lower tray 202 of the tray unit 200, a ball feeding unit 540 attached to the lower rear of the door frame base unit 100 to send game balls from the upper tray 201 to the ball launching device 680, a glass unit 560 attached to the rear of the door frame base unit 100 to close the through-hole 111, and a security cover 580 that covers the lower rear of the glass unit 560.

[0015] The main frame 4 of the pachinko machine 1 comprises a frame-shaped main frame base 600 that is partially insertable into the frame of the outer frame 2 and capable of supporting the outer circumference of the game board 5; upper hinge member 620 and lower hinge member 640 attached to the upper and lower ends of the left side of the main frame base 600 in a front view, and rotatably attached to the upper hinge member 60 and lower hinge member 70 of the outer frame 2, respectively, and rotatably attached to the upper hinge member 140 and lower hinge member 150 of the door frame 3, respectively; a reinforcing frame 660 attached to the left side of the main frame base 600 in a front view; and a lower front part attached to the lower front of the main frame base 600. The game board 5 is equipped with a ball launching device 680 for launching game balls into the game area 5a of the game board 5, a locking unit 700 attached to the right side of the main frame base in a front view for locking the space between the outer frame 2 and the main frame 4, and between the door frame 3 and the main frame 4, an inverted L-shaped dispensing unit 800 attached to the rear side along the upper and left edges of the main frame base 600 in a front view for dispensing game balls towards the player, a circuit board unit 900 attached to the lower rear surface of the main frame base 600, and a back cover 980 that is attached to the rear of the main frame base 600 so as to be openable and closable and covers the rear side of the game board 5 attached to the main frame base 600.

[0016] Inside the back cover 980 is a main control unit 1300 that controls the progress of the game played on the pachinko machine 1. The main control unit 1300 is equipped with a prize ratio indicator. The prize ratio indicator 1317 is composed of, for example, a 4-digit 7-segment LED. The prize ratio indicator 1317 may also be composed of a liquid crystal display. Alternatively, the prize ratio indicator 1317 may be provided in the payout control board unit 950 instead of the main control unit 1300.

[0017] Alternatively, instead of providing a separate display device for showing the payout ratio, the payout ratio may be displayed on the liquid crystal display devices 1600, 3114, and 244. In this case, if the payout ratio is constantly displayed on any of the liquid crystal display devices 1600, 3114, or 244, the payout ratio can be notified to the player, allowing the player to check the condition of the pachinko machine.

[0018] As will be explained later, the payout ratio can be calculated by dividing the number of balls won through payouts by the total number of balls won. For example, a pachinko machine with a high payout ratio (e.g., 90%) is considered to be performing well because it is winning a lot of prize balls through big wins. On the other hand, a pachinko machine with a low payout ratio (e.g., 10%) is considered to be performing poorly because it is winning less often and the prize balls won during big wins are small. Therefore, players can choose a pachinko machine to play by considering the payout ratio.

[0019] As a way of informing the player of the payout ratio, the numerical value of the payout ratio may be displayed on the main LCD display device 1600. For example, if the payout ratio is 70% or higher, the numerical value may be displayed in red and the frame lamp may light up or flash red; if it is between 69% and 30%, the numerical value may be displayed in green and the frame lamp may light up or flash green. The numerical value of the payout ratio should be displayed in a manner that does not cause confusion with the decorative symbols. For example, it may be displayed in a position that does not overlap with the display position of the decorative symbols when they are not changing, or the size of the number indicating the payout ratio may be smaller than that of the decorative symbols. The display manner may be divided into any number of stages.

[0020] Furthermore, the appearance of the decorative symbols displayed on the main LCD display device 1600 may be changed according to the value of the prize ratio to inform the player of the prize ratio. For example, if the prize ratio is 70% or higher, the decorative symbols may be displayed in red and the frame lamp may light up or flash red; if it is between 69% and 30%, the decorative symbols may be displayed in green and the frame lamp may light up or flash green. The display patterns may be divided into any number of stages.

[0021] Alternatively, the information may be displayed on the liquid crystal display device 244 provided in the door frame 3. In this case, the display method described above may be changed, and the information may be displayed not only on the payout ratio but also on other information. Other information may include the number of jackpots, the number of consecutive jackpots (so-called consecutive wins), the number of balls held, and the remaining balance.

[0022] Furthermore, not only the bonus payout ratio, but also the consecutive bonus payout ratio and base value, which will be discussed later, may be displayed in the manner described above. The bonus payout ratio, consecutive bonus payout ratio, and base value may each be displayed in different ways.

[0023] As shown in Figure 13, the main control unit 1300 is enclosed in a transparent resin main control board box 1320, which is sealed in a way that prevents it from being opened without being destroyed once closed, allowing the components on the printed circuit board to be seen from the outside. Furthermore, if, for example, the back cover 980 is made of transparent resin, the main control unit 1300 can be seen from the back of the pachinko machine 1, and the prize ratio indicator 1317 provided on the main control unit 1300 can be seen from the back of the pachinko machine 1. By enclosing the prize ratio indicator 1317 in the main control board box 1320, it is possible to prevent unauthorized modification of the prize ratio indicator 1317 to make the gambling aspect of the pachinko machine 1 appear lower, and to display the accurate gambling aspect of the pachinko machine 1.

[0024] If the back cover 980 is made of opaque resin, the payout ratio indicator 1317 may be made visible from the back of the pachinko machine 1 by making a hole in the back cover 980 at the location of the payout ratio indicator 1317 or by making the area at the location of the payout ratio indicator 1317 transparent.

[0025] Furthermore, even if the back cover 980 is made of transparent resin, the surface of the back cover 980 at the location of the prize ratio indicator 1317 may be made flat, or the back cover 980 may be made thin, to make the prize ratio indicator 1317 easier to see from the back side of the pachinko machine 1.

[0026] On the lower back of the pachinko machine 1, there is an outlet that collects the game balls that have flowed out of the game area 5a via the out-out opening 1111 and the winning openings 2001, 2005, 2006, etc., and discharges them to the outside of the pachinko machine 1. The game balls discharged from the outlet are supplied to the ball tank 802 via the island equipment. The pachinko machine 1 in this embodiment is equipped with a discharged ball sensor 3060 that detects the game balls being discharged from the outlet.

[0027] As shown in Figure 13, the main control unit 1300 is provided with a display switch 1318. The main control board box 1320 is provided with a hole through which the display switch 1318 can be operated. It is preferable to indicate (print, engrave, sticker, etc.) on the printed circuit board near the display switch 1318 or on the main control board box 1320 that it is a switch for operating the display of the prize ratio. It is desirable to provide the display switch 1318 near the prize ratio indicator 1317, but it may be provided on other boards (e.g., the performance control board 4700, the power supply unit 4112), the housing 4100, or the front member 4200, as long as it is in an easily accessible location, rather than on the main control unit 1300. It may also be provided on the peripheral control unit 1500, a relay board provided separately from the main control unit 1300, the power supply board in the power supply board box 930 on the frame side, or the payout control board unit 950. Furthermore, as will be described later, the display switch 1318 may also be used as a RAM clear switch. By placing the display switch 1318 in a position where it cannot be operated by the player, accidental operation by the player can be prevented.

[0028] The dispensing unit 800 of the main frame 4 includes an inverted L-shaped dispensing unit base 801 attached to the rear side of the main frame base 600, a ball tank 802 attached to the top of the dispensing unit base 801 and extending to the left and right, open upwards, for storing game balls supplied from island equipment (not shown), a tank rail 803 attached to the dispensing unit base 801 below the ball tank 802 and extending to the left and right to guide the game balls in the ball tank 802 to the left in a front view, a ball guidance unit 820 attached to the rear side of the upper left side of the dispensing unit base 801 and guiding the game balls from the tank rail 803 downwards in a meandering manner, and a dispensing control board unit 9 attached to the bottom of the ball guidance unit 820 and detachably attached to the dispensing unit base 801, which controls the game balls guided by the ball guidance unit 820. The system includes a dispensing device 830 that dispenses game balls one by one based on instructions from a dispensing control board 951 (see Figure 17) housed in 50; an upper full-tank ball path unit 850 attached to the rear surface of the dispensing unit base 801 that guides the game balls dispensed by the dispensing device 830 downwards and discharges the game balls from either a normal discharge port or a full-tank discharge port depending on the storage state of the game balls in the upper tray 201 of the tray unit 200; and a lower full-tank ball path unit 860 attached to the lower end of the dispensing unit base 801 that has a normal guide path that guides game balls discharged from the normal discharge port of the upper full-tank ball path unit 850 forward and from the front end to the penetrating ball passage 526 of the door frame 3, and a full-tank guide path that guides game balls discharged from the full-tank discharge port forward and from the front end to the full-tank ball receiving port 530 of the door frame 3.

[0029] The main body frame 4's circuit board unit 900 comprises a circuit board unit base 910 mounted on the rear side of the main body frame base 600, a speaker unit 920 mounted on the rear side of the main body frame base 600 on the left side of the circuit board unit base 910 in a front view and having a low-frequency speaker 921 inside, a power supply board box 930 mounted on the right side of the rear side of the circuit board unit base 910 in a front view and housing a power supply board inside, an interface control board box 940 mounted on the rear side of the speaker unit 920 and housing an interface control board inside, and a payout control board unit 950 mounted across the power supply board box 930 and the interface control board box 940 and housing a payout control board 951 that controls the payout of game balls inside.

[0030] As shown in Figures 8 and 9, the game board 5 of the pachinko machine 1 includes a front component 1000 which has an outer rail 1001 and an inner rail 1002 that demarcate the outer perimeter of the game area 5a into which the game balls are fired and guide the game balls fired from the ball launching device 680 to the upper part of the game area 5a; a flat game panel 1100 which is attached to the rear side of the front component 1000 and demarcates the rear end of the game area 5a; and a box-shaped which is attached to the lower rear side of the game panel 1100 and is open to the top. The system comprises a circuit board holder 1200, a main control unit 1300 mounted on the rear side of the circuit board holder 1200 and having a main control board 1310 for controlling the gameplay of the pachinko machine 1, a front unit (not shown) mounted in the game area 5a on the front side of the game panel 1100 and having a plurality of prize slots capable of receiving game balls that have been played into the game area 5a, and a back unit 3000 mounted on the rear side of the game panel 1100 above the circuit board holder 1200.

[0031] In this embodiment of the pachinko machine 1, with game balls stored in the upper tray 201, when a player rotates the handle lever 504, the ball launching device 680 launches game balls into the game area 5a of the game board 5 with a force corresponding to the rotation angle of the handle lever 504. When the game balls launched into the game area 5a are received into a prize slot (not shown), a predetermined number of game balls are dispensed into the upper tray 201 by the dispensing device 830, according to the prize slot into which they were received. This dispensing of game balls enhances the player's enjoyment, allowing them to launch the game balls in the upper tray 201 into the game area 5a and enjoy the game.

[0032] [2. Overall configuration of the game board] Next, the overall configuration of the game board 5 of the pachinko machine 1 will be described in detail with reference to Figures 10 to 16. Figure 10 is a front view of the game board. Figure 11 is a perspective view of the game board from the front right, Figure 12 is a perspective view of the game board from the front left, and Figure 13 is a perspective view of the game board from the rear. Furthermore, Figure 14 is an exploded perspective view of the game board disassembled into its main components and viewed from the front, and Figure 15 is an exploded perspective view of the game board disassembled into its main components and viewed from the rear. In addition, Figure 16 is a front view of the front components and front unit of the game board, cut approximately in the center in the front-to-back direction within the game area.

[0033] The game board 5 of this embodiment has a game area 5a into which game balls are driven when a player operates the handle lever 504 of the handle unit 500. The game board 5 also includes a front component 1000 that demarcates the outer periphery of the game area 5a and has an outer shape that is approximately rectangular when viewed from the front, a plate-shaped game panel 1100 attached to the rear side of the front component 1000 and demarcates the rear end of the game area 5a, a circuit board holder 1200 attached to the lower rear side of the game panel 1100, and a main control unit 1300 attached to the rear surface of the circuit board holder 1200 and having a main control board 1310 (see Figure 17) that controls the game content performed by driving game balls into the game area 5a. Multiple obstacle nails that come into contact with the game balls are planted in a predetermined gauge arrangement in the part of the front of the game panel 1100 that is within the game area 5a (not shown).

[0034] Furthermore, the game board 5 includes a function display unit 1400 that displays the game status based on control signals from the main control board 1310 and is mounted on the lower left corner of the front component 1000 so that it is visible to the player, a peripheral control unit 1500 mounted on the rear side of the game panel 1100, a main liquid crystal display device 1600 that is positioned in the center of the game area 5a when viewed from the front and is capable of displaying predetermined performance images, a front unit 2000 mounted on the front of the game panel 1100, and a rear unit 3000 mounted on the rear side of the game panel 1100. The main liquid crystal display device 1600 is mounted on the rear side of the rear unit 3000, and the peripheral control unit 1500 is mounted on the rear side of the main liquid crystal display device 1600.

[0035] The game panel 1100 comprises a transparent, flat panel plate 1110 whose outer circumference is slightly larger than the inner circumference of the frame-shaped front component 1000, and a frame-shaped panel holder 1120 which holds the outer circumference of the panel plate 1110 and is attached to the rear side of the front component 1000, with a back unit 3000 attached to its rear surface.

[0036] The front unit 2000 includes a plurality of general prize slots 2001 that are always open to receive game balls that have been driven into the game area 5a, a first start slot 2002 that is always open to receive game balls at a different location within the game area 5a from the plurality of general prize slots 2001, a gate unit 2003 that is installed at a predetermined location within the game area 5a and detects the passage of game balls, a second start slot 2004 that can receive game balls according to the result of a normal lottery drawn when a game ball passes through the gate unit 2003, and a first major prize slot 2005 and a second major prize slot 2006 that can receive game balls according to the result of a first special lottery drawn when a game ball is received into the first start slot 2002 or the second start slot 2004. The second major prize slot 2006 consists of two major prize slots, the second upper major prize slot 2006a and the second lower major prize slot 2006b, which are located in a single channel through which the game balls circulate (see Figure 16).

[0037] Furthermore, the front unit 2000 includes a start-up unit 2100 mounted in the center of the left-right direction within the game area 5a, directly above the out-up opening 1111, and having a first start-up opening 2002 and a first major prize-winning opening 2005; a lower side unit 2200 mounted along the inner rail 1002 to the left of the start-up unit 2100 in a front view, and having three general prize-winning openings 2001; an upper side unit 2300 mounted above the left end of the lower side unit 2200 in a front view; and a frame-shaped center mechanism 2500 mounted approximately in the center of the game area 5a, having one general prize-winning opening 2001, a gate section 2003, a second start-up opening 2004, and a second major prize-winning opening 2006.

[0038] The back unit 3000 is a box-shaped back box 3010 attached to the rear surface of the panel holder 1120, with an open front and a square opening 3010a in its rear wall; multiple general prize slot sensors 3015 positioned in predetermined locations within the back box 3010 to detect game balls received into the general prize slot 2001 of the front unit 2000; and a locking mechanism attached to the rear surface of the back box 3010 for detachably mounting the main liquid crystal display device 1600. The unit comprises 3020, a right ball passage unit 3030 which is attached to the rightmost part of the back box 3010 in a front view and discharges game balls received into the general prize entry opening 2001 and the second start opening 2004 of the center mechanism 2500, and a lower right ball passage unit 3035 which is attached near the front end of the lower right corner of the back box 3010 in a front view and discharges game balls received into the second large prize entry opening 2006 and the second out opening 2543c of the center mechanism 2500.

[0039] Furthermore, the rear unit 3000 includes an upper relay board 3040 mounted on the rear surface of the rear box 3010, an upper relay board cover 3041 covering the rear side of the upper relay board 3040, a box-shaped performance drive board box 3042 rotatably mounted on the rear surface of the rear box 3010, a performance drive board 3043 housed inside the performance drive board box 3042, a panel relay board 3044 mounted on the rear surface of the rear box 3010, and a panel relay board cover 3045 covering the rear side of the panel relay board 3044.

[0040] Furthermore, the back unit 3000 includes a back left center decorative unit 3050 mounted at the front end of the back box 3010, slightly above the center in the vertical direction on the left side when viewed from the front; a back lower rear movable display unit 3100 mounted below the opening 3010a inside the back box 3010, near the rear wall of the back box 3010; a back upper left movable display unit 3200 mounted above the opening 3010a inside the back box 3010, on the left side when viewed from the front; a back left movable display unit 3300 mounted on the left side of the opening 3010a inside the back box 3010 when viewed from the front; a back upper center movable display unit 3400 mounted above the opening 3010a inside the back box 3010, extending from the center in the horizontal direction to the right edge when viewed from the front; and a back lower front movable display unit 3500 mounted below the opening 3010a inside the back box 3010, in front of the back lower rear movable display unit 3100.

[0041] [2-1. Front Components] Next, the front component 1000 will be described mainly with reference to Figures 14 and 15. The front component 1000 has an outer shape that is approximately square when viewed from the front, and an inner shape that is approximately circular and penetrates in the front-to-back direction, with the inner circumference of the inner shape defining the outer perimeter of the game area 5a. This front component 1000 includes an outer rail 1001 that extends in an arc shape along the circumferential direction clockwise from the lower end slightly to the left of the center in the front view, passing over the upper end of the center in the front view and extending to the upper right diagonally; an inner rail 1002 that is positioned inside the front component 1000, approximately along the outer rail 1001, and extends in an arc shape from the lower center in the front view to the upper left diagonally; and an out-guiding section 1003 that is formed at the lowest point of the game area 5a on the right side of the lower end of the inner rail 1002 in the front view and is inclined to be lower toward the rear.

[0042] Furthermore, the front component 1000 includes a right lower rail 1004 that slopes linearly from the right end of the out guide section 1003 in a front view to the vicinity of the right edge of the front component 1000 such that the right end is slightly higher; a right rail 1005 that extends from the right end of the right lower rail 1004 along the right edge of the front component 1000 to the lower side of the upper end of the outer rail 1001, with its upper part curved inward from the front component 1000; and a stopper section 1006 that connects the upper end of the right rail 1005 to the upper end of the outer rail 1001, and which comes into contact with the game ball that has rolled along the outer rail 1001.

[0043] Furthermore, the aforementioned component 1000 is pivotally supported at the upper end of the inner rail 1002 and includes a backflow prevention member 1007 that is rotatable only between a closed position extending upward from the upper end of the inner rail 1002 to close the gap between it and the outer rail 1001, and an open position that rotates clockwise in a front view to open the gap between it and the outer rail 1001, and is biased by a spring (not shown) to return to the closed position.

[0044] A launch ball sensor 1020 for detecting game balls launched into the game area 5a is provided on the back side of the game board 5 near the exits of rails 1001 and 1002 (preferably immediately after passing the backflow prevention member 1007). For example, the launch ball sensor 1020 is composed of a magnetic sensor and outputs a signal when it detects a game ball that has passed through the backflow prevention member 1007 and flowed into the game area 5a. The launch ball sensor 1020 may also be installed at a position within the game area that a game ball is guaranteed to pass through. By fixing the position of the launch ball sensor 1020 on the game board 5, specifications can be standardized across multiple models, making inspections at the manufacturing site and post-installation inspections at the hall easier.

[0045] Furthermore, the launch ball sensor 1020, located upstream of the game area 5a, such as near the exits of rails 1001 and 1002, detects out balls before the prize entry sensor detects a prize ball entering the game area. In other words, since game balls are detected in the order of out balls followed by prize balls, prize balls resulting from game balls that were not counted as out balls are not detected, allowing for accurate calculation of the base value.

[0046] [2-2. Game Panel] Next, the game panel 1100 will be described mainly with reference to Figures 14 and 15. The game panel 1100 comprises a flat panel plate 1110 made of transparent synthetic resin, the outer circumference of which is formed to be slightly larger than the inner circumference of the frame-shaped front component 1000, and a frame-shaped panel holder 1120 which holds the outer circumference of the panel plate 1110 and is attached to the rear side of the front component 1000, and to which the back unit 3000 is attached. The panel plate 1110 of the game panel 1100 has an out opening 1111 that penetrates from front to back at the lowest position within the game area 5a. In addition, the panel plate 1110 has multiple openings 1112 that penetrate from front to back for attaching the front unit 2000.

[0047] The panel holder 1120 of the game panel 1100 holds the panel plate 1110 in a detachable manner from the rear. The panel holder 1120 also has multiple mounting holes and positioning holes formed on its rear surface for attaching the back unit 3000.

[0048] When the game panel 1100 is attached to the rear side of the front component 1000, the out opening 1111 of the panel plate 1110 opens behind the out guide section 1003 of the front component 1000. As a result, the game balls that have flowed down to the lower end of the game area 5a are guided by the out guide section 1003 to the rear out opening 1111 and discharged to the rear side of the game panel 1100 through the out opening 1111.

[0049] [2-3. PCB holder] Next, the circuit board holder 1200 will be described with reference to Figures 11 to 15. The circuit board holder 1200 is formed in a horizontally elongated box shape with the top and front open, and the bottom surface is inclined to become lower towards the center in the left-right direction. When assembled to the game board 5, the circuit board holder 1200 can cover the lower part of the back unit 3000, which is attached to the rear side of the game panel 1100, from below. As a result, it can receive all the game balls discharged to the rear side of the game panel 1100 through the out opening 1111, and the game balls discharged downward from the front unit 2000 and the back unit 3000, and discharge them downward from the discharge section 1201 (see Figure 14) formed on the bottom surface.

[0050] [2-4. Main control board unit] Next, the main control unit 1300 will be described with reference to Figures 11 to 15 and Figure 17. The main control unit 1300 is detachably mounted on the rear surface of the circuit board holder 1200. This main control unit 1300 includes a main control board 1310 that controls the game content and the payout of game balls, and a main control board box 1320 that houses the main control board 1310 and is mounted on the circuit board holder 1200.

[0051] The main control board box 1320 is equipped with multiple sealing mechanisms. When the main control board box 1320 is closed using one of these sealing mechanisms, it is necessary to destroy that sealing mechanism in order to open the main control board box 1320 again, leaving a trace of the opening and closing. Therefore, by examining the trace of opening and closing, unauthorized opening and closing of the main control board box 1320 can be detected, thereby increasing the deterrent effect against unauthorized actions against the main control board 1310.

[0052] [2-5. Function Display Unit] Next, the function display unit 1400 will be described with reference to Figures 10 to 12. As shown in the figures, the function display unit 1400 is attached to the lower left corner of the front component 1000 outside the game area 5a. When the game board 5 is assembled into the pachinko machine 1, this function display unit 1400 can be seen from the front (player side) through the through-hole 111 of the door frame 3 (see Figure 1). Based on control signals from the main control board 1310, this function display unit 1400 uses multiple LEDs to display the game status, normal lottery results, special lottery results, etc.

[0053] The function display unit 1400, although not shown in detail, consists of a status indicator consisting of one LED that displays the game status, a normal symbol indicator that displays a normal symbol by controlling the blinking of two LEDs based on the normal lottery result drawn when a game ball passes through the gate section 2003, and then displays these two LEDs in a lighting pattern corresponding to the normal lottery result, a normal hold indicator consisting of two LEDs that displays the number of hold symbols, which is the number of normal symbol displays related to the passage of a game ball through the gate section 2003 for which the start condition for displaying the display has not yet been met, a first special symbol indicator that displays a first special symbol by controlling the blinking of eight LEDs based on the first special lottery result drawn when a game ball is received into the first start opening 2002 (occurrence of start prize), and then displays these eight LEDs in a lighting pattern corresponding to the first special lottery result, and the reception of a game ball into the first start opening 2002 The machine primarily comprises: a first special reserved number indicator consisting of two LEDs that displays the number of reserved symbols, which is the number of variable symbols of the first special symbol whose starting conditions for display have not yet been met; a second special symbol indicator that displays the second special symbol by controlling the blinking of eight LEDs based on the second special lottery result, which is drawn when a game ball is received into the second starting port 2004 (occurrence of starting prize); a second special reserved number indicator consisting of two LEDs that displays the number of reserved symbols, which is the number of variable symbols of the second special symbol whose starting conditions for display have not yet been met when a game ball is received into the second starting port 2004; and a round indicator consisting of two LEDs that displays the number of repetitions (rounds) of the opening and closing patterns of the first large prize port 2005 and the second large prize port 2006 when the first special lottery result or the second special lottery result is "jackpot" or the like. Furthermore, some of the displays in the function display unit 1400 (for example, the first special pattern display) may be made of 7-segment LEDs.

[0054] This function display unit 1400 can display the number of reserved items, symbols, etc., by appropriately lighting, extinguishing, and flashing the provided LEDs.

[0055] [2-6. Peripheral Control Units] Next, the peripheral control unit 1500 will be described with reference to Figures 13 and 15. The peripheral control unit 1500 is mounted on the rear surface of the back box 3010 of the back unit 3000. The peripheral control unit 1500 includes a peripheral control board 1510 (see Figure 17) that controls the effects presented to the player based on control signals from the main control board 1310, and a peripheral control board box 1520 that houses the peripheral control board 1510. The peripheral control board 1510 includes a peripheral control unit 1511 for controlling light effects, sound effects, and movable effects, etc., and a liquid crystal display control unit 1512 for controlling the effect images (see Figure 17).

[0056] [2-7. Main LCD Display] Next, the main LCD display device 1600 will be described with reference to Figures 10 to 16. The main LCD display device 1600 is positioned in the center of the game area 5a when viewed from the front, and is attached to the rear side of the game panel 1100 via the back box 3010 of the back unit 3000. More specifically, the main LCD display device 1600 is detachably attached to the rear surface of the back wall of the back box 3010, approximately in the center. When the game board 5 is assembled, the main LCD display device 1600 can be seen from the front (player side) through the frame of the frame-shaped center component 2500. The main LCD display device 1600 is a full-color display device with a white LED backlight, and can display still images and videos.

[0057] As shown in Figures 14 and 15, the main liquid crystal display device 1600 includes two left fixing pieces 1601 protruding outward from the left side when viewed from the front, and a right fixing piece 1602 protruding outward from the right side when viewed from the front. With the liquid crystal screen facing forward, the main liquid crystal display device 1600 is attached to the back box 3010 by inserting the two left fixing pieces 1601 from diagonally behind the back box 3010 into two fixing grooves 3010c that open on the left inner surface when viewed from the front within the frame-shaped liquid crystal mounting part of the back box 3010, then moving the right fixing piece 1602 forward, inserting the right fixing piece 1602 into the opening of the locking mechanism 3020, and sliding the locking mechanism 3020 downward.

[0058] [2-8. Overall structure of the table unit] Next, the front unit 2000 will be described mainly with reference to Figures 10 to 12 and Figures 14 to 16. The front unit 2000 of the game board 5 is attached to the panel plate 1110 of the game panel 1100 from the front, with its front end protruding forward beyond the front surface of the panel plate 1110, and its rear end passing through the opening 1112 and protruding backward beyond the rear surface of the panel plate 1110. The front unit 2000 of this embodiment includes a plurality of general prize slots 2001 that are always open and capable of receiving game balls that have been driven into the game area 5a, a first start slot 2002 that is always open and capable of receiving game balls at a different location within the game area 5a from the plurality of general prize slots 2001, a gate unit 2003 that is installed at a predetermined location within the game area 5a and detects the passage of game balls, a second start slot 2004 that can receive game balls according to the result of a normal lottery drawn when a game ball passes through the gate unit 2003, and a first major prize slot 2005 and a second major prize slot 2006 that can receive game balls according to either the result of a first special lottery or a second special lottery drawn when a game ball is received into the first start slot 2002 or the second start slot 2004.

[0059] Of the multiple (four in this case) general prize entry points 2001, three are located in the lower part of the game area 5a, and the remaining one is located near the upper right when viewed from the front within the game area 5a. The first start entry point 2002 is located in the center of the game area 5a in the left-right direction, directly above the out entry point 1111. The gate section 2003 is located in the upper right when viewed from the front within the game area 5a, approximately directly below the stopper section 1006. The second start entry point 2004 is located directly below the gate section 2003, slightly to the right when viewed from the front. Of the multiple general prize entry points 2001 mentioned above, the general prize entry point 2001 located near the upper right when viewed from the front within the game area 5a is located directly above the second start entry point 2004. The first large prize entry point 2005 is located between the first start entry point 2002 and the out entry point 1111. The second major prize gate 2006 is located to the right of the first starting gate 2002 when viewed from the front, and is positioned above the first major prize gate 2005.

[0060] As shown in Figure 16, the second large prize opening 2006 in the front unit 2000 consists of a second upper large prize opening 2006a and a second lower large prize opening 2006b, which are arranged along a single flow path through which the game balls circulate. The second large prize opening 2006 has the second upper large prize opening 2006a located near the lower right in a front view within the game area 5a, and the second lower large prize opening 2006b located below and to the left of the second upper large prize opening 2006a in a front view.

[0061] Furthermore, the front unit 2000 includes a start-up unit 2100 mounted in the center of the left-right direction within the game area 5a, directly above the out-up opening 1111, and having a first start-up opening 2002 and a first major prize-winning opening 2005; a lower side unit 2200 mounted along the inner rail 1002 to the left of the start-up unit 2100 in a front view, and having three general prize-winning openings 2001; an upper side unit 2300 mounted above the left end of the lower side unit 2200 in a front view; and a frame-shaped center mechanism 2500 mounted approximately in the center of the game area 5a, having one general prize-winning opening 2001, a gate section 2003, a second start-up opening 2004, and a second major prize-winning opening 2006.

[0062] [2-8a. Starter Unit] Next, the starting port unit 2100 of the front unit 2000 will be described. The starting port unit 2100 is located within the game area 5a, near the lower end of the center in the left-right direction, directly above the out port 1111, and is attached to the panel board 1110 from the front. This starting port unit 2100 has a first starting port 2002 and a first large prize port 2005.

[0063] The starting port unit 2100 includes a flat unit base 2101 that is attached to the front of the panel board 1110 and has a rectangular first large prize opening 2005 that extends left and right and penetrates from front to back; a ball receiving section 2102 that protrudes forward from the upper part of the unit base 2101, approximately in the center in the left-right direction, above the first large prize opening 2005, and forms the first starting port 2002; a ball guiding section 2103 that is attached to the rear of the unit base 2101 and guides the game ball received in the first starting port 2002 downward; a first starting port sensor 2104 that is attached to the ball guiding section 2103 and detects the game ball received in the first starting port 2002; and a first attacker unit 2110 that is attached to the rear of the unit base 2101 to close the first large prize opening 2005.

[0064] The first attacker unit 2110 of the starting port unit 2100 includes a box-shaped unit case 2111 attached to the rear surface of the unit base 2101 so as to close the first large prize opening 2005 from the rear, with its front end open forward to approximately the same size as the first large prize opening 2005, a horizontally elongated rectangular, flat first large prize opening door member 2112 whose lower edge is rotatably supported at the front end of the unit case 2111 so as to be able to open and close the first large prize opening 2005, and a first attacker solenoid mounted inside the unit case 2111 that drives the opening and closing of the first large prize opening door member 2112. The unit includes an id 2113, a first large prize slot sensor 2114 mounted inside the unit case 2111 for detecting game balls received into the first large prize slot 2005, a start slot unit relay board 2115 mounted on the top surface of the unit case 2111 for relaying the connection between the first start slot sensor 2104, the first attacker solenoid, and the first large prize slot sensor 2114 and the main control board 1310, and a start slot unit decoration board (not shown) mounted on the bottom of the unit case 2111 for illuminating the first large prize slot 2005.

[0065] The ball receiving section 2102, which forms the first starting opening 2002, opens upward and is sized to accept only one game ball at a time. The first large prize opening 2005, which penetrates the unit base 2101, opens forward and is sized to accept multiple game balls at once (for example, 4 to 6 balls).

[0066] The starting port unit 2100 has a first starting port 2002 formed by a ball receiving portion 2102 that opens upward. Game balls received in the first starting port 2002 are guided downward by a ball guidance portion 2103 at the rear of the unit base 2101, detected by the first starting port sensor 2104, and then discharged downward through the first attacker unit 2110. In this embodiment, two first starting port sensors 2104 are provided, and the main control board 1310 determines that a game ball has been received in the first starting port 2002 when both first starting port sensors 2104 detect a game ball within a predetermined time range. This makes it possible to detect fraudulent activity such as the insertion of an unauthorized tool into the first starting port 2002.

[0067] In the starting port unit 2100, the first attacker unit 2110 is attached to the rear surface of the unit base 2101, so that the first large prize opening door member 2112 of the first attacker unit 2110 is inserted from the rear into the first large prize opening 2005 which is open in the unit base 2101, thereby closing the first large prize opening 2005. In its upright position with the first large prize opening 2005 closed, the left and right ends of the lower edge of the first large prize opening door member 2112 are rotatably attached by the unit case 2111, and by rotating it so that the upper edge moves forward and downward, the first large prize opening 2005 can be changed from a closed state to an open state.

[0068] The first large prize opening door member 2112 of the first attacker unit 2110 stands upright in the normal state (when the first attacker solenoid 2113 is not energized), closing the first large prize opening 2005. When the first attacker solenoid 2113 is energized according to the game state, the first large prize opening door member 2112 rotates so that its upper edge moves forward and downward, so that its upper edge is positioned slightly above its lower edge. In other words, the first large prize opening door member 2112 becomes inclined so that it rises higher from the lower edge of the first large prize opening 2005 towards the front.

[0069] In this state, when a game ball flows down in front of the first large prize opening 2005 and comes into contact with the first large prize opening door member 2112, the inclination of the first large prize opening door member 2112 changes the direction of the game ball's flow from downward to backward, allowing it to be received by the first large prize opening 2005 and enter the unit case 2111. After the game ball received by the first large prize opening 2005 is detected by the first large prize opening sensor 2114, it is discharged downward from the bottom surface of the unit case 2111.

[0070] [3. Control Configuration] Next, the control configuration for various aspects of the pachinko machine 1 will be explained with reference to Figure 17. Figure 17 is a block diagram that schematically shows the control configuration of the pachinko machine. As shown in the figure, the main control configuration of the pachinko machine 1 consists of a main control board 1310 and a peripheral control board 1510 attached to the game board 5, and a payout control board 951 attached to the main frame 4, with each component responsible for a specific control. The main control board 1310 controls the game operation (progress of the game). The peripheral control board 1510 includes a peripheral control unit 1511 that controls various display devices during gameplay based on commands from the main control board 1310, and a liquid crystal display control unit 1512 that controls the display of display images on the main liquid crystal display device 1600 and the upper tray liquid crystal display device 244, etc., based on commands from the peripheral control unit 1511. The payout control board 951 includes a payout control unit 952 that controls the payout of game balls, and a launch control unit 953 that controls the launch of game balls by rotating the handle lever 504.

[0071] [3-1. Main control board] The main control board 1310, which controls the progress of the game, includes a main control MPU 1311, which is a microprocessor that incorporates a ROM 1313 for storing various processing programs and commands, and a RAM 1312 for temporarily storing data; a main control I / O port 1314 as an input / output device (I / O device); a main control input circuit 1315 that receives detection signals from various detection switches; a main control solenoid drive circuit 1316 for driving various solenoids; and a RAM clear switch for completely erasing the information stored in the RAM built into the main control MPU 1311. In addition to its built-in ROM and RAM, the main control MPU 1311 also incorporates a watchdog timer to monitor its operation (system) and functions to prevent fraud.

[0072] The main control MPU 1311 of the main control board 1310 detects game balls received into the first start opening 2002 using the first start opening sensor 2104, the second start opening sensor 2551 detects game balls received into the second start opening 2004, the general prize opening sensor 3015 detects game balls received into the general prize opening 2001, the gate sensor 2547 detects game balls that have passed through the gate section 2003, and the first large prize opening 2005. Detection signals from the first large prize slot sensor 2114, the second upper large prize slot sensor 2554 and the second lower large prize slot sensor 2557 which detect game balls received into the second upper large prize slot 2006a and the second lower large prize slot 2006b, the ball ejection sensor 3060, the ball launch sensor 1020, and the magnetic detection sensor which detects unauthorized magnetism within the game area 5a are each input via the main control I / O port 1314.

[0073] Based on these detection signals, the main control MPU 1311 outputs control signals from the main control I / O port 1314 to the main control solenoid drive circuit, thereby outputting drive signals to the start solenoid 2550, the first attacker solenoid 2113, the second upper attacker solenoid 2553, and the second lower attacker solenoid 2556, as well as outputting drive signals from the main control I / O port 1314 to the first special symbol indicator, the second special symbol indicator, the first special symbol memory indicator, the second special symbol memory indicator, the normal symbol indicator, the normal symbol memory indicator, the game status indicator, the round indicator, etc. of the function display unit 1400.

[0074] In this embodiment, the first start port sensor 2104, the second start port sensor 2551, the gate sensor 2547, the first large prize port sensor 2114, the second upper large prize port sensor 2554, and the second lower large prize port sensor 2557 use non-contact type electromagnetic proximity switches, while the general prize port sensor 3015 uses a contact type ON / OFF operation mechanical switch. This is because game balls frequently enter the first start port 2002 and the second start port 2004, and also frequently pass through the gate section 2003, so the detection of game balls by the first start port sensor 2104, the second start port sensor 2551, and the gate sensor 2547 occurs frequently. For this reason, the first start port sensor 2104, the second start port sensor 2551, and the gate sensor 2547 use proximity switches that have high durability and a long lifespan. Furthermore, when a favorable game state occurs that is advantageous to the player (such as a "jackpot" game), the first large prize slot 2005 and the second large prize slot 2006 are opened (or enlarged), and game balls enter frequently. As a result, the detection of game balls by the first large prize slot sensor 2114, the second upper large prize slot sensor 2554, and the second lower large prize slot sensor 2557 also occurs frequently. For this reason, the first large prize slot sensor 2114, the second upper large prize slot sensor 2554, and the second lower large prize slot sensor 2557 also use proximity switches that have high durability and a long lifespan. In contrast, the general prize slot 2001, into which game balls do not enter frequently, does not experience frequent detection by the general prize slot sensor 3015. For this reason, the general prize slot sensor 3015 uses a mechanical switch that has a shorter lifespan than a proximity switch.

[0075] Furthermore, the main control MPU 1311 transmits various information related to the game (game information) and various commands related to payouts to the payout control board 951, and receives various commands related to the state of the pachinko machine 1 from the payout control board 951. In addition, the main control MPU 1311 transmits various commands related to the control of game effects executed on the main liquid crystal display device 1600, etc., and various commands related to the state of the pachinko machine 1 to the peripheral control unit 1511 of the peripheral control board 1510 via the main control I / O port 1314. When the main control MPU 1311 receives various commands related to the state of the pachinko machine 1 from the payout control board 951, it formats these commands and transmits them to the peripheral control unit 1511.

[0076] The main control board 1310 is supplied with various voltages from the power supply board in the power supply board box 930. This power supply board that supplies various voltages to the main control board 1310 is equipped with an electric double-layer capacitor (hereinafter simply referred to as "capacitor") as a backup power supply to supply power to the main control board 1310 for a predetermined time even when the power is cut off. With this capacitor, the main control MPU 1311 can store various information in the RAM 1312 during power-off processing even when the power is cut off. This stored information is completely erased (cleared) from the RAM 1312 when the RAM clear switch on the main control board 1310 is operated when the power is turned on. The operation signal (detection signal) of this RAM clear switch is also output to the payout control board 951.

[0077] Furthermore, the main control board 1310 is equipped with a power outage monitoring circuit. This power outage monitoring circuit monitors the decrease in various voltages supplied from the power supply board, and when these voltages fall below the power outage warning voltage, it outputs a power outage warning signal. This power outage warning signal is input to the main control MPU 1311 via the main control I / O port 1314, and is also output to the payout control board 951, etc.

[0078] A prize ratio indicator 1317 is mounted on the main control board 1310 in a position visible from the back of the pachinko machine 1. The prize ratio indicator 1317 displays the prize ratio calculated by the main control MPU 1311.

[0079] Furthermore, the main control board 1310 is provided with a display switch 1318. The display switch 1318 may be a momentary push-button switch, but other types of switches may also be used. When the display switch 1318 is operated, the payout ratio is displayed on the payout ratio indicator 1317. The payout ratio indicator 1317 may always display the payout ratio, and the displayed content may be switched by operating the display switch 1318.

[0080] Figure 18 shows the configuration inside the main control MPU 1311.

[0081] The main control MPU 1311 includes a CPU 13111, RAM 1312, ROM 1313, random number generation circuit 13112, parallel input port 13113, serial communication circuit 13114, timer circuit 13115, interrupt controller 13116, external bus interface 13117, clock circuit 13118, matching block 13119, unique information 13120, arithmetic circuit 13121, and reset circuit 13122.

[0082] CPU 13111 executes the program stored in ROM 1313. RAM 1312 stores the data necessary for program execution.

[0083] The main control MPU 1311 is equipped with one or more random number generation circuits 13112. The random number generation circuits 13112 provide random numbers for determining the results of the variable display game (first special lottery result, second special lottery result) and the content of the variable display game's presentation. The random number generation circuits 13112 are so-called hardware random number generation means that output random numbers updated at the timing of the clock period (or a signal obtained by dividing the clock period) supplied to the main control MPU 1311. The hardware random numbers generated by the random number generation circuits 13112 are used for the lottery for special symbols, the lottery for winning symbols in the special symbol variable display game, and the lottery for regular symbols.

[0084] The parallel input port 13113 is a port to which detection signals from various detection switches are input via the main control input circuit 1315.

[0085] The serial communication circuit 13114 transmits and receives various commands related to the control of game effects and various commands related to the status of the pachinko machine 1 to the peripheral control unit 1511 of the peripheral control board 1510 via the main control I / O port 1314. The serial communication circuit 13114 also transmits and receives various information related to the game (game information) and various commands related to the payout of game balls to the payout control board 951 via the main control I / O port 1314. Furthermore, the serial communication circuit 13114 transmits data for displaying the payout ratio to the payout ratio indicator 1317. The detailed configuration of the serial communication circuit 13114 will be described later with reference to Figure 20.

[0086] The timer circuit 13115 is a timer for timer interrupts and various time controls. The interrupt controller 13116 controls various interrupts (general interrupts, NMIs that cannot be masked by software) to the CPU 13111. That is, when the interrupt controller 13116 detects an interrupt, it refers to the processing address table defined for each type of interrupt and jumps to the address set in the processing address table.

[0087] The external bus interface 13117 is an interface for connecting the internal bus of the main control MPU 1311 to an external device. The external bus interface 13117 can input and output I / O requests (IORQ), reads (RD), writes (WR), 16-bit addresses (A0~A15), and 8-bit data (D0~D7).

[0088] The clock circuit 13118 generates the internal clock of the main control MPU 1311 from an input external clock signal (e.g., 32MHz). The clock circuit 13118 also divides the input clock signal by a set number and outputs it externally from the CLKO terminal. For example, it may output a clock signal to supply to the driver circuit 13171 (see Figure 28) of the bonus ratio indicator 1317.

[0089] The verification block 13119 is a functional block that uses a predetermined code to verify whether the ROM 1313 has not been illegally modified. The unique information 13120 is an ID unique to the main control MPU 1311 and is written to the chip in a way that prevents rewriting during manufacturing.

[0090] The arithmetic circuit 13121 provides arithmetic functions that do not depend on the program recorded in the ROM 1313. These arithmetic functions are permanently written to the chip during manufacturing.

[0091] The reset circuit 13122 includes an unauthorized access prevention circuit, a watchdog timer, and a user reset function. The unauthorized access prevention circuit, when the CPU 13111 accesses an address other than a predetermined address in the ROM 1313, assumes that the access is due to an unauthorized program and resets the operation of the main control MPU 1311. The watchdog timer outputs a timeout signal when a predetermined timer period has elapsed, resetting the operation of the main control MPU 1311. The user reset function resets the operation of the main control MPU 1311 based on a reset signal input to the SRST terminal.

[0092] Figure 19 is a block diagram showing the detailed configuration of the arithmetic circuit 13121.

[0093] The arithmetic circuit 13121 provides program-independent arithmetic functions for calculation results and includes a multiplication circuit 131211 and a division circuit 131215.

[0094] The multiplication circuit 131211 is an arithmetic circuit that multiplies two values ​​of a predetermined number of bits (for example, 16 bits) and outputs a 32-bit product. It functions as a conversion circuit that converts input values ​​(multiplier, multiplicand) into a product using a multiplication function and outputs it.

[0095] The CPU 13111 of the main control MPU 1311 stores multipliers and multiplicands of 16 bits or less in multiplication input registers A 131212 and B 131213. The multiplication circuit 131211 reads the values ​​stored in the two 16-bit multiplication input registers 131212 and 131213 at a predetermined timing and stores the result of multiplying the two values ​​in the multiplication result register 131214. The CPU 13111 obtains the multiplication result from the multiplication result register 131214. The process from writing values ​​to the multiplication input registers 131212 and 131213 to storing the calculation result in the multiplication result register 131214 is configured to be completed in a predetermined time (e.g., 1 clock cycle), and the CPU 13111 can store values ​​in the multiplication input registers 131212 and 131213 and, after a predetermined number of clock cycles have elapsed, refer to the multiplication result register 131214 to obtain the multiplication result.

[0096] The division circuit 131215 is an arithmetic circuit that divides a dividend of a predetermined number of bits (e.g., 32 bits) by a divisor of a predetermined number of bits (e.g., 32 bits) and outputs a 32-bit quotient and a 32-bit remainder. It functions as a conversion circuit that converts input values ​​(divisor, dividend) into a quotient and a remainder using a division function and outputs them.

[0097] The CPU 13111 of the main control MPU 1311 stores a dividend of 32 bits or less in division input register A131216 and a divisor of 32 bits or less in division input register B131217. When the division circuit 131215 detects that values ​​have been stored in both of the two 32-bit division input registers 131216 and 131217, it reads the stored values ​​at a predetermined timing, stores the quotient (the result of dividing the dividend by the divisor) in division result register A131218, and the remainder in division result register B131219. Furthermore, when the division circuit 131215 reads the values ​​stored in division input registers 131216 and 131217, it is preferable to erase the read values ​​and clear the registers. Alternatively, the division circuit 131215 may read the values ​​stored in the division input registers 131216 and 131217 when a start command is input, and store the division result in the division result registers 131218 and 131219. In this case, the values ​​stored in the division input registers 131216 and 131217 do not need to be erased at the time of reading. Furthermore, the division input registers 131216 and 131217 may be able to overwrite values ​​even if they already contain values ​​(without clearing the stored values).

[0098] The CPU 13111 obtains the division result from the division result registers 131218 and 131219. The process from writing values ​​to the division input registers 131216 and 131217 to storing the calculation result in the division result registers 131218 and 131219 is configured to be completed in a predetermined time (e.g., 32 clock cycles). After the CPU 13111 stores values ​​in the division input registers 131216 and 131217 and the predetermined number of clock cycles has elapsed, it can refer to the division result registers 131218 and 131219, respectively, to obtain the quotient and remainder.

[0099] In the pachinko machine 1 of this embodiment, as will be described later, division is required to calculate the base value, and the division performed by the CPU 13111 through multiple multiplications and subtractions takes a considerable amount of time. For this reason, it is difficult to perform the base calculation process for each timer interrupt, and it is difficult to display the base value without delay. In contrast, by performing the division process using the arithmetic circuit 13121, the time required to calculate the base value can be shortened, and the base value can be calculated multiple times in a single timer interrupt (see Figures 75 and 80). Furthermore, from the time values ​​are written to the division input registers 131216 and 131217 of the arithmetic circuit 13121 until the calculation result is read from the division result register A131218, the CPU 13111 is not occupied by the division process, so other processes can be executed, and the base calculation process during the timer interrupt can be executed efficiently.

[0100] Figure 20 shows the configuration of the serial communication circuit 13114.

[0101] The serial communication circuit 13114 has four data transmission and reception circuits, each of which transmits and receives one channel of data to and from a predetermined device. Note that in Figure 20, only the data transmission circuit is shown, and the explanation of the data reception circuit (for example, one channel is implemented) is omitted.

[0102] In the gaming machine of this embodiment, the serial communication circuit 13114 uses three channels, as described above: channel 0 used for communication with the peripheral control board 1510, channel 1 used for communication with the payout control board 951, and channel 2 used for communication with the driver circuit 13171 of the prize ratio indicator 1317. Channel 3 is unused.

[0103] The serial communication circuit 13114 includes a data register 3141, a transmit data register 3142, a parity generation circuit 3143, a transmit shift register 3144, a command status register 3145, a communication setting register 3146, a transmit trigger setting level register 3147, a baud rate register 3148, and a baud rate generation circuit 3149.

[0104] Data input from CPU 13111 is stored in data register 3141, and then in transmit data register 3142. Transmit data register 3142 is composed of a FIFO with a predetermined capacity (e.g., 64 bytes). Transmit data register 3142 adds an error detection code generated by parity generation circuit 3143 for each data transmission unit to the data to be transmitted, and stores it in transmit shift register 3144.

[0105] The baud rate generation circuit 3149 generates a transmission clock signal from the clock signal supplied by the clock circuit 13118 to transmit data at the rate set in the baud rate register 3148. Then, the transmission shift register 3144 transmits the data according to the transmission clock signal.

[0106] Command status register 3145 is a register that is referenced to check the transmission status.

[0107] The communication setting register 3146 stores commands for controlling data transmission. The transmit trigger setting level register 3147 stores a threshold for controlling the amount of data that triggers an interrupt in the transmit data register 3142's FIFO. The baud rate register 3148 stores the baud rate setting for defining the data transmission rate. The communication setting register 3146, transmit trigger setting level register 3147, and baud rate register 3148 are set as initial settings for each of the four channels in step S28 of Figure 21.

[0108] The following explains these settings in detail. The communication setting register sets the communication format for each channel. Specifically, it sets whether or not to use FIFO (FIFO mode, normal mode), the number of stop bits, and parity (whether to use parity, and whether to use even parity or odd parity). For example, channel 0, which is used for communication with the peripheral control board 1510, and channel 1, which is used for communication with the payout control board 951, are set to 1xxx1010B, which means FIFO mode, 1 stop bit, and even parity. Channel 2, which is used for communication with the driver circuit 13171 of the prize ratio display 1317, is set to 1xxx1000B, which means FIFO mode, 1 stop bit, and no parity.

[0109] In FIFO mode, data is transmitted using the FIFO of the transmit data register 3142. Also, since gaming machines are in a noisy environment, it is desirable to set parity when transmitting data at high speed outside the main control board 1310.

[0110] Since the bonus ratio indicator 1317 is mounted on the main control board 1310, it is less affected by noise compared to communication with other boards via communication wires. Also, because the amount of data transmitted and received is small, a low communication speed is sufficient, and there is little need to use parity. Furthermore, by providing a ground pattern along the signal transmission pattern between the bonus ratio indicator 1317 driver circuit 13171 and the main control MPU 1311 (for example, layers adjacent to the left, right, and / or thickness direction of the signal line provided on the surface or inner layer of the printed circuit board), the shielding effect of the ground pattern can reduce the noise superimposed on the signal transmission pattern.

[0111] The transmit trigger setting level register 3147 determines the amount of data that triggers an interrupt in the FIFO of the transmit data register 3142. Specifically, if the amount of transmit data stored in the FIFO of the transmit data register 3142 is less than the set number of bytes, a predetermined bit in the status register corresponding to each channel is set. By checking this bit in the status register, it is possible to check whether there is space in the FIFO of the transmit data register 3142 and to determine the transmission timing of the data stored in the FIFO of the transmit data register 3142.

[0112] Furthermore, the relevant bit in the status register can be used to determine if there is an abnormality in the transmit FIFO. For example, even if no data is written to the FIFO of the transmit data register 3142 for a predetermined period of time, if the relevant bit in the status register is not set, it can be determined that no data is being transmitted from the FIFO of the transmit data register 3142 because there is no free space in the FIFO of the transmit data register 3142, and error handling (e.g., error notification) can be performed.

[0113] The baud rate register 3148 determines the data transmission rate. For example, channel 0, used for communication with the peripheral control board 1510, is set to 19200bps; channel 1, used for communication with the payout control board 951, is set to 1200bps; and channel 2, used for communication with the driver circuit 13171 of the bonus ratio indicator 1317, is set to 1200bps.

[0114] In this way, the transmission rate is changed depending on the data transmitted on each channel. This is because the inside of the gaming machine is an environment where game balls are rolling around and the electronic circuits of the gaming machine are susceptible to noise. For this reason, data for controlling the number of balls dispensed, which directly relates to the profit given to the player, is transmitted to the payout control board 951 at a low speed to ensure that it is transmitted reliably. On the other hand, the peripheral control board 1510 transmits a large amount of data and is not related to the number of balls dispensed, so it transmits data at a high rate. The peripheral control board 1510 also verifies whether the received command is abnormal, and if it is determined to be abnormal, it either does not operate the peripheral control board 1510 or performs abnormal processing (e.g., communication error notification) and requests the command to be retransmitted. If the retransmitted command is determined to be normal, the state of the peripheral control board 1510 is restored using the normal command. For this reason, data can be transmitted at a high rate when communicating with the peripheral control board 1510. Furthermore, lowering the communication rate with the peripheral control board 1510 may allow players to perceive a delay between the entry of a prize into the starting slot and the start of the symbol variation, potentially reducing the enjoyment of the game.

[0115] Communication between the driver circuit 13171 of the payout ratio indicator 1317 and the payout ratio indicator 1317 may be at a high rate (19200bps, the data transmission rate with the peripheral control board 1510) or a low rate (1200bps, the data transmission rate with the payout control board 951). Alternatively, a rate between the high rate (19200bps, the data transmission rate with the peripheral control board 1510) and the low rate (1200bps, the data transmission rate with the payout control board 951) may be used for communication between the driver circuit 13171 of the payout ratio indicator 1317 and the driver circuit 13171. This is because increasing the data transmission rate may cause malfunctions in other circuits due to switching noise from the transistors in the driver circuit 13171 of the payout ratio indicator 1317. On the other hand, even if an abnormality occurs in the transmitted data due to noise, the same data will be resent with each timer interrupt unless the transmitted data is updated. If the resent command is normal, the display content of the bonus ratio indicator 1317 will return to normal, so there is no need to make the transmission rate extremely slow.

[0116] The command status register 3145 is a register referenced to check the transmission status, and each bit is defined as follows, for example: Bit 7: SnTC This flag indicates transmission completion; 0 indicates transmission in progress, and 1 indicates transmission complete. Bit 6: SnTDBE In normal mode (communication mode without using FIFO), this flag indicates that the transmit data is empty; 0 indicates that the data has not yet been transferred to the transmit shift register, and 1 indicates that the data has been transferred to the transmit shift register. That is, it is set when data has been transferred from the transmit data register 3142 to the transmit shift register 3144, and the transmit data register 3142 no longer contains any data to transmit.

[0117] In SnTFTL FIFO mode, this flag indicates the transmit FIFO trigger level. A value of 0 indicates that the amount of transmit data stored in the FIFO of the transmit data register 3142 is equal to or greater than the trigger level, while a value of 1 indicates that the amount of transmit data stored in the FIFO of the transmit data register 3142 is less than the trigger level. In other words, it is set when the amount of transmit data stored in the FIFO of the transmit data register 3142 is less than the number of bytes set in the transmit trigger level setting register. Therefore, when communicating in FIFO mode, data is written to the FIFO of the transmit data register 3142 after confirming that this bit is 1. Bits 5-2: Unused (fixed at 0) Bit 1: SnTCL This bit is used to clear the transmit buffer, breakcode transmission, empty the transmit data, or set the transmit FIFO trigger level to (SnTFL), and is written externally. For example, to forcibly clear the contents of the buffer, set this bit to 1. More specifically, it is used when a command has been written to the FIFO, but for some reason (e.g., an error occurs) the transmission of the written command is aborted. Note that even if bit 1 is set, the data in the transmit shift register is not cleared.

[0118] In the configuration described above, the serial communication circuit 13114 is capable of asynchronous communication (asynchronous communication), but outputs a clock signal for synchronous communication (not shown). In this case, the clock signal supplied to the communication partner (driver circuit 13171 of the bonus ratio indicator 1317) is output from the serial communication circuit 13114, not from the clock circuit 13118. Each transmit / receive circuit of the serial communication circuit 13114 may have at least one channel capable of synchronous communication by setting, and separate serial communication circuits may be provided for asynchronous and synchronous communication.

[0119] Although not shown in the diagram, the serial communication circuit 13114 outputs a signal (LOAD) that indicates the data acquisition timing used during synchronous communication.

[0120] [3-2. Dispensing Control Board] Returning to Figure 17, let's continue the explanation of the control configuration of the pachinko machine. The payout control board 951, which controls the payout of game balls, etc., is not shown in detail in the illustration, but it includes a payout control unit 952 that performs various controls related to payout, a launch control unit 953 that performs launch control by launch solenoid 682 and ball feeding control by ball feeding solenoid 551, an error LED indicator that displays the status of the pachinko machine 1, an error clearing switch for clearing the error displayed on the error LED indicator, and a ball removal switch for discharging the game balls in the ball tank 802, tank rail 803, ball guidance unit 820, and payout device 830 to the outside of the pachinko machine 1 and starting the ball removal operation.

[0121] [3-2a. Dispensing Control Unit] The dispensing control unit 952, which performs various dispensing controls on the dispensing control board 951, is not shown in detail in the diagram, but it includes a dispensing control MPU, which is a microprocessor with built-in ROM for storing various processing programs and commands, and RAM for temporarily storing data; dispensing control I / O ports as I / O devices; an external WDT (external watchdog timer) for monitoring whether the dispensing control MPU is operating normally; a dispensing motor drive circuit for outputting a drive signal to the dispensing motor 834 of the dispensing device 830; and a dispensing control input circuit to which detection signals from various detection switches related to dispensing are input. In addition to its built-in ROM and RAM, the dispensing control MPU also has built-in functions to prevent fraud.

[0122] The payout control MPU of the payout control unit 952 receives various information related to the game (game information) and various commands related to payouts from the main control board 1310 in a serial manner via the payout control I / O port. In addition to receiving operation signals (detection signals) for the RAM clear switch from the main control board 1310 via the payout control I / O port, it also receives detection signals from the full tank detection sensor 535, as well as detection signals from the ball depletion detection sensor 827, the payout detection sensor 842, and the wing rotation detection sensor 840.

[0123] Detection signals from the bulb failure detection sensor 827, the payout detection sensor 842, and the blade rotation detection sensor 840 of the payout device 830 are input to the payout control input circuit and then to the payout control MPU via the payout control I / O port.

[0124] Furthermore, detection signals from the door frame release switch, which detects the opening of the door frame 3 relative to the main frame 4, and the main frame release switch, which detects the opening of the main frame 4 relative to the outer frame 2, are input to the payout control input circuit and then to the payout control MPU via the payout control I / O port.

[0125] Furthermore, the detection signal from the full-tank detection sensor 535 of the foul cover unit 520 is input to the dispensing control input circuit and then input to the dispensing control MPU via the dispensing control I / O port.

[0126] The payout control MPU outputs a drive signal to the payout motor 834 via the payout control I / O to drive the payout motor 834, outputs a signal to the error LED indicator to display the status of the pachinko machine 1 via the payout control I / O port to the error LED indicator, sends commands to indicate the status of the pachinko machine 1 to the main control board 1310 serially via the payout control I / O port, and outputs the number of game balls actually dispensed to the external terminal board 784 via the payout control I / O port. This external terminal board 784 is connected to a hall computer installed on the gaming hall side. This hall computer monitors the players' games by knowing the number of game balls dispensed by the pachinko machine 1 and game information of the pachinko machine 1. Of the signals output from the external terminal board 784, the signals generated by the main control board 1310 are output from the main control board 1310 via the payout control board 951 to the external terminal board 784. Alternatively, the signals generated by the main control board 1310 may be output from the external terminal board 784 without passing through the dispensing control board 951.

[0127] The error LED indicator is a segment display that shows the status of the pachinko machine 1 by displaying alphanumeric characters, shapes, etc. The error LED indicator displays and notifies the following: For example, when the symbol "-" is displayed, it indicates that the system is "normal"; when the number "0" is displayed, it indicates that there is a "connection error" (specifically, that there is an electrical connection error between the main control board 1310 and the payout control board 951); when the number "1" is displayed, it indicates that there is a "bulb out" (specifically, that there are no game balls in the payout device 830 based on a detection signal from the bulb out detection sensor 827); when the number "2" is displayed, it indicates that there is a "bulb jam" (specifically, that the payout blades and game balls are jammed in the payout passage of the payout device 830, making it difficult for the payout blades to rotate, based on a detection signal from the blade rotation detection sensor 840); and when the number "3" is displayed, it indicates a "counting switch error" (specifically, that the payout detection sensor 842 Based on the detection signal, it notifies that there is a malfunction in the payout detection sensor 842. When the number "5" is displayed, it notifies that there is a "retry error" (specifically, that the number of retries for the payout operation has reached a preset upper limit). When the number "6" is displayed, it notifies that it is "full" (specifically, that the foul cover unit 520 is full with game balls stored there, based on the detection signal from the full-fill detection sensor 535). When the number "7" is displayed, it notifies that the "CR is not connected" (that the electrical connection has been disconnected somewhere between the payout control board 951 and the CR unit). When the number "9" is displayed, it notifies that it is "in stock" (specifically, that the number of game balls that have not yet been paid out has reached a preset number).

[0128] The ball dispensing request signal from the ball dispensing button and the prepaid card return request signal from the return button are input to the CR unit. The CR unit sends a signal specifying the number of game balls to be dispensed according to the ball dispensing request signal to the payout control board 951 in a serial manner, and this signal is received by the payout control I / O port and input to the payout control MPU. The CR unit also updates the remaining balance of the inserted prepaid card according to the number of game balls dispensed and outputs a signal to display the remaining balance on the display unit, and this signal is input to the display unit and displayed.

[0129] [3-2b. Launch Control Unit] The launch control unit 953, which performs launch control by the launch solenoid 682 and ball feeding control by the ball feeding solenoid 551, is not shown in detail in the illustration, but it includes a launch control input circuit to which detection signals from various detection switches related to launch are input, an oscillator circuit that outputs a clock signal at regular intervals, a launch timing control circuit that outputs a launch reference pulse for launching game balls toward the game area 5a based on this clock signal, a launch solenoid drive circuit that outputs a drive signal to the launch solenoid 682 based on this launch reference pulse, and a ball feeding solenoid drive circuit that outputs a drive signal to the ball feeding solenoid 551 based on the launch reference pulse. The launch timing control circuit generates a launch reference pulse based on the clock signal from the oscillator circuit so that 100 game balls per minute are launched toward the game area 5a and outputs it to the launch solenoid drive circuit, and also generates a ball feeding reference pulse which is a predetermined number of times the launch reference pulse and outputs it to the ball feeding solenoid drive circuit.

[0130] In relation to the handle unit 500, the contact detection sensor 509, which detects whether the palm or fingers are touching the handle lever 504, and the stop button, which detects whether the launch of the game balls will be forcibly stopped by the player, are input to the launch control input circuit and then to the launch timing control circuit. Also, when the CR unit and the CR unit connection terminal board are electrically connected, a CR connection signal is input to the launch control input circuit and then to the launch timing control circuit. The signal from the handle operation sensor 507, which electrically adjusts the strength with which the game balls are launched toward the game area 5a according to the rotation position of the handle lever 504, is input to the launch solenoid drive circuit.

[0131] The launch solenoid drive circuit outputs a drive current to the launch solenoid 682, triggered by the input of a launch reference pulse, to launch a game ball toward the game area 5a with a launch strength corresponding to the rotation position of the handle lever 504, based on a signal from the handle operation sensor 507. On the other hand, the ball feed solenoid drive circuit outputs a constant current to the ball feed solenoid 551, triggered by the input of a ball feed reference pulse, to receive one game ball stored in the upper tray 201 of the tray unit 200 into the ball feed unit 540. When the input of the ball feed reference pulse ends, the output of the constant current is stopped, sending the received game ball to the ball launching device 680. Thus, the drive current output from the launch solenoid drive circuit to the launch solenoid 682 is variably controlled, while the drive current output from the ball feed solenoid drive circuit to the ball feed solenoid 551 is controlled to be constant.

[0132] Furthermore, the power supply board that supplies various voltages to the dispensing control board 951 is equipped with a capacitor as a backup power supply to supply power to the main control board 1310 for a predetermined time even when the power is cut off. This capacitor allows the dispensing control MPU to store various information in the RAM of the dispensing control board 951 during power-off processing, even when the power is cut off. This stored information is completely erased (cleared) from the RAM of the dispensing control board 951 when the RAM clear switch on the main control board 1310 is operated when the power is turned on.

[0133] [3-3. Peripheral control board] As shown in Figure 17, the peripheral control board 1510 includes a peripheral control unit 1511 that performs performance control based on commands from the main control board 1310, and a liquid crystal display control unit 1512 that performs drawing control of the main liquid crystal display device 1600, the sub-liquid crystal display device 3114, and the upper tray liquid crystal display device 244 based on control data from the peripheral control unit 1511.

[0134] [3-3a. Peripheral Control Unit] The peripheral control unit 1511, which controls the performance on the peripheral control board 1510, is not shown in detail in the illustration, but it comprises a peripheral control MPU as a microprocessor, a peripheral control ROM that stores various processing programs and commands, a sound source IC that performs high-quality sound playback, and a sound ROM that stores sound information such as music and sound effects referenced by the sound source IC.

[0135] The peripheral control MPU has multiple built-in parallel I / O ports, serial I / O ports, etc. When it receives various commands from the main control board 1310, it sends game board-side light emission data from the serial I / O port for the lamp drive board to the performance drive board 3043 to output lighting signals, blinking signals, or gradation lighting signals to the color LEDs etc. provided on each decorative board of the game board 5 based on these various commands, and sends game board-side drive data from the serial I / O port for the game board decorative drive board to the performance drive board 3043 to output drive signals to the drive motors that operate the various performance units provided on the game board 5, and also sends vibration devices 24 provided on the door frame 3 The door side drive light data, which consists of door side drive data for outputting drive signals to electrical drive sources such as the door lower right drive motor 272 and door side light data for outputting lighting signals, blinking signals, or gradation lighting signals to color LEDs etc. provided on each decorative board of the door frame 3, is transmitted from the serial I / O port for the frame decorative drive board to the door frame 3 side. Control data (display commands) indicating the screen to be displayed on the main liquid crystal display device 1600 and the upper tray liquid crystal display device 244 is transmitted from the serial I / O port for the liquid crystal control device to the liquid crystal display control device 1512. In addition, control signals (sound commands) for extracting sound information from the sound ROM are output to the sound source IC.

[0136] Detection signals from various position detection sensors used to detect the positions of various performance units on the game board 5 are input to the peripheral control MPU via the performance drive board 3043 mounted on the rear of the back box. In addition, detection signals from the touch panel 246 and performance button press sensor 258 of the performance operation unit 220 located on the door frame 3 are also input to the peripheral control MPU.

[0137] Furthermore, the peripheral control MPU receives a signal (operation signal) from the liquid crystal display control unit 1512 indicating that the liquid crystal display control unit 1512 is operating normally, and monitors the operation of the liquid crystal display control unit 1512 based on this operation signal.

[0138] The sound source IC extracts sound information from the sound ROM based on control data (sound commands) from the peripheral control MPU and controls the playback of music and sound effects corresponding to various effects from speakers 921, etc., installed in the door frame 3 and the main body frame 4. The volume can be adjusted by rotating a volume knob that protrudes rearward from the peripheral control board box 1520, which houses the peripheral control board 1510. In this embodiment, by sending acoustic signals (for example, 2ch stereo signals, 4ch stereo signals, 2.1ch surround signals, or 4.1ch surround signals, etc.) as sound information to multiple speakers on the door frame 3 side and the bass speaker 921 on the main body frame 4, it is possible to present more realistic sound effects (sound effects) than in conventional systems.

[0139] Furthermore, the peripheral control unit 1511 is equipped with an external watchdog timer (WDT), not just the internal watchdog timer (WDT) built into the peripheral control MPU, and the peripheral control MPU uses both the internal and external WDTs to diagnose whether or not its system is malfunctioning.

[0140] The display commands output from this peripheral control MPU to the liquid crystal display control unit 1512 are performed via serial input / output ports, and in this embodiment, the bitrate (size of data that can be transmitted per unit time) is set to 19.2 kilobits per second (bps). On the other hand, the initial data, door frame side lighting / flashing commands, game board side lighting / flashing commands, movable body drive commands, and display commands output from the peripheral control MPU to the performance drive board 3043 mounted on the rear of the back box are performed via multiple different serial input / output ports, and in this embodiment, the bitrate is set to 250 kbps.

[0141] This performance drive board 3043 outputs a lighting signal or flashing signal based on the received door frame side lighting flashing command to the LEDs of each decorative board provided on the door frame 3, or outputs a lighting signal or flashing signal based on the received game board side lighting flashing command to the LEDs of each decorative board provided on the game board 5.

[0142] Furthermore, the performance drive board 3043 outputs drive signals based on the received drive commands to the vibration device 242 and the lower right door drive motor 272 provided in the door frame 3, as well as to the various drive motors provided in the game board 5.

[0143] [3-3b. Various control processes of the peripheral control unit] First, the power-on processing for the peripheral control unit will be explained with reference to Figure 60. When power is turned on to the pachinko machine 1, the peripheral control MPU (not shown) of the peripheral control unit 1511 shown in Figure 17 performs the power-on processing for the peripheral control unit as shown in Figure 60. When this power-on processing for the peripheral control unit starts, the performance control program performs an initial setup process under the control of the peripheral control MPU (step S1000). In this initial setup process, the performance control program performs a process to initialize the peripheral control MPU itself, a process to determine whether it is a hot start or a cold start, and a process to set the wait timer after reset. The peripheral control MPU first performs a process to initialize itself, but the time required for this initialization process is on the order of microseconds (μs), so the peripheral control MPU can be initialized in an extremely short time. As a result, the peripheral control MPU is in a state where interrupts are enabled, and can receive various commands, such as commands related to the control of game performances and commands related to the state of the pachinko machine 1, which are output from the main control board 1310 in the peripheral control unit command reception interrupt processing described later.

[0144] Following step S1000, the performance control program performs a current time information acquisition process (step S1002). In this current time information acquisition process, the program obtains calendar information that specifies the year, month, and day, and time information that specifies the hour, minute, and second from the RTC control unit, and sets it in the peripheral control RAM as the current calendar information in the calendar information storage unit, and as the current time information in the time information storage unit.

[0145] Following step S1002, the performance control program sets the V-blank signal detection flag VB-FLG to a value of 0 (step S1006). This V-blank signal detection flag VB-FLG is a flag used to determine whether or not to execute the peripheral control unit steady-state processing described later. It is set to a value of 1 when the peripheral control unit steady-state processing is executed, and to a value of 0 when the peripheral control unit steady-state processing is not executed. The V-blank signal detection flag VB-FLG is set to a value of 1 in the peripheral control unit V-blank signal interrupt processing described later, which is executed when a V-blank signal is input indicating that the system is ready to accept screen data from the peripheral control MPU. In step S1006, the V-blank signal detection flag VB-FLG is initialized once by setting it to a value of 0.

[0146] Following step S1006, the performance control program determines whether the V-blank signal detection flag VB-FLG is valued at 1 (step S1008). If the V-blank signal detection flag VB-FLG is not valued at 1 (value is 0), the program returns to step S1008 and repeatedly determines whether the V-blank signal detection flag VB-FLG is valued at 1. By repeating this determination, the program enters a waiting state until the peripheral control unit can perform its regular processing.

[0147] In step S1008, when the V-blank signal detection flag VB-FLG is valued at 1, that is, when the peripheral control unit is executing steady-state processing, the steady-state processing flag SP-FLG is first set to value 1 (step S1009). This steady-state processing flag SP-FLG is set to value 1 when the peripheral control unit is executing steady-state processing, and to value 0 when the peripheral control unit has completed executing steady-state processing.

[0148] Following step S1009, the performance control program performs a 1ms interrupt timer activation process (step S1010). In this 1ms interrupt timer activation process, the 1ms interrupt timer is activated to execute the peripheral control unit's 1ms timer interrupt process, which will be described later. At the same time, the value of the 1ms timer interrupt execution count STN is set to 1 to initialize the 1ms timer interrupt execution count STN, which counts the number of times the 1ms interrupt timer has been activated and the peripheral control unit's 1ms timer interrupt process has been executed. This 1ms timer interrupt execution count STN is updated by the peripheral control unit's 1ms timer interrupt process.

[0149] Following step S1010, the performance control program performs lamp data output processing (step S1012). In this lamp data output processing, the performance control program performs continuous DMA serial transmission to the lamp drive board 4170 shown in Figure 119. Here, the peripheral control DMA controller of the peripheral control MPU is used to perform continuous transmission to the serial I / O port for the lamp drive board.

[0150] Following step S1012, the performance control program performs performance operation unit monitoring processing (step S1014). In this performance operation unit monitoring processing, based on various information acquired in the performance operation unit information acquisition processing in the peripheral control unit 1ms timer interrupt processing described later, including the operation of the operation button 220C based on detection signals from various detection switches provided on the performance operation unit 220, the program monitors whether the operation of the operation button 220C has been operated and appropriately decides whether or not to reflect the status of the operation of the operation button 220C in the game performance.

[0151] Following step S1014, the performance control program performs display data output processing (step S1016). In this display data output processing, the sound source-integrated VDP outputs the drawing data for one screen (one frame) generated on the sound source-integrated VRAM in the display data creation processing described later to the game board-side decoration board 3053 and the door frame-side decoration board 233. As a result, various screens are drawn on the game board-side decoration board 3053 and the door frame-side decoration board 233.

[0152] Following step S1016, the performance control program performs sound data output processing (step S1018). In this sound data output processing, the performance control program outputs sound data such as music and sound effects set in the built-in VDP sound source during the sound data creation process described later to speaker 921, or outputs sound data such as notification sounds and announcement sounds in addition to music and sound effects to speaker 921.

[0153] Following step S1018, the production control program performs a scheduler update process (step S1020). In this scheduler update process, the production control program updates various schedule data set in the peripheral control RAM. For example, in the scheduler update process, the program updates a pointer to instruct which screen data, from the first screen data in the time-series arrangement of screen data that constitutes the screen generation schedule data, should be output to the sound source's built-in VDP.

[0154] Furthermore, the scheduler update process updates a pointer to indicate which of the time-series arranged light emission data that constitutes the schedule data for generating light emission patterns should be used for each type of LED.

[0155] Furthermore, during the scheduler update process, the pointer is updated to indicate which sound command data, starting from the first sound command data, should be output to the built-in VDP of the sound source. This is done from the sound command data that instructs sound data such as music and sound effects, as well as sound data such as notification sounds and announcement sounds, which are arranged in a time series that constitutes the schedule data for sound generation.

[0156] Furthermore, during the scheduler update process, a pointer is updated to indicate which drive data from the first drive data point among the drive data of electrical drive sources such as motors and solenoids arranged in a time series that constitutes the electrical drive source schedule data should be output.

[0157] Following step S1020, the performance control program performs received command analysis processing (step S1022). In this received command analysis processing, the performance control program analyzes the information transmitted from the game board-side decorative board 3053 and the various commands transmitted from the main control board 1310, which were received in the peripheral control unit command reception interrupt processing (command reception means) described later (command analysis means).

[0158] Following step S1022, the performance control program performs a warning process (step S1024). In this warning process, if the performance control program finds that the command analyzed in the received command analysis process of step S1022, as described above, includes various commands that are classified into predetermined notification displays, it extracts the screen generation schedule data, the light emission pattern generation schedule data, the sound generation schedule data, and the electrical drive source schedule data, etc., which are set to abnormal display modes for executing various abnormal notifications, from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 and sets them in the peripheral control RAM. In the warning process, if multiple abnormalities occur simultaneously, the abnormality notifications are issued in order of priority, as registered in advance, and the system automatically transitions to other remaining abnormality notifications once the previous abnormality has been resolved. This allows for simultaneous monitoring of multiple abnormalities without losing information that an abnormality has occurred if another abnormality occurs after one abnormality has occurred but before that abnormality has been resolved.

[0159] Furthermore, in this warning process, after a predetermined time has elapsed since power-on, if the command analyzed by the performance control program in the above-mentioned received command analysis process (step S1022) is one of the various commands classified as status displays, such as an error clear navigation command (second error clear command), the program controls the performance in a manner different from the normal performance manner associated with the performance operation. For example, it visually warns the outside using the game board side decorative board 3053 (performance device), the door frame side decorative board 233 (performance device), and lamps (performance device), or audibly warns the outside using a speaker (error notification means). In this way, if a malicious player attempts to input an error clear navigation command to the main control board 1310 by operating the operation switch of the payout control board 951 while the game is in progress, the pachinko machine 1 will issue a warning to the outside, thus deterring fraudulent acts against the main control board 1310 that could affect the progress of the game.

[0160] Next, following step S1024 described above, the performance control program performs RTC acquisition information update processing (step S1026). In this RTC acquisition information update processing, the performance control program updates the calendar information stored in the calendar information storage unit and the time information stored in the time information storage unit, which were acquired in the current time information acquisition processing in step S1002 and set in the peripheral control RAM. This RCT acquisition information update processing updates the time information, which is the hours, minutes, and seconds, stored in the time information storage unit, and updates the calendar information, which is the year, month, and day, stored in the calendar information storage unit, based on this updated time information.

[0161] Following step S1026, the performance control program performs lamp data creation processing (step S1028). In this lamp data creation processing, the performance control program extracts and creates game board-side light emission data SL-DAT from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, based on the light emission data indicated by the pointer, which is arranged in a time series that constitutes the schedule data for generating the light emission patterns, and outputs a lighting signal, a blinking signal, or a gradation lighting signal to multiple LEDs on various decorative boards provided on the game board 5, and sets it in the peripheral control RAM. It also extracts and creates door-side light emission data STL-DAT from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, and sets it in the peripheral control RAM, for outputting a lighting signal, a blinking signal, or a gradation lighting signal to multiple LEDs on various decorative boards provided on the door frame 3.

[0162] Following step S1028, the performance control program performs display data creation processing (step S1030). In this display data creation processing, the performance control program extracts the screen data indicated by the pointer from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, from the screen data arranged in a time series that constitutes the screen generation schedule data, which was updated in the scheduler update processing of step S1020, and outputs it to the sound source-integrated VDP. When the sound source-integrated VDP receives screen data from the peripheral control MPU, it extracts character data from the liquid crystal and sound control ROM 1512b based on this input screen data, creates sprite data, and generates drawing data for one screen (one frame) to be displayed on the game board side decoration board 3053 and the door frame side decoration board 233 on its built-in VRAM.

[0163] Following step S1030, the performance control program performs sound data creation processing (step S1032). In this sound data creation processing, the performance control program extracts the sound command data indicated by the pointer from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, which is arranged in a time series that constitutes the sound generation schedule data, after the pointer has been updated in the scheduler update processing of step S1020, and outputs it to the sound source-integrated VDP. When the sound source-integrated VDP receives sound command data from the peripheral control MPU, it extracts sound data such as music and sound effects stored in the liquid crystal and sound control ROM and controls the built-in sound source to incorporate the sound data such as music and sound effects according to the track number specified in the sound command data, and sets the output channel to be used according to the output channel number.

[0164] Following step S1032, the performance control program performs a backup process (step S1034). In this backup process, the performance control program copies the contents stored in the peripheral control MPU and the externally connected peripheral control RAM to the first backup area and the second backup area, respectively, and also copies the contents stored in the peripheral control SRAM and the externally connected peripheral control MPU to the first backup area and the second backup area, respectively, to back them up.

[0165] Following step S1034, a WDT clear process is performed (step S1036). In this WDT clear process, a clear signal is output to the built-in peripheral control WDT1511af and the external peripheral control WDT1511e to prevent the peripheral control MPU from being reset.

[0166] Following step S1036, the performance control program sets the value of the steady-state processing flag SP-FLG to 0 to indicate the completion of the steady-state processing of the peripheral control unit (step S1038), returns to step S1006, initializes the V-blank signal detection flag VB-FLG by setting the value to 0, and repeatedly performs the determination in step S1008 until the value of the V-blank signal detection flag VB-FLG is set to 1 in the peripheral control unit V-blank signal interrupt processing described later. In other words, in step S1008, the program waits until the value of the V-blank signal detection flag VB-FLG is set to 1, and if it is determined in step S1008 that the V-blank signal detection flag VB-FLG is 1, the processing in steps S1009 to S1038 is performed, and the program returns to step S1006. Thus, if it is determined in step S1008 that the V-blank signal detection flag VB-FLG is 1, the processing in steps S1009 to S1038 is performed. The processing from steps S1009 to S1038 is called "peripheral control unit steady-state processing".

[0167] This peripheral control unit steady-state processing begins in step S1009 when the performance control program sets the steady-state processing flag SP-FLG to 1, indicating that the peripheral control unit steady-state processing is in progress. This is followed by the 1ms interrupt timer activation process in step S1010, and then the processes in steps S1012, S1014, ..., and S1036. Finally, in step S1038, the steady-state processing flag SP-FLG is set to 0, indicating that the peripheral control unit steady-state processing is complete. The peripheral control unit steady-state processing is executed in step S1008 when the V-blank signal detection flag VB-FLG is set to 1. As mentioned above, this V-blank signal detection flag VB-FLG is set to 1 in the peripheral control unit V-blank signal interrupt process, which is executed when a V-blank signal indicating that the system is ready to accept screen data from the peripheral control MPU is input from the sound source's built-in VDP. In this embodiment, the frame frequency (number of screen updates per second) of the game board-side decorative board 3053 and the door frame-side decorative board 233 is set to approximately 30 fps per second, as described above. Therefore, the interval at which the V-blank signal is input is approximately 33.3 ms (= 1000 ms ÷ 30 fps). In other words, the peripheral control unit's steady-state processing is repeatedly executed approximately every 33.3 ms.

[0168] Next, we will explain the peripheral control V-blank signal interrupt processing, which is executed when a V-blank signal, indicating that the peripheral control unit 1511 is ready to receive screen data from the peripheral control MPU, is input from the sound source-integrated VDP of the liquid crystal display control unit 1512, as shown in Figure 61. When this peripheral control V-blank signal interrupt processing starts, the peripheral control MPU of the peripheral control unit 1511 determines whether the steady-state processing flag SP-FLG is valued at 0, as shown in Figure 61 (step S1045). As described above, this steady-state processing flag SP-FLG is set to a value of 1 when the peripheral control steady-state processing in steps S1009 to S1038 of the peripheral control power-on processing in Figure 60 is being executed, and to a value of 0 when the peripheral control steady-state processing has been completed.

[0169] If the steady-state processing flag SP-FLG in step S1045 is not valued as 0 (i.e., valued as 1), meaning that the peripheral control unit is currently performing steady-state processing, this routine terminates. On the other hand, if the steady-state processing flag SP-FLG in step S1045 is valued as 0, meaning that the peripheral control unit has completed the execution of steady-state processing, the V-blank signal detection flag VB-FLG is set to value 1 (step S1050), and this routine terminates. As described above, this V-blank signal detection flag VB-FLG is a flag used to determine whether or not to perform steady-state processing of the peripheral control unit, and is set to value 1 when the peripheral control unit is performing steady-state processing, and to value 0 when the peripheral control unit is not performing steady-state processing.

[0170] Next, we will explain the peripheral control 1ms timer interrupt process, which is repeatedly executed each time a 1ms interrupt timer occurs due to the activation of the 1ms interrupt timer in step S1010 of the peripheral control steady-state processing in the peripheral control power-on processing shown in Figure 60. When this peripheral control 1ms timer interrupt process is started, the peripheral control MPU of the peripheral control unit 1511 determines whether the number of 1ms timer interrupt executions STN is less than 33, as shown in Figure 62 (step S1100). This number of 1ms timer interrupt executions STN is a counter that counts the number of times the 1ms interrupt timer is activated in the 1ms interrupt timer activation process in step S1010 of the peripheral control steady-state processing in the peripheral control power-on processing shown in Figure 60, and this routine, the peripheral control 1ms timer interrupt process, is executed. In this embodiment, the frame frequency (number of screen updates per second) of the game board-side decorative board 3053 and the door frame-side decorative board 233 is set to approximately 30 fps per second, as described above. Therefore, the interval at which the V-blank signal is input is approximately 33.3 ms (= 1000 ms ÷ 30 fps). In other words, the peripheral control unit steady-state processing is executed repeatedly every approximately 33.3 ms. Therefore, after the 1 ms interrupt timer is activated in step S1010 of the peripheral control unit steady-state processing, the peripheral control unit 1 ms timer interrupt processing is executed only 32 times before the next peripheral control unit steady-state processing is executed. Specifically, when the 1 ms interrupt timer is activated in step S1010 of the peripheral control unit steady-state processing, the first 1 ms timer interrupt occurs, followed by the second, ..., and then the 32nd 1 ms timer interrupt.

[0171] In step S1100, if the number of 1ms timer interrupt executions STN is not less than 33, that is, when the 33rd 1ms timer interrupt occurs and the peripheral control unit 1ms timer interrupt processing starts, this routine terminates immediately. If the 33rd 1ms timer interrupt happens to precede the next V-blank signal, in this embodiment, although the priority of the peripheral control unit 1ms timer interrupt processing is set higher than that of the peripheral control unit V-blank interrupt processing, the start of the peripheral control unit 1ms timer interrupt processing due to the 33rd 1ms timer interrupt is forcibly canceled. In other words, in this embodiment, since the V-blank signal is a signal that governs the entire system of the peripheral control board 1510, if the 33rd 1ms timer interrupt happens to precede the next V-blank signal, the start of the peripheral control unit 1ms timer interrupt processing due to the 33rd 1ms timer interrupt is forcibly canceled in order to execute the peripheral control unit V-blank interrupt processing. Then, upon generation of the V-blank signal, the 1ms interrupt timer is restarted in step S1010 of the peripheral control unit's steady-state processing, and the peripheral control unit's 1ms timer interrupt processing is started again due to the generation of the first 1ms timer interrupt.

[0172] On the other hand, if the number of 1ms timer interrupt executions STN in step S1100 is less than 33, the value 1 is added to the number of 1ms timer interrupt executions STN (incremented, step S1102). By adding 1 to the number of 1ms timer interrupt executions STN, the number of times the 1ms interrupt timer is activated in the 1ms interrupt timer activation process in step S1010 of the peripheral control steady-state processing in the peripheral control power-on processing shown in Figure 60, and the execution of this routine, the peripheral control 1ms timer interrupt processing, increases by 1.

[0173] Following step S1102, motor and solenoid drive processing is performed (step S1104). In this motor and solenoid drive processing, various motors and solenoids are driven according to the drive data indicated by the pointer, from among the drive data of electrical drive sources such as motors and solenoids arranged in a time series that constitutes the electrical drive source schedule data set in the peripheral control MPU and peripheral control RAM. At the same time, the pointer is updated to the next drive data specified in the time series, and the pointer is updated each time this motor and solenoid drive processing is executed.

[0174] Following step S1104, the movable body information acquisition process is performed (step S1106). In this movable body information acquisition process, it is determined whether or not detection signals have been input from various detection switches provided on the game board 5, and history information of the detection signals from the various detection switches (for example, original position history information, movable position history information, etc.) is created and set in the peripheral control RAM. From the history information of the detection signals from the various detection switches set in this peripheral control RAM, the original position, movable position, etc., of the various movable bodies provided on the game board 5 can be obtained.

[0175] Following step S1106, the process of acquiring performance operation unit information is performed (step S1108). In this performance operation unit information acquisition process, it is determined whether or not detection signals have been input from the various detection switches provided on the performance operation unit 220, and history information of the detection signals from the various detection switches (for example, operation history information of operation button 220C) is created and set in the peripheral control RAM. Whether or not operation button 220C has been operated can be obtained from the history information of the detection signals from the various detection switches set in this peripheral control RAM.

[0176] Following step S1108, drawing status information acquisition processing is performed (step S1110). In this drawing status information acquisition processing, history information of the LOCKN signal output from the door frame side performance receiver IC of the door frame side decorative board 233 is created and set in the peripheral control RAM. As mentioned above, the LOCKN signal is a signal output by the door frame side performance receiver ICSDIC0 of the door frame side decorative board 233 to indicate that the drawing data received from the door frame side performance transmitter IC 1512d provided on the peripheral control board 1510 is abnormal.

[0177] Following step S1110, a backup process is performed (step S1112), and this routine is terminated. In this backup process, the contents stored in the peripheral control RAM are copied to the first backup area and the second backup area, respectively, and the contents stored in the peripheral control SRAM are also copied to the first backup area and the second backup area, respectively, for backup.

[0178] Thus, in the peripheral control unit's 1ms timer interrupt processing, various processing related to the performance described in steps S1104 to S1108 is executed within a period of 1ms as the performance progresses. In contrast, in the peripheral control unit's steady-state processing during the peripheral control unit power-on processing shown in Figure 60, various processing related to the performance described in steps S1012 to S1032 is executed within a period of approximately 33.3ms as the performance progresses. In the peripheral control unit's 1ms timer interrupt processing, if the number of 1ms timer interrupt executions STN in step S1100 is not less than 33, that is, when the 33rd 1ms timer interrupt occurs and this peripheral control unit's 1ms timer interrupt processing starts, the routine terminates immediately. Therefore, even if the 33rd 1ms timer interrupt happens to precede the next V-blank signal, the start of the peripheral control unit's 1ms timer interrupt processing due to this 33rd 1ms timer interrupt is forcibly canceled. After the 1ms interrupt timer is restarted in step S1010 of the peripheral control unit's steady-state processing due to the V-blank signal, the peripheral control unit's 1ms timer interrupt processing starts anew due to the occurrence of the first 1ms timer interrupt. In other words, consistency is maintained between the progress of the performance by the peripheral control unit's steady-state processing and the progress of the performance by the peripheral control unit's 1ms timer interrupt processing, which is timer interrupt control. Thus, the progress of the performance can be reliably matched.

[0179] Furthermore, as mentioned above, the interval at which the V-blank signal is output varies slightly depending on the size of the liquid crystals on the game board side decorative board 3053 and the door frame side decorative board 233, and the interval at which the V-blank signal is output may also vary slightly depending on the manufacturing lot of the peripheral control board 1510 on which the peripheral control MPU and the sound source built-in VDP are mounted. In this embodiment, since the V-blank signal is a signal that governs the entire system of the peripheral control board 1510, if the occurrence of the 33rd 1ms timer interrupt happens to precede the occurrence of the next V-blank signal, the start of the peripheral control 1ms timer interrupt processing by the 33rd 1ms timer interrupt is forcibly canceled in order to execute the peripheral control V-blank interrupt processing. In other words, in this embodiment, even if the interval at which the V-blank signal is output changes slightly, the time difference caused by this slight change in the interval at which the V-blank signal is output can be absorbed by forcibly canceling the start of the peripheral control 1ms timer interrupt processing by the 33rd 1ms timer interrupt.

[0180] [3-4. Liquid Crystal Display Control Unit] Next, the liquid crystal display control unit 1512 on the peripheral control board 1510, which controls the drawing of the main liquid crystal display device 1600, the sub-liquid crystal display device 3114, and the top-mounted liquid crystal display device 244, is not shown in detail in the illustration, but it includes a display control MPU as a microprocessor, a display control ROM that stores various processing programs, various commands, and various data, a VDP (abbreviation for Video Display Processor) that controls the display of the main liquid crystal display device 1600 and the top-mounted liquid crystal display device 244, an image ROM (performance data ROM) that stores various data of the screen displayed on the main liquid crystal display device 1600, the sub-liquid crystal display device 3114, and the top-mounted liquid crystal display device 244, and an image RAM to which the various data stored in this image ROM (performance data ROM) is transferred and copied.

[0181] This display control MPU incorporates parallel I / O ports, serial I / O ports, etc., and controls the VDP based on control data (display commands) from the peripheral control unit 1511 to control the drawing of the main LCD display 1600, sub-LCD display 3114, and upper-tray LCD display 244. When the display control MPU is operating normally, it outputs an operation signal to the peripheral control unit 1511 to indicate this. The display control MPU also receives an execution signal from the VDP, and triggers an interrupt process when the output of this execution signal stops every 16ms.

[0182] The display control ROM stores various programs for generating screens to be drawn on the main liquid crystal display device 1600, the sub-liquid crystal display device 3114, and the top-mounted liquid crystal display device 244, as well as control data (display commands) from the peripheral control unit 1511 and corresponding schedule data, and non-resident area transfer schedule data corresponding to that control data (display commands). The schedule data is composed of screen data that defines the screen configuration arranged in chronological order, and defines the order in which screens are drawn on the main liquid crystal display device 1600, the sub-liquid crystal display device 3114, and the top-mounted liquid crystal display device 244. The non-resident area transfer schedule data is composed of non-resident area transfer data that defines the order in which various data stored in the image ROM (performance data ROM) are transferred to the non-resident area of ​​the image RAM, arranged in chronological order. This non-resident area transfer data has a defined sequence for transferring various data from the image ROM (performance data ROM) to the non-resident area of ​​the image RAM in advance, in accordance with the progress of the schedule data, so that the screen data to be drawn on the main liquid crystal display 1600, sub-liquid crystal display 3114, and upper tray liquid crystal display 244 can be displayed.

[0183] The display control MPU extracts the first screen data from the display control ROM, corresponding to the control data (display command) from the peripheral control unit 1511, and outputs it to the VDP. Then, it extracts the screen data following the first screen data from the display control ROM and outputs it to the VDP. In this way, the display control MPU extracts the screen data arranged chronologically in the schedule data one by one from the display control ROM, starting from the first screen data, and outputs it to the VDP.

[0184] When the VDP receives screen data output from the display control MPU, it extracts sprite data from the image RAM based on this input screen data and generates drawing data to be displayed on the main liquid crystal display 1600, the sub-liquid crystal display 3114, and the upper-tray liquid crystal display 244. The VDP then outputs this generated drawing data to the main liquid crystal display 1600, the sub-liquid crystal display 3114, and the upper-tray liquid crystal display 244. Furthermore, when the main liquid crystal display 1600, the sub-liquid crystal display 3114, or the upper-tray liquid crystal display 244 does not accept screen data from the display control MPU, the VDP outputs an execution signal to the display control MPU to indicate this. The VDP employs a line buffer method. This "line buffer method" is a method in which drawing data for one line, which is drawn in the left-right direction on the main liquid crystal display 1600, sub-liquid crystal display 3114, and upper-tray liquid crystal display 244, is stored in a line buffer, and this drawing data for one line, stored in the line buffer, is output to the main liquid crystal display 1600, sub-liquid crystal display 3114, and upper-tray liquid crystal display 244.

[0185] The image ROM (performance data ROM) stores a very large amount of sprite data, resulting in a large capacity. When the capacity of the image ROM (performance data ROM) increases, that is, when the number of sprites to be drawn on the main LCD display 1600, sub-LCD display 3114, and upper-tray LCD display 244 increases, the access speed of the image ROM (performance data ROM) becomes significant, affecting the drawing speed on the main LCD display 1600, sub-LCD display 3114, and upper-tray LCD display 244. Therefore, in this embodiment, the sprite data stored in the image ROM (performance data ROM) is transferred and copied to the image RAM, which has a faster access speed, and the sprite data is extracted from this image RAM. Note that the sprite data is the base data, which is the data before the sprite is expanded into bitmap format, and is stored in the image ROM (performance data ROM) in a compressed state.

[0186] To explain "sprites" here, a "sprite" is an image that is displayed as a group on the main LCD display 1600 or the upper LCD display 244. For example, when displaying various people (characters) on the main LCD display 1600, sub-LCD display 3114, and upper LCD display 244, the data used to draw each person is called a "sprite." Therefore, when displaying multiple people on the main LCD display 1600, sub-LCD display 3114, or upper LCD display 244, multiple sprites are used. In addition to people, houses, mountains, roads, etc. that make up the background are also sprites, and the entire background can be treated as a single sprite. These sprites are drawn on the main LCD display 1600, sub-LCD display 3114, and upper LCD display 244 after their positions on the screen and the hierarchical order in which sprites overlap (hereinafter referred to as "sprite overlapping order") are set.

[0187] A sprite is composed of multiple rectangular areas, each 64 pixels wide and 64 pixels high. The data used to draw these rectangular areas is called a "sprite character." Small sprites can be represented using a single sprite character, while larger sprites, such as people, can be represented using a total of six sprite characters arranged, for example, in a 2x3 grid. Even larger sprites, such as backgrounds, can be represented using even more sprite characters. Thus, the number and arrangement of sprite characters can be arbitrarily specified for each sprite.

[0188] The main liquid crystal display device 1600, the sub-liquid crystal display device 3114, and the top-tray liquid crystal display device 244 are driven by a main scan that sets the display state of each pixel in one direction along the pixels, sequentially from left to right when viewed from the front, and a sub-scan that repeatedly performs the main scan in a direction intersecting that direction. When the main liquid crystal display device 1600, the sub-liquid crystal display device 3114, and the top-tray liquid crystal display device 244 receive drawing data for one line output from the liquid crystal display control unit 1512, they output to each pixel of one line sequentially from left to right when viewed from the front, as a main scan. Once the output for one line is complete, the main liquid crystal display 1600, the sub-liquid crystal display 3114, and the upper tray liquid crystal display 244 move to the line directly below as a sub-scan. Similarly, when drawing data for the next line is input, the main liquid crystal display 1600, the sub-liquid crystal display 3114, and the upper tray liquid crystal display 244 sequentially output to the pixels of one line, viewed from left to right as seen from the front, based on this drawing data for the next line.

[0189] [4. Game details] Next, the gameplay of the pachinko machine 1 of this embodiment will be explained, mainly with reference to Figures 10, 16, and 17. In the pachinko machine 1 of this embodiment, the player rotates the handle lever 504 of the handle unit 500 located in the lower right corner of the front of the door frame 3. This causes the game balls stored in the upper tray 201 of the tray unit 200 to pass through the gap between the outer rail 1001 and the inner rail 1002 of the game board 5 and be driven into the upper part of the game area 5a, thus starting the game with the game balls. The game balls driven into the upper part of the game area 5a flow down either to the left or right of the center mechanism 2500, depending on the force with which they are driven. The force with which the game balls are driven can be adjusted by the amount of rotation of the handle lever 504. The more it is rotated clockwise, the stronger the balls are driven, and it is possible to continuously drive up to 100 game balls per minute, that is, at intervals of 0.6 seconds.

[0190] Furthermore, within the game area 5a, multiple obstacle pins (not shown) are planted on the front surface of the game panel 1100 (panel board 1110) at appropriate positions in a predetermined gauge arrangement. When the game balls come into contact with the obstacle pins, the flow velocity of the game balls is suppressed, and various movements are imparted to the game balls, allowing players to enjoy these movements. In addition to the obstacle pins, windmills (not shown) that rotate when the game balls come into contact with them are also provided at appropriate positions within the game area 5a.

[0191] When a game ball is driven into the upper part of the center mechanism 2500, it enters the area to the left of the highest point on the outer surface of the front periphery wall 2512 of the center mechanism 2500 when viewed from the front, and flows down the area to the left of the center mechanism 2500 while abutting against several obstacle pins (not shown). When the game ball flowing down the area to the left of the center mechanism 2500 enters the warp entrance 2520 which opens on the outer surface of the front periphery wall 2512 of the center mechanism 2500, it is supplied to the stage 2530 via the warp passage 2521, warp exit 2522 which opens within the frame of the center mechanism 2500, and guide path 2523.

[0192] The game balls supplied to the stage 2530 from the warp exit 2522 roll back and forth on the stage 2530 and are released backward from either the central guide unit 2531 in the center in the left-right direction, or the side guide units 2532 on either side thereof. When the game balls are released into the game area 5a from the central guide unit 2531 of the stage 2530, since this central guide unit 2531 is located directly above the first start opening 2002, the game balls released from the central guide unit 2531 are received into the first start opening 2002 with a high probability. When the game balls are received into the first start opening 2002, a predetermined number (for example, 3) of game balls are dispensed from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

[0193] The game balls rolling on the stage 2530 are released into the game area 5a from the side guide unit 2532 and flow down toward the starter unit 2100. The game balls released into the game area 5a from the stage 2530 of the center mechanism 2500 may be received by the first starter opening 2002 or the open first large prize opening 2005 of the starter unit 2100.

[0194] Incidentally, if a game ball that flows down to the left side of the center mechanism 2500 does not enter the warp entrance 2520, it is moved towards the center in the left-right direction by the shelf section 2302 on the upper side unit 2300 and may be received by the general prize entry opening 2001 or the first start opening 2002 on the lower side unit 2200. When a game ball is received by the general prize entry opening 2001, a predetermined number (for example, 10) of game balls are dispensed from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

[0195] On the other hand, if a game ball that has been driven into the upper part of the center mechanism 2500 within the game area 5a enters (is driven into) a point to the right of the highest point on the outer surface of the front peripheral wall portion 2512 of the center mechanism 2500, it enters the upper right circulation space 2541 of the right-hand game area 2540. In this upper right circulation space 2541, although not shown in the diagram, several obstacle pins are planted, and the game ball flows through while coming into contact with the obstacle pins and changing its direction of flow in various ways. In this upper right circulation space 3541, there is a gate portion 2003 at the top and a general prize entry opening 2001 and a second start opening 2004 at the bottom, which is normally closed by a second start opening door member 2549.

[0196] The game balls that flow down through the upper right distribution space 2541 enter the lower right distribution space 2543 via the right distribution passage 2542 downstream. The game balls that enter this lower right distribution space 2543 pass through the second attacker passage 2543a, which has its upper surface forming the bottom surface of the second upper large prize opening door member 2552 and the second lower large prize opening door member 2555 that close the second upper large prize opening 2006a and the second lower large prize opening 2006b, which are arranged side by side as the second large prize opening 2006, and are released into the game area 5a from the left end of the lowered release plate section 2559 on the left side in a front view. The downstream end (discharge plate section 2559) of the second attacker passage 2543a is open so that the game balls are directed toward the first large prize opening 2005 of the starter unit 2100. When the first large prize opening 2005 is open, if game balls are released from the second attacker passage 2543a into the game area 5a, there is a high probability that the game balls will be received by the first large prize opening 2005.

[0197] Game balls flowing through the right-hand flow passage 2542 and the lower-right flow space 2543 flow down while their flow speed is suppressed by multiple deceleration ribs 2546. Very rarely, game balls may enter the discharge passage 2543b, which branches off near the upstream end of the second attacker passage 2543a, within the lower-right flow space 2543. Game balls that enter the discharge passage 2543b are not returned to the game area 5a but are discharged outside the game board 5 through the second out opening 2543c.

[0198] When a game ball is hit to the right and enters the upper right circulation space 2541, and passes through the gate section 2003 and is detected by the gate sensor 2547, the main control board 1310 obtains a random number from among random numbers updated within a predetermined numerical range, and performs a normal lottery by comparing this obtained random number with a predetermined normal win determination table. If the time-saving control described later is not being executed and the result of this normal lottery is a "normal win", the second start opening door member 2549 rotates once in a counterclockwise direction when viewed from the front, opening the second start opening 2004, and game balls can be received into the second start opening 2004 for a predetermined time (0.5 seconds in this example). On the other hand, if the time-saving control is being executed, the normal lottery determines whether the result is a "normal win" and is either a "first normal win", a "second normal win", or a "third normal win". Then, when time-saving control is in operation, if the result of the normal lottery is "first normal win," "second normal win," or "third normal win," the second start opening door member 2549 rotates counterclockwise in a front view to open the second start opening 2004, allowing game balls to be received into the second start opening 2004 for a predetermined period of time. After that, it rotates counterclockwise in a front view to close the second start opening 2004, making it impossible to receive game balls into the second start opening 2004. This opening and closing control is repeated a predetermined number of times (5 times in this example). Furthermore, if the result of the regular lottery is "First Regular Win," the periods for each of the five times the second start gate 2004 is made ready to accept game balls will be "0.3 seconds," "0.28 seconds," "0.3 seconds," "0.28 seconds," and "0.3 seconds." If the result of the regular lottery is "Second Regular Win," the periods for each of the five times the second start gate 2004 is made ready to accept game balls will be "0.3 seconds," "0.28 seconds," and "1.1 seconds." The periods for each of the five times the second starting port 2004 is made ready to accept game balls are set to "0.28 seconds" and "0.3 seconds," respectively, when the result of the regular lottery is a "third regular win," and the periods for each of the five times the second starting port 2004 is made ready to accept game balls are set to "0.3 seconds," "0.28 seconds," "0.3 seconds," "0.28 seconds," and "1.1 seconds." Therefore, the "second regular win" and "third regular win" are more advantageous to the player than the "first regular win" (it is easier to accept game balls into the second starting port 2004).Furthermore, when a game ball is received into the second starting port 2004, a predetermined number (for example, 3) of game balls are dispensed from the dispensing device 830 to the upper tray 201 via the main control board 1310 and the dispensing control board 951.

[0199] In this embodiment, when the normal symbol fluctuation display on the normal symbol display unit 1400 is performed based on the fact that a game ball has passed through the gate section 2003, a certain amount of time is set from the start of the normal symbol fluctuation display until the normal symbol is stopped (until the normal lottery result is indicated) (for example, 0.01 to 60 seconds, also referred to as the normal fluctuation time). At the second start opening 2004, the second start opening door member 2549 rotates to open after the normal fluctuation time has elapsed. During the execution of the time-saving control described later, control is performed to shorten the normal fluctuation time compared to normal (when time-saving control is not being performed). Furthermore, the opening time for rotating the second start opening door member 2549 to open the second start opening 2004 may be changed according to the game state. For example, when time-saving control is not being performed, the opening time of the second start opening 2004 may be changed to a longer time compared to when time-saving control is being performed.

[0200] Furthermore, if a new game ball passes through the gate section 2003 between the time a game ball passes through the gate section 2003 and the time the regular symbols displayed on the regular symbol display unit stop (until the regular lottery result is indicated), the regular symbol display unit cannot start displaying the new regular symbols. Therefore, the start of the regular symbol display is suspended until the previous regular symbol display has finished (until the indication of the regular lottery result has finished). Specifically, the gate sensor 2547 detects the game ball that has passed through the gate section 2003, and the main control board 1310 stores the acquired regular random number and suspends the start of the regular symbol display until it is ready to start. The main control board 1310 can store up to four regular random numbers, and any numbers beyond that are discarded without being stored, even if a game ball passes through the gate section 2003. This suppresses the increase in the burden on the game hall due to the accumulation of stored numbers.

[0201] In this embodiment, when a game ball received into the first start port 2002 is detected by the first start port sensor 2104, the main control board 1310 obtains a first special random number from among first special random numbers updated within a predetermined numerical range, and by comparing this obtained first special random number with a predetermined jackpot determination table, a lottery is held to determine a first special lottery result that will generate a favorable game state for the player (for example, "jackpot", "minor win", etc.). Then, based on the lottery result of the first special lottery, the eight LEDs of the first special symbol display are controlled to blink for a predetermined variation time (for example, 0.1 to 360 seconds), and then displayed in a lighting pattern corresponding to the first special lottery result (the first special symbol is displayed in a variation, and then the stopped symbol corresponding to the first special lottery result is displayed), thereby indicating the first special lottery result to the player. Furthermore, the first special lottery result, which is drawn when a game ball is received into the first starting port 2002, has the following possibilities: "miss," "minor win," "2R jackpot," "8R jackpot," and "10R jackpot." By comparing the acquired first special random number with the jackpot determination table, it is determined which of these the result is. In addition, it is determined whether or not to execute a probability improvement control (high probability state (also called a probability variation state): in this example, a probability of winning a jackpot of about 1 in 44) which increases the probability of winning a jackpot (winning probability) compared to the normal state (low probability state: in this example, a probability of winning a jackpot of about 1 in 395) after a jackpot game (whether or not it is a probability variation jackpot), whether or not to execute a time reduction control (time reduction state) which shortens the variation time compared to normal if at least the first special lottery result is a miss (whether or not it is a time reduction jackpot), and the period for which the time reduction control is executed (number of time reductions: number of variations of special symbols (first special striking symbols and second special symbols)). The probability of winning a "minor win" is always constant regardless of the game state (approximately 1 in 300 in this example).

[0202] Furthermore, when a game ball received into the second start port 2004 is detected by the second start port sensor 2551, the main control board 1310 obtains one second special random number from among the second special random numbers updated within a predetermined numerical range, and by comparing this obtained second special random number with a predetermined jackpot determination table, a lottery is held to determine a second special lottery result that will generate a favorable game state for the player (for example, "jackpot", "minor win", etc.). Then, based on the lottery result for the second special lottery, the eight LEDs of the second special symbol display are controlled to blink for a predetermined variation time (for example, 0.1 to 360 seconds), and then displayed in a lighting pattern corresponding to the second special lottery result (the second special symbol is displayed in a variation, and then the stopped symbol corresponding to the second special lottery result is displayed), thereby indicating the second special lottery result to the player. Furthermore, the second special lottery result, which is drawn when a game ball is accepted into the second starting slot 2004, has the following possibilities: "Miss," "2R Jackpot," "4R Jackpot," "5R Jackpot," "6R Jackpot," "7R Jackpot," "8R Jackpot," and "16R Jackpot." By comparing the acquired second special random number with the jackpot determination table, it is determined which of these the result is. Moreover, after a jackpot game, the probability of winning a jackpot is higher than in normal (low probability state: in this example, the probability of winning a jackpot is approximately 1 in 395). The system also determines whether or not to implement probability enhancement control (high probability state (also called probability variation state): in this example, there is a probability of winning a jackpot of approximately 1 in 44) to improve the probability of winning (probability of winning), whether or not to implement time-saving control (time-saving state) to shorten the variation time compared to normal if at least the result of the second special lottery is a loss (time-saving jackpot or not), and the period for which the time-saving control is implemented (number of time-saving rounds: number of rounds of special symbols (number of rounds of the first special symbol and the second special symbol)).

[0203] If the special lottery result (first special lottery result and second special lottery result) determined by the acceptance of game balls into the first start opening 2002 and the second start opening 2004 is a special lottery result that generates a favorable game state, after a predetermined variation time has elapsed, the eight LEDs of the special symbol indicators (first special symbol indicator and second special symbol indicator) will be displayed in a lighting pattern corresponding to the special lottery result, and thereafter, either the first major prize opening 2005 or the second major prize opening 2006 will be in a predetermined opening and closing pattern that allows for the acceptance of game balls. When the first and second large prize slots 2005 and 2006 are open, and game balls are received into them, the main control board 1310 and the payout control board 951 dispense a predetermined number of game balls (for example, 11 if game balls are received into the first large prize slot 2005, or 15 if game balls are received into the second large prize slot 2006) from the payout device 830 to the upper tray 201. Therefore, by allowing game balls to be received into the first and second large prize slots 2005 and 2006 when they are ready to receive game balls, a large number of game balls can be dispensed, providing enjoyment for the players.

[0204] If the special lottery result is a "minor win" or a "2R big win," the first large prize slot 2005 will open to accept game balls for a predetermined short time (for example, between 0.2 seconds and 0.6 seconds) and then close, repeating this opening and closing pattern multiple times (for example, twice). On the other hand, if the special lottery result is "4R jackpot", "5R jackpot", "6R jackpot", "7R jackpot", "8R jackpot", "10R jackpot", or "16R jackpot", then after the first jackpot 2005 or the second jackpot 2006 is open to accept game balls, if a predetermined time (for example, about 30 seconds) has elapsed, or if a predetermined number of game balls (for example, 7) have been accepted into the first jackpot 2005 or a predetermined number of game balls (for example, 10) have been accepted into the second jackpot 2006, then an opening and closing pattern (one opening and closing pattern is referred to as one round) that makes it impossible to accept game balls is repeated a predetermined number of times (a predetermined number of rounds). For example, a "4R jackpot" will result in 4 rounds, a "5R jackpot" in 5 rounds, and a "16R jackpot" in 16 rounds, each repeating to create a favorable game state for the player. Furthermore, in the opening and closing pattern executed when the special lottery result is a "minor win" or a "2R jackpot" (an opening and closing pattern in which the first large prize slot 2005 is open for a predetermined short time (for example, between 0.2 and 0.6 seconds) to accept game balls before closing), it is practically difficult to get game balls into the first large prize slot 2005. In contrast, the opening and closing pattern that is executed when the special lottery result is "4R jackpot", "5R jackpot", "6R jackpot", "7R jackpot", "8R jackpot", "10R jackpot", or "16R jackpot" (an opening and closing pattern that closes the first or second large prize slot 2005 to an unacceptable state after a predetermined time (for example, about 30 seconds) has elapsed since the opening was opened to accept game balls, or when a predetermined number of game balls (for example, 7) have been accepted into the first large prize slot 2005 or a predetermined number of game balls (for example, 10) have been accepted into the second large prize slot 2006) makes it easy to get game balls into the first or second large prize slot 2005.Furthermore, if the special lottery result is "4R jackpot", "5R jackpot", "6R jackpot", "7R jackpot", "8R jackpot", "10R jackpot", or "16R jackpot", then the number of rounds in which the opening and closing pattern is executed to close the opening and closing state to prevent the acceptance of game balls will be effectively reduced if either of the following conditions is met: after a predetermined time (for example, about 30 seconds) has elapsed since the first or second large prize slot 2005 opened to accept game balls, a predetermined number of game balls (for example, 7) are accepted into the first large prize slot 2005, or a predetermined number of game balls (for example, 10) are accepted into the second large prize slot 2006. The special lottery result may also be a general one, and if either of the following conditions is met as a special lottery result, a predetermined number of game balls (for example, 7) are accepted into the first large prize slot 2005 or a predetermined number of game balls (for example, 10) are accepted into the second large prize slot 2006, then multiple rounds may be executed, including an opening / closing pattern that puts the slots into a closed state where game balls cannot be accepted, and an opening / closing pattern that is executed when the special lottery result is a "minor win" or a "2R big win" (an opening / closing pattern in which the first large prize slot 2005 is in an open state where game balls can be accepted for a predetermined short time (for example, between 0.2 seconds and 0.6 seconds) before closing). For example, if a special lottery result is set as "an 8R jackpot that effectively becomes 4R", and either a predetermined number of game balls (for example, 7) are accepted into the first large prize slot 2005 or a predetermined number of game balls (for example, 10) are accepted into the second large prize slot 2006, then an opening and closing pattern that makes it impossible to accept game balls is repeated four times. After that, an opening and closing pattern that is executed when the special lottery result is "minor win" or "2R jackpot" (an opening and closing pattern in which the first large prize slot 2005 is open for a predetermined short time (for example, between 0.2 seconds and 0.6 seconds) before closing) is repeated four times.

[0205] In this embodiment, the second large prize slot 2006 is composed of a second upper large prize slot 2006a and a second lower large prize slot 2006b, which are arranged side by side. When a "jackpot" is hit using the second large prize slot 2006, for example, in the first round (1st round), the second upper large prize slot 2006a is opened to accept game balls, and when the conditions for acceptance are met, it is closed. During the interval until acceptance is possible again, the second lower large prize slot 2006b is opened to accept game balls and the next round (2nd round) begins. When the second lower large prize slot 2006b becomes unacceptable, the interval period has elapsed, so the second upper large prize slot 2006a is opened again to accept game balls. The second upper large prize slot 2006a and the second lower large prize slot 2006b are then opened and closed alternately until a predetermined number of rounds have been completed. As a result, within the second attacker passage 2543a, during a "jackpot," either the second upper prize pocket 2006a or the second lower prize pocket 2006b is in a state where it can accept game balls. Therefore, if a player shoots to the right in this state and circulates a game ball through the second attacker passage 2543a, that game ball will always be accepted into the second prize pocket 2006, eliminating the loss of game balls and allowing players to enjoy themselves.

[0206] Furthermore, in this embodiment, for some of the multiple types of jackpots described above, whether or not the above-mentioned time-saving control is executed after the jackpot game ends is determined differently depending on the game state at the time of winning the jackpot. For example, if the first special lottery result is an 8R regular jackpot in a non-time-saving state (a state in which time-saving control is not being executed) and the probability-enhancing control is not executed after the jackpot game, the time-saving control is not executed after the jackpot game. On the other hand, if the first special lottery result is an 8R regular jackpot in a time-saving state (a state in which time-saving control is being executed), the time-saving control is executed after the jackpot game. Also, if the second special lottery result is a 2R regular jackpot in a non-time-saving state (a state in which time-saving control is not being executed) and the probability-enhancing control is not executed after the jackpot game, the time-saving control is not executed after the jackpot game. On the other hand, if the second special lottery result is a 2R regular jackpot in a time-saving state (a state in which time-saving control is being executed), the time-saving control is executed after the jackpot game. Furthermore, in a low-probability, non-time-saving state (a state in which neither probability-enhancing control nor time-saving control is being executed: also called the normal state), if the results of the first and second special lotteries are 2R probability-changing jackpots that will execute probability-enhancing control after the jackpot game, time-saving control will not be executed after the jackpot game. On the other hand, in a state where probability-enhancing control is being executed or time-saving control is being executed, i.e., in a state other than the normal state, if the results of the first and second special lotteries are 2R probability-changing jackpots that will execute probability-enhancing control after the jackpot game, time-saving control will be executed after the jackpot game.

[0207] In this embodiment, the display of the first special symbol variation, which is executed by the first special symbol display unit upon receipt of a game ball into the first start port 2002, and the display of the second special symbol variation, which is executed by the second special symbol display unit upon receipt of a game ball into the second start port 2004, are not executed simultaneously, but only one of them is executed at a time. Therefore, if a new game ball is received into the first start port 2002 or the second start port 2004 between the time a game ball is received into the first start port 2002 and the time the first special symbol displayed on the first special symbol indicator stops (until the first special lottery result is indicated), and between the time a game ball is received into the second start port 2004 and the time the second special symbol displayed on the second special symbol indicator stops (until the second special lottery result is indicated), the first special symbol indicator and the second special symbol indicator cannot start displaying the first or second special symbol again. For this reason, the start of the display of the special symbols (first special symbol, second special symbol) is suspended until the display of the previous special symbols (first special symbol, second special symbol) has finished (until the indication of the first special lottery result or the second special lottery result is complete). Specifically, the system stores the first special random number acquired by the main control board 1310 based on the detection of a game ball received into the first start port 2002 by the first start port sensor 2104, and the second special random number acquired by the main control board 1310 based on the detection of a game ball received into the second start port 2004 by the second start port sensor 2551. The system then holds off on displaying the special symbols (first special symbol, second special symbol) until the system is ready to begin displaying them. The main control board 1310 can store up to four of each of the first and second special random numbers, and any numbers exceeding this limit are discarded even if game balls are received into the first and second start ports 2002 and 2004, without being stored. This prevents an increase in the burden on the arcade due to an accumulation of stored numbers. Furthermore, the main control board 1310 is configured to prioritize the processing of the second special random number between the first and second special random numbers stored in it.In other words, regardless of the timing of receiving game balls into the first start port 2002 and the second start port 2004, if the second special random number is stored and the start of the second special symbol's variation display is held in reserve, the variation display of the second special symbol will take precedence over that of the first special symbol.

[0208] The indication of the special lottery result is provided by the function display unit 1400 (first special symbol display, second special symbol display) and the main liquid crystal display device 1600 (the sub-liquid crystal display device 3114 may also be used). The function display unit 1400 is directly controlled by the main control board 1310 to indicate the special lottery result. The function display unit 1400 indicates the special lottery result by repeatedly turning the eight LEDs that make up the special symbol display (first special symbol display, second special symbol display) on and off for a predetermined time, and then stopping in a predetermined lighting pattern, and the combination of LEDs that are lit at this time indicates the special lottery result.

[0209] On the other hand, the main LCD display device 1600 is indirectly controlled by the peripheral control board 1510 based on control signals (variation pattern commands, judgment result notification commands, etc.) from the main control board 1310, and the special lottery results are suggested by the visual effects. Specifically, in the main LCD display device 1600, when a series of decorative symbol sequences consisting of multiple different symbols are displayed in multiple columns (for example, three columns of left decorative symbol, middle decorative symbol, and right decorative symbol), the variation display of each decorative symbol sequence begins, and then they are sequentially stopped (in this example, the left decorative symbol → right decorative symbol → middle decorative symbol are stopped in that order), and finally, when all decorative symbol sequences are stopped, the lottery results of special random numbers (first special random number, second special random number) extracted from the combination of symbols that were stopped are suggested to the player. In other words, based on the special random numbers (first special random number, second special random number) obtained when a prize is awarded upon starting, a special lottery result (first special lottery result, second special lottery result) is displayed, in which multiple rows of decorative symbols are displayed in a variable manner, and then a visual effect is displayed that suggests the special lottery result (first special lottery result, second special lottery result). Furthermore, since the decorative symbols displayed on the main LCD display 1600 are larger and easier to see than the first special symbols displayed in the first special symbol display unit and the second special symbols displayed in the second special symbol display unit, players generally focus on the decorative symbols displayed on the main LCD display 1600.

[0210] Note that the time indicated by the function display unit 1400 (LED blinking time (variation time)) and the time indicated by the main LCD display device 1600 (the time from when the pattern row changes until the confirmed image is displayed) are different, with the function display unit 1400 having a shorter time setting.

[0211] Furthermore, in addition to displaying a visual effect image on the main liquid crystal display device 1600 to indicate the result of the special lottery, the peripheral control board 1510 can appropriately use the decorative elements of the center mechanism 2500, the rear left-center decorative unit 3050, the rear lower-rear movable effect unit 3100, the rear upper-left movable effect unit 3200, the rear left movable effect unit 3300, the rear upper-center movable effect unit 3400, and the rear lower-front movable effect unit 3500, etc., according to the result of the special lottery, to perform lighting effects, movable effects, display effects, etc., thereby entertaining the player with various effects and preventing a decline in the player's interest in the game.

[0212] [5. Various control processes of the main control board] Next, we will describe the processes executed by the main control board 1310 in accordance with the progress of the game on the pachinko machine 1. Specifically, we will describe the system / user reset process executed when the power of the game machine is turned on, and the timer interrupt process executed at a predetermined period (4ms in this embodiment) by the timer activated by the system / user reset process.

[0213] [5-1. Initialization Process] Figures 21 and 22 are flowcharts showing the procedure for the initialization process of the main control board in an embodiment of the present invention.

[0214] When power is turned on to the pachinko machine 1, the main control MPU 1311 of the main control board 1310 performs initialization by executing the main control program. When the initialization process starts, the main control MPU 1311 first sets the protection of the RAM 1312 built into the main control MPU 1311 to write-enabled, making it possible to write to RAM 1312 (step S10). Specifically, it outputs "00H" to the RAM protect register to indicate write permission.

[0215] Next, the main control MPU 1311 activates the built-in watchdog timer (step S12). Specifically, it first writes "03H" to the watchdog timer control register to indicate the mode setting, and then writes "03H" to indicate the activation of the watchdog timer. Finally, it clears and resets the watchdog timer (step S14).

[0216] Next, it is determined whether a predetermined wait time has elapsed (step S16). Since the voltage does not rise immediately from the time the power to the pachinko machine 1 is turned on until it reaches a predetermined voltage, if the voltage falls below the power outage warning voltage between the time the power is turned on and the predetermined voltage is reached, a power outage warning signal is input from the power outage monitoring circuit. In the wait process, a predetermined monitoring wait value is set, and the process is made to wait for a predetermined time (for example, 200 milliseconds) while the watchdog timer is activated.

[0217] If a predetermined wait time has elapsed, the time required for the sub-board (such as the peripheral control board 1510) to start up has elapsed, so it is determined whether the RAM clear switch has been operated (step S18). If the RAM clear switch has been operated, the data in the work area of ​​the built-in RAM 1312, excluding the work area for calculating the payout ratio (payout ratio calculation area 13128), is erased (step S30), and the process proceeds to step S24. On the other hand, if the RAM clear switch has not been operated, the data backed up in the built-in RAM 1312 is not erased, and it is determined whether the power outage flag has been set (step S20). The power outage flag is a flag that is set when the power to the pachinko machine 1 is cut off after normal processing, such as when a power outage occurs (see step S56 in Figure 22).

[0218] As a result, if the power outage flag is not set, the data in the work area of ​​the built-in RAM 1312 may be incorrect, so the data backed up in the work area (except for the area 13128 for calculating the odds of winning combinations) is erased (step S30), and the process proceeds to step S24. On the other hand, if the power outage flag is set, the power outage flag is cleared, and the checksum calculated from the data backed up in the work area of ​​the built-in RAM 1312 using the checksum calculated at the time of the previous power outage is compared (verified) with the checksum stored in step S48 (step S22).

[0219] As a result, if the checksum calculated from the backup data does not match the checksum stored in step S48, the data in the work area of ​​the built-in RAM 1312 may be incorrect. Therefore, the data backed up in the work area (excluding the area 13128 for calculating the odds of winning combinations) is erased (step S30), and the process proceeds to step S24. On the other hand, if the checksum calculated from the backup data matches the checksum stored in step S48, the data in the work area of ​​the built-in RAM 1312 is correct. Therefore, the data backed up in the work area is not erased, and the process proceeds to step S24.

[0220] Next, a check code is used to determine if the work area for calculating the bonus ratio (bonus ratio calculation area 13128) is normal (step S24). If it is determined to be abnormal, the data in the work area for calculating the bonus ratio may be incorrect, so the data stored in the work area for calculating the bonus ratio is deleted (step S26).

[0221] Furthermore, if one or more backup areas are provided in the area 13128 for calculating the payout ratio, the main area should first be checked using a check code. If the main area is determined to be abnormal, backup areas 1, 2, and N should be checked in that order, and the data of the backup area that is first determined to be normal should be copied to the main area. After that, the data in the backup areas may be deleted or left as is. If the main area is determined to be normal, the data in the backup areas may be deleted or left as is.

[0222] Regarding the area for calculating the payout ratio, the data in the payout ratio calculation area 13128 may be erased at predetermined intervals, separate from the result of the check code judgment when the power is turned on. Alternatively, the data in the payout ratio calculation area 13128 may be erased after a predetermined amount of operation (for example, after a predetermined number of balls launched, after a predetermined number of winning balls, after a predetermined number of special symbol variation display games, after a predetermined number of special symbol variation display games resulting in a jackpot, etc.).

[0223] In this embodiment, the pachinko machine erases data backed up in the work area of ​​the built-in RAM 1312 under different conditions for each type of data (game control data 13132 and prize ratio calculation / display data 13136). That is, when the RAM clear switch is operated, the backed-up game control data 13132 is erased, but the backed-up prize ratio calculation / display data 13136 is not erased. If the prize ratio calculation / display data 13136 could be erased by operating the RAM clear switch, the prize ratio calculated by the pachinko machine 1 could be erased at any time. Therefore, by preventing the backed-up prize ratio calculation / display data 13136 from being erased by operating the RAM clear switch, it is possible to prevent the erasure of the prize ratio calculation / display data 13136 by the operation of the amusement hall staff, and to prevent the concealment of an abnormal prize ratio. Therefore, it is possible to easily detect a game machine that has been modified to have a high or low prize ratio.

[0224] When the RAM work area is powered back on or the RAM initialization process is performed, the main control MPU 1311 (CPU 13111) performs initial settings to configure various setting registers (step S28). In the initial settings of the main control MPU 1311, first, the CTC (Counter / Timer Circuit) is initialized and interrupts are enabled. Furthermore, the serial communication port and test signal output port are initialized. The hardware random number generation circuit is started. Then, the serial communication circuit 13114 used for communication with the peripheral control board 1510, the payout control board 951, and the prize ratio indicator 1317 is configured. Furthermore, after the serial communication circuit 13114 starts operating, the driver circuit 13171 for the prize ratio indicator 1317 is initialized.

[0225] Next, the main control MPU 1311 executes a process to set power-on commands to be transmitted to the peripheral control board 1510 (step S32). In the power-on command creation process, game information is read from the game backup information and various commands corresponding to the game information are stored in a predetermined storage area of ​​the main control's built-in RAM 1312. Power-on command generation involves setting the power-on state reference command as reference command data and adding command addition data corresponding to the command to be generated.

[0226] The commands used when the power is turned on include the power-on state buffer command and the special symbol / electric mechanism operation number command. The power-on state buffer command is a command that notifies the game state when the power is restored after a power outage, and it notifies the probability of winning the special lottery and the operation pattern of the regular electric mechanism. On the other hand, the special symbol / electric mechanism operation number command notifies the execution status of the special symbol fluctuation display.

[0227] Subsequently, the main control MPU 1311 authorizes the execution of interrupt processing, including timer interrupt processing (step S34). The initial setup of the pachinko machine 1 is completed through the processes from power-on to step S34 (initial setup means).

[0228] Next, the main control MPU 1311 acquires a power outage warning signal (step S36) and determines whether the power outage warning signal is ON or OFF (step S38). If the power outage warning signal is not ON (the result of step S38 is "No"), i.e., the random number update process is executed (step S40). In the random number update process in step S46, random numbers other than those used for determining winning numbers in special and regular lotteries are updated. Note that the random number update process for determining winning numbers in special and regular lotteries is executed in the timer interrupt process described later. The processes from step S36 to step S40 are executed until a power outage warning signal is detected, and these processes are designated as the main processes on the main control side (normal method after initial setup).

[0229] On the other hand, if a power outage warning signal is detected (the result of step S38 is "Yes"), the main control MPU 1311 executes power outage processing (power outage setting means). In power outage processing, a process is executed to back up data to restore the state before the power outage occurred. Specifically, first, the execution of interrupt processing is prohibited (step S42). This prevents the timer interrupt processing described later from occurring, prevents writing to the main control's built-in RAM 1312, and protects against rewriting of game information. Furthermore, the main control MPU 1311 clears the output ports and stops the operation of devices controlled by the output from each port (step S44). Specifically, the power outage clear signal OFF bit data is set for the solenoid, power outage clear, and ACK output ports. Note that not all output ports need to be cleared; for example, it is sufficient to clear the output ports used to control solenoids and motors that consume a lot of power. By clearing these output ports, the power consumption during the time until the main board-side power outage processing is completed is reduced, and the main board-side power outage processing can be reliably completed.

[0230] Next, the main control MPU 1311 calculates a checksum to determine whether the data stored in the work area being backed up has been properly preserved (step S46). Furthermore, the result of the checksum calculation is stored in the checksum area of ​​RAM 1312 (step S48). This checksum is used to determine whether the data backed up in the work area is normal.

[0231] Next, a check code (e.g., a checksum) is calculated from the data in the work area for calculating the bonus item ratio (bonus item ratio calculation area 13128) (step S50). If the check code is a fixed value, it is not necessary to calculate the check code in step S50. Note that the check code may be calculated and stored each time the data is updated during the bonus item ratio calculation and display processing, rather than during the main board power-off processing.

[0232] Next, the calculated check code (or a predetermined value to be used as the check code) is stored in a predetermined area of ​​the bonus ratio calculation area 13128 (step S52).

[0233] Next, the data in the main area of ​​the workpiece for calculating the bonus item ratio (bonus item ratio calculation area 13128) is copied to each backup area (step S54). At this time, the calculated check code is also copied. Backup may be performed as appropriate during the bonus item ratio calculation and display process (for example, each time the data is updated) rather than during the power outage processing on the main board side.

[0234] In this way, by storing the data used to calculate the bonus payout ratio in a backup area along with the calculated (or predetermined) check code, the data for calculating the bonus payout ratio can be retained even when the power is cut off, and the bonus payout ratio can be calculated over a long period of operation.

[0235] Furthermore, a value indicating that the backup was successful is stored in the backup flag area as a power outage flag (step S56). This completes the storage of the game backup information. Finally, writing to RAM1312 is prohibited by outputting "01H" to the RAM protect register (step S58), and the system waits until power is restored (infinite loop).

[0236] [5-2. Timer Interrupt Handling] Next, timer interrupt processing will be explained. Timer interrupt processing is performed repeatedly at the interrupt period (4ms in this embodiment) set in the initialization process shown in Figures 21 and 22. Figure 23 is a flowchart showing an example of timer interrupt processing.

[0237] When timer interrupt processing begins, the main control MPU 1311 executes the main control program to first set the RBS (register bank selection flag) in the program status word to 1 and switch registers (step S70). The main control board 1310 in this embodiment has bank 0 and bank 1, which are switched and used each time timer interrupt processing is executed.

[0238] Next, the main control MPU 1311 performs switch input processing (step S74). In switch input processing, various signals input to the input terminals of the various input ports of the main control MPU 1311 are read and stored as input information in the input information storage area of ​​the main control's built-in RAM 1312. Specifically, detection signals from various sensors that detect game balls entering prize slots such as general prize slots, detection signals from the magnetic detection switch 3024 that detect fraudulent activity using magnets, and payout ACK signals from the payout control board 951 that indicate that the payout control board 951 has successfully received the prize ball command transmitted in the prize ball control processing are read and stored as input information in the input information storage area. In addition, in switch input processing, detection signals from the ejected ball sensor 3060 and the launched ball sensor 1020 are read to count the number of balls that have been ejected.

[0239] Next, the main control MPU 1311 performs a timer update process (step S76). In the timer update process, for example, it manages the time for which the special symbol indicator 1185 lights up according to the variable display pattern determined in the special symbol and special electric mechanism control process described later, the time for which the normal symbol indicator 1189 lights up according to the normal symbol variable display pattern determined in the normal symbol and normal electric mechanism control process, and the ACK signal input determination time which is set as a determination condition when determining whether or not a payout ACK signal has been input that indicates that the payout control board 951 has successfully received various commands transmitted by the main control board 1310 (main control MPU 1311). Specifically, when the variable time of the variable display pattern or normal symbol variable display pattern is 5 seconds, the timer interrupt period is set to 4 ms, so each time this timer subtraction process is performed, the variable time is subtracted by 4 ms, and the value of the subtraction result becomes 0, thereby accurately measuring the variable time of the variable display pattern or normal symbol variable display pattern.

[0240] Next, the main control MPU 1311 executes random number update process 1 (step S78). Random number update process 1 updates the random numbers for determining the jackpot, the random numbers for the jackpot symbols, and the random numbers for determining the minor jackpot symbols. In addition to these random numbers, it also updates the random numbers for determining the initial values ​​of the jackpot symbols and the random numbers for determining the initial values ​​of the minor jackpot symbols, which are updated in the non-winning / losing random number update process in step S40 of the system / user reset process (main process on the main control side) shown in the figure.

[0241] Next, the main control MPU 1311 executes the prize ball control process (step S80). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be dispensed based on the read input information is calculated, and this is written to the main control's built-in RAM 1312. In addition, based on the calculation result of the number of prize balls, a prize ball command is created to dispense game balls, and a self-check command is created to check the connection status between the main control board 1310 and the payout control board 951. The main control MPU 1311 transmits the created prize ball command and self-check command to the payout control board 951 as main payout serial data.

[0242] Next, the main control MPU 1311 determines the current game state, adds the number of prize balls to be paid out as game value to the area corresponding to the current game state, and updates the prize ratio calculation area 13128 (see Figure 26) of the main control's built-in RAM 1312 (step S81). The process in step S81 can be skipped if there are no prize balls to be paid out in step S80, thereby reducing the load on the pachinko machine 1.

[0243] Next, the main control MPU 1311 executes frame command reception processing (step S82). The dispensing control board 951 transmits various 1-byte (8-bit) commands (for example, frame status 1 command, error release navigation command, and frame status 2 command) categorized by the dispensing control program. On the other hand, as will be described later, the dispensing control program outputs an error occurrence command if an error occurs in the dispensing operation, and outputs an error release notification command based on the detection signal of the operation switch. In the frame command reception processing, when various commands are successfully received as dispensing serial data, information to inform the dispensing control board 951 of this is stored as output information in the output information storage area of ​​the main control's built-in RAM 1312. The main control MPU 1311 also formats the commands successfully received as dispensing serial data into 2-byte (16-bit) commands (for example, frame status display command, error release notification command, etc.) and stores them as transmission information in the aforementioned transmission information storage area. Furthermore, during the prize ball dispensing process, the number of prize balls dispensed is recorded in a memory area (see Figure 27) determined by the game state in the prize ratio calculation area 13128.

[0244] The process for updating the area for calculating the bonus payout ratio (step S81) can be executed in any order, as long as it is after the prize ball control process (step S80) and before the bonus payout ratio calculation and display process (step S89).

[0245] Next, the main control MPU 1311 executes fraud detection processing (step S84). In fraud detection processing, it checks for abnormal conditions related to prize balls. For example, if it reads input information from the input information storage area mentioned above and detects that game balls have entered the large prize winning slots 2005 and 2006 by the count switch when the game is not in a jackpot state, the main control program creates a prize winning abnormality display command, which is classified as an abnormal condition and displayed as notification information, and stores it in the transmission information storage area mentioned above as transmission information.

[0246] Next, the main control MPU 1311 executes special symbol and special electric mechanism control processing (step S86). In the special symbol and special electric mechanism control processing, it is determined whether the random value for the jackpot matches the hit determination value pre-stored in the main control's built-in ROM. Furthermore, it is determined whether or not to transition to a probability variation state based on the jackpot symbol random value. If the conditions for transitioning to a probability variation state are met, the game is then transitioned to a probability variation state; however, if the conditions for transitioning to a probability variation state are not met, the game is transitioned to a game state other than the probability variation state. Here, "probability variation state" refers to a state in which the winning probability of the special lottery described above is set relatively higher compared to the normal game state (low probability state) (high probability state).

[0247] Next, the main control MPU 1311 executes the control process for normal symbols and normal electric prizes (step S88). In the control process for normal symbols and normal electric prizes, input information is read from the input information storage area mentioned above, and it is determined whether or not a detection signal from the gate switch 2352 was input to the input terminal. If a detection signal was input to the input terminal, a random number for determining whether a normal symbol win is obtained and it is determined whether or not it matches the normal symbol win determination value that is pre-stored in the main control's built-in ROM (referred to as "normal lottery"). Then, it is decided whether or not to open or close the second start gate door member 2549 according to the result of the normal lottery. If the decision is made to open or close the door, the second start gate door member 2549 will be in an open (or enlarged) state, which will allow game balls to be accepted into the start gate 2004, creating a game state that is advantageous to the player.

[0248] Next, the main control MPU 1311 determines whether the display switch 1318 has been operated. If the display switch 1318 has been operated, it calls the prize ratio calculation and display process (Figures 24 and 25) and calculates the prize ratio by referring to the number of prize balls stored in the prize ratio calculation area 13128. Then, it displays the calculated prize ratio on the prize ratio display unit 1317 (step S89). In this way, by calling the prize ratio calculation and display process in the timer interrupt processing and calculating the prize ratio, the prize ratio (the gambling potential of the pachinko machine 1) based on the most recent data can be confirmed.

[0249] Furthermore, regardless of whether the display switch 1318 is operated, if the main frame release switch (not shown) detects that the main frame 4 has opened from the outer frame 2, the prize ratio may be displayed. Also, if the display switch 1318 is operated while the main frame release switch (not shown) has detected that the main frame 4 has opened from the outer frame 2, the prize ratio may be displayed on the prize ratio indicator 1317. Since the display switch 1318 is located on the back side of the game board, if the display switch 1318 is activated, the main frame 4 is usually open and the game has stopped. Calculating the prize ratio at the time the game has stopped in this way reduces the CPU load by avoiding the consumption of CPU resources by division and subtraction calculations during gameplay.

[0250] Details of the calculation and display process for the bonus payout ratio will be described later in Figures 24 and 25. Specific examples of how the bonus payout ratio is displayed will also be described later. Note that when the display switch 1318 is operated, all types of values ​​(bonus payout ratio, continuous bonus payout ratio, cumulative total, and total cumulative total) may be calculated, or only the values ​​to be displayed may be calculated each time the display switch 1318 is operated. Alternatively, the bonus payout ratio may be calculated regardless of whether the display switch 1318 is operated, and if the display switch 1318 is operated, the calculated bonus payout ratio may be displayed on the bonus payout ratio display unit 1317.

[0251] Furthermore, even if the pachinko machine 1 detects fraud and stops the game, the process of updating the area for calculating the payout ratio (step S81) and the process of calculating and displaying the payout ratio (step S89) are executed. By executing these processes regardless of whether fraud has been detected or not, the payout ratio can be checked even while fraud is being reported.

[0252] Next, the main control MPU 1311 performs output data setting processing (step S90). During output data setting processing, various signals are output from the output terminals of the various output ports of the main control MPU 1311. For example, when various commands from the payout control board 951 are successfully received from the output terminals of predetermined output ports of the main control MPU 1311 based on output information, a main payout ACK signal is output to the payout control board 951. When a jackpot is in play, drive signals are output to the attacker solenoids (first attacker solenoid 2113, second upper attacker solenoid 2553, second lower attacker solenoid 2556) that open and close the opening and closing members 2107 of the jackpot openings 2005 and 2006, and a drive signal is output to the start opening solenoid 2550 that opens and closes the start opening (second start opening door member 2549). In addition, various game-related information signals (game information) such as probability variation information output signals, special symbol display information output signals, normal symbol display information output signals, time reduction information output signals, start opening prize information output signals, and security signals are output to the payout control board 951.

[0253] Furthermore, in the output data setting process, a signal corresponding to the number of out-of-bounds balls counted in the switch input process (step S74) is output from the external terminal board 784. For example, a pulse signal of a predetermined length may be output from the external terminal board 784 every predetermined number of out-of-bounds balls (e.g., 10 balls).

[0254] Furthermore, the output data setting process sets test signals to be output to the inspection device connected to the pachinko machine 1. The test signals include, for example, signals indicating the game state and signals indicating the stopping symbols for normal symbols and special symbols (information signal output means).

[0255] Next, the main control MPU 1311 executes the peripheral control board command transmission process (step S92). In the peripheral control board command transmission process, transmission information such as commands and data is read from the transmission information storage area described above, and the transmission information is sent to the peripheral control board 1510 as main frequency serial data. The transmission information stores various commands created in the timer interrupt processing routine. The main frequency serial data is composed of 3 bytes per packet. Specifically, the main frequency serial data consists of a status indicating the type of command with a storage capacity of 1 byte (8 bits), a mode indicating the variation of the effect with a storage capacity of 1 byte (8 bits), and a sum value calculated by treating the status and mode as numerical values ​​and adding them up. This sum value is created at the time of transmission.

[0256] Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). Setting the watchdog timer clear register WCL to a predetermined value clears the watchdog timer clear register WCL. Finally, the main control MPU 1311 switches (returns to) the register bank. Once the above processes are completed, the timer interrupt processing ends and the system returns to the processing before the interrupt.

[0257] In the pachinko machine 1 of this embodiment, the main control MPU 1311 performs calculation processing for the bonus payout ratio and the continuous bonus payout ratio in timer interrupt processing, but the payout control MPU of the payout control unit 952 may also perform calculation processing for the bonus payout ratio and the continuous bonus payout ratio. In this case, the main control board 1310 may send a command to the peripheral control unit 1511 of the peripheral control board 1510 to display the bonus payout ratio and the continuous bonus payout ratio, or the payout control unit 952 may send a command to the peripheral control unit 1511 to display the bonus payout ratio and the continuous bonus payout ratio.

[0258] [5-3. Calculation and display of bonus item ratios] FIG. 24 and FIG. 25 are flowcharts showing an example of accessory ratio calculation and display processing. The accessory ratio calculation and display processing is executed by the main control MPU 1311. Note that the peripheral control unit 1511 of the peripheral control board 1510 may execute the accessory ratio calculation and display processing. When the peripheral control unit 1511 calculates the accessory ratio, the calculated accessory ratio may be displayed on the main liquid crystal display device 1600. For example, when the calculated accessory ratio is within (or outside) a predetermined range, the effect in the game may be changed. Specifically, when the accessory ratio exceeds a predetermined threshold value (a threshold value smaller than the reference value), the preview effect may be changed to a preview effect with higher interest than the normal preview effect.

[0259] First, a check code is calculated from the main area of the accessory ratio calculation area 13128 in the RAM 1312 of the main control MPU 1311 (step S140), and it is determined whether the calculated check code matches the check code stored in the accessory ratio calculation area 13128 (step S142). If the calculated check code matches the check code stored in the accessory ratio calculation area 13128, the data in the main area is normal, so the accessory ratio calculation process is executed, and the accessory ratio and the consecutive accessory ratio are calculated from the data in the main area and stored in the accessory ratio calculation area 13128 (step S156). Specifically, the accessory ratio is calculated by dividing the number of accessory-acquired balls by the total number of acquired balls, and the consecutive accessory ratio is calculated by dividing the number of consecutive accessory-acquired balls by the total number of acquired balls. The decimal part (the value after the decimal point) of the calculated accessory ratio and consecutive accessory ratio may be rounded down or rounded up. Then, the process proceeds to step S160.

[0260] Note that in step S156, each time the accessory ratio and / or the consecutive accessory ratio in the accessory ratio calculation area 13128 is updated, the updated value may be copied to the backup area.

[0261] If the number of bits used to store the number of acquired balls is large and the number of bits available for calculation by the main control MPU 1311 is insufficient, the lower bits of the number of acquired balls may be omitted when calculating the payout ratio, and the payout ratio may be calculated by division. For example, if the storage area for the number of acquired balls is 32 bits, it can store values ​​from 0 to 4,294,967,295. However, if the main control MPU is an 8-bit processor and can perform 8 or 16-bit calculations, it is better to take the 16 bits from the most significant bit (value 1) of the 32-bit number of acquired balls, store them in a 16-bit calculation register, and perform the division. If the number of acquired balls is less than or equal to the maximum number of bits available for calculation (the maximum value of 16 bits, which is 32767), the lower 16 bits may be taken and used for calculation.

[0262] Alternatively, by dividing the total number of balls obtained by 100 (rounding down the decimal part) and using that as the dividend to calculate the payout ratio, calculations involving decimals can be avoided.

[0263] Alternatively, the upper limit for the bonus payout ratio may be set to 99, and if the calculated bonus payout ratio is 100 or higher, it may be set to 99.

[0264] On the other hand, if the calculated check code does not match the check code stored in the bonus ratio calculation area 13128, the data in the main area is abnormal, so an attempt is made to calculate the bonus ratio from the data in backup area 1. Specifically, a check code is calculated from backup area 1 of the bonus ratio calculation area 13128 (step S144), and it is determined whether the calculated check code matches the check code stored in the bonus ratio calculation area 13128 (step S146). If the calculated check code matches the check code stored in the bonus ratio calculation area 13128, the data in backup area 1 is normal, so the data in backup area 1 is copied to the main area (step S148), the bonus ratio calculation process is executed, and the bonus ratio and consecutive bonus ratio are calculated from the data in the main area (step S156). Then, the process proceeds to step S160.

[0265] On the other hand, if the calculated check code does not match the check code stored in the bonus ratio calculation area 13128, the data in backup area 1 is abnormal, and an attempt is made to calculate the bonus ratio from the data in backup area 2. Specifically, a check code is calculated from backup area 2 of the bonus ratio calculation area 13128 (step S150), and it is determined whether the calculated check code matches the check code stored in the bonus ratio calculation area 13128 (step S152). If the calculated check code matches the check code stored in the bonus ratio calculation area 13128, the data in backup area 1 is normal, so the data in backup area 2 is copied to the main area (step S154), the bonus ratio calculation process is executed, the data in the main area is read and the bonus ratio and continuous bonus ratio are calculated (step S156). Then, the process proceeds to step S160.

[0266] If there are other backup areas, similarly, the system will determine if the data in those backup areas is normal, and calculate the bonus payout ratio and consecutive bonus payout ratio from the data in the normal backup areas.

[0267] If the data in the main area and all backup areas is abnormal, the work area for calculating the bonus ratio (bonus ratio calculation area 13128) is initialized and the abnormality is reported (step S158).

[0268] Next, a check code is calculated from the main area (step S160), and the calculated check code is stored in the area 13128 for calculating the bonus ratio (step S162). The reason for calculating the check code in the bonus ratio calculation and display process is that if the system is reset during the power outage processing on the main board side, the power outage flag and checksum will not be calculated, and the data backed up in RAM 1312 will be initialized during the initialization process. However, if the check code is periodically calculated and stored in the bonus ratio calculation and display process, the data in the bonus ratio calculation work area (area 13128 for calculating the bonus ratio) will not be erased even if the power to the pachinko machine is turned on again.

[0269] Next, the backup area allocation counter value is updated by adding 1 (step S164), and it is determined whether the backup area allocation counter value is odd (step S166). If the backup area allocation counter value is odd, the data in the main area is copied to backup area 1 (step S168). On the other hand, if the backup area allocation counter value is even, the data in the main area is copied to backup area 2 (step S170). By allocating the destination for copying the data in the main area based on the backup area allocation counter value and writing the data to only some of the backup areas, it is possible to prevent abnormal values ​​from being written to multiple backup areas.

[0270] If you have three or more backup areas, you can allocate the backup areas to which you write data based on the remainder obtained by dividing the backup area allocation counter value by the number of backup areas.

[0271] Next, the calculated bonus ratio is displayed on the bonus ratio display 1317 (step S172). Specifically, using the calculated bonus ratio type and the calculated value, the data to be displayed in each digit of the bonus ratio display 1317 is obtained by referring to a conversion table (not shown), and the obtained data is sent to the bonus ratio display 1317 driver circuit 13171. For example, if the bonus ratio type is bonus ratio (cumulative), A7 is displayed in the first two digits, and if the calculated bonus ratio is 66%, 66 is displayed in the last two digits.

[0272] The bonus ratio calculation process (step S156) of the bonus ratio calculation and display process reads data on the number of balls won from the bonus ratio calculation area 13128 (i.e., the bonus ratio calculation work area shown in Figure 27), but it cannot write data to the memory area related to the number of balls won in the bonus ratio calculation area 13128. In other words, as will be described later, if the processes of steps S156 and S172 are configured in a common program module, the common program module does not have the authority to write data to the memory area related to the number of balls won in the bonus ratio calculation area 13128, but it can write data to the memory areas of the calculated bonus ratio and consecutive bonus ratio.

[0273] As explained above, in the calculation and display process of the bonus ratio, the data used to calculate the bonus ratio is copied to a backup area. Therefore, if the normal power outage processing is not executed due to an abnormal reset or the like, the data used to calculate the bonus ratio can be protected.

[0274] Furthermore, since the processes in steps S156 and S172 are common regardless of the type of gaming machine, it is advisable to configure them in one or more common program modules. In this case, the process of determining whether the check code in the main area and the check code in the backup area are correct should be configured separately on the non-common side, apart from the common program module. This is because the data checking and backup methods differ from machine to machine. However, if the data checking and backup methods are standardized across machine types, they may be placed in the common program module.

[0275] [6. Memory Configuration] Next, the arrangement of programs and data stored in ROM 1313 will be described. Figure 26(A) shows an example of the arrangement of programs (codes) and data stored in ROM 1313 and RAM 1312, which are built into the main control MPU 1311 of the main control board 1310.

[0276] ROM1313 includes areas for storing game control code 13131, game control data 13132, debug (inspection function) code 13133, debug (inspection function) data 13134, prize ratio calculation / display code 13135, and prize ratio calculation / display data 13136. In this embodiment, the ROM 1313 is allocated a game control area (first memory area) for storing programs and data related to the pachinko machine 1, such as game control code 13131 and game control data 13132; a debug (inspection function) area (second memory area) for storing programs and data used for outputting signals necessary for debugging (inspection function) the pachinko machine 1, such as debug (inspection function) code 13133 and debug (inspection function) data 13134; and a prize ratio calculation area (third memory area) for storing programs used for calculating prize ratios, such as prize ratio calculation / display code 13135 and prize ratio calculation / display data 13136.

[0277] A free area of ​​16 bytes or more (unused space) is provided between the final address of the game control data 13132 and the starting address of the debug (inspection function) code 13133, so that the game control area and the debug (inspection function) area can be easily distinguished when displayed in dump list format. Similarly, a free area of ​​16 bytes or more (unused space) is provided between the final address of the debug (inspection function) code 13133 and the starting address of the prize ratio calculation / display code 13135, so that the debug (inspection function) area and the prize ratio calculation area can be easily distinguished when displayed in dump list format. The values ​​stored in the free areas should be fixed values ​​that are the same, and should be different from the values ​​set in the game area and debug area, or values ​​that are set infrequently. The values ​​stored in the free areas may also be instructions that the CPU does nothing, such as No Operation codes. In this way, when displayed in dump list format, the game control area, the debug (inspection function) area, and the prize ratio calculation area can be easily distinguished.

[0278] Alternatively, the debugging (inspection function) area and the prize ratio calculation area may not be separated, and the prize ratio calculation / display code 13135 and prize ratio calculation / display data 13136 may be stored in a part of the debugging area. In other words, it is sufficient as long as the game control area and other areas are clearly distinguished. By clearly distinguishing the game control area from other areas in this way, the prize ratio calculation area (prize ratio calculation / display code 13135 and prize ratio calculation / display data 13136), which is a process that does not directly involve the control of the game's progress, is placed separately from the game control area, thus avoiding the risk that a malfunction (bug, etc.) in the prize ratio calculation / display code 13135 could affect game control.

[0279] The debug (inspection function) area stores programs and data for purposes not directly related to gameplay. For example, it stores code 13133 for outputting various function inspection signals used only when debugging pachinko machine 1 other than gameplay control. These debug (inspection function) codes 13133 are programs for outputting debug (inspection function) signals. The prize ratio calculation area stores programs for calculating prize ratios, which are not directly related to the progress of the game.

[0280] Furthermore, the game control code 13131 is executed by the main control MPU 1311. In addition, the game control code 13131 can read from and write to the RAM 1312 as needed, but the game control area 13126 used by the game control code 13131 is configured so that only reading is possible from the debug (test function) code, and writing to that area is not possible. In this way, the game control area 13126 constitutes a game area that can only be accessed by the game control code 13131. Processing based on the debug (test function) code 13133 can be called and executed unilaterally while the game control code 13131 is being executed, but it is configured so that the debug (test function) code cannot call and execute the game control code 13131. This increases the independence of the debugging (inspection function) code 13133, so that even if the game control code 13131 is changed, the changes to the debugging (inspection function) code 13133 can be kept to a minimum.

[0281] Furthermore, the bonus ratio calculation and display code 13135 is called from the game control code 13131 (for example, step S89 of the timer interrupt processing shown in Figure 23) and executed by the main control MPU 1311. The bonus ratio calculated by the bonus ratio calculation and display code 13135 is stored in the bonus ratio calculation area 13128 of the RAM 1312. The bonus ratio calculation area 13128 is provided separately from the game control area 13126 (outside the game control area), as shown in the figure. In this way, by designing the bonus ratio calculation and display code 13135 separately from the game control code 13131 and storing it in a separate area, the inspection of the bonus ratio calculation and display code 13135 and the inspection of the game control code 13131 can be performed separately, reducing the effort required to inspect the pachinko machine 1. Furthermore, the bonus ratio calculation and display code 13135 can be used across multiple models, regardless of the specific model.

[0282] Figure 26(B) shows the details of the prize ratio calculation area 13128. The prize ratio calculation area 13128 may include a main area where the prize ratio calculation results are stored, as well as backup areas 1 and 2 where copies of the data stored in the main area are stored. There may be one or more backup areas. Each area is assigned a check code to detect data errors. The check code may be the checksum of the data in each area or a predetermined value. The check code may be set during the initialization process when the pachinko machine 1 is powered on, set each time the data in the main area is updated during the prize ratio calculation and display process, or set during the main control side power outage processing (steps S50 to S54 in Figure 22). In particular, if the check code is a fixed value, the check code may be initialized when it is determined to be normal during the initialization process or when the data is erased, and the fixed value may be set during the main control side power outage processing (step S50 in Figure 20). The check code may also be used in conjunction with the power outage flag. In other words, if a predetermined value is set for the check code in the main area, it may be determined that the power outage flag is set. Alternatively, if a predetermined value is set for the power outage flag, it may be determined that the check codes in each area are correct (i.e., the data in each area is normal).

[0283] Furthermore, if the main area is determined to be abnormal, the system may determine whether the backup area is normal and copy the data from the backup area that is determined to be normal to the main area (step S24 in Figure 21). Also, in the main control side power failure processing, the values ​​of the main area may be copied to each backup area (step S54 in Figure 22). In addition, in the bonus ratio calculation and display processing, each time the value of the main area is updated, the updated data may be copied to the backup area (steps S168 and S170 in Figure 25).

[0284] Unused space is provided between the main area and backup area 1, and between backup area 1 and backup area 2. By providing unused space between each area, the addresses of each area can be separated, and each area can be distinguished by the higher digits of the address.

[0285] Figure 27 shows the specific structure of the work area for storing each data in the prize ratio calculation area 13128. The data for the n...

Claims

[Claim 1] A gaming machine that enables the creation of a special game state based on the results of a lottery, A means of awarding award materials based on winning an award, A game stopping means that calculates a difference based on the number of game media consumed in the game and the number of prize media awarded, and executes a setting to stop the progress of the game based on the calculated difference, The aforementioned game stopping means includes a game stopping release means for releasing the game when the game is stopped by the aforementioned game stopping means, An operating means operated to execute the aforementioned game stop release means, Equipped with, The game stop release means allows the game to be resumed after it has been stopped by the game stop means by operating the operation means, and also initializes the difference. The aforementioned gaming machine is equipped with a movable component that has a light-emitting element and a specific detection means capable of detecting an error state. Based on the detection by the aforementioned specific detection means, specific detection notification can be performed. The gaming machine includes a specific state control process that can control specific information whose output state is switched based on the difference, The aforementioned specific state control process controls the output of the specific information to a specific output state when the difference becomes a specific threshold that is less than a predetermined threshold, under normal circumstances, and switches from the state in which the output of the specific information is stopped to a specific output state. A pattern display means that displays a changing pattern based on the results of the aforementioned lottery, A storage means capable of storing information regarding the display of unexecuted patterns as pending information, A hold display means that displays a hold corresponding to the hold information, An execution means for performing a predetermined performance, It is equipped with a special operating means that can be operated by the player, The reserved display means enables a reserved animation display including a reserved pattern display that can be displayed in correspondence with the reserved information stored in the storage means and a current reserved pattern display corresponding to the variation display of the executed pattern, and a reserved number display that shows the number of reserved information stored in the storage means. The aforementioned pattern display means is capable of displaying a first pattern and a second pattern smaller than the first pattern. The aforementioned performance execution means is controllable to multiple display states, The aforementioned multiple display states include: A first display state in which the aforementioned hold animation display and the aforementioned hold number display are displayed, and the first symbol and the second symbol are displayed, The first display state is not displayed and the second display state is not displayed, which includes a second display state in which the first symbol is not displayed and the second symbol is displayed, or the first symbol is not displayed and the second symbol is displayed, or the first symbol and the second symbol are not displayed. The aforementioned performance execution means, if a special detection means provided on the special operation means detects something within a predetermined time after the second display state has been entered, will be able to cancel the second display state without displaying the special display that will be displayed after the predetermined time has elapsed. In the second display state, no display indicating the elapsed time of the predetermined period is shown. Furthermore, in the second display state, a simulated image display that mimics the special operating means is not displayed, and the second display state can be canceled based on the detection by the special detection means provided on the special operating means while the simulated image display that mimics the special operating means is not displayed. When the second display state is released by detection by the special detection means provided on the special operating means, a simulated image display of a specific operating means different from the special operating means is displayed, and while the simulated image display of the specific operating means is displayed, it becomes possible to receive operation from the specific operating means, and based on the reception of operation from the specific operating means, it becomes possible to display a special display different from the special display. A gaming machine characterized by the following features.

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