Indication device
The display device addresses the issue of bezel width and design constraints by positioning electronic devices beneath the panel, using a light-transmitting structure with inorganic-based elements to enhance transmittance and brightness without reducing the display area.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- LG DISPLAY CO LTD
- Filing Date
- 2025-10-30
- Publication Date
- 2026-06-23
AI Technical Summary
Display devices with integrated electronic devices such as cameras and sensors on the front surface result in wider bezels and reduced display area due to the need for notches or holes, limiting design flexibility.
A display device with a light-transmitting structure that allows electronic devices to be positioned beneath the display panel, using a first and second display area with light-transmitting regions to enable light reception without exposing them on the front, employing inorganic-based light-emitting elements.
The solution allows for normal light reception by electronic devices beneath the display panel, increasing transmittance and brightness in the display area while reducing bezel size and design constraints, enabling high brightness with low power consumption.
Smart Images

Figure 2026102449000001_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to a display device.
Background Art
[0002] With the development of technology, in addition to an image display function, a display device can provide a photographing function, various sensing functions, and the like. For this purpose, the display device must include electronic devices (also referred to as light receiving devices or sensors) such as a camera and a sensing sensor.
[0003] Since the electronic device needs to receive light from the front of the display device, it must be installed in a place where it is easy to receive light. Therefore, a camera (camera lens) and a sensing sensor have been installed so as to be exposed on the front surface of the display device. As a result, the bezels of the display panel become wider, and a notch portion or a physical hole is formed in the display area of the display panel, and a camera or a sensing sensor is provided therein, thereby inevitably reducing the display area.
[0004] That is, when an electronic device such as a camera or a sensing sensor that receives light from the front and executes a predetermined function is provided in the display device, the bezels on the front surface of the display device become larger, and there may be restrictions on the design of the front surface of the display device.
[0005] On the other hand, display devices are applied to various electronic devices such as televisions, mobile phones, notebook computers, tablets, and the like. The display device includes an organic light emitting display device (OLED: Organic Light Emitting Display) that emits light by itself, a liquid crystal display device (Liquid Crystal Display; LCD) that requires a separate light source, and the like.
[0006] In recent years, display devices containing light-emitting diodes (LEDs) have attracted attention as next-generation display devices. Because these light-emitting diodes are made of inorganic materials rather than organic materials, they have a faster illumination speed, superior luminous efficiency, and can display high-brightness images compared to liquid crystal displays and organic light-emitting displays. [Overview of the Initiative] [Problems that the invention aims to solve]
[0007] Embodiments of this disclosure can provide a display device having a light-transmitting structure that allows electronic devices located at the bottom of the display panel to receive light normally without exposing electronic devices on the front of the display device.
[0008] Embodiments of this disclosure can provide a display device having a light-transmitting structure suitable for inorganic-based light-emitting elements.
[0009] Embodiments of this disclosure can provide a display device having a light-transmitting structure that can increase the transmittance of a light-transmitting region.
[0010] Embodiments of this disclosure can provide a display device that can improve brightness in a display area including a light-transmitting region.
[0011] The problems of the embodiments of this disclosure are not limited to those mentioned herein, and other problems not mentioned herein will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]
[0012] A display device according to an embodiment of the present disclosure may include a first display area, a second display area including a plurality of first light-transmitting areas, a first light-emitting element located in the first display area, a second light-emitting element located in the second display area and positioned between the plurality of first light-transmitting areas, a first passivation layer positioned to surround the side surface of the first light-emitting element, and a second passivation layer positioned to surround the side surface of the second light-emitting element.
[0013] A display device according to an embodiment of the present disclosure includes a first display area and a second display area, the second display area may include a substrate including a plurality of first light-transmitting areas, a first light-emitting element located in the first display area, a second light-emitting element located in the second display area and positioned between the plurality of first light-transmitting areas, and an insulating layer stack positioned between the substrate and the first light-emitting element and between the substrate and the second light-emitting element. The substrate may have a plurality of first holes overlapping the plurality of first light-transmitting areas. The insulating layer stack may have a plurality of second holes overlapping the plurality of first light-transmitting areas. [Effects of the Invention]
[0014] According to embodiments of this disclosure, it is possible to provide a display device having a light-transmitting structure that allows electronic devices located at the bottom of the display panel to receive light normally without exposing electronic devices on the entire surface of the display device.
[0015] According to embodiments of this disclosure, a display device having a light-transmitting structure suitable for inorganic-based light-emitting elements can be provided.
[0016] According to embodiments of this disclosure, it is possible to provide a display device having a light-transmitting structure that can increase the transmittance of a light-transmitting region.
[0017] According to embodiments of this disclosure, a display device can be provided that can improve the brightness in a display area including a light-transmitting region.
[0018] According to embodiments of this disclosure, a display device can be provided that can achieve high brightness even with low power consumption by using an inorganic-based light-emitting element.
[0019] The effects of the embodiments of this disclosure are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the claims.
[0020] The content of the present disclosure will be more fully understood from the following detailed description and the accompanying drawings. The detailed description and the accompanying drawings are provided for illustrative purposes only and do not limit the content of this specification.
Brief Description of the Drawings
[0021] [Figure 1] It is a plan view of a display device according to an embodiment of the present disclosure. [Figure 2] It is a configuration diagram of a display device system according to an embodiment of the present disclosure. [Figure 3] A display panel according to an embodiment of the present disclosure is shown. [Figure 4] Light-emitting elements within a display panel according to an embodiment of the present disclosure are shown. [Figure 5] The planar structure of the first to third display regions of a display panel according to an embodiment of the present disclosure is shown. [Figure 6] It is a cross-sectional view of the first display region of a display panel according to an embodiment of the present disclosure. [Figure 7] It is a cross-sectional view of the second display region of a display panel according to an embodiment of the present disclosure. [Figure 8] It is a cross-sectional view of the third display region of a display panel according to an embodiment of the present disclosure. [Figure 9] The planar structure of the first to third display regions of a display panel according to an embodiment of the present disclosure is shown. [Figure 10] It is a cross-sectional view of the first display region of a display panel according to an embodiment of the present disclosure. [Figure 11] It is a cross-sectional view of the second display region of a display panel according to an embodiment of the present disclosure. [Figure 12] It is a cross-sectional view of the third display region of a display panel according to an embodiment of the present disclosure. [Figure 13] The manufacturing process of the second display region of a display panel according to an embodiment of the present disclosure is shown. [Figure 14] The manufacturing process of the second display region of a display panel according to an embodiment of the present disclosure is shown. [Figure 15]This document illustrates the manufacturing process for the second display area of a display panel according to an embodiment of the present disclosure. [Modes for carrying out the invention]
[0022] Hereinafter, some embodiments of this disclosure will be described in detail with reference to illustrative drawings. In assigning reference numerals to components in each drawing, the same reference numeral may be used for the same component whenever possible, even if it is shown in other drawings. In describing this disclosure, if it is determined that a specific description of a relevant known configuration or function would obscure the gist of this disclosure, such detailed description will be omitted. Where "includes," "has," "consists of," etc., as used herein, other parts may be added unless "only" is used. When a component is expressed singularly, it may include multiple components unless otherwise explicitly stated.
[0023] Furthermore, in describing the components of this disclosure, terms such as 1, 2, A, B, (a), (b), etc., may be used. These terms are used solely to distinguish a component from other components, and do not limit the nature, order, sequence, or number of such components.
[0024] In descriptions of the positional relationships of components, when it is stated that two or more components are “linked,” “joined,” or “connected,” it should be understood that while two or more components can be directly “linked,” “joined,” or “connected,” it is also possible for two or more components to be further “interposed” with other components before being “linked,” “joined,” or “connected.” Here, the other components may be included in at least one of the two or more components that are “linked,” “joined,” or “connected” to each other.
[0025] In descriptions of temporal relationships concerning constituent elements, operating methods, or manufacturing methods, when temporal order or sequential relationships are described using phrases such as "after," "following," "next," or "before," unless "immediately" or "directly" is used, this can include cases that are not continuous.
[0026] On the other hand, if numerical values or corresponding information (e.g., levels) relating to components are mentioned, even without further explicit mention, these numerical values or corresponding information may be interpreted as including a range of errors that can occur due to various factors (e.g., process factors, internal or external shocks, noise, etc.).
[0027] Various embodiments of this disclosure will be described in detail below with reference to the attached drawings.
[0028] Figure 1 is a plan view of a display device 100 according to an embodiment of the present disclosure.
[0029] The display device 100 according to the embodiments of this disclosure may include a display panel 110 for displaying images and one or more electronic devices 11, 12.
[0030] The display panel 110 may include a display area DA on which video can be displayed and a non-display area NDA on which video cannot be displayed.
[0031] The display area DA may contain multiple subpixels, and various signal lines for driving these subpixels may be arranged within it.
[0032] The non-display area (NDA) may be the peripheral or outer region of the display area (DA). Various signal lines may be placed in the non-display area (NDA), and various drive circuits may be connected to it. The non-display area (NDA) may be bent to conceal it from view from the front, or covered by a case (not shown). The non-display area (NDA) is also called a bezel or bezel region.
[0033] In the display device 100 according to the embodiments of this disclosure, one or more electronic devices 11, 12 are provided and installed separately from the display panel 110 and may be electronic components located below the display panel 110 (on the opposite side of the viewing surface).
[0034] One or more electronic devices 11, 12 may be devices that receive (detect) light transmitted through the display panel 110 and perform predetermined functions according to the received light. For example, one or more electronic devices 11, 12 may include at least one of the following: a camera or other imaging device, a proximity sensor, and a sensing sensor such as an illuminance sensor. For example, a camera is also called an image sensor, and a sensing sensor may include an infrared sensor.
[0035] Light necessary for the operation of one or more electronic devices 11, 12 can enter the front (viewing surface) of the display panel 110, pass through the display panel 110, and be transmitted to one or more electronic devices 11, 12 located at the bottom of the display panel 110 (opposite the viewing surface). For example, the light necessary for the operation of one or more electronic devices 11, 12 and that passes through the display panel 110 may include one or more of the following: visible light, infrared rays, ultraviolet rays, etc.
[0036] The display area DA in the display panel 110 according to the embodiments of this disclosure may include a first display area DA1 corresponding to a general area and a second display area DA2 distinct from the first display area DA1.
[0037] The first display area DA1 may be a general area where multiple subpixels for displaying an image are arranged and light cannot pass through, while the second display area DA2 may be an area where multiple subpixels for displaying an image are arranged and light can pass through. The first display area DA1 may be located on the outer edge of the second display area DA2. For example, the first display area DA1 may be positioned to surround the second display area DA2.
[0038] The second display area DA2 can be superimposed on the first electronic device 11. The first electronic device 11 can perform a defined first operation using first light in a first wavelength band that passes through the second display area DA2.
[0039] For example, the first wavelength band may be the wavelength band of visible light, the first light may be visible light, and the first operation may mean a shooting operation (image sensing operation). That is, the first electronic device 11 may be a camera that performs a shooting operation using visible light.
[0040] As another example, the first wavelength band may be the infrared wavelength band or the ultraviolet wavelength band, the first light may be infrared light, and the first operation may mean a sensing function. That is, the first electronic device 11 may be a sensing sensor such as a proximity sensor or an illuminance sensor that uses infrared light to perform a sensing operation to sense the surroundings.
[0041] The display area DA of the display panel 110 according to the embodiments of this disclosure may include a third display area DA3 that is distinct from the first display area DA1 and the second display area DA2.
[0042] The third display area DA3 may be a light-transmitting area in which multiple subpixels for displaying an image are arranged. The first display area DA1 may be located on the outer edge of the third display area DA3. For example, the first display area DA1 may be located so as to surround the third display area DA3. The third display area DA3 may or may not be connected to the second display area DA2. That is, the first display area DA1 may or may not exist between the second display area DA2 and the third display area DA3.
[0043] The third display area DA3 can be superimposed on the second electronic device 12. The second electronic device 12 can perform a predetermined second operation using second light in a second wavelength band that passes through the third display area DA3.
[0044] For example, the second wavelength band may be the infrared wavelength band or the ultraviolet wavelength band, the second light may be infrared light, and the second operation may mean a sensing function. That is, the second electronic device 12 may be a sensing sensor such as a proximity sensor or an illuminance sensor that uses infrared light to perform a sensing operation to sense the surroundings.
[0045] As another example, the second wavelength band may be the wavelength band of visible light, the second light may be visible light, and the second operation may mean an image capture operation (image sensing operation). In other words, the second electronic device 12 may be a camera that performs an image capture operation using visible light.
[0046] The second display region DA2 and the third display region DA3 may be light-transmitting optical regions. The second display region DA2 is sometimes called the first optical region, and the third display region DA3 is sometimes called the second optical region. Since the second display region DA2 and the third display region DA3 are light-transmitting regions, they may each have a light-transmitting structure.
[0047] Since the second display area DA2 and the third display area DA3 are areas capable of displaying video, each of the second display area DA2 and the third display area DA3 may contain multiple subpixels for displaying video.
[0048] Since the second display area DA2 and / or the third display area DA3 are areas that allow light transmission and can display images, the first electronic device 11 superimposed on the second display area DA2 and / or the second electronic device 12 superimposed on the third display area DA3 are not visible to the user when viewed from the front (viewing surface) of the display panel 110.
[0049] For example, the first electronic device 11 may be a camera that receives light in the visible light wavelength range (visible light rays), and the second electronic device 12 may be a sensing sensor such as a proximity sensor or an illuminance sensor. For example, the sensing sensor may be an infrared sensor that senses light in the infrared wavelength range (infrared rays). Conversely, the first electronic device 11 may be a sensing sensor and the second electronic device 12 may be a camera.
[0050] For the sake of explanation, in the following example, we will assume that the first electronic device 11 is a camera and the second electronic device 12 is an infrared-based sensing sensor. Here, the camera may be a camera lens or an image sensor.
[0051] If the first electronic device 11 is a camera, this camera is located on the back (bottom) of the display panel 110, but it may also be a front camera that photographs the front of the display panel 110. Therefore, the user can take a picture (selfie) through a camera that is not visible on the viewing surface of the display panel 110 while looking at the viewing surface.
[0052] The second display area DA2 and the third display area DA3 must have a high transmittance above a certain level, while the first display area DA1 does not need to be light-transmitting and may have a low transmittance below a certain level.
[0053] For example, at least one of the second display area DA2 and the third display area DA3 may differ from the first display area DA1 in terms of resolution, subpixel array structure, number of subpixels per unit area (number of pixels per unit area), electrode structure, electrode material, signal wiring structure, signal wiring material, electrode array structure, and signal wiring array structure.
[0054] For example, the second display area DA2 and the third display area DA3 may differ from each other in at least one aspect of resolution, subpixel array structure, number of subpixels per unit area (number of pixels per unit area), electrode structure, electrode material, signal wiring structure, signal wiring material, electrode array structure, and signal wiring array structure.
[0055] The transmittance of at least one of the second display area DA2 and the third display area DA3 may be higher than the transmittance of the first display area DA1.
[0056] In order to increase the transmittance of at least one of the second display area DA2 and the third display area DA3, the display panel 110 according to the embodiment of the present disclosure may be designed using a pixel density difference method.
[0057] According to the pixel density difference method, the number of pixels per unit area (number of subpixels per unit area) of at least one of the second display area DA2 and the third display area DA3 may be less than the number of pixels per unit area (number of subpixels per unit area) of the first display area DA1. This means that the resolution of at least one of the second display area DA2 and the third display area DA3 may be lower than the resolution of the first display area DA1. Therefore, the pixel density difference design method can also be called the resolution difference design method.
[0058] The number of pixels per unit area (or subpixels per unit area) can represent pixel density. For example, the unit for the number of pixels per unit area may be PPI (Pixels Per Inch), which means the number of pixels in one inch.
[0059] In order to increase the transmittance of at least one of the second display area DA2 and the third display area DA3, the display panel 110 according to the embodiment of the present disclosure may be designed using a pixel size difference method.
[0060] According to the pixel size difference method, the number of subpixels per unit area of at least one of the second display area DA2 and the third display area DA3 may be the same as, or similar to, the number of subpixels per unit area of the first display area DA1. However, the size of each subpixel SP (i.e., the size of the light-emitting area) located in at least one of the optical areas of the second display area DA2 and the third display area DA3 may be smaller than the size of each subpixel SP (i.e., the size of the light-emitting area) located in the first display area DA1.
[0061] The second display area DA2 and the third display area DA3, which correspond to the optical region, may have the same or substantially the same transmittance. In this case, the number of pixels per unit area of the second display area DA2 may be equal to the number of pixels per unit area of the third display area DA3. The resolution of the second display area DA2 may be the same as the resolution of the third display area DA3.
[0062] The second display area DA2 and the third display area DA3, which correspond to the optical region, may have different transmittances. For example, the transmittance of the second display area DA2 may be higher than that of the third display area DA3. In this case, the number of pixels per unit area of the second display area DA2 may be less than that of the third display area DA3. The resolution of the second display area DA2 may be lower than that of the third display area DA3. For example, a camera using visible light can use more light than a sensing sensor (infrared sensor) using infrared light. For example, if the first electronic device 11 superimposed on the second display area DA2 is a camera, and the second electronic device 12 superimposed on the third display area DA3 is a sensing sensor (infrared sensor), the transmittance of the second display area DA2 may be higher than that of the third display area DA3.
[0063] For example, the second display area DA2 may have various shapes, such as a circle, ellipse, square, hexagon, or octagon. The third display area DA3 may have various shapes, such as a circle, ellipse, square, hexagon, or octagon. The second display area DA2 and the third display area DA3 may have the same shape or different shapes.
[0064] When the second display area DA2 and the third display area DA3 are in contact, the entire optical area including the second display area DA2 and the third display area DA3 can have various shapes, such as circular, elliptical, square, hexagonal, or octagonal. For the sake of explanation, in the following, we will use the example that the second display area DA2 and the third display area DA3 are both circular.
[0065] In the display device 100 according to the embodiment of this disclosure, if the first electronic device 11, which is hidden at the bottom of the display panel 110 and not exposed to the outside, is a camera, then the display device 100 according to the embodiment of this disclosure can be said to be a display to which UDC (Under Display Camera) technology is applied.
[0066] According to this, in the case of the display device 100 according to the embodiment of the present disclosure, a notch or camera hole for camera exposure does not need to be formed in the display panel 110, so there is no reduction in the area of the display area DA. As a result, a notch or camera hole for camera exposure does not need to be formed in the display panel 110, so the size of the bezel area can be reduced, eliminating design constraints and potentially increasing the degree of freedom in design.
[0067] In the display device 100 according to the embodiments of this disclosure, even though one or more electronic devices 11, 12 are hidden behind the display panel 110, one or more electronic devices 11, 12 must be able to receive light normally and perform predetermined functions normally.
[0068] Furthermore, in the display device 100 according to the embodiment of this disclosure, even though the first electronic device 11 and / or the second electronic device 12 are arranged to overlap with the second display area DA2 and / or the third display area DA3, video can be displayed normally in the second display area DA2 and / or the third display area DA3.
[0069] Figure 2 is a system configuration diagram of the display device 100 according to an embodiment of the present disclosure.
[0070] Referring to Figure 2, the display device 100 is a component for displaying images and may include a display panel 110 and a display driving circuit. The display driving circuit is a circuit for driving the display panel 110 and may include a data driving circuit 220, a gate driving circuit 230, and a display controller 240, etc.
[0071] The display panel 110 may include a display area DA on which an image is displayed and a non-display area NDA on which no image is displayed. The non-display area NDA may be the outer area of the display area DA and may also be called the bezel area. All or part of the non-display area NDA may be an area visible from the front of the display device 100, but may also be an area that is bent and not visible from the front of the display device 100.
[0072] The display panel 110 may include a substrate 200 and a plurality of subpixels SP arranged on the substrate 200. Furthermore, the display panel 110 may further include various types of signal lines for driving the plurality of subpixels SP.
[0073] The display device 100 according to the embodiments of this disclosure may be a self-emissive display device in which the display panel 110 emits light itself. In the display panel 110 of the display device 100 according to the embodiments of this disclosure, each of the plurality of subpixels SP may include a light-emitting element. For example, the display device 100 according to the embodiments of this disclosure may be an organic light-emitting display device in which the light-emitting element is realized by an organic light-emitting diode (OLED). As another example, the display device 100 according to the embodiments of this disclosure may be an inorganic light-emitting display device in which the light-emitting element is realized by an inorganic-based light-emitting diode. As yet another example, the display device 100 according to the embodiments of this disclosure may be a quantum dot display device in which the light-emitting element is realized by a quantum dot, which is a semiconductor crystal that emits light itself.
[0074] The structure of each of the multiple subpixels SP may vary depending on the type of display device 100. For example, if the display device 100 is a self-emissive display device that emits light from the subpixels SP itself, each subpixel SP may include a light-emitting element that emits light itself, at least one transistor, and at least one capacitor.
[0075] For example, some types of signal lines may include multiple data lines DL that transmit data signals (also called data voltages or video signals), and multiple gate lines GL that transmit gate signals (also called scan signals).
[0076] Multiple data lines DL and multiple gate lines GL can intersect each other. Each of the multiple data lines DL can be arranged extending in a first direction. Each of the multiple gate lines GL can be arranged extending in a second direction. Here, the first direction may be the column direction and the second direction may be the row direction. Alternatively, the first direction may be the row direction and the second direction may be the column direction. For the sake of explanation, in the following examples, we will assume that each of the multiple data lines DL is arranged in the column direction and each of the multiple gate lines GL is arranged in the row direction.
[0077] The data drive circuit 220 is a circuit for driving multiple data lines DL and can output data signals to multiple data lines DL. The gate drive circuit 230 is a circuit for driving multiple gate lines GL and can output gate signals to multiple gate lines GL.
[0078] The display controller 240 is a device for controlling the data drive circuit 220 and the gate drive circuit 230, and can control the drive timing for multiple data lines DL and the drive timing for multiple gate lines GL.
[0079] The display controller 240 can supply a data drive control signal DCS to the data drive circuit 220 to control the data drive circuit 220, and can supply a gate drive control signal GCS to the gate drive circuit 230 to control the gate drive circuit 230.
[0080] The display controller 240 can receive input video data from the host system 250 and supply video data Data to the data drive circuit 220 based on the input video data.
[0081] The data drive circuit 220 receives digital video data from the display controller 240, converts the received video data into an analog data signal, and outputs it to multiple data lines DL.
[0082] The gate drive circuit 230 is supplied with various gate drive control signals GCS, a first gate voltage corresponding to the turn-on level voltage, and a second gate voltage corresponding to the turn-off level voltage, generates a gate signal, and can supply the generated gate signal to multiple gate lines GL.
[0083] For example, the data drive circuit 220 may be connected to the display panel 110 using a tape automated bonding (TAB) method, connected to the bonding pad of the display panel 110 using a chip-on-glass (COG) or chip-on-panel (COP) method, or implemented using a chip-on-film (COF) method and connected to the display panel 110.
[0084] The gate drive circuit 230 can be connected to the display panel 110 by tape automated bonding (TAB), to the bonding pad of the display panel 110 by chip-on-glass (COG) or chip-on-panel (COP) method, or to the display panel 110 according to the chip-on-film (COF) method. Alternatively, the gate drive circuit 230 may be of the gate-in-panel (GIP) type and formed in the non-display area (NDA) of the display panel 110. The gate drive circuit 230 may be placed on the substrate 200 or connected to the substrate 200. That is, if the gate drive circuit 230 is of the GIP type, it can be placed in the non-display area (NDA) of the substrate. If the gate drive circuit 230 is of the chip-on-glass (COG) type, chip-on-film (COF) type, etc., it can be connected to the substrate.
[0085] On the other hand, at least one of the data drive circuit 220 and gate drive circuit 230 may be placed in the display area DA of the display panel 110. For example, at least one of the data drive circuit 220 and gate drive circuit 230 may be placed so as not to overlap with the subpixel SP, or it may be placed so as to partially or entirely overlap with the subpixel SP.
[0086] The data drive circuit 220 may be connected to one side of the display panel 110 (for example, the top or bottom). Depending on the drive method, panel design method, etc., the data drive circuit 220 may be connected to both sides of the display panel 110 (for example, the top and bottom), or to two or more of the four sides of the display panel 110.
[0087] The gate drive circuit 230 may be connected to one side of the display panel 110 (for example, the left or right side). Depending on the drive method, panel design method, etc., the gate drive circuit 230 may be connected to both sides of the display panel 110 (for example, the left and right sides), or to two or more of the four sides of the display panel 110.
[0088] The display controller 240 can be implemented as a separate component from the data drive circuit 220, or it can be implemented as an integrated circuit by integrating it together with the data drive circuit 220.
[0089] The display controller 240 may be a timing controller used in conventional display technology, a control device that can perform other control functions in addition to the timing controller, a control device different from the timing controller, or a circuit within the control device. The display controller 240 can be implemented as various circuits or electronic components such as an IC (Integrated Circuit), FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or processor.
[0090] The display controller 240 can be mounted on a printed circuit board, a flexible printed circuit board, etc., and can be electrically connected to the data drive circuit 220 and the gate drive circuit 230 via the printed circuit board, flexible printed circuit board, etc.
[0091] The display controller 240 can send and receive signals to and from the data drive circuit 220 according to at least one predetermined interface. For example, the interface may include an LVDS (Low Voltage Differential Signaling) interface, an EPI (Embedded Clock Point-Point Interface), or an SPI (Serial Peripheral Interface).
[0092] The display device 100 according to the embodiments of this disclosure may include, in addition to an image display function, a touch sensor and a touch sensing circuit that senses the touch sensor to detect whether a touch has occurred by a touch object such as a finger or a pen, or to detect the touch position, in order to further provide a touch sensing function.
[0093] The touch sensing circuit may include a touch drive circuit 260 that drives and senses a touch sensor and generates and outputs touch sensing data, and a touch controller 270 that can sense the occurrence of a touch or detect the touch position using the touch sensing data.
[0094] The touch sensor may include multiple touch electrodes. The touch sensor may further include multiple touch lines for electrically connecting the multiple touch electrodes to the touch drive circuit 260.
[0095] The touch sensor may be located outside the display panel 110 in the form of a touch panel, or it may be located inside the display panel 110. When the touch sensor is located outside the display panel 110 in the form of a touch panel, the touch sensor is called an external type. When the touch sensor is an external type, the touch panel and the display panel 110 may be manufactured separately and joined together during the assembly process. An external type touch panel may include a touch panel substrate, multiple touch electrodes on the touch panel substrate, and so on.
[0096] If the touch sensor is located inside the display panel 110, the touch sensor may be formed on the substrate 200 during the manufacturing process of the display panel 110, along with signal lines and electrodes related to display driving.
[0097] The touch drive circuit 260 can supply a touch drive signal to at least one of the multiple touch electrodes, sense at least one of the multiple touch electrodes, and generate touch sensing data.
[0098] The touch sensing circuit can perform touch sensing using either a self-capacitance sensing method or a mutual-capacitance sensing method.
[0099] When a touch sensing circuit performs touch sensing using a self-capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between each touch electrode and the touch object (e.g., finger, pen, etc.). According to the self-capacitance sensing method, each of the multiple touch electrodes can function as both a driving touch electrode and a sensing touch electrode. The touch driving circuit 260 can drive all or some of the multiple touch electrodes and sense all or some of the multiple touch electrodes.
[0100] When a touch sensing circuit performs touch sensing using a mutual capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between touch electrodes. According to the mutual capacitance sensing method, multiple touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit 260 can drive the driving touch electrodes and sense the sensing touch electrodes.
[0101] The touch driving circuit 260 and the touch controller 270 included in the touch sensing circuit may be implemented in separate devices or in a single device. Furthermore, the touch driving circuit 260 and the data driving circuit 220 may be implemented in separate devices or in a single device.
[0102] The display device 100 may further include a power supply circuit that supplies various power sources to the display driving circuit and / or touch sensing circuit.
[0103] The display device 100 according to the embodiments of this disclosure may be a mobile terminal such as a smartphone or tablet, or it may be a monitor or television (TV) of various sizes, but is not limited thereto, and may be a display of various types and sizes capable of displaying information or images.
[0104] As described above, in the display panel 110, the display area DA may include the first display area DA1, as well as at least one of the second display area DA2 and the third display area DA3. For the sake of explanation, the following will describe the case in which the display area DA includes both the first display area DA1, the second display area DA2, and the third display area DA3 as an example.
[0105] Figure 3 shows a display panel 110 according to an embodiment of the present disclosure.
[0106] Referring to Figure 3, multiple subpixels SP may be arranged in the display area DA of the display panel 110. Multiple subpixels SP may be arranged in the first display area DA1, the second display area DA2, and the third display area DA3, which are included in the display area DA.
[0107] Each of the multiple subpixels SP may include a light-emitting element ED and a subpixel circuit SPC configured to drive the light-emitting element ED.
[0108] Referring to Figure 3, the subpixel circuit SPC may include a drive transistor DT for driving the light-emitting element ED, a scan transistor ST for transmitting a data voltage VDATA to the first node N1 of the drive transistor DT, and a storage capacitor Cst for maintaining a constant voltage for one frame.
[0109] The drive transistor DT may include a first node N1 to which a data voltage may be applied, a second node N2 electrically connected to a light-emitting element ED, and a third node N3 to which a drive voltage VDD is applied from a drive voltage line DVL. In the drive transistor DT, the first node N1 is the gate node, the second node N2 is the source node or drain node, and the third node N3 is the drain node or source node. For the sake of explanation, the following example will be given in which the drive transistor DT has the first node N1 as the gate node, the second node N2 as the source node, and the third node N3 as the drain node.
[0110] For example, the light-emitting element ED may be an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), or a quantum dot light-emitting element. For example, if the light-emitting element ED is an organic light-emitting diode, the light-emitting layer EL in the light-emitting element ED may include an organic light-emitting layer EL containing organic material. For example, if the light-emitting element ED is an inorganic light-emitting diode (LED), the light-emitting element ED may be a micro light-emitting diode (micro LED).
[0111] The scan transistor ST is controlled on and off by a scan signal SCAN applied via the gate line GL, and can be electrically connected between the first node N1 of the drive transistor DT and the data line DL.
[0112] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the drive transistor DT.
[0113] The subpixel circuit SPC may have a 2T(Transistor)1C(Capacitor) structure, as shown in Figure 3, including two transistors DT and ST and one capacitor Cst, and may optionally include one or more transistors or one or more capacitors. For example, the subpixel circuit SPC may have a 7T1C structure, including seven transistors and one capacitor Cst.
[0114] The storage capacitor Cst may be an intentionally designed external capacitor located outside the drive transistor DT, rather than a parasitic capacitor (e.g., Cgs, Cgd) which is an internal capacitor that may exist between the first node N1 and the second node N2 of the drive transistor DT. The drive transistor DT and the scan transistor ST may each be an n-type transistor or a p-type transistor.
[0115] Since the circuit elements within each subpixel SP (particularly the light-emitting elements ED, which are realized with organic light-emitting diodes (OLEDs) containing organic materials) are vulnerable to external moisture and oxygen, a sealing layer may be placed on the display panel 110 to prevent external moisture and oxygen from penetrating the circuit elements (particularly the light-emitting elements ED). The sealing layer ENCAP can be placed in a manner that covers the light-emitting elements ED.
[0116] The display panel 110 according to embodiments of this disclosure may further include a touch sensor layer 300 for touch sensing. The touch sensor layer 300 may include a plurality of touch electrodes.
[0117] Figure 4 shows the light-emitting element ED within the display panel 110 according to an embodiment of the present disclosure.
[0118] Each of the plurality of light-emitting elements ED arranged in the display panel 110 according to the embodiments of this disclosure may be an inorganic-based light-emitting diode (LED). For example, each of the plurality of light-emitting elements ED may be a micro-LED. As an example, each of the plurality of light-emitting elements ED may be a vertical light-emitting diode (see Figure 4). As another example, each of the plurality of light-emitting elements ED may be a flip-type or lateral-type light-emitting diode.
[0119] Each of the multiple light-emitting elements ED may include a first electrode E1, a first semiconductor layer 410 disposed on the first electrode E1, an active layer 415 disposed on the first semiconductor layer 410, a second semiconductor layer 420 disposed on the active layer 415, and a second electrode disposed on the second semiconductor layer 420.
[0120] Each of the multiple light-emitting elements ED may further include a first electrode E1, a first semiconductor layer 410, an active layer 415, a second semiconductor layer 420, and a protective layer 430 covering the sides of the second electrode E2.
[0121] For example, the first electrode E1 may be the anode electrode and the second electrode E2 may be the cathode electrode. In another example, the first electrode E1 may be the cathode electrode and the second electrode E2 may be the anode electrode.
[0122] For example, the first electrode E1 may contain one or more of the following: gold (Au), copper (Cu), tin (Sn), titanium (Ti), aluminum (Al), and silver (Ag). For example, the second electrode E2 may consist of a transparent conductive material (TCO) such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) that can transmit light.
[0123] The first semiconductor layer 410 may be placed on the first electrode E1. For example, the first semiconductor layer 410 may be a p-type semiconductor, Al x Ga y In 1-x-yThe semiconductor material may include, but is not limited to, a semiconductor material represented by the chemical formula N(0≦x≦1, 0≦y≦1, 0≦x+y≦1). For example, the semiconductor material included in the first semiconductor layer 410 may be, but is not limited to, one or more of p-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The first semiconductor layer 410 may be doped with a p-type dopant, and the p-type dopant may be, but is not limited to, Mg, Zn, Ca, Se, Ba, etc. For example, the first semiconductor layer 410 may be p-GaN doped with p-type Mg, but is not limited to that.
[0124] On the other hand, the light-emitting element ED may further include an electron-blocking layer disposed on the first semiconductor layer 410. The electron-blocking layer may be a layer for suppressing or preventing too many electrons from flowing into the active layer 415. For example, the electron-blocking layer may be, but is not limited to, p-type Mg-doped p-AlGaN. The electron-blocking layer may be omitted.
[0125] The active layer 415 may be placed on the first semiconductor layer 410 or an electron-blocking layer. The active layer 415 can emit light by electron-hole pair coupling in response to an electrical signal applied through the first semiconductor layer 410 and the second semiconductor layer 420. The active layer 415 can emit one of the first color of light, the second color of light, and the third color of light. For example, the first color of light may be red light, the second color of light may be green light, and the third color of light may be blue light.
[0126] The active layer 415 may contain a material with a single or multiple quantum well structure. If the active layer 415 contains a material with a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers may be formed of InGaN, and the barrier layers may be formed of GaN or AlGaN, but are not limited to these.
[0127] Alternatively, the active layer 415 may have a structure in which semiconductor materials with high bandgap energy and semiconductor materials with low bandgap energy are alternately stacked, and may contain different group 3 to 5 semiconductor materials depending on the wavelength band of the emitted light. For example, if the semiconductor material contained in the active layer 415 contains indium, the color of the emitted light may change depending on the indium content. For example, the higher the indium content, the longer the wavelength band of light that can be emitted. For example, if the indium content is about 15%, light in the blue wavelength band can be emitted; if the indium content is about 25%, light in the green wavelength band can be emitted; and if the indium content is about 35% or more, light in the red wavelength band can be emitted.
[0128] On the other hand, the light-emitting element ED may further include a superlattice layer disposed on the active layer 415. The superlattice layer may be a layer for relieving stress between the second semiconductor layer 420 and the active layer 415. For example, the superlattice layer can be formed from InGaN or GaN. The superlattice layer may be omitted.
[0129] The second semiconductor layer 420 may be placed on the active layer 415 or the superlattice layer. For example, the second semiconductor layer 420 may be an n-type semiconductor, Al x Ga y In 1-x-y The semiconductor material may include, but is not limited to, a semiconductor material represented by the chemical formula N(0≦x≦1, 0≦y≦1, 0≦x+y≦1). For example, the semiconductor material included in the second semiconductor layer 420 may be, but is not limited to, one or more of n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. For example, the second semiconductor layer 420 may be doped with an n-type dopant, and the n-type dopant may be, but is not limited to, Si, Ge, Sn, etc. For example, the second semiconductor layer 420 may be n-GaN doped with n-type Si, but is not limited to this.
[0130] Figure 5 shows the planar structure of the first to third display areas DA1 to DA3 of the display panel 110 of the display device 100 according to the embodiment of the present disclosure. However, in the following description, Figures 1 to 4 will also be referred to.
[0131] The display area DA of the display panel 110 according to the embodiments of this disclosure may include a first display area DA1, a second display area DA2, and a third display area DA3.
[0132] The first display area DA1 may be the outer region of the second display area DA2 and the third display area DA3. For example, the first display area DA1 may be arranged to surround the second display area DA2 and the third display area DA3. The first display area DA1 is also called the general area, and the second display area DA2 and the third display area DA3 may each be called the optical area.
[0133] The second display area DA2 may include a plurality of first light-transmitting areas TA1. The first display area DA1 does not include any light-transmitting areas. For example, the second display area DA2 may be smaller in size than the first display area DA1.
[0134] The third display area DA3 may include a plurality of second light-transmitting areas TA2. For example, the third display area DA3 may have a smaller size than the first display area DA1.
[0135] For example, the third display area DA3 may have the same size as the second display area DA2. Alternatively, the third display area DA3 may have a smaller or larger size than the second display area DA2.
[0136] For example, the second light-transmitting region TA2 may have a size smaller than or equal to that of the first light-transmitting region TA1.
[0137] For example, the number of second light-transmitting regions TA2 per unit area may be less than or equal to the number of first light-transmitting regions TA1 per unit area.
[0138] The display panel 110 according to the embodiments of this disclosure may include a plurality of first light-emitting elements ED1 located in a first display area DA1 and a plurality of second light-emitting elements ED2 located in a second display area DA2.
[0139] The display panel 110 according to the embodiments of the present disclosure may further include a plurality of first pixel electrodes PE1 electrically connected to the first electrode E1 of each of a plurality of first light-emitting elements ED1, and a plurality of second pixel electrodes PE2 electrically connected to the first electrode E1 of each of a plurality of second light-emitting elements ED2.
[0140] The display panel 110 according to the embodiments of this disclosure may further include a second electrode E2 for each of a plurality of first light-emitting elements ED1, and a common electrode CE that is electrically connected in common to the second electrode E2 for each of a plurality of second light-emitting elements ED2.
[0141] Multiple first pixel electrodes PE1 may be arranged in a first display area DA1, and multiple second pixel electrodes PE2 may be arranged in a second display area DA2. A common electrode CE may be arranged in common to both the first display area DA1 and the second display area DA2.
[0142] The display panel 110 according to the embodiments of the present disclosure may further include a plurality of first subpixel circuits SPC connected to a plurality of first light-emitting elements ED1, and a plurality of second subpixel circuits SPC connected to a plurality of second light-emitting elements ED2.
[0143] For example, multiple first subpixel circuits SPC may be arranged in a first display area DA1 and located beneath multiple first light-emitting elements ED1.
[0144] As an example, multiple second subpixel circuits SPC may be arranged in a second display area DA2 and located beneath multiple second light-emitting elements ED2.
[0145] As another example, multiple second subpixel circuits SPCs may be arranged in a first display area DA1, and a second pixel electrode PE2 may electrically connect a second subpixel circuit SPC located in the first display area DA1 to a second light-emitting element ED2 located in the second display area DA2. In this case, the second pixel electrode PE2 may be arranged across the first display area DA1 and the second display area DA2.
[0146] The display panel 110 according to embodiments of the present disclosure may include signal wiring for supplying various signals to a plurality of first light-emitting elements ED1, a plurality of first subpixel circuits SPC, a plurality of second light-emitting elements ED2, and a plurality of second subpixel circuits SPC. For example, the signal wiring may include a data line DL for supplying a data voltage VDATA and a power line PL for supplying various power sources. Furthermore, the signal wiring may further include a gate line GL for supplying gate signals.
[0147] Referring to Figure 5, in the second display area DA2, each of the multiple second light-emitting elements ED2 does not necessarily have to be superimposed on the multiple first light-transmitting areas TA1, but may be placed between the multiple first light-transmitting areas TA1.
[0148] The display panel 110 according to the embodiments of this disclosure may include a plurality of third light-emitting elements ED3 located in a third display area DA3, and a plurality of third light-emitting elements ED3 located in the third display area DA3 and not overlapping with a plurality of second light-transmitting areas TA2. Each of the plurality of third light-emitting elements ED3 may be arranged between the plurality of second light-transmitting areas TA2.
[0149] The display panel 110 according to the embodiments of the present disclosure may further include a plurality of third pixel electrodes PE3 electrically connected to the first electrode E1 of each of the plurality of third light-emitting elements ED3.
[0150] A common electrode CE, which is commonly placed in the first display area DA1 and the second display area DA2, may also be extended to be placed in the third display area DA3. The common electrode CE may be electrically connected in common to the second electrode E2 of each of the multiple third light-emitting elements ED3.
[0151] The display panel 110 according to the embodiments of the present disclosure may further include a plurality of third subpixel circuits SPC connected to a plurality of third light-emitting elements ED3.
[0152] As an example, multiple third subpixel circuits SPC may be arranged in a third display area DA3 and located beneath multiple third light-emitting elements ED3. As another example, multiple third subpixel circuits SPC may be arranged in a first display area DA1, and a third pixel electrode PE3 may electrically connect the third subpixel circuits SPC located in the first display area DA1 to the third light-emitting elements ED3 located in the third display area DA3. In this case, the third pixel electrode PE3 may be arranged across the first display area DA1 and the third display area DA3.
[0153] The display panel 110 according to embodiments of the present disclosure may include signal wiring for supplying various signals to a plurality of third light-emitting elements ED3 and a plurality of third sub-pixel circuits SPC. For example, the signal wiring may include a data line DL for supplying a data voltage VDATA and a power line PL for supplying various power sources. Furthermore, the signal wiring may further include a gate line GL for supplying gate signals.
[0154] Referring to Figure 5, in the third display area DA3, each of the multiple third light-emitting elements ED3 does not have to overlap with the multiple second light-transmitting areas TA2, and may be positioned between the multiple second light-transmitting areas TA2.
[0155] In the following section, the vertical structure of the first display area DA1, the second display area DA2, and the third display area DA3, which are included in the display area DA, will be explained in more detail with reference to Figures 6 to 8.
[0156] Figure 6 is a cross-sectional view of the first display area DA1 of the display panel 110 according to an embodiment of the present disclosure, Figure 7 is a cross-sectional view of the second display area DA2 of the display panel 110 according to an embodiment of the present disclosure, and Figure 8 is a cross-sectional view of the third display area DA3 of the display panel 110 according to an embodiment of the present disclosure. However, in the following description, Figures 1 to 5 will also be referred to.
[0157] Figure 6 is a cross-sectional view taken along line AB in Figure 5, Figure 7 is a cross-sectional view taken along line CD in Figure 5, and Figure 8 is a cross-sectional view taken along line EF in Figure 5.
[0158] Referring to Figures 6 and 7, the display panel 110 of the display device 100 according to the embodiment of the present disclosure may include a first display area DA1, a second display area DA2 having a smaller size than the first display area DA1 and including a plurality of first light-transmitting areas TA1, a first light-emitting element ED1 located in the first display area DA1, and a second light-emitting element ED2 located in the second display area DA2 and positioned between the plurality of first light-transmitting areas TA1 without overlapping with the plurality of first light-transmitting areas TA1.
[0159] Referring to Figures 6 and 7, the display panel 110 according to the embodiment of the present disclosure may include a first passivation layer 650 arranged to surround the side surface of the first light-emitting element ED1, and a second passivation layer 700 arranged to surround the side surface of the second light-emitting element ED2.
[0160] Referring to Figures 6 and 7, the display panel 110 according to an embodiment of the present disclosure may further include a substrate 200, a first transistor TFT1 disposed on the substrate 200 and located in a first display area DA1, a first pixel electrode PE1 that electrically connects the first source electrode S1 or first drain electrode D1 of the first transistor TFT1 to the first electrode E1 of the first light-emitting element ED1, a second transistor TFT2 disposed on the substrate 200 and located in a second display area DA2, a second pixel electrode PE2 that electrically connects the second source electrode S2 or second drain electrode D2 of the second transistor TFT2 to the first electrode E1 of the second light-emitting element ED2, and a common electrode CE disposed on the first light-emitting element ED1, the first passivation layer 650, the second light-emitting element ED2, and the second passivation layer 700.
[0161] The first light-emitting element ED1 may be connected between the first pixel electrode PE1 and the common electrode CE. The second light-emitting element ED2 may be connected between the second pixel electrode PE2 and the common electrode CE.
[0162] For example, the first light-emitting element ED1 and the second light-emitting element ED2 may each be vertical light-emitting diodes.
[0163] For example, the first light-emitting element ED1 and the second light-emitting element ED2 may each include a first electrode E1, a first semiconductor layer 410 disposed on the first electrode E1, an active layer 415 disposed on the first semiconductor layer 410, a second semiconductor layer 420 disposed on the active layer 415, and a second electrode E2 disposed on the second semiconductor layer 420 (see Figure 4).
[0164] Referring to Figures 6 and 7, according to embodiments of the present disclosure, the first pixel electrode PE1 located in the first display area DA1 is a reflective electrode, and the second pixel electrode PE2 located in the second display area DA2 is a transparent electrode.
[0165] Referring to Figures 6 and 7, according to the embodiment of this disclosure, the common electrode CE, which is commonly arranged in the first display area DA1 and the second display area DA2, may be a transparent electrode.
[0166] Referring to Figures 6 and 7, according to embodiments of the present disclosure, the substrate 200 may have a plurality of first holes H1 that overlap with a plurality of first light-transmitting regions TA1. That is, the plurality of first holes H1 formed in the substrate 200 may be present in the first display region DA1.
[0167] This makes it possible to increase the transmittance of each of the multiple first light-transmitting regions TA1. Therefore, the performance of the first electronic device 11 that overlaps with the second display region DA2 can be improved.
[0168] Referring to Figures 6 and 7, the display panel 110 according to the embodiment of the present disclosure may further include insulating layer stacks 600 disposed between the substrate 200 and the first passivation layer 650 and between the substrate 200 and the second passivation layer 700.
[0169] Referring to Figure 7, according to the embodiment of the present disclosure, the substrate 200 may have a plurality of first holes H1 that overlap with a plurality of first light-transmitting regions TA1, or the insulating layer stack 600 may have a plurality of second holes H2 that overlap with a plurality of first light-transmitting regions TA1.
[0170] Referring to Figure 7, according to the embodiment of the present disclosure, the substrate 200 may have a plurality of first holes H1 that overlap with a plurality of first light-transmitting regions TA1, and the insulating layer stack 600 may have a plurality of second holes H2 that overlap with a plurality of first light-transmitting regions TA1.
[0171] This makes it possible to further increase the transmittance of each of the multiple first light-transmitting regions TA1. Therefore, the performance of the first electronic device 11 that overlaps with the second display region DA2 can be further improved.
[0172] Referring to Figure 7, the second passivation layer 700 is interposed inside a plurality of second holes H2 formed in the insulating layer stack 600. However, the second passivation layer 700 does not necessarily have to be interposed inside a plurality of first holes H1 formed in the substrate 200.
[0173] Referring to Figures 6 and 7, the insulating layer stack 600 may include insulating layers for forming transistors TFT1 and TFT2 contained in each subpixel circuit SPC.
[0174] Referring to Figures 6 and 7, the insulating layer stack 600 may include a buffer layer 610 placed on the substrate 200, a gate insulating layer 620 placed on the buffer layer 610, and an interlayer insulating layer 630 placed on the gate insulating layer 620.
[0175] Referring to Figure 6, the subpixel circuit SPC for driving the first light-emitting element ED1 may include a first transistor TFT1. The first transistor TFT1 may include a first active layer ACT1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1.
[0176] Multiple second holes H2 may be formed, penetrating the buffer layer 610, the gate insulating layer 620, and the interlayer insulating layer 630.
[0177] If each subpixel SP has the same structure as in Figure 3, the first transistor TFT1 may be the driving transistor DT in Figure 3.
[0178] The first transistor TFT1 may be placed in the first display area DA1.
[0179] Referring to Figure 7, the subpixel circuit SPC for driving the second light-emitting element ED2 may include a second transistor TFT2. The second transistor TFT2 may include a second active layer ACT2, a second gate electrode G2, a second source electrode S2, and a second drain electrode D2.
[0180] If each subpixel SP has the same structure as in Figure 3, the second transistor TFT2 can be the driving transistor DT in Figure 3.
[0181] As an example, as shown in Figure 7, the second transistor TFT2 can be placed in the second display area DA2.
[0182] As another example, a second transistor TFT2 can be placed in the first display area DA1. In this case, the second pixel electrode PE2 extends from the first display area DA1 to the second display area DA2, and the second light-emitting element ED2 located in the second display area DA2 and the second transistor TFT2 located in the first display area DA1 can be connected by the second pixel electrode PE2.
[0183] Referring to Figures 6 and 7, the first active layer ACT1 of the first transistor TFT1 and the second active layer ACT2 of the second transistor TFT2 can be placed between the buffer layer 610 and the gate insulating layer 620. The first gate electrode G1 of the first transistor TFT1 and the second gate electrode G2 of the second transistor TFT2 can be placed between the gate insulating layer 620 and the interlayer insulating layer 630. The first source electrode S1 and the first drain electrode D1 of the first transistor TFT1 and the second source electrode S2 and the second drain electrode D2 of the second transistor TFT2 can be placed on the interlayer insulating layer 630.
[0184] Referring to Figure 6, the first pixel electrode PE1 is positioned on the interlayer insulating layer 630 and can extend over at least a portion of the first source electrode S1 or the first drain electrode D1 of the first transistor TFT1.
[0185] Referring to Figure 7, the second pixel electrode PE2 is positioned on the interlayer insulating layer 630 and may extend over at least a portion of the second source electrode S2 or the second drain electrode D2 of the second transistor TFT2.
[0186] Referring to Figure 6, the display panel 110 according to an embodiment of the present disclosure may further include a bank 640 for defining the light-emitting regions of subpixels SP within a first display region DA1.
[0187] Referring to Figures 6 and 7, bank 640 may be located in the first display area DA1. However, bank 640 does not have to be located in the second display area DA2. This allows for an improvement in the transmittance of the second display area DA2.
[0188] Referring to Figure 6, in the first display area DA1, bank 640 may be located on the insulating layer stack 600. Bank 640 may have a bank hole BH that overlaps with a first portion of the first pixel electrode PE1. The first portion of the first pixel electrode PE1 may be located on the insulating layer stack 600 and may be a flat portion.
[0189] The first pixel electrode PE1 located in the first display area DA1 may be a reflective electrode.
[0190] In the first display area DA1, the first light-emitting element ED1 may be positioned inside the bank hole BH. Both sides of the first portion of the first pixel electrode PE1 may extend along the sides of the bank 640. In other words, both sides of the first portion of the first pixel electrode PE1 may extend along the inner surface of the bank hole BH. This allows both sides of the first portion of the first pixel electrode PE1, which is composed of a reflective electrode, to form inclined surfaces (reflective surfaces).
[0191] As a result, the light emitted from the first light-emitting element ED1 can be reflected upward. This allows a larger amount of light emitted from the first light-emitting element ED1 to be emitted to the front of the display panel 110.
[0192] In other words, by arranging the first light-emitting element ED1 within the bank hole BH of bank 640, having the first pixel electrode PE1 composed of a reflective electrode, and having a portion of the first pixel electrode PE1 form an inclined surface, the light extraction efficiency for the light emitted from the first light-emitting element ED1 can be improved.
[0193] On the other hand, for example, bank 640 can be composed of a black bank. This allows for a more precise definition of the light-emitting area of the subpixel SP.
[0194] Referring to Figure 7, the common electrode CE may be positioned on the top and sides of the first passivation layer 650. The common electrode CE may be positioned so as to cover the top and sides of the first passivation layer 650. The back surface of a portion of the common electrode CE may be in contact with the top surface of the bank 640.
[0195] Referring to Figures 6 and 7, the first passivation layer 650 may be a diffusion layer or a sidewall diffusion layer, but the embodiments herein are not limited to these.
[0196] The first passivation layer 650 may, but is not limited to, include an organic insulating material in which fine particles are dispersed. For example, the first passivation layer 650 may, but is not limited to, a siloxane in which fine metal particles such as titanium dioxide (TiO2) particles are dispersed. Light emitted from the first light-emitting element ED1 can be scattered by the fine particles dispersed in the first passivation layer 650 and emitted outside the display panel 110. This allows the first passivation layer 650 to improve the extraction efficiency of light emitted from multiple first light-emitting elements ED1.
[0197] For example, the second passivation layer 700 may, but is not limited to, an organic insulating material in which fine particles are dispersed. For instance, the second passivation layer 700 may, but is not limited to, a siloxane in which fine metal particles such as titanium dioxide (TiO2) particles are dispersed. Light emitted from the second light-emitting element ED2 can be scattered by the fine particles dispersed in the second passivation layer 700 and emitted to the outside of the display panel 110. This allows the second passivation layer 700 to improve the efficiency of extracting light emitted from multiple second light-emitting elements ED2.
[0198] As another example, the characteristics of the second passivation layer 700 may differ depending on the location in multiple first light-transmitting regions TA1 so that light transmission from the front to the back of the display panel 110 occurs normally. The second passivation layer 700 may include portions that overlap with the first light-transmitting regions TA1 and portions that do not overlap with the first light-transmitting regions TA1. The portions of the second passivation layer 700 that overlap with the first light-transmitting regions TA1 and the portions that do not overlap with the first light-transmitting regions TA1 may have different characteristics. For example, the portions of the second passivation layer 700 that overlap with the first light-transmitting regions TA1 may contain an organic insulating material from which fine particles (fine metal particles) have been removed so that the straight-line light transmission characteristics are greater than the light scattering characteristics, while the portions of the second passivation layer 700 that do not overlap with the first light-transmitting regions TA1 may contain an organic insulating material containing fine particles (fine metal particles) so that the light scattering characteristics are greater. The portion of the second passivation layer 700 that does not overlap with the first light-transmitting region TA1 may be the portion that overlaps with the light-emitting region of the second light-emitting element ED2.
[0199] Furthermore, the second passivation layer 700 may contain organic material. For example, the second passivation layer 700 may contain, but is not limited to, polyimide.
[0200] The first passivation layer 650 may contain an organic substance. For example, the first passivation layer 650 may contain, but is not limited to, polyimide.
[0201] Referring to Figure 8, the display area DA of the display panel 110 according to the embodiment of the present disclosure may further include a third display area DA3, a third light-emitting element ED3, and a third passivation layer 800.
[0202] The third display area DA3 includes a plurality of second light-transmitting areas TA2 and may have a smaller size than the first display area DA1.
[0203] The third light-emitting element ED3 may be located in the third display area DA3 and may be positioned between the multiple second light-transmitting areas TA2 without overlapping with them.
[0204] The third passivation layer 800 can be positioned to surround the side of the third light-emitting element ED3.
[0205] Referring to Figure 8, the display panel 110 according to an embodiment of the present disclosure may further include a third transistor TFT3 disposed on a substrate 200 and located in a third display area DA3, a third pixel electrode PE3 electrically connecting a third source electrode S3 or a third drain electrode D3 of the third transistor TFT3 and a first electrode E1 of a third light-emitting element ED3, and a common electrode CE disposed on the third light-emitting element ED3 and the third passivation layer 800.
[0206] A third light-emitting element ED3 can be connected between the third pixel electrode PE3 and the common electrode CE.
[0207] For example, the third light-emitting element ED3 may be a vertical light-emitting diode.
[0208] For example, each of the third light-emitting elements ED3 may include a first electrode E1, a first semiconductor layer 410 disposed on the first electrode E1, an active layer 415 disposed on the first semiconductor layer 410, a second semiconductor layer 420 disposed on the active layer 415, and a second electrode E2 disposed on the second semiconductor layer 420 (see Figure 4).
[0209] Referring to Figure 8, according to an embodiment of the present disclosure, the third pixel electrode PE3 located in the third display area DA3 may be a transparent electrode.
[0210] Referring to Figure 8, the common electrode CE can be placed in common across the first display area DA1, the second display area DA2, and the third display area DA3, and can be a transparent electrode.
[0211] Referring to Figure 8, according to the embodiment of the present disclosure, the substrate 200 may have a plurality of first holes H1 that overlap with a plurality of second light-transmitting regions TA2. That is, the plurality of first holes H1 formed in the substrate 200 may exist not only in the second display region DA2 but also in the third display region DA3.
[0212] This makes it possible to increase the transmittance of each of the multiple second light-transmitting regions TA2. Therefore, the performance of the second electronic device 12 that overlaps with the third display region DA3 can be improved.
[0213] Referring to Figure 8, the display panel 110 according to an embodiment of the present disclosure may further include an insulating layer stack 600 disposed between the substrate 200 and the third passivation layer 800.
[0214] Referring to Figure 8, according to the embodiment of the present disclosure, the substrate 200 may have a plurality of first holes H1 that overlap with a plurality of second light-transmitting regions TA2, or the insulating layer stack 600 may have a plurality of second holes H2 that overlap with a plurality of second light-transmitting regions TA2.
[0215] Referring to Figure 8, according to the embodiment of the present disclosure, the substrate 200 may have a plurality of first holes H1 that overlap with a plurality of second light-transmitting regions TA2, and the insulating layer stack 600 may have a plurality of second holes H2 that overlap with a plurality of second light-transmitting regions TA2.
[0216] This makes it possible to further increase the transmittance of each of the multiple second light-transmitting regions TA2. Therefore, the performance of the second electronic device 12 that overlaps with the third display region DA3 can be further improved.
[0217] Referring to Figure 8, the third passivation layer 800 is interposed inside a plurality of second holes H2 formed in the insulating layer stack 600. However, the third passivation layer 800 does not have to be interposed inside a plurality of first holes H1 formed in the substrate 200. The third passivation layer 800 may be a separate layer from the second passivation layer 700, or it may be a continuous layer with the second passivation layer 700.
[0218] Referring to Figure 8, the insulating layer stack 600 may include insulating layers for forming the transistor TFT3 contained in each subpixel circuit SPC.
[0219] Referring to Figure 8, the insulating layer stack 600 may include a buffer layer 610 placed on the substrate 200, a gate insulating layer 620 placed on the buffer layer 610, and an interlayer insulating layer 630 placed on the gate insulating layer 620.
[0220] Referring to Figure 8, the subpixel circuit SPC for driving the third light-emitting element ED3 may include a third transistor TFT3. The third transistor TFT3 may include a third active layer ACT3, a third gate electrode G3, a third source electrode S3, and a third drain electrode D3.
[0221] If each subpixel SP has the same structure as in Figure 3, the third transistor TFT3 may be the driving transistor DT in Figure 3.
[0222] As an example, as shown in Figure 8, the third transistor TFT3 may be located in the third display area DA3.
[0223] As another example, the third transistor TFT3 can be placed in the first display area DA1. In this case, the third pixel electrode PE3 can be placed extending from the first display area DA1 to the third display area DA3, and the third light-emitting element ED3 placed in the third display area DA3 and the third transistor TFT3 placed in the first display area DA1 can be connected by the third pixel electrode PE3.
[0224] Referring to Figure 8, the third active layer ACT3 of the third transistor TFT3 can be located between the buffer layer 610 and the gate insulating layer 620. The third gate electrode G3 of the third transistor TFT3 can be located between the gate insulating layer 620 and the interlayer insulating layer 630. The third source electrode S3 and the third drain electrode D3 of the third transistor TFT3 can be located on the interlayer insulating layer 630.
[0225] Referring to Figure 8, the third pixel electrode PE3 is positioned on the interlayer insulating layer 630 and may extend over at least a portion of the third source electrode S3 or the third drain electrode D3 of the third transistor TFT3.
[0226] Referring to Figure 8, bank 640 does not necessarily have to be located in the third display area DA3. This makes it possible to improve the transparency of the third display area DA3.
[0227] Referring to Figure 8, the third passivation layer 800 may, for example, include, an organic insulating material in which fine particles are dispersed. For example, the third passivation layer 800 may consist of, for example, a siloxane in which fine metal particles such as titanium dioxide (TiO2) particles are dispersed. Light emitted from the third light-emitting element ED3 can be scattered by the fine particles dispersed in the third passivation layer 800 and emitted outside the display panel 110. This allows the third passivation layer 800 to improve the extraction efficiency of light emitted from multiple third light-emitting elements ED3.
[0228] As another example, the characteristics of the third passivation layer 800 may differ depending on the location so that light transmission from the front to the back of the display panel 110 occurs normally in multiple second light transmission regions TA2. The third passivation layer 800 may include portions that overlap with the second light transmission regions TA2 and portions that do not overlap with the second light transmission regions TA2. The portions of the third passivation layer 800 that overlap with the second light transmission regions TA2 and the portions that do not overlap with the second light transmission regions TA2 may have different characteristics. For example, the portions of the third passivation layer 800 that overlap with the second light transmission regions TA2 may contain an organic insulating material from which fine particles (fine metal particles) have been removed so that the straight-line light transmission characteristics are greater than the light scattering characteristics, while the portions of the third passivation layer 800 that do not overlap with the second light transmission regions TA2 may contain an organic insulating material containing fine particles (fine metal particles) so that the light scattering characteristics are greater. In the third passivation layer 800, the portion that does not overlap with the second light-transmitting region TA2 may be the portion that overlaps with the light-emitting region of the third light-emitting element ED3.
[0229] Furthermore, the third passivation layer 800 may contain organic material. For example, the third passivation layer 800 may contain, but is not limited to, polyimide.
[0230] Referring to Figures 6 to 8, the display device 100 according to the embodiment of the present disclosure may further include an overcoat layer 660 disposed on a common electrode CE, a touch sensor layer 300 disposed on the overcoat layer 660, and a cover layer 680 disposed on the touch sensor layer 300.
[0231] The touch sensor layer 300 may include a plurality of touch sensor metal TSMs disposed on the overcoat layer 660 and a touch protection layer 670 disposed on the plurality of touch sensor metal TSMs.
[0232] Multiple touch sensor metal TSMs do not necessarily have to be superimposed on the first light-emitting element ED1 and the second light-emitting element ED2. In the first display area DA1, multiple touch sensor metal TSMs may be superimposed on bank 640.
[0233] The overcoat layer 660 may contain a transparent insulating material.
[0234] The insulating properties of the overcoat layer 660 prevent short circuits between the touch sensor metal TSMs and prevent short circuits between the common electrode CE and the touch sensor metal TSMs.
[0235] Furthermore, due to the transparency of the overcoat layer 660, the light emitted from the first to third light-emitting elements ED1, ED2, and ED3 can be efficiently transmitted through the overcoat layer 660.
[0236] Referring to Figure 7, the first electronic device 11 may be configured to receive first light superimposed on the second display area DA2 and transmitted through a plurality of first light-transmitting areas TA1, and to perform a first operation using the first light.
[0237] Referring to Figure 8, the second electronic device 12 may be configured to receive second light superimposed on the third display area DA3 and transmitted through multiple second light-transmitting areas TA2, and to perform a second operation using the second light.
[0238] The second light used by the second electronic device 12 for the second operation may have a different wavelength from the first light used by the first electronic device 11 for the first operation. For example, the wavelength of the first light may be a visible light wavelength, and the wavelength of the second light may be an infrared wavelength.
[0239] The display device 100 according to the embodiments of the present disclosure described above may include a substrate 200 partitioned into a first display area DA1 and a second display area DA2 including a plurality of first light-transmitting areas TA1, a first light-emitting element ED1 located in the first display area DA1, and a second light-emitting element ED2 located in the second display area DA2 and positioned between the plurality of first light-transmitting areas TA1 without overlapping with the plurality of first light-transmitting areas TA1.
[0240] The display device 100 according to the embodiments of this disclosure may include an insulating layer stack 600 disposed between the substrate 200 and the first light-emitting element ED1 and between the substrate 200 and the second light-emitting element ED2.
[0241] The substrate 200 may have a plurality of first holes H1 that overlap with a plurality of first light-transmitting regions TA1. The insulating layer stack 600 may have a plurality of second holes H2 that overlap with a plurality of first light-transmitting regions TA1.
[0242] The display device 100 according to the embodiment of the present disclosure may include a first passivation layer 650 disposed on an insulating layer stack 600 and positioned to surround the side surface of a first light-emitting element ED1, and a second passivation layer 700 disposed on the insulating layer stack 600 and positioned to surround the side surface of a second light-emitting element ED2. The second passivation layer 700 is interposed inside a plurality of second holes H2, but may not be interposed inside a plurality of first holes H1.
[0243] The display device 100 according to the embodiments of this disclosure may further include a bank 640 disposed on the insulating layer stack 600. The bank 640 is located in the first display area DA1 and may not be located in the second display area DA2.
[0244] Referring to Figures 6 to 8, the display panel 110 according to the embodiment of the present disclosure may further include a lower shield metal BSM disposed beneath each of the first to third transistors TFT1, TFT2, and TFT3.
[0245] The lower shield metal BSM can overlap with the first to third active layers ACT1, ACT2, and ACT3 of the first to third transistors TFT1, TFT2, and TFT3, respectively.
[0246] The lower shield metal BSM can be placed between the substrate 200 and the buffer layer 610.
[0247] Figure 9 shows the planar structure of the first to third display areas DA1, DA2, and DA3 of the display panel 110 according to an embodiment of the present disclosure. Figure 10 is a cross-sectional view of the first display area DA1 of the display panel 110 according to an embodiment of the present disclosure. Figure 11 is a cross-sectional view of the second display area DA2 of the display panel 110 according to an embodiment of the present disclosure. Figure 12 is a cross-sectional view of the third display area DA3 of the display panel 110 according to an embodiment of the present disclosure.
[0248] Figure 10 is a cross-sectional view taken along line GH in Figure 9, Figure 11 is a cross-sectional view taken along line IJ in Figure 9, and Figure 13 is a cross-sectional view taken along line KR in Figure 9.
[0249] The plan view in Figure 9 corresponds to the plan view in Figure 5, the cross-sectional view in Figure 10 corresponds to the cross-sectional view in Figure 6, the cross-sectional view in Figure 11 corresponds to the cross-sectional view in Figure 7, and the cross-sectional view in Figure 12 corresponds to the cross-sectional view in Figure 8. Therefore, when explaining with reference to Figures 9 to 12, we will focus on the differences from Figures 5 to 8 and omit explanations of the same content.
[0250] Referring to Figures 9 and 10, in the first display area DA1, one first light-emitting element ED1 may be placed in one subpixel SP. That is, in the first display area DA1, one first light-emitting element ED1 may be connected between one first pixel electrode PE1 and a common electrode CE.
[0251] However, referring to Figures 9 and 11, in the second display region DA2, two or more second light-emitting elements ED2, ED2' may be arranged in a single subpixel SP. That is, in the second display region DA2, two or more second light-emitting elements ED2, ED2' may be connected between a single second pixel electrode PE2 and a common electrode CE.
[0252] In other words, the display panel 110 according to embodiments of the present disclosure may further include at least one second light-emitting element ED2' as at least one first additional light-emitting element connected between the second pixel electrode PE2 and the common electrode CE. The second light-emitting element ED2 and the at least one second light-emitting element ED2', which is at least one first additional light-emitting element, may be connected in parallel between the second pixel electrode PE2 and the common electrode CE. As described above, this configuration makes it possible to prevent brightness unevenness between the first display area DA1 and the second display area DA2.
[0253] Referring to Figures 9 and 12, in the third display region DA3, two or more third light-emitting elements ED3, ED3' may be arranged in a single subpixel SP. That is, in the third display region DA3, two or more third light-emitting elements ED3, ED3' may be connected between a single third pixel electrode PE3 and a common electrode CE.
[0254] In other words, the display panel 110 according to embodiments of the present disclosure may further include at least one third light-emitting element ED3' as at least one second additional light-emitting element connected between the third pixel electrode PE3 and the common electrode CE. The third light-emitting element ED3 and the at least one third light-emitting element ED3', which is at least one second additional light-emitting element, may be connected in parallel between the third pixel electrode PE3 and the common electrode CE. As described above, this configuration makes it possible to prevent brightness unevenness between the first display area DA1 and the third display area DA3.
[0255] Referring to Figures 9, 11, and 12, the number of first light-transmitting regions TA1 per unit area in the second display region DA2 may be greater than or equal to the number of second light-transmitting regions TA2 per unit area in the third display region DA3.
[0256] Referring to Figures 9, 11, and 12, the number of first light-emitting elements ED1 per unit area in the second display area DA2 may be equivalent to the number of second light-emitting elements ED2 per unit area in the third display area DA3. In other words, the resolution of the second display area DA2 may be greater than or equal to the resolution of the third display area DA3.
[0257] Figures 13 to 15 show the manufacturing processes S10, S20, and S30 of the second display area DA2 of the display panel 110 according to the embodiment of this disclosure.
[0258] Referring to Figure 13, in the photoresist formation step S10, the substrate 200, insulating layer stack 600, second transistor TFT2, second pixel electrode PE2, second light-emitting element ED2, second passivation layer 700, and common electrode CE are formed. Here, the second passivation layer 700 may contain an organic insulating material such as polyimide.
[0259] In the photoresist formation step S10, the insulating layer stack 600 may have a second hole H2 formed, while the substrate 200 may not have a first hole H1 formed. The second passivation layer 700 may be interposed inside the second hole H2 of the insulating layer stack 600.
[0260] In the photoresist formation step S10, a photoresist PR may be placed on the back surface of the substrate 200. The photoresist PR may contain holes H_PR corresponding to the second holes H2 of the insulating layer stack 600. That is, the holes H_PR of the photoresist PR may overlap with the second holes H2 of the insulating layer stack 600.
[0261] Referring to Figure 14, in the substrate etching step S20, which proceeds after the photoresist formation step S10, the substrate etching solution is used to etch the regions of the substrate 200 corresponding to the holes H_PR of the photoresist PR. This allows the first hole H1 to be formed in the substrate 200.
[0262] The second passivation layer 700 may contain an organic insulating material such as polyimide. This may prevent the second passivation layer 700 from reacting with the substrate etching solution.
[0263] Therefore, when the region corresponding to the hole H_PR of the photoresist PR on the substrate 200 is etched, the second passivation layer 700 interposed inside the second hole H2 of the insulating layer stack 600 may not be etched. In other words, the second passivation layer 700 can function as an etching stopper.
[0264] As mentioned above, even as the substrate etching step S20 progresses, the structural stability of the display panel 110 can be improved by maintaining the state in which the second passivation layer 700 is interposed inside the second hole H2 of the insulating layer stack 600.
[0265] Referring to Figure 15, after the substrate etching step S20, the photoresist removal step S30 proceeds, allowing the photoresist PR formed on the back surface of the substrate 200 to be removed in order to etch the substrate.
[0266] The display device according to the embodiment of this disclosure can be described as follows.
[0267] A display device according to an embodiment of the present disclosure may include a first display area, a second display area having a smaller size than the first display area and including a plurality of first light-transmitting areas, a first light-emitting element located in the first display area, a second light-emitting element located in the second display area and positioned between the plurality of first light-transmitting areas, a first passivation layer positioned to surround the side surface of the first light-emitting element, and a second passivation layer positioned to surround the side surface of the second light-emitting element.
[0268] The first light-emitting element and the second light-emitting element may each include a first electrode, a first semiconductor layer disposed on the first electrode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a second electrode disposed on the second semiconductor layer.
[0269] A display device according to an embodiment of the present disclosure may further include a substrate, a first transistor disposed on the substrate and located in a first display area, a first pixel electrode electrically connecting the first source electrode or first drain electrode of the first transistor to the first electrode of a first light-emitting element, a second transistor disposed on the substrate and located in a second display area, a second pixel electrode electrically connecting the second source electrode or second drain electrode of the second transistor to the first electrode of a second light-emitting element, and a common electrode disposed on the first light-emitting element, a first passivation layer, a second light-emitting element, and the second passivation layer.
[0270] The first light-emitting element can be connected between the first pixel electrode and the common electrode.
[0271] A second light-emitting element may be connected between the second pixel electrode and the common electrode.
[0272] The first pixel electrode may be a reflective electrode, and the second pixel electrode may be a transparent electrode.
[0273] The common electrode can be a transparent electrode.
[0274] The substrate may have a plurality of first holes that overlap with a plurality of first light-transmitting regions.
[0275] The display device according to the embodiments of the present disclosure may further include insulating layer stacks disposed between the substrate and a first passivation layer, and between the substrate and a second passivation layer.
[0276] The substrate may have a plurality of first holes that overlap with a plurality of first light-transmitting regions, or the insulating layer stack may have a plurality of second holes that overlap with a plurality of first light-transmitting regions.
[0277] The substrate may have a plurality of first holes that overlap with a plurality of first light-transmitting regions, and the insulating layer stack may have a plurality of second holes that overlap with a plurality of first light-transmitting regions. The second passivation layer is interposed inside the plurality of second holes, but may not be interposed inside the plurality of first holes.
[0278] The insulating layer stack may include a buffer layer placed on a substrate, a gate insulating layer placed on the buffer layer, and an interlayer insulating layer placed on the gate insulating layer.
[0279] The first active layer of the first transistor and the second active layer of the second transistor may be placed between the buffer layer and the gate insulating layer.
[0280] The first gate electrode of the first transistor and the second gate electrode of the second transistor may be placed between the gate insulating layer and the interlayer insulating layer.
[0281] The first source electrode and first drain electrode of the first transistor, and the second source electrode and second drain electrode of the second transistor, may be arranged on an interlayer insulating layer.
[0282] The first pixel electrode is positioned on an interlayer insulating layer and may extend over at least a portion of the first source electrode or the first drain electrode of the first transistor.
[0283] The second pixel electrode is disposed on the interlayer insulating layer and can extend over at least a part of the second source electrode or the second drain electrode of the second transistor.
[0284] The display device according to an embodiment of the present disclosure may further include a bank disposed on the insulating layer stack. The bank may have a bank hole overlapping a first portion of the first pixel electrode.
[0285] The first light-emitting element may be disposed inside the bank hole.
[0286] Both sides of the first portion of the first pixel electrode can extend along the side surface of the bank.
[0287] The bank is disposed in the first display area and may not be disposed in the second display area. The bank may be a black bank.
[0288] The display device according to an embodiment of the present disclosure may further include at least one additional light-emitting element connected between the second pixel electrode and the common electrode.
[0289] The display device according to an embodiment of the present disclosure may further include an overcoat layer disposed on the common electrode, a touch sensor layer disposed on the overcoat layer, and a cover layer disposed on the touch sensor layer.
[0290] The overcoat layer may include a transparent insulating material.
[0291] The touch sensor layer may include a plurality of touch sensor metals disposed on the overcoat layer and a touch protection layer disposed on the plurality of touch sensor metals.
[0292] The plurality of touch sensor metals may not overlap the first light-emitting element and the second light-emitting element.
[0293] The second passivation layer may include an organic substance.
[0294] A display device according to an embodiment of the present disclosure may include a third display area having a smaller size than a first display area and including a plurality of second light-transmitting areas, a third light-emitting element located in the third display area and positioned between the plurality of second light-transmitting areas without overlapping with the plurality of second light-transmitting areas, and a third passivation layer positioned to surround the side surface of the third light-emitting element.
[0295] The display device according to the embodiments of the present disclosure may further include a first electronic device configured to receive first light superimposed on a second display area and transmitted through a plurality of first light-transmitting areas, and to perform a first operation using the first light.
[0296] The display device according to the embodiments of the present disclosure may further include a second electronic device configured to receive second light superimposed on a third display area and passing through a plurality of second light-transmitting areas, and to perform a second operation using the second light.
[0297] The second light may have a different wavelength than the first light.
[0298] A display device according to an embodiment of the present disclosure includes a first display area and a second display area, the second display area may include a substrate including a plurality of first light-transmitting areas, a first light-emitting element located in the first display area, a second light-emitting element located in the second display area and positioned between the plurality of first light-transmitting areas, and an insulating layer stack positioned between the substrate and the first light-emitting element and between the substrate and the second light-emitting element.
[0299] The substrate may have a plurality of first holes that overlap with a plurality of first light-transmitting regions. The insulating layer stack may have a plurality of second holes that overlap with a plurality of first light-transmitting regions.
[0300] A display device according to an embodiment of the present disclosure may include a first passivation layer disposed on an insulating layer stack and disposed so as to surround a side surface of a first light-emitting element, and a second passivation layer disposed on the insulating layer stack and disposed so as to surround a side surface of a second light-emitting element.
[0301] The second passivation layer is interposed inside a plurality of second holes, and may not be interposed inside a plurality of first holes.
[0302] A display device according to an embodiment of the present disclosure may further include a bank disposed on an insulating layer stack, disposed in a first display area, and not disposed in a second display area.
[0303] A display device according to an embodiment of the present disclosure does not include at least one additional light-emitting element connected in parallel with the first light-emitting element, but may further include at least one additional light-emitting element connected in parallel with the second light-emitting element.
[0304] According to the embodiment of the present disclosure described above, a display device having a light transmission structure in which an electronic device is not exposed on the front surface of the display device and the electronic device disposed below the display panel can normally receive light can be provided.
[0305] According to an embodiment of the present disclosure, a display device having a light transmission structure suitable for an inorganic-based light-emitting element can be provided.
[0306] According to an embodiment of the present disclosure, a display device having a light transmission structure capable of increasing the transmittance of a light transmission region can be provided.
[0307] According to an embodiment of the present disclosure, a display device capable of improving the luminance in a display area including a light transmission region can be provided.
[0308] According to an embodiment of the present disclosure, by using an inorganic-based light-emitting element, a display device capable of realizing high luminance even at low power can be provided.
[0309] The above description is merely illustrative of the technical concept of this disclosure, and any person with ordinary skill in the art to which this disclosure belongs could make various modifications and variations without departing from the essential characteristics of this disclosure. Furthermore, the embodiments disclosed herein are for illustrative purposes only and not to limit the technical concept of this disclosure, and such embodiments do not limit the scope of the technical concept of this disclosure. [Explanation of Symbols]
[0310] 11: First electronic device 12: Second Electronic Device 100:Display device 110: Display Panel 200: Circuit board 300: Touch sensor layer 410: First semiconductor layer 415: Active layer 420: Second semiconductor layer 600: Insulating layer stack 610: Buffer layer 620: Gate Insulation Layer 630: Interlayer insulating layer 640: Bank 650: First Passivation Layer 660: Overcoat layer 670: Touch protection layer 680: Cover layer 700: Second Passivation Layer 800: Third Passivation Layer
Claims
1. The first display area and A second display area including multiple first light-transmitting regions, A first light-emitting element located in the first display area, A second light-emitting element located in the second display area and positioned between the plurality of first light-transmitting areas, A first passivation layer is arranged to surround the side surface of the first light-emitting element, A second passivation layer is arranged to surround the side surface of the second light-emitting element. A display device, including a display device.
2. Each of the first light-emitting element and the second light-emitting element is, The first electrode and A first semiconductor layer disposed on the first electrode, An active layer disposed on the first semiconductor layer, A second semiconductor layer disposed on the active layer, A second electrode disposed on the second semiconductor layer and The display device according to claim 1, including the following:
3. circuit board and A first transistor is disposed on the substrate and located in the first display area, A first pixel electrode electrically connects the first source electrode or first drain electrode of the first transistor to the first electrode of the first light-emitting element, A second transistor is disposed on the substrate and located in the second display area, A second pixel electrode electrically connects the second source electrode or second drain electrode of the second transistor to the first electrode of the second light-emitting element, The first light-emitting element, the first passivation layer, the second light-emitting element, and a common electrode disposed on the second passivation layer It further includes, The first light-emitting element is connected between the first pixel electrode and the common electrode, and the second light-emitting element is connected between the second pixel electrode and the common electrode. The display device according to claim 1.
4. The first pixel electrode is a reflective electrode, The second pixel electrode is a transparent electrode, The aforementioned common electrode is a transparent electrode. The display device according to claim 3.
5. The display device according to claim 3, wherein the substrate has a plurality of first holes that overlap with the plurality of first light-transmitting regions.
6. The present invention further includes an insulating layer stack disposed between the substrate and the first passivation layer and between the substrate and the second passivation layer, The display device according to claim 3, wherein the substrate has a plurality of first holes that overlap with the plurality of first light-transmitting regions, or the insulating layer stack has a plurality of second holes that overlap with the plurality of first light-transmitting regions.
7. The substrate has a plurality of first holes that overlap with the plurality of first light-transmitting regions, and the insulating layer stack has a plurality of second holes that overlap with the plurality of first light-transmitting regions. The second passivation layer is interposed inside the plurality of second holes, but not inside the plurality of first holes. The display device according to claim 6.
8. The aforementioned insulating layer stack is A buffer layer disposed on the substrate, A gate insulating layer disposed on the buffer layer, An interlayer insulating layer disposed on the gate insulating layer and Includes, The first active layer of the first transistor and the second active layer of the second transistor are arranged between the buffer layer and the gate insulating layer. The first gate electrode of the first transistor and the second gate electrode of the second transistor are disposed between the gate insulating layer and the interlayer insulating layer. The first source electrode and the first drain electrode of the first transistor and the second source electrode and the second drain electrode of the second transistor are arranged on the interlayer insulating layer. The first pixel electrode is positioned on the interlayer insulating layer and extends over at least a portion of the first source electrode or first drain electrode of the first transistor. The second pixel electrode is positioned on the interlayer insulating layer and extends over at least a portion of the second source electrode or second drain electrode of the second transistor. The plurality of second holes are formed, penetrating the buffer layer, the gate insulating layer, and the interlayer insulating layer. The display device according to claim 6.
9. The invention further includes a bank arranged on the insulating layer stack, The bank has a bank hole that overlaps with the first portion of the first pixel electrode, The first light-emitting element is located inside the bank hole. Both sides of the first portion of the first pixel electrode extend along the inner surface of the bank hole, The display device according to claim 6.
10. The display device according to claim 9, wherein the bank is located in the first display area and is not located in the second display area.
11. The display device according to claim 3, further comprising at least one additional light-emitting element connected between the second pixel electrode and the common electrode.
12. An overcoat layer disposed on the common electrode, A touch sensor layer disposed on the aforementioned overcoat layer, A cover layer disposed on the touch sensor layer and It further includes, The aforementioned overcoat layer includes a transparent insulating material. The display device according to claim 3.
13. The aforementioned touch sensor layer is Multiple touch sensor metals arranged on the overcoat layer, A touch protective layer disposed on the multiple touch sensor metals and Includes, The aforementioned multiple touch sensor metals are The first light-emitting element and the second light-emitting element do not overlap, The display device according to claim 12.
14. The display device according to claim 1, wherein the second passivation layer comprises an organic substance.
15. A third display area including multiple second light-transmitting regions, A third light-emitting element is located in the third display area and is positioned between the plurality of second light-transmitting regions without overlapping with the plurality of second light-transmitting regions, A third passivation layer is arranged to surround the side surface of the third light-emitting element. The display device according to claim 1, including the following:
16. A first electronic device configured to receive first light that overlaps with the second display area and passes through the plurality of first light-transmitting areas, and to perform a first operation using the first light, A second electronic device configured to receive second light superimposed on the third display area and transmitted through the plurality of second light-transmitting areas, and to perform a second operation using the second light, It further includes, The second light has a different wavelength from the first light. The display device according to claim 15.
17. A substrate including a first display area and a second display area, wherein the second display area includes a plurality of first light-transmitting areas, A first light-emitting element located in the first display area, A second light-emitting element located in the second display area and positioned between the plurality of first light-transmitting areas, An insulating layer stack disposed between the substrate and the first light-emitting element and between the substrate and the second light-emitting element. Includes, The substrate has a plurality of first holes that overlap with the plurality of first light-transmitting regions, and the insulating layer stack has a plurality of second holes that overlap with the plurality of first light-transmitting regions. Display device.
18. A first passivation layer is disposed on the insulating layer stack and is positioned to surround the side surface of the first light-emitting element, A second passivation layer is disposed on the insulating layer stack and is positioned to surround the side surface of the second light-emitting element. Includes, The second passivation layer is interposed inside the plurality of second holes, but not inside the plurality of first holes. The display device according to claim 17.
19. The display device according to claim 17, further comprising banks arranged on the insulating layer stack, located in the first display area, and not located in the second display area.
20. The display device according to claim 18, further comprising at least one additional light-emitting element connected in parallel with the second light-emitting element.