Display panels and display devices

Abstract

The present invention provides a display panel, a method for manufacturing the same, and a display device that can extend the service life of a product and improve its display effect. [Solution] The display panel includes an isolation region surrounding an opening region and a first isolation column 23 formed on a base substrate 21 and located in the isolation region, and includes a first metal layer, a first insulating layer, a second insulating layer and a second metal layer formed sequentially, wherein the region of the second insulating layer facing the first metal layer protrudes from other regions to form a first protrusion, and the first protrusion has an inclined surface with an inclination angle of less than 90°. The second metal layer is provided in the same layer as the source and drain electrodes, and a notch surrounding the opening region is provided on one side of the second metal layer facing the display region and / or on one side of the second metal layer facing the opening region. As a result, the display panel has a better sealing effect.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and particularly to a display panel and a display device.

Background Art

[0002] In recent years, mobile display technology has been developing rapidly, and a new generation of display technology represented by flexible AMOLED (Active-matrix organic light-emitting diode) has been increasingly widely used. AMOLED has characteristics such as being thinner and lighter, actively emitting light (eliminating the need for a backlight source), having no viewing angle problem, high resolution, high brightness, fast response speed, low energy consumption, a wide operating temperature range, high shock resistance, and being able to display flexibly.

[0003] At the same time, the market demand for display panels with a high screen occupancy rate is also urgently required, and the designs of conventional "notch screens" and "drop screens" are no longer able to meet user needs. In this case, the screen drilling technology has been proposed as a new design. The light-emitting material used in flexible AMOLED technology is an organic light-emitting material that is very sensitive to water and oxygen, and it should not be exposed to an environment where water and oxygen exist. Otherwise, corrosion is likely to occur, the organic light-emitting material will be invalidated, and abnormalities will occur in the display, so it is essential to be isolated from water and oxygen.

Summary of the Invention

Problems to be Solved by the Invention

[0004] An embodiment according to the present invention provides a display panel and a manufacturing method thereof, and a display device that can extend the service life of a product and improve the display effect by avoiding the intrusion of water vapor and oxygen gas from the opening of the opening region into the display region.

Means for Solving the Problems

[0005] According to a first aspect of the present invention, a display panel is provided that includes a display area, an opening area, and an isolation area located between the display area and the opening area, wherein at least a portion of the isolation area is provided to surround the opening area, and the display panel is provided in such a way. Base board and A drive circuit layer formed on the base substrate and located in the display area, including a thin-film transistor and a storage capacitor, It includes a first isolation column formed on the base substrate and located in the isolation region, The thin-film transistor includes a gate electrode, a first gate insulating layer formed on one side of the gate electrode away from the base substrate, an interlayer dielectric layer formed on one side of the first gate insulating layer away from the base substrate, and source / drain electrodes formed on one side of the interlayer dielectric layer away from the base substrate; the storage capacitor includes a first electrode plate provided in the same layer as the gate electrode, and a second electrode plate located between the first gate insulating layer and the interlayer dielectric layer. The first isolation column is provided so as to surround the opening region and includes a first metal layer, a first insulating layer formed on one side of the first metal layer away from the base substrate, a second insulating layer formed on one side of the first insulating layer away from the base substrate, and a second metal layer formed on one side of the second insulating layer away from the base substrate, wherein the first metal layer is provided in the same layer as the first electrode plate or the second electrode plate, the first insulating layer is provided in the same layer as the first gate insulating layer, and the second insulating layer is provided in the same layer as the first The second metal layer is provided in the same layer as the interlayer dielectric layer and includes a first portion, a second portion, and a first inclined portion connecting the first portion and the second portion, wherein the inclination angle of the first inclined portion is less than 90°, the second metal layer is provided in the same layer as the source and drain electrodes and is located on one side of the second portion away from the base substrate, and a notch surrounding the opening region is provided on one side of the second metal layer facing the display region and / or on the one side of the second metal layer facing the opening region.

[0006] In one exemplary embodiment of the present invention, the orthographic projection of the second metal layer on the base substrate is located within the orthographic projection of the first metal layer on the base substrate.

[0007] In one exemplary embodiment of the present invention, the first metal layer is provided in the same layer as the first electrode plate, The first isolation column further includes a third metal layer provided in the same layer as the second electrode plate.

[0008] In one exemplary embodiment of the present invention, the orthographic projection of the second metal layer on the base substrate is located within the orthographic projection of the third metal layer on the base substrate, The orthographic projection of the third metal layer on the base substrate is located within the orthographic projection of the first metal layer on the base substrate.

[0009] In one exemplary embodiment of the present invention, the ratio of the cross-sectional widths of the second metal layer and the first metal layer in the same cross-section is 0.4 or more and 0.7 or less. In the same cross-section, the ratio of the cross-sectional widths of the second metal layer and the third metal layer is 0.5 or more and 0.9 or less. In the same cross-section, the ratio of the cross-sectional widths of the third metal layer and the first metal layer is 0.58 or more and less than 1. Here, the cross-section is a plane extending in the radial direction of the first isolation column.

[0010] In one exemplary embodiment of the present invention, the cross-sectional width of the first metal layer is 6.5 μm to 8.5 μm. The cross-sectional width of the second metal layer is 3.5 μm to 4.5 μm. The cross-sectional width of the third metal layer is 5 μm to 7 μm.

[0011] In one exemplary embodiment of the present invention, the thicknesses of the first metal layer and the third metal layer are 2000 Å to 3000 Å, and the thickness of the second metal layer is 6000 Å to 8000 Å.

[0012] In one exemplary embodiment of the present invention, the inclination angle of the first inclined portion is 10° to 45°.

[0013] In one exemplary embodiment of the present invention, a buffer layer is further provided between the base substrate and the drive circuit layer. The thin-film transistor further includes a semiconductor layer and a second gate insulating layer that are sequentially formed on the buffer layer, the second gate insulating layer being located between the gate electrode and the semiconductor layer.

[0014] In one exemplary embodiment of the present invention, the first isolation column further includes a third insulating layer provided in the same layer as the second gate insulating layer, and a fourth insulating layer provided in the same layer as the buffer layer.

[0015] In one exemplary embodiment of the present invention, the display panel is: A planarization layer located in the display area and covering the thin-film transistor, A pixel definition layer located in the display area and formed on the planarization layer to define multiple pixel units, A first barrier dam located in the isolation region and provided so as to surround the opening region, and provided in the same layer as the pixel definition layer, The system further includes a second barrier dam located in the isolation region and provided so as to surround the opening region, The second barrier dam is located on one side of the first barrier dam approaching the opening region and includes a first isolation section provided in the same layer as the flattening layer and a second isolation section provided in the same layer as the pixel-defining layer, wherein the height of the second barrier dam is greater than the height of the first barrier dam.

[0016] In one exemplary embodiment of the present invention, the display panel further includes a second isolation column formed on the base substrate and located in the isolation region, the second isolation column includes a fourth metal layer provided so as to surround the opening region and having at least the same structure as the second metal layer and provided in the same layer, Here, the first barrier dam and the second barrier dam are located between the first isolation pillar and the second isolation pillar.

[0017] In an exemplary embodiment of the present invention, the second isolation pillar further includes a fifth metal layer provided in the same layer as the first electrode plate or the second electrode plate, a fifth insulating layer provided in the same layer as the first gate insulating layer, and a sixth insulating layer provided in the same layer as the interlayer dielectric layer. Here, the sixth insulating layer includes a third portion, a fourth portion, and a second inclined portion connecting the third portion and the fourth portion. The inclination angle of the second inclined portion is the same as the inclination angle of the first inclined portion, and the fourth metal layer is located on one side of the fourth portion away from the base substrate.

[0018] In an exemplary embodiment of the present invention, the fifth metal layer is provided in the same layer as the first electrode plate. The second isolation pillar further includes a sixth metal layer provided in the same layer as the second electrode plate.

[0019] In an exemplary embodiment of the present invention, the second isolation pillar further includes a seventh insulating layer provided in the same layer as the second gate insulating layer and an eighth insulating layer provided in the same layer as the buffer layer.

[0020] In an exemplary embodiment of the present invention, the second isolation pillar further includes an insulating laminate located on one side of the fourth metal layer approaching the base substrate. The insulating laminate is provided in the same layer as the buffer layer, the second gate insulating layer, the first gate insulating layer, and the interlayer dielectric layer, and is separated from the buffer layer, the second gate insulating layer, the first gate insulating layer, and the interlayer dielectric layer. Here, the insulating laminate has an inclined surface with an inclination angle of 50° to 70°.

[0021] In an exemplary embodiment of the present invention, one of the first isolation pillar and the second isolation pillar is located on one side of the first barrier dam approaching the display area, and the other is located on one side of the second barrier dam approaching the opening area. Here, a plurality of the first isolation columns are provided, and / or a plurality of the second isolation columns are provided.

[0022] In an exemplary embodiment of the present invention, the display panel further includes a sealing film including at least a first inorganic sealing layer, the first inorganic sealing layer is located in the display region and the isolation region, and covers the driving circuit layer and the first isolation column.

[0023] According to a second aspect of the present invention, there is provided a display device including the display panel according to any of the above embodiments.

[0024] According to a second aspect of the present invention, there is provided a method for manufacturing a display panel including a display region, an opening region, and an isolation region located between the display region and the opening region, at least a part of the isolation region is provided to surround the opening region, and here, the manufacturing method includes: a step of preparing a base substrate; a step of forming a driving circuit layer and a first isolation column on the base substrate, the driving circuit layer includes a thin film transistor and a storage capacitor located in the display region, the thin film transistor includes a gate electrode, a first gate insulating layer formed on one side of the gate electrode away from the base substrate, an interlayer dielectric layer formed on one side of the first gate insulating layer away from the base substrate, and a source / drain electrode formed on one side of the interlayer dielectric layer away from the base substrate, the storage capacitor includes a first electrode plate provided in the same layer as the gate electrode, and a second electrode plate located between the first gate insulating layer and the interlayer dielectric layer. The first isolation column is provided so as to surround the opening region and includes a first metal layer, a first insulating layer formed on one side of the first metal layer away from the base substrate, a second insulating layer formed on one side of the first insulating layer away from the base substrate, and a second metal layer formed on one side of the second insulating layer away from the base substrate, wherein the first metal layer is provided in the same layer as the first electrode plate or the second electrode plate, the first insulating layer is provided in the same layer as the first gate insulating layer, and the second insulating layer is provided in the same layer as the first The second metal layer is provided in the same layer as the interlayer dielectric layer and includes a first portion, a second portion, and a first inclined portion connecting the first portion and the second portion, wherein the inclination angle of the first inclined portion is less than 90°, the second metal layer is provided in the same layer as the source and drain electrodes and is located on one side of the second portion away from the base substrate, and a notch surrounding the opening region is provided on one side of the second metal layer facing the display region and / or on the one side of the second metal layer facing the opening region.

[0025] In one exemplary embodiment of the present invention, The first metal layer is provided in the same layer as the first electrode plate. The first isolation column further includes a third metal layer provided in the same layer as the second electrode plate.

[0026] In one exemplary embodiment of the present invention, The steps include forming a second isolation column located in the isolation region on the base substrate, the second isolation column being provided so as to surround the opening region and including at least a fourth metal layer having the same structure as the second metal layer and being provided in the same layer, The steps include forming a planar layer over the thin-film transistor in the display area, The steps include forming a pixel definition layer located on the flattening layer in the display area so as to define multiple pixel units, The method further includes the step of forming a first barrier dam and a second barrier dam in the isolation region, The first barrier dam is provided so as to surround the opening region and is located in the same layer as the pixel definition layer, the second barrier dam is provided so as to surround the opening region and is located on one side of the first barrier dam that approaches the opening region, the second barrier dam is located in the same layer as the flattening layer and the pixel definition layer, and the height of the second barrier dam is greater than the height of the first barrier dam. Here, the first barrier dam and the second barrier dam are located between the first isolation column and the second isolation column.

[0027] In one exemplary embodiment of the present invention, the structure of the second isolation column is the same as the structure of the first isolation column.

[0028] The drawings are provided to give a further understanding of embodiments of the present invention and constitute part of this specification. They are intended to be interpreted in conjunction with the embodiments of the present invention and are not intended to be limitations on the invention. The above and other features and advantages will become more apparent to those skilled in the art through exemplary embodiments described in detail with reference to the accompanying drawings. [Brief explanation of the drawing]

[0029] [Figure 1] This is a schematic diagram showing the structure of the portion located between the display area and the isolation area in a display panel according to one embodiment of the present invention. [Figure 2] This is a schematic enlarged view showing the structure of part A shown in Figure 1. [Figure 3] Figure 2 is a schematic diagram showing the structure of the isolation column. [Figure 4] This is a schematic diagram showing the structure of a display panel according to another embodiment of the present invention. [Figure 5] Figure 4 is a schematic cross-sectional view of a display panel according to one embodiment, along the BB line. [Figure 6] Figure 4 is a schematic cross-sectional view of a display panel according to one embodiment, along the CC line. [Figure 7] Figure 4 is a schematic cross-sectional view of a display panel along the CC line of another embodiment. [Figure 8] Figure 4 is a schematic cross-sectional view of a display panel along the CC line according to another embodiment. [Figure 9] This is a schematic diagram showing the structure of the first or second isolation column of the display area in the display panel shown in Figure 6. [Figure 10] This is a schematic diagram showing the structure of the first or second isolation column of the display area in the display panel shown in Figure 7. [Figure 11] This is a schematic diagram showing the structure of the first or second isolation column of the display area in the display panel shown in Figure 8. [Modes for carrying out the invention]

[0030] The technical concept of the present invention will be described in more detail below with reference to the attached drawings. In this specification, the same or similar reference numerals in the figures indicate the same or similar structures. The embodiments of the present invention will be described below with reference to the attached drawings, but this is intended to interpret the overall inventive concept of the present invention and is not intended to limit the present invention.

[0031] Furthermore, in the following detailed description, many specific details are provided to facilitate interpretation and to provide a complete understanding of the embodiments of the present invention. However, it is clear that one or more embodiments may be realized without these specific details.

[0032] In this specification, the terms "on top of...", "forming... on top of...", and "provided on top of..." can indicate that one layer is formed or installed "directly" on another layer, or that one layer is formed or installed "indirectly" on another layer, that is, that there is another layer between the two layers.

[0033] The terms “one,” “the said,” “the said,” and “at least one” are used to indicate the presence of one or more elements / components / etc. The terms “includes” and “equip” mean to be included in an open expression and to further include elements / components / etc. other than those listed.

[0034] The terms "first," "second," etc., are used here to describe each component, component, element, region, layer, and / or part, and these components, components, elements, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one component, component, element, region, layer, and / or part from another.

[0035] In the present invention, unless otherwise specified, the term "located in the same layer" means that two layers, components, members, elements, or parts may be formed by the same patterning process, and that the two layers, components, members, elements, or parts are generally formed from the same material, located in the same film layer, and in direct contact with the film layer.

[0036] In the present invention, unless otherwise specified, the term "patterning process" generally includes steps such as photoresist coating, exposure, development, etching, and photoresist stripping. The term "single patterning process" means the process of forming patterned layers, parts, components, etc., using a single mask.

[0037] In one embodiment of the present invention, as shown in Figure 1, by providing a structure such as an isolation column 12 or isolation groove 13 between the display area 10 and the opening area 11 so as to block the organic light-emitting material 15, it is possible to block the pathways of water and oxygen and block the cathode layer 16. The method for manufacturing the isolation column 12 is as follows: A buffer layer, a gate insulator layer (abbreviated as GI), and an interlayer dielectric layer (abbreviated as ILD) are laminated on a base 14, and then exposure, development, and EBA (Etch Bending A) / EBB (Etch Bending B) etching are performed on the ILD+GI+buffer layer 120 to obtain a predetermined pattern. Subsequently, an SD (source / drain) metal layer 121 is formed on the predetermined pattern, and the SD metal layer 121 is etched to form an undercut structure, thereby blocking the organic light-emitting material 15. Specifically, as shown in Figures 2 and 3, the isolation column 12 manufactured by EBA / EBB etching in this manner is called an EBA / EBB isolation column, and this EBA / EBB isolation column can share the bending process and the mask.

[0038] As shown in Figure 3, the EBA / EBB isolation column has the following two characteristics: firstly, the formed inclination angle α1 is large, and secondly, the formed step height h1 is large. Thus, the inorganic encapsulation layer 17 formed by chemical vapor deposition (CVD) technology is stacked very steeply in the inclined portion of the ILD+GI+buffer layer 120, which is disadvantageous for releasing external stress. When subjected to external stress, cracks are likely to occur, causing the encapsulation to fail, allowing water and oxygen gas to penetrate and resulting in abnormalities in the element's display.

[0039] To improve upon the above-mentioned problems, an embodiment of the present invention further provides a display panel 2, as shown in Figure 4. The display panel 2 may be an OLED display panel. The display panel 2 may also include a display area 20a, an aperture area 20b, and an isolation area 20c located between the display area 20a and the aperture area 20b. The isolation area 20c is provided to at least partially surround the aperture area 20b.

[0040] The display panel 2 according to an embodiment of the present invention will be described in detail below with reference to the drawings.

[0041] As shown in Figures 4 to 11, the display panel 2 may include a base substrate 21, a drive circuit layer, and a first isolation column 23.

[0042] Here, if the display panel 2 is a flexible panel, the provided base substrate 21 may be a flexible substrate such as polyimide (PI). If the display panel 2 is a rigid substrate, the base substrate 21 may be a rigid substrate such as glass or quartz.

[0043] Furthermore, in order to facilitate the processing of the necessary components for each area of ​​the display panel 2 later, each area is first defined on the base substrate 21. For example, the base substrate 21 can first be divided into a display area 20a, an isolation area 20c, and an opening area 20b.

[0044] As shown in Figure 5, the drive circuit layer is formed on the base substrate 21. The drive circuit layer is formed on the base substrate 21 and may also include a thin-film transistor 24 and a storage capacitor 25 located in the display area 20a.

[0045] Specifically, as shown in Figure 5, the thin-film transistor 24 may include a gate electrode 242, a first gate insulating layer 243, an interlayer dielectric layer 244, and source / drain electrodes, which are formed sequentially. That is, first, the gate electrode 242 is formed on the base substrate 21, then the first gate insulating layer 243 is formed on one side of the gate electrode 242 away from the base substrate 21, the interlayer dielectric layer 244 is formed on one side of the first gate insulating layer 243 away from the base substrate 21, and the source / drain electrodes are formed on one side of the interlayer dielectric layer 244 away from the base substrate 21. The thin-film transistor 24 may also further include a semiconductor layer 240. The semiconductor layer 240 may be located on one side of the gate electrode 242 that approaches the base substrate 21, so that the thin-film transistor 24 is of the top-gate type. When the thin-film transistor 24 is of the top-gate type, it should be understood that the thin-film transistor 24 may further include a second gate insulating layer 241 located between the gate electrode 242 and the semiconductor layer 240.

[0046] However, although the present invention is not limited thereto, the semiconductor layer 240 can be located on one side of the gate electrode 242 away from the base substrate 21, and between the first gate insulating layer 243 and the interlayer dielectric layer 244, so that the thin-film transistor 24 is a bottom-gate type. It should be understood that the thin-film transistor 24 according to the embodiment of the present invention is not limited to the top-gate type shown in the figure, but may be a bottom-gate type.

[0047] As shown in Figure 5, the source and drain electrodes described above include a source electrode 245 and a drain electrode 246 provided in the same layer. The source electrode 245 and the drain electrode 246 can be connected to both ends of the semiconductor layer 240, respectively, via via holes on the interlayer dielectric layer 244 and the first gate insulating layer 243.

[0048] As shown in Figure 5, the storage capacitor 25 includes a first electrode plate 250 provided in the same layer as the gate electrode 242, and a second electrode plate 251 located between the first gate insulating layer 243 and the interlayer dielectric layer 244.

[0049] For example, the first gate insulating layer 243, the second gate insulating layer 241, and the interlayer dielectric layer 244 according to embodiments of the present invention can be manufactured from inorganic insulating materials such as silicon oxide and silicon nitride. The semiconductor layer 240 can be manufactured from materials such as polycrystalline silicon and metal oxides. The gate electrode 242, the first electrode plate 250, and the second electrode plate 251 can be manufactured from metal or alloy materials such as aluminum, titanium, and cobalt. The source electrode 245 and the drain electrode 246 may be manufactured from metal or alloy materials, and may be single-layer or multilayer metal structures formed from, for example, molybdenum, aluminum, and titanium. Here, if the source electrode 245 and the drain electrode 246 have a multilayer structure, the multilayer structure may be a multilayer metal laminate, for example, a three-layer metal laminate of titanium, aluminum, and titanium (Ti / Al / Ti).

[0050] As shown in Figure 5, a buffer layer 22 can be further provided between the base substrate 21 and the drive circuit layer. The buffer layer 22 may be made of a material such as silicon nitride or silicon oxide. It can provide protection against water and oxygen, as well as basic ions, and can also protect other structures on the base substrate 21. Depending on the specific situation, other layers may be provided between the base substrate 21 and the drive circuit layer in addition to the buffer layer 22. Here, if the thin-film transistor 24 is a top-gate type, the semiconductor layer 240 can be located on top of the buffer layer 22.

[0051] As shown in Figures 6 to 11, the first isolation column 23 is formed on the base substrate 21 and is located in the isolation region 20c. The first isolation column 23 is provided so as to surround the opening region 20b and includes a first metal layer 230, a first insulating layer 231, a second insulating layer 232, and a second metal layer 233 which are formed sequentially. Specifically, first, the first metal layer 230 is formed on the base substrate 21, then the first insulating layer 231 is formed on one side of the first metal layer 230 away from the base substrate 21, the second insulating layer 232 is formed on one side of the first insulating layer 231 away from the base substrate 21, and the second metal layer 233 is formed on one side of the second insulating layer 232 away from the base substrate 21.

[0052] Here, the first metal layer 230 is provided in the same layer as the first electrode plate 250 or the second electrode plate 251. The first insulating layer 231 is provided in the same layer as the first gate insulating layer 243. The second insulating layer 232 is provided in the same layer as the interlayer dielectric layer 244 and includes a first portion 232a, a second portion 232b, and a first inclined portion 232c connecting the first portion 232a and the second portion 232b. As shown in Figures 9 to 11, the inclination angle α2 of the first inclined portion 232c is less than 90°. The second metal layer 233 is provided in the same layer as the source and drain electrodes and is located on one side of the second portion 232b that is separated from the base substrate 21. Furthermore, a notch 233a surrounding the opening region 20b is provided on one side of the second metal layer 233 facing the display region 20a and / or on one side of the second metal layer 233 facing the opening region 20b. Here, the first inclined portion 232c and the second metal layer 233 can isolate the organic light-emitting material 301, thereby isolating the pathways for water and oxygen. As shown in Figures 6 to 8, it should be understood that the first isolation column 23 can isolate not only the organic light-emitting material 301 but also other materials, such as the cathode 302.

[0053] In an embodiment of the present invention, by adding a first metal layer 230, which is provided in the same layer as the first electrode plate 250 or the second electrode plate 251, to the bottom of the first isolation column 23, the region of the second insulating layer 232 facing the first metal layer 230 becomes higher than other regions of the second insulating layer 232 during the process of laminating the second insulating layer 232, thereby naturally forming an inclination angle α2 of less than 90°. In the embodiment of the present invention, since the first inclined portion 232c having an inclination angle α2 is naturally formed in the second insulating layer 232, the step of "obtaining a predetermined pattern by exposing, developing, and EBA (Etch Bending A) / EBB (Etch Bending B) etching the ILD+GI+ buffer layer 120" can be omitted in the process of manufacturing the first isolation column 23, compared to the process of manufacturing the EBA / EBB isolation column 12 shown in Figures 1 to 3. That is, blocking from the organic light-emitting material 301 is achieved, and the masking process can be omitted, thus reducing costs.

[0054] Furthermore, in the embodiment of the present invention, by adding a first metal layer 230, the portion of the second insulating layer 232 facing the first metal layer 230 is raised, thereby forming a first inclined portion 232c having an inclination angle α2. For this reason, the inclination angle α2 in the embodiment of the present invention is smaller than the inclination angle α1 formed by exposure, development, and EBA (Etch Bending A) / EBB (Etch Bending B) etching of the ILD+GI+buffer layer 120 shown in Figures 1 to 3, and the step height h2 formed at the location of the inclination angle α2 is also smaller. Specifically, referring to Figures 9 to 11, the inclination angle α2 and step height h2 in the embodiment of the present invention are smaller than the inclination angle α1 and step height h1 of the EBA / EBB isolation column 12 shown in Figure 3, respectively.

[0055] For example, the inclination angle α2 of the first inclined portion 232c of the first isolation column 23 in the embodiment of the present invention is 10° to 45°, and may be, for example, 10°, 20°, 30°, 45°, etc. The inclination angle α1 of the inclined surface in the ILD+GI+ buffer layer 120 of the EBA / EBB isolation column 12 shown in Figure 3 is 50° to 70°, and may be, for example, 50°, 60°, 70°, etc.

[0056] Here, in the embodiment of the present invention, the inclination angle α2 of the first inclined portion 232c of the first isolation column 23 is smaller than the inclination angle α1 of the inclined portion of the EBA / EBB isolation column 12. Therefore, when the inorganic sealing layer is later laminated, the inorganic sealing layer according to the embodiment of the present invention (the first inorganic sealing layer 320 shown in Figures 6 to 8) can be laminated more smoothly on the first inclined portion 232c of the first isolation column 23 compared to when the inorganic sealing layer 17 shown in Figures 1 and 2 is laminated on the inclined portion of the EBA / EBB isolation column 12, thereby contributing to the release of external stress. As a result, the first inorganic sealing layer 320 is less likely to crack when subjected to external stress, and furthermore, it can block the intrusion of water and oxygen gas, ensuring the display effect.

[0057] Furthermore, the first insulating layer 231 and the second insulating layer 232 in the embodiment of the present invention may be an integral structure as long as the first inclined portion 232c can be formed.

[0058] In some embodiments, as shown in Figures 9 to 11, the first isolation column 23 further includes a third insulating layer 234 which can be provided in the same layer as the second gate insulating layer 241, and a fourth insulating layer 235 which can be provided in the same layer as the buffer layer 22.

[0059] In some embodiments, as shown in Figures 6 and 9, the first metal layer 230 of the first isolation column 23 can be provided in the same layer as the first electrode plate 250. Selectively, in the first isolation column 23, the orthographic projection of the second metal layer 233 on the base substrate 21 is located within the orthographic projection of the first metal layer 230 on the base substrate 21, thereby contributing to the inorganic sealing layer located on the first isolation column 23 to release external stress more effectively, and preventing cracks from occurring in the inorganic sealing layer when subjected to external stress. The first metal layer 230 can also be formed with an inclined surface having a predetermined angle during the manufacturing process.

[0060] Furthermore, in the same cross-section, the ratio of the cross-sectional widths of the second metal layer 233 and the first metal layer 230 is 0.4 or more and 0.7 or less. For example, the cross-sectional width of the first metal layer 230 is 6.5 μm to 8.5 μm, and may be, for example, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, etc. The cross-sectional width of the second metal layer 233 is 3.5 μm to 4.5 μm, and may be, for example, 3.5 μm, 4 μm, 4.5 μm, etc.

[0061] The step h2 in the embodiment of the present invention may be the thickness of the first metal layer 230. Furthermore, the cross-section in the embodiment of the present invention is a plane extending radially from the first isolation column 23. The cross-sectional width is the maximum width of the cross-section, but is not limited thereto; the width at other points in the cross-section may be within the range of the above values.

[0062] In some embodiments, as shown in Figures 7 and 10, the first metal layer 230 of the first isolation column 23 can be provided in the same layer as the second electrode plate 251. By selectively positioning the orthographic projection of the second metal layer 233 on the base substrate 21 within the orthographic projection of the first metal layer 230 on the base substrate 21 in the first isolation column 23, the inorganic sealing layer located in the first isolation column 23 contributes to further releasing external stress, thereby preventing cracks from occurring in the inorganic sealing layer when subjected to external stress. The first metal layer 230 can also be formed with an inclined surface having a predetermined angle during the manufacturing process.

[0063] Furthermore, in the same cross-section, the ratio of the cross-sectional widths of the second metal layer 233 and the first metal layer 230 is 0.4 or more and 0.7 or less. For example, the cross-sectional width of the first metal layer 230 is 6.5 μm to 8.5 μm, and may be, for example, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, etc. The cross-sectional width of the second metal layer 233 is 3.5 μm to 4.5 μm, and may be, for example, 3.5 μm, 4 μm, 4.5 μm, etc.

[0064] The step h2 in the embodiment of the present invention may be the thickness of the first metal layer 230. Furthermore, the cross-section in the embodiment of the present invention is a plane extending radially from the first isolation column 23. The cross-sectional width may be the maximum width of the cross-section, but is not limited thereto; the width at other positions of the cross-section may be within the range of the above values.

[0065] In some embodiments, as shown in Figures 8 and 11, the first metal layer 230 of the first isolation column 23 can be provided in the same layer as the first electrode plate 250. The first isolation column 23 may further include a third metal layer 236 provided in the same layer as the second electrode plate 251. Selectively, the orthographic projection of the second metal layer 233 on the base substrate 21 is located within the orthographic projection of the third metal layer 236 on the base substrate 21. By positioning the orthographic projection of the third metal layer 236 on the base substrate 21 within the orthographic projection of the first metal layer 230 on the base substrate 21, the inorganic sealing layer located on the first isolation column 23 contributes to further releasing external stress, thereby preventing cracks from occurring in the inorganic sealing layer when subjected to external stress. The first metal layer 230 and the second metal layer 233 can also have inclined surfaces with a predetermined angle formed during the manufacturing process.

[0066] Furthermore, in the same cross-section, the ratio of the cross-sectional widths of the second metal layer 233 to the first metal layer 230 is 0.4 or more and 0.7 or less. The ratio of the cross-sectional widths of the second metal layer 233 to the third metal layer 236 is 0.5 or more and 0.9 or less. The ratio of the cross-sectional widths of the third metal layer 236 to the first metal layer 230 is 0.58 or more and less than 1. For example, the cross-sectional width of the first metal layer 230 is 6.5 μm to 8.5 μm, and may be, for example, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, etc. The cross-sectional width of the second metal layer 233 is 3.5 μm to 4.5 μm, and may be, for example, 3.5 μm, 4 μm, 4.5 μm, etc. The maximum width of the third metal layer 236 is 5 μm to 7 μm, and may be, for example, 5 μm, 5.5 μm, 6 μm, 6.5 μm, or 7 μm.

[0067] Furthermore, the step height h2 in the embodiment of the present invention may be the sum of the thicknesses of the first metal layer 230 and the third metal layer 236. Also, the cross-section in the embodiment of the present invention is a plane extending radially from the first isolation column 23. The cross-sectional width may be the maximum width of the cross-section, but is not limited thereto, and the width of other positions in the cross-section may be within the range of the above values.

[0068] The first metal layer 230, the second metal layer 233, and the third metal layer 236 in the first isolation column 23 according to the above embodiment are generally manufactured by an etching process. It should be understood that the first metal layer 230, the second metal layer 233, and the third metal layer 236 manufactured in this manner typically have a predetermined inclination angle. Specifically, the surfaces of the first metal layer 230, the second metal layer 233, and the third metal layer 236 that are separated from the base substrate 21 are located within the orthographic projection on the base substrate 21 of the surfaces that are closer to the base substrate 21. Based on this, in order to ensure that the inorganic encapsulation layer can further release external stress, in the embodiment of the present invention, the maximum cross-sectional width of the second metal layer 233 in the first isolation column 23 may be smaller than the minimum cross-sectional width of the first metal layer 230. The maximum cross-sectional width of the second metal layer 233 may be smaller than the minimum cross-sectional width of the third metal layer 236. The maximum width of the third metal layer 236 may be smaller than the minimum cross-sectional width of the first metal layer 230.

[0069] Furthermore, if the first insulating layer 231, second insulating layer 232, third insulating layer 234, and fourth insulating layer 235 in the first isolation column 23 according to an embodiment of the present invention are designed to have the same thickness as the GI1 layer, ILD layer, GI2 layer, and buffer layer in the conventional EBA / EBB isolation column, and the maximum and minimum cross-sectional widths of the second insulating layer 232 having an inclination angle α2 in the first isolation column 23 are designed to have the same maximum and minimum cross-sectional widths as the ILD+GI+buffer layer 120 in the EBA / EBB isolation column, then the main factor influencing the inclination angle α2 of the first isolation column 23 according to an embodiment of the present invention is the thickness of the first metal layer 230 and the second metal layer 233. Here, in order to make the inclination angle α2 of the first isolation column 23 shown in Figures 9 to 11 according to the embodiment of the present invention smaller than the inclination angle α1 of the EBA / EBB isolation column 12 shown in Figure 3, the thicknesses of the first metal layer 230 and the third metal layer 236 according to the embodiment of the present invention are 2000 Å to 3000 Å, and may be, for example, 2200 Å, 2400 Å, 2600 Å, 2800 Å, 3000 Å, etc. The thicknesses of the first metal layer 230 and the third metal layer 236 may be the same or different, but it should be understood that this will be determined according to the specific circumstances.

[0070] Here, the thickness of the second metal layer 233 in the first isolation column 23 is 6000 Å to 8000 Å, and may be, for example, 6000 Å, 6500 Å, 7000 Å, 7500 Å, 8000 Å, etc. In order for the second metal layer 233 to better block the organic light-emitting material, the ratio of the thickness of the notch 233a in the second metal layer 233 to the thickness of the second metal layer 233 is 0.5 to 0.8, and may be, for example, 0.5, 0.6, 0.7, 0.8, etc.

[0071] Furthermore, if the second metal layer 233 has a Ti / Al / Ti multilayer structure, the Ti / Al / Ti multilayer structure can be etched using a predetermined etching solution to produce the notch 233a. The etching solution has an etching effect only on the Al layer, or the etching rate for the Al layer is made greater than the etching rate for the Ti layer, thereby forming the notch 233a on the second metal layer 233. As a result, the second metal layer 233 can serve to block the film layer formed by the vapor deposition method (for example, the organic light-emitting material 301 or the cathode 302). The structure and material of the second metal layer 233 are not limited to those described above, but should be understood to be determined according to the specific circumstances.

[0072] In one embodiment, the cross-section of the second metal layer 233 is "I-shaped". That is, on one side of the second metal layer 233 facing the display area 20a and on the one side of the second metal layer 233 facing the opening area 20b, a notch 233a is provided that surrounds the opening area 20b. This further blocks the organic light-emitting material 301 and the cathode 302.

[0073] Furthermore, the thickness of the first insulating layer 231 is 1000 Å to 1500 Å, and may be, for example, 1000 Å, 1300 Å, 1500 Å, etc. The thickness of the second insulating layer 232 is 4000 Å to 6000 Å, and may be, for example, 4000 Å, 5000 Å, 6000 Å, etc. The thickness of the third insulating layer 234 is 1000 Å to 1500 Å, and may be, for example, 1000 Å, 1300 Å, 1500 Å, etc. The thickness of the fourth insulating layer 235 is 3000 Å to 5000 Å, and may be, for example, 3000 Å, 4000 Å, 5000 Å, etc.

[0074] Furthermore, the thickness of each structure provided in the same layer according to the embodiment of the present invention may be the same or different.

[0075] Furthermore, the cross-sectional width in the embodiment of the present invention is the dimension in the X direction in Figures 6 to 8, and its thickness is the dimension in the Y direction in Figures 6 to 8.

[0076] Based on the above explanation, an isolation column that forms an inclination angle simply by adding a metal layer provided in the same layer as the first electrode plate 250 can be defined as a Gate1 isolation column. An isolation column that forms an inclination angle simply by adding a metal layer provided in the same layer as the second electrode plate 251 can be defined as a Gate2 isolation column. An isolation column that forms an inclination angle simply by adding a metal layer provided in the same layer as the first electrode plate 250 and the second electrode plate 251 can be defined as a Gate1+Gate2 isolation column. That is, the first isolation column 23 according to the embodiment of the present invention may be a Gate1 isolation column, a Gate2 isolation column, or a Gate1+Gate2 isolation column.

[0077] In some embodiments, as shown in Figures 5 to 8, the display panel 2 may further include a planarization layer 26 and a pixel definition layer 27 located in the display area 20a, and a first barrier dam 28 and a second barrier dam 29 located in the isolation area 20c. Here, the planarization layer 26 covers the thin-film transistor 24, and the pixel definition layer 27 is formed on the planarization layer 26. That is, after the film layers of the thin-film transistor 24 and the storage capacitor 25 are formed, the planarization layer 26 and the pixel definition layer 27 are formed sequentially. The pixel definition layer 27 is for defining a plurality of pixel units 30. The first barrier dam 28 and the second barrier dam 29 are both provided so as to surround the aperture area 20b. The second barrier dam 29 is located on one side of the first barrier dam 28 that approaches the aperture area 20b. Here, the first barrier dam 28 is provided in the same layer as the pixel definition layer 27. The second barrier dam 29 includes a first isolation section 290 provided in the same layer as the planarization layer 26, and a second isolation section 291 provided in the same layer as the pixel definition layer 27. The height of the second barrier dam 29 is greater than the height of the first barrier dam 28. The first barrier dam 28 and the second barrier dam 29 restrict the flow of the material of the organic sealing layer 321 in the sealing film, thereby preventing the material of the organic sealing layer 321 from flowing into the opening region 20b and causing sealing failure.

[0078] In embodiments of the present invention, it should be understood that the first barrier dam 28 or the second barrier dam 29 can be provided individually, and the number of first barrier dams 28 and second barrier dams 29 is not limited to one, but may be provided in larger numbers. Furthermore, the structure of the first barrier dam 28 and second barrier dam 29 is not limited to the structures shown in Figures 6 to 8, but will be determined according to the specific circumstances.

[0079] Here, the planarization layer 26 and the pixel definition layer 27 can be manufactured from organic insulating materials such as polyimide or epoxy resin. The display area may further include an inorganic protective layer (PVX) (not shown). The inorganic protective layer may be formed on one side of the source / drain electrodes away from the base substrate 21 and located on one side of the planarization layer 26 closer to the base substrate 21. That is, the inorganic protective layer may be located between the source / drain electrodes and the planarization layer. The inorganic protective layer provides protection to the source / drain electrodes by covering them. For example, the inorganic protective layer can be manufactured from an inorganic insulating material such as silicon nitride or silicon oxide. It should be understood that there is no inorganic protective layer to protect the isolation column in the isolation area 20c.

[0080] In some embodiments, as shown in Figure 5, the display panel 2 may further include a pixel unit 30 located in the display area 20a. The pixel unit 30 may include an anode 300, an organic light-emitting material 301, and a cathode 302. The anode 300 may be formed on the planarization layer 26 before the pixel definition layer 27 and connected to the drain electrode 246 of the thin-film transistor 24 via a via hole in the planarization layer 26. A pixel opening is formed in the portion of the pixel definition layer 27 corresponding to the anode 300. The pixel opening exposes at least a portion of the anode 300. After the pixel definition layer 27 is formed, the organic light-emitting material 301 can be deposited over the entire surface. The organic light-emitting material 301 may be blocked at the location of the first isolation column 23, as shown in Figures 6 to 8. Here, the organic light-emitting material 301 is located in the pixel opening and in contact with the anode 300. After the organic light-emitting material 301 has been deposited over the entire surface, the cathode 302 material can also be deposited over the entire surface. The material of the cathode 302 can be blocked at the location of the first isolation column 23, as shown in Figures 6 to 8.

[0081] The pixel unit 30 may further include functional layers such as an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer (not shown). When these layers are formed on the display panel 2 using a vapor deposition method, they can all be separated by the first isolation column 23.

[0082] For example, the anode 300 may be made from materials such as ITO (indium tin oxide), indium zinc oxide (IZO), or zinc oxide (ZnO). The organic light-emitting material 301 may include low molecular weight organic materials or polymer molecular organic materials, and may be fluorescent or phosphorescent materials, capable of emitting red, green, blue, or white light. The cathode 302 may be made from metallic materials such as lithium (Li), aluminum (Al), magnesium (Mg), or silver (Ag).

[0083] In some embodiments, as shown in Figures 6 to 8, the display panel 2 is formed on a base substrate 21 and may further include a second isolation column 31 located in the isolation region 20c. The second isolation column 31 is provided so as to surround the opening region 20b. As shown in Figures 9 to 11, the second isolation column 31 includes at least a fourth metal layer 310 having the same structure as the second metal layer 233 and provided in the same layer as the second metal layer 233. Here, the first barrier dam 28 and the second barrier dam 29 are located between the first isolation column 23 and the second isolation column 31. That is, one of the first isolation column 23 and the second isolation column 31 is located on one side of the first barrier dam 28 approaching the display region 20a, and the other is located on one side of the second barrier dam 29 approaching the opening region 20b.

[0084] Here, the isolation column located on one side of the first barrier dam 28 approaching the display area 20a can be defined as an inner isolation column, and the isolation column located on one side of the second barrier dam 29 approaching the opening area 20b can be defined as an outer isolation column. That is, one of the first isolation column 23 and the second isolation column 31 can be defined as an inner isolation column, and the other as an outer isolation column.

[0085] Here, Figures 6 to 8 only show the case where the first isolation column 23 is an internal isolation column and the second isolation column 31 is an external isolation column. However, the embodiments of the present invention are not limited to this, and the first isolation column 23 may be an external isolation column and the second isolation column 31 may be an internal isolation column.

[0086] Furthermore, the first isolation column 23 in the embodiment of the present invention may be provided in multiple quantities, and / or the second isolation column 31 may be provided in multiple quantities. That is, both the inner isolation column and the outer isolation column may be provided in multiple quantities. As shown in Figures 6 to 8, the structure of the multiple inner isolation columns may be the same, but is not limited to this, and may be different. As shown in Figures 6 to 8, the structure of the multiple outer isolation columns may be the same, but is not limited to this, and may be different.

[0087] In embodiments of the present invention, the organic light-emitting material 301 can be further blocked by providing an internal isolation column and an external isolation column. This further isolates the intrusion of water and oxygen gas, thereby ensuring the display effect.

[0088] In some embodiments, the second isolation column 31 may be any one of the following: a Gate1 isolation column, a Gate2 isolation column, a Gate1+Gate2 isolation column, or an EBA / EBB isolation column.

[0089] Specifically, as shown in Figures 6 and 9, the second isolation column 31 may be a Gate 1 isolation column. The second isolation column 31 may further include, in addition to the fourth metal layer 310, a fifth metal layer 311 provided in the same layer as the first electrode plate 250, a fifth insulating layer 312 provided in the same layer as the first gate insulating layer 243, and a sixth insulating layer 313 provided in the same layer as the interlayer dielectric layer 244. Here, the sixth insulating layer 313 includes a third portion 313a, a fourth portion 313b, and a second inclined portion 313c connecting the third portion 313a and the fourth portion 313b. The inclination angle of the second inclined portion 313c is the same as the inclination angle of the first inclined portion 232c. The fourth metal layer 310 is located on one side of the fourth portion 313b that is separated from the base substrate 21. Selectively, the second isolation column 31 may further include a seventh insulating layer 314 provided in the same layer as the second gate insulating layer 241, and an eighth insulating layer 315 provided in the same layer as the buffer layer 22.

[0090] As shown in Figures 7 and 10, the second isolation column 31 may be a Gate 2 isolation column. The second isolation column 31 may further include, in addition to the fourth metal layer 310, a fifth metal layer 311 provided in the same layer as the second electrode plate 251, a fifth insulating layer 312 provided in the same layer as the first gate insulating layer 243, and a sixth insulating layer 313 provided in the same layer as the interlayer dielectric layer 244. Here, the sixth insulating layer 313 includes a third portion 313a, a fourth portion 313b, and a second inclined portion 313c connecting the third portion 313a and the fourth portion 313b. The inclination angle of the second inclined portion 313c is the same as the inclination angle of the first inclined portion 232c. The fourth metal layer 310 is located on one side of the fourth portion 313b that is separated from the base substrate 21. Selectively, the second isolation column 31 may further include a seventh insulating layer 314 provided in the same layer as the second gate insulating layer 241, and an eighth insulating layer 315 provided in the same layer as the buffer layer 22.

[0091] As shown in Figures 8 and 11, the second isolation column 31 may be a Gate1+Gate2 isolation column. The second isolation column 31 may further include, in addition to the fourth metal layer 310, a fifth metal layer 311 provided in the same layer as the first electrode plate 250, a fifth insulating layer 312 provided in the same layer as the first gate insulating layer 243, a sixth metal layer 316 provided in the same layer as the second electrode plate 251, and a sixth insulating layer 313 provided in the same layer as the interlayer dielectric layer 244. Here, the sixth insulating layer 313 includes a third portion 313a, a fourth portion 313b, and a second inclined portion 313c connecting the third portion 313a and the fourth portion 313b. The inclination angle of the second inclined portion 313c is the same as the inclination angle of the first inclined portion 232c. Furthermore, the fourth metal layer 310 is located on one side of the fourth portion 313b that is separated from the base substrate 21. Selectively, the second isolation column 31 may further include a seventh insulating layer 314 provided in the same layer as the second gate insulating layer 241, and an eighth insulating layer 315 provided in the same layer as the buffer layer 22.

[0092] The second isolation column 31 further includes an insulating laminate located on one side of the fourth metal layer 310 that approaches the base substrate 21. The insulating laminate is provided in the same layer as the buffer layer 22, the second gate insulating layer 241, the first gate insulating layer 243, and the interlayer dielectric layer 244. The insulating laminate is also separated from the buffer layer 22, the second gate insulating layer 241, the first gate insulating layer 243, and the interlayer dielectric layer 244. Here, the insulating laminate has an inclined surface with an inclination angle of 50° to 70°. The second isolation column 31 may be an EBA / EBB isolation column as shown in Figures 2 and 3.

[0093] In some embodiments, the first isolation column 23 is designed to be at least one of the Gate1 isolation column, Gate2 isolation column, or Gate1+Gate2 isolation column, and the second isolation column 31 is designed to be at least one of the Gate1 isolation column, Gate2 isolation column, or Gate1+Gate2 isolation column. This prevents cracks from occurring in the inclined portion of the isolation column and prevents cracks from extending into the display area 20a at the edge of the opening area 20b, thereby further ensuring a sealing effect.

[0094] As described above, the structures of the second isolation column 31 and the first isolation column 23 may be the same or different, and will be determined according to the specific circumstances. Here, only the case where the structures of the first isolation column 23 and the second isolation column 31 are the same is shown in Figures 6 to 8, but the embodiments of the present invention are not limited to this.

[0095] Furthermore, if the first isolation column 23 is at least one of the Gate1 isolation column, Gate2 isolation column, and Gate1+Gate2 isolation column, and the second isolation column 31 is at least one of the Gate1 isolation column, Gate2 isolation column, and Gate1+Gate2 isolation column, then the first insulating layer 231 and the fifth insulating layer 312 can be connected to the first gate insulating layer 243, the second insulating layer 232 and the sixth insulating layer 313 can be connected to the interlayer dielectric layer 244, the third insulating layer 234 and the seventh insulating layer 314 can be connected to the second gate insulating layer 241, and the fourth insulating layer 235 and the eighth insulating layer 315 can be connected to the buffer layer 22.

[0096] Specifically, the combination method of the inner and outer isolation columns in the display panel 2 according to the embodiment of the present invention can be seen in Table 1 below. [Table 1]

[0097] The internal and external isolation columns in the embodiments of the present invention are not limited to the above combinations. For example, multiple internal isolation columns may be provided, and their structures may differ. It is sufficient to ensure that at least one Gate1 isolation column, a Gate2 isolation column, or a Gate1+Gate2 isolation column exists in the isolation area 20c of the display panel 2.

[0098] In some embodiments, as shown in Figures 6 to 8, the display panel 2 may further include a sealing film 32. The sealing film 32 includes at least a first inorganic sealing layer 320. The first inorganic sealing layer 320 is located in the display area 20a and the isolation area 20c, and covers the drive circuit layer and the first isolation column 23. The first inorganic sealing layer 320 is flat but not steep on the inclined portion of the first isolation column 23, and thus can help prevent cracks from occurring on the inclined portion. It should be understood that the sealing effect of the display panel 2 can be improved by covering the entire structure of the display area 20a and the isolation area 20c with the first inorganic sealing layer 320.

[0099] Selectively, as shown in Figures 6 to 8, the sealing film 32 may further include a second inorganic sealing layer 322 and an organic sealing layer 321 located between the first inorganic sealing layer 320 and the second inorganic sealing layer 322. Here, the organic sealing layer 321 is located in the display area 20a and the isolation area 20c and can be blocked on one side of the first barrier dam 28 approaching the display area 20a. The second inorganic sealing layer 322 can cover the entirety of the display area 20a and the isolation area 20c.

[0100] Here, the first inorganic sealing layer 320 and the second inorganic sealing layer 322 are for preventing water and oxygen from entering the display area 20a from the display side and the opening area 20b. The first inorganic sealing layer 320 and the second inorganic sealing layer 322 can be manufactured from inorganic insulating materials such as silicon nitride and silicon oxide. The organic sealing layer 321 serves a planarization role and can contribute to the manufacture of the second inorganic sealing layer 322. The organic sealing layer 321 can be manufactured from materials such as acrylic polymers and silicon polymers.

[0101] Furthermore, the first inorganic sealing layer 320 and the second inorganic sealing layer 322 can be manufactured by a chemical vapor deposition process, but are not limited thereto. The organic sealing layer 321 can be manufactured by an inkjet printing process, but are not limited thereto; a spray coating process or the like can also be used. In the process of manufacturing the organic sealing layer 321, since the organic sealing material has a certain degree of fluidity, the flow of the organic sealing material is restricted by providing the first barrier dam 28 and the second barrier dam 29. This prevents the organic sealing material from flowing into the opening region 20b and causing the problem of sealing failure.

[0102] In the embodiment of the present invention, the opening region 20b of the display panel 2 is for assembling elements such as a camera, sensor, HOME key, handset, or speaker after the opening process has been completed. In the embodiment of the present invention, the opening region 20b of the display panel 2 does not necessarily have to be opened; the opening process can be performed before assembling elements such as a camera. Alternatively, as shown in Figure 4, the display panel 2 of the embodiment of the present invention may be configured such that the opening region 20b has already been opened. In this case, the display panel 2 can be assembled as is later.

[0103] One embodiment of the present invention further provides a display device that may include the display panel 2 described in the above embodiment. The display panel 2 is subjected to an aperture process for the aperture region 20b. The display device may further include functional elements such as a camera, sensor, HOME key, handset, or speaker attached to the aperture region 20b.

[0104] According to embodiments of the present invention, the specific type of the display device is not particularly limited. It may be any type of display device commonly used in the art to which the present invention belongs. Specifically, for example, it may be any product or component having a display function, such as an AMOLED display screen, a mobile device such as a mobile phone or laptop computer, a wearable device such as a wristwatch, a VR device, a digital camera, or a navigator. Those skilled in the art can appropriately select such a display device depending on its specific application, but a detailed explanation of this is omitted here.

[0105] Furthermore, the display device includes other necessary components and configurations in addition to the display panel 2 and elements such as a camera, sensors, HOME key, handset, or speaker. Taking the display as an example, specific components include, for instance, a housing, power lines, and a drive chip. Those skilled in the art may supplement these components as appropriate according to the specific usage requirements of the display device, but a detailed explanation of such supplementation is omitted here.

[0106] Embodiments of the present invention provide a method for manufacturing a display panel, and the display panel 2 described in the above embodiment can be manufactured by the manufacturing method. Here, the method for manufacturing the display panel includes the steps of preparing a base substrate and forming a drive circuit layer and a first isolation column on the base substrate. Here, the drive circuit layer includes a thin-film transistor and a storage capacitor located in the display area. The thin-film transistor includes a gate electrode, a first gate insulating layer formed on one side of the gate electrode away from the base substrate, an interlayer dielectric layer formed on one side of the first gate insulating layer away from the base substrate, and source / drain electrodes formed on one side of the interlayer dielectric layer away from the base substrate. The storage capacitor includes a first electrode plate provided in the same layer as the gate electrode and a second electrode plate located between the first gate insulating layer and the interlayer dielectric layer. The first isolation column is provided so as to surround the opening area. Furthermore, the first isolation column includes a first metal layer, a first insulating layer formed on one side of the first metal layer away from the base substrate, a second insulating layer formed on one side of the first insulating layer away from the base substrate, and a second metal layer formed on one side of the second insulating layer away from the base substrate. The first metal layer is provided in the same layer as the first electrode plate or the second electrode plate. The first insulating layer is provided in the same layer as the first gate insulating layer. The second insulating layer is provided in the same layer as the interlayer dielectric layer and includes a first portion, a second portion, and a first inclined portion connecting the first portion and the second portion. The inclination angle of the first inclined portion is less than 90°. The second metal layer is provided in the same layer as the source and drain electrodes and is located on one side of the second portion away from the base substrate. Furthermore, a notch surrounding the opening region is provided on one side of the second metal layer facing the display region and / or on one side of the second metal layer facing the opening region.

[0107] Since the above-described manufacturing method according to the embodiment of the present invention should have the same features and advantages as the display panel 2 according to the embodiment of the present invention, the features and advantages of the above-described manufacturing method according to the embodiment of the present invention can be referenced from the features and advantages of the display panel 2 described above, but it should be understood that a detailed explanation thereof is omitted here.

[0108] The manufacturing method of the display panel 2 according to the embodiment of the present invention will be described in detail below, using the case of forming the display panel 2 shown in Figures 4 to 11 as an example.

[0109] For example, a first inorganic insulating material layer is formed on the base substrate 21 using a method such as lamination. The first inorganic insulating material layer is formed entirely on the base substrate 21. Furthermore, the first inorganic insulating material layer can be divided into a buffer layer 22 located in the display area 20a, and a fourth insulating layer 235 of the first isolation column 23 and an eighth insulating layer 315 of the second isolation column 31 located in the isolation area 20c.

[0110] After the first inorganic insulating material layer is formed, a semiconductor layer 240 of the thin-film transistor 24 is formed in the display area 20a by a patterning process. Subsequently, a second inorganic insulating material layer is formed by a method such as lamination. The entire base substrate 21 is formed on the second inorganic insulating material layer. Furthermore, the second gate insulating layer 241 located in the display area 20a and the third insulating layer 234 of the first isolation column 23 and the seventh insulating layer 314 of the second isolation column 31 located in the isolation area 20c can be separated.

[0111] After the second inorganic insulating material layer is formed, a metal film is laminated onto the second inorganic insulating material layer. Subsequently, by processing the metal film using a patterning process, the gate electrode 242 of the thin-film transistor 24 and the first electrode plate 250 of the storage capacitor 25 are formed in the display area 20a, and the first metal layer 230 of the first isolation column 23 and the fifth metal layer 311 of the second isolation column 31 are formed in the isolation area 20c. For example, the patterning process includes exposure, development, and dry etching. Subsequently, a third inorganic insulating material layer can be formed by methods such as lamination. The third inorganic insulating material layer is entirely formed on the base substrate 21, and can be divided into a first gate insulating layer 243 located in the display area 20a, and a first insulating layer 231 of the first isolation column 23 and a fifth insulating layer 312 of the second isolation column 31 located in the isolation area 20c.

[0112] After the third inorganic insulating material layer is formed, a metal film is laminated onto the third inorganic insulating material layer. Subsequently, by processing the metal film with a patterning process, the second electrode plate 251 of the storage capacitor 25 is formed in the display area 20a, and the third metal layer 236 of the first isolation column 23 and the sixth metal layer 316 of the second isolation column 31 are formed in the isolation area 20c. For example, the patterning process includes exposure, development, and dry etching. Subsequently, a fourth inorganic insulating material layer can be formed by methods such as lamination. The fourth inorganic insulating material layer is entirely formed on the base substrate 21 and can be divided into an interlayer dielectric layer 244 located in the display area 20a and a second insulating layer 232 of the first isolation column 23 and a sixth insulating layer 313 of the second isolation column 31 located in the isolation area 20c.

[0113] After the fourth inorganic insulating material layer is formed, the interlayer dielectric layer 244 and the first gate insulating layer 243 are processed by a patterning process to expose via holes in the semiconductor layer 240. Subsequently, the source electrode 245 and drain electrode 246 of the thin-film transistor 24 are formed in the display region 20a by the patterning process, and the second metal layer 233 of the first isolation column 23 and the fourth metal layer 310 of the second isolation column 31 are formed in the isolation region 20c. The source electrode 245 and drain electrode 246 are connected to both ends of the semiconductor layer 240, respectively, via holes in the interlayer dielectric layer 244 and the first gate insulating layer 243. For example, in one embodiment, a titanium material layer, an aluminum material layer, and a titanium material layer are sequentially formed using lamination, sputtering, or vapor deposition, and then the three material layers are patterned in the same patterning process to form a titanium / aluminum / titanium three-layer metal structure constituting the source electrode 245 and the drain electrode 246, as well as an initial second metal layer 233 and an initial fourth metal layer 310 with flush sides. Subsequently, the initial second metal layer 233 and the initial fourth metal layer 310 with flush sides are etched in a single etching process to form a second metal layer 233 and a fourth metal layer 310 having notches 233a on their sides.

[0114] After the film layer structures of the thin-film transistor 24 and storage capacitor 25 located in the display area 20a, and the first isolation pillar 23 and second isolation pillar 31 located in the isolation area 20c are formed, the planarization layer 26 located in the display area 20a and the first isolation portion of the second barrier dam 29 located in the isolation area 20c can be simultaneously formed by a patterning process. Subsequently, the planarization layer 26 is processed by the patterning process to form via holes for exposing the drain electrode 246 of the thin-film transistor 24. Then, the anode 300 of the pixel unit 30 is formed by the patterning process, and the anode 300 is connected to the drain electrode 246 of the thin-film transistor 24 via via holes in the planarization layer 26.

[0115] After the anode 300 is formed, a patterning process simultaneously forms the pixel definition layer 27 located in the display area 20a and the second isolation portions of the first barrier dam 28 and second barrier dam 29 located in the isolation area 20c. The pixel definition layer 27 has a pixel opening for exposing the anode 300. Subsequently, the organic light-emitting material 301 is deposited over its entire surface to form the organic light-emitting material 301 located in the pixel opening and in contact with the anode 300. It should be understood that the organic light-emitting material 301 is blocked by the first isolation column 23 and the second isolation column 31.

[0116] After the organic light-emitting material 301 is completely deposited, the cathode 302 material is deposited over its entire surface to form the cathode 302 located in the display area 20a. The cathode 302 is in contact with the organic light-emitting material 301. It should be understood that the cathode 302 material is blocked by the first isolation column 23 and the second isolation column 31.

[0117] After the cathode 302 material has been completely deposited, a first inorganic sealing layer 320 of the sealing film 32 located in the display area 20a and the isolation area 20c is laminated using a chemical vapor deposition method. Subsequently, an organic sealing layer 321 of the sealing film 32 located in the display area 20a and the isolation area 20c is formed using an inkjet printing method. The organic sealing layer 321 is blocked by the first barrier dam 28. Subsequently, a second inorganic sealing layer 322 of the sealing film 32 located in the display area 20a and the isolation area 20c is laminated using a chemical vapor deposition method. The first inorganic sealing layer 320 and the second inorganic sealing layer 322 cover the respective structures in the display area 20a and the isolation area 20c.

[0118] The method for manufacturing the display panel 2 according to the embodiment of the present invention is not limited to the above-described form. Specifically, the above manufacturing method can be adjusted according to the required structure of the display panel 2.

[0119] Furthermore, the specific structure of the display panel 2 manufactured by the above manufacturing method can be found by referring to the display panel 2 described in the above embodiment, but the specific structure of the display panel 2 will not be described in detail here.

[0120] After the display area 20a is formed, an opening area 20b that penetrates the base substrate 21 can be formed by laser cutting or mechanical pressing. Elements such as a camera, sensor, HOME key, handset, or speaker can be assembled in the opening area 20b.

[0121] Those skilled in the art can readily obtain other embodiments of the invention through understanding the specification and practicing the inventions described herein. This application includes any modifications, uses, or adaptive changes to the invention, such modifications, uses, or adaptive changes, which, in accordance with the general principles of the invention, include prior art knowledge or common technical means not disclosed herein. The specification and examples are illustrative only, and the true scope and spirit of the invention are indicated by the claims. [Additional note 1] A display panel comprising a display area, an opening area, and an isolation area located between the display area and the opening area, with at least a portion of it surrounding the opening area, The aforementioned display panel is Base board and A drive circuit layer formed on the base substrate and located in the display area, including a thin-film transistor and a storage capacitor, It includes a first isolation column formed on the base substrate and located in the isolation region, The thin-film transistor is Terminal gate and, A first gate insulating layer is formed on one side of the gate electrode that is separated from the base substrate, An interlayer dielectric layer formed on one side of the first gate insulating layer that is separated from the base substrate, It includes source and drain electrodes formed on one side of the interlayer dielectric layer away from the base substrate, The aforementioned storage capacitor is A first electrode plate provided in the same layer as the gate electrode, The present invention includes a second electrode plate located between the first gate insulating layer and the interlayer dielectric layer, The first isolation column is provided surrounding the opening area, The aforementioned first isolation column is, The first metal layer, A first insulating layer formed on one side of the first metal layer that is separated from the base substrate, A second insulating layer is formed on one side of the first insulating layer that is separated from the base substrate, The second metal layer is formed on one side of the second insulating layer that is separated from the base substrate, The first metal layer is provided in the same layer as the first electrode plate or the second electrode plate. The first insulating layer is provided in the same layer as the first gate insulating layer. The aforementioned second insulating layer is provided in the same layer as the interlayer dielectric layer. The second insulating layer includes a first portion, a second portion, and a first inclined portion connecting the first portion and the second portion. The inclination angle of the first inclined portion is less than 90°, The second metal layer is provided in the same layer as the source and drain electrodes and is located on one side of the second portion that is separated from the base substrate. A notch is provided on one side of the second metal layer facing the display area and / or on one side of the second metal layer facing the opening area, enclosing the opening area. Display panel. [Additional note 2] The orthographic projection of the second metal layer on the base substrate is located within the orthographic projection of the first metal layer on the base substrate. The display panel described in Appendix 1. [Additional note 3] The first metal layer is provided in the same layer as the first electrode plate. The first isolation column further includes a third metal layer provided in the same layer as the second electrode plate. The display panel described in Appendix 2. [Additional note 4] The orthographic projection of the second metal layer on the base substrate is located within the orthographic projection of the third metal layer on the base substrate. The orthographic projection of the third metal layer on the base substrate is located within the orthographic projection of the first metal layer on the base substrate. The display panel described in Appendix 3. [Additional note 5] In the same cross-section, the ratio of the cross-sectional width of the second metal layer to the cross-sectional width of the first metal layer is 0.4 or more and 0.7 or less. In the same cross-section, the ratio of the cross-sectional width of the second metal layer to the cross-sectional width of the third metal layer is 0.5 or more and 0.9 or less. In the same cross-section, the ratio of the cross-sectional width of the third metal layer to the cross-sectional width of the first metal layer is 0.58 or more and less than 1. The cross-section is a plane extending in the radial direction of the first isolation column. The display panel described in Appendix 4. [Additional note 6] The cross-sectional width of the first metal layer is 6.5 μm to 8.5 μm. The cross-sectional width of the second metal layer is 3.5 μm to 4.5 μm. The cross-sectional width of the third metal layer is 5 μm to 7 μm. The display panel described in Appendix 5. [Additional note 7] The thicknesses of the first metal layer and the third metal layer are 2000 Å to 3000 Å. The thickness of the second metal layer is 6000 Å to 8000 Å. The display panel described in Appendix 5. [Additional note 8] The inclination angle of the first inclined portion is 10° to 45°. The display panel described in any one of the appendices 1 through 7. [Additional note 9] A buffer layer is further provided between the base substrate and the drive circuit layer. The thin-film transistor further includes a semiconductor layer and a second gate insulating layer that are sequentially formed on the buffer layer. The second gate insulating layer is located between the gate electrode and the semiconductor layer. The display panel described in Appendix 8. [Additional Note 10] The aforementioned first isolation column is, A third insulating layer provided in the same layer as the second gate insulating layer, The fourth insulating layer is provided in the same layer as the buffer layer, further comprising The display panel described in Appendix 9. [Additional Note 11] The aforementioned display panel is A planarizing layer located in the display area and covering the thin-film transistor, A pixel definition layer located in the display area and formed on the planarization layer, for defining a plurality of pixel units, A first barrier dam is located in the isolation region, is provided so as to surround the opening region, and is provided in the same layer as the pixel definition layer, The present invention further includes a second barrier dam located in the isolation region and provided so as to surround the opening region, The second barrier dam is located on one side of the first barrier dam, approaching the opening region. The second barrier dam includes a first isolation section provided in the same layer as the flattening layer, and a second isolation section provided in the same layer as the pixel definition layer, The height of the second barrier dam is greater than the height of the first barrier dam. The display panel described in Appendix 10. [Additional Note 12] The display panel further includes a second isolation column formed on the base substrate and located in the isolation region, The second isolation column is provided so as to surround the opening area, The second isolation column includes at least a fourth metal layer, The fourth metal layer has the same structure as the second metal layer and is provided in the same layer as the second metal layer. The first barrier dam and the second barrier dam are located between the first isolation column and the second isolation column. The display panel described in Appendix 11. [Additional Note 13] The aforementioned second isolation column is A fifth metal layer provided in the same layer as the first electrode plate or the second electrode plate, A fifth insulating layer provided in the same layer as the first gate insulating layer, The present invention further includes a sixth insulating layer provided in the same layer as the interlayer dielectric layer, The sixth insulating layer includes a third portion, a fourth portion, and a second inclined portion connecting the third portion and the fourth portion. The inclination angle of the second inclined portion is the same as the inclination angle of the first inclined portion. The fourth metal layer is located on one side of the fourth portion that is separated from the base substrate. The display panel described in Appendix 12. [Additional Note 14] The fifth metal layer is provided in the same layer as the first electrode plate. The second isolation column further includes a sixth metal layer provided in the same layer as the second electrode plate. The display panel described in Appendix 13. [Additional Note 15] The aforementioned second isolation column is A seventh insulating layer provided in the same layer as the second gate insulating layer, Further includes an eighth insulating layer provided in the same layer as the buffer layer. The display panel described in Appendix 14. [Additional Note 16] The second isolation column further includes an insulating laminate located on one side of the fourth metal layer that approaches the base substrate, The insulating laminate is The buffer layer, the second gate insulating layer, the first gate insulating layer, and the interlayer dielectric layer are provided in the same layer, and are separated from the buffer layer, the second gate insulating layer, the first gate insulating layer, and the interlayer dielectric layer. The insulating laminate has inclined surfaces with an inclination angle of 50° to 70°. The display panel described in Appendix 12. [Additional Note 17] One of the first isolation column and the second isolation column is located on one side of the first barrier dam approaching the display area, and the other is located on one side of the second barrier dam approaching the opening area. The first isolation column is provided in multiple locations, and / or Multiple of the aforementioned second isolation columns are provided. The display panel described in Appendix 12. [Additional Note 18] The display panel further includes a sealing film, The sealing film includes at least a first inorganic sealing layer, The first inorganic sealing layer is located in the display area and the isolation area and covers the drive circuit layer and the first isolation column. The display panel described in Appendix 1. [Additional Note 19] A display device including a display panel as described in any one of the appendices 1 through 18. [Additional Note 20] A method for manufacturing a display panel, The display panel includes a display area, an opening area, and an isolation area located between the display area and the opening area, with at least a portion of it surrounding the opening area. The manufacturing method of the display panel is as follows: The steps include preparing the base board and The step includes forming a drive circuit layer and a first isolation column on the base substrate, The drive circuit layer includes a thin-film transistor and a storage capacitor located in the display area. The thin-film transistor is Terminal gate and, A first gate insulating layer is formed on one side of the gate electrode that is separated from the base substrate, An interlayer dielectric layer formed on one side of the first gate insulating layer that is separated from the base substrate, It includes source and drain electrodes formed on one side of the interlayer dielectric layer away from the base substrate, The aforementioned storage capacitor is A first electrode plate provided in the same layer as the gate electrode, The present invention includes a second electrode plate located between the first gate insulating layer and the interlayer dielectric layer, The first isolation column is provided surrounding the opening area, The aforementioned first isolation column is, The first metal layer, A first insulating layer formed on one side of the first metal layer that is separated from the base substrate, A second insulating layer is formed on one side of the first insulating layer that is separated from the base substrate, The second metal layer is formed on one side of the second insulating layer that is separated from the base substrate, The first metal layer is provided in the same layer as the first electrode plate or the second electrode plate. The first insulating layer is provided in the same layer as the first gate insulating layer. The aforementioned second insulating layer is provided in the same layer as the interlayer dielectric layer. The second insulating layer includes a first portion, a second portion, and a first inclined portion connecting the first portion and the second portion. The inclination angle of the first inclined portion is less than 90°, The second metal layer is provided in the same layer as the source and drain electrodes and is located on one side of the second portion that is separated from the base substrate. A notch is provided on one side of the second metal layer facing the display area and / or on one side of the second metal layer facing the opening area, enclosing the opening area. A method for manufacturing a display panel. [Additional Note 21] The first metal layer is provided in the same layer as the first electrode plate. The first isolation column further includes a third metal layer provided in the same layer as the second electrode plate. A method for manufacturing the display panel described in Appendix 20. [Additional note 22] The steps include forming a second isolation column on the base substrate, which is located in the isolation region and is provided so as to surround the opening region, The steps include forming a planarization layer covering the thin-film transistor in the display area, The steps include forming a pixel definition layer in the display area, which is located on the planarization layer and defines a plurality of pixel units, The method further includes the step of forming a first barrier dam and a second barrier dam in the isolation region, The second isolation column includes at least a fourth metal layer, The fourth metal layer has the same structure as the second metal layer and is provided in the same layer as the second metal layer. The first barrier dam is provided so as to surround the opening region and is provided in the same layer as the pixel definition layer. The second barrier dam is provided so as to surround the opening region, is located on one side of the first barrier dam that approaches the opening region, and is provided in the same layer as the planarization layer and the pixel definition layer. The height of the second barrier dam is greater than the height of the first barrier dam. The first barrier dam and the second barrier dam are located between the first isolation column and the second isolation column. A method for manufacturing the display panel described in Appendix 20. [Additional Note 23] The structure of the second isolation column is the same as the structure of the first isolation column. A method for manufacturing a display panel as described in Appendix 22. [Explanation of Symbols]

[0122] 10. Display area; 11. Aperture area; 12. Isolation column; 120. ILD+GI+buffer layer; 121. SD metal layer; 13. Isolation groove; 14. Base; 15. Organic light-emitting material; 16. Cathode layer; 17. Inorganic sealing layer; 2. Display panel; 20a. Display area; 20b. Aperture area; 20c. Isolation area; 21. Base substrate; 22. Buffer layer; 23. First isolation column; 230. First metal Metal layer; 231, First insulating layer; 232, Second insulating layer; 232a, First portion; 232b, Second portion; 232c, First inclined portion; 233, Second metal layer; 233a, Notch; 234, Third insulating layer; 235, Fourth insulating layer; 236, Third metal layer; 24, Thin film transistor; 240, Semiconductor layer; 241, Second gate insulating layer; 242, Gate electrode; 243, First gate insulating layer Layer; 244, Interlayer dielectric layer; 245, Source electrode; 246, Drain electrode; 25, Storage capacitor; 250, First electrode plate; 251, Second electrode plate; 26, Planarization layer; 27, Pixel definition layer; 28, First barrier dam; 29, Second barrier dam; 290, First isolation section; 291, Second isolation section; 30, Pixel unit; 300, Anode; 301, Organic light-emitting material; 302 , cathode; 31, second isolation column; 310, fourth metal layer; 311, fifth metal layer; 312, fifth insulating layer; 313, sixth insulating layer; 313a, third part; 313b, fourth part; 313c, second inclined part; 314, seventh insulating layer; 315, eighth insulating layer; 316, sixth metal layer; 32, sealing film; 320, first inorganic sealing layer; 321, organic sealing layer; 322, second inorganic sealing layer.

Claims

1. A display panel comprising a display area, an opening area, and an isolation area located between the display area and the opening area, with at least a portion of it surrounding the opening area, The aforementioned display panel is Base board and A drive circuit layer including a thin-film transistor formed on the base substrate and located in the display area, A first isolation column formed on the base substrate and located in the isolation region, The thin-film transistor is It includes a gate electrode and source / drain electrodes, The first isolation column is provided surrounding the opening area, The first isolation column is, The first metal layer and A second insulating layer is formed on one side of the first metal layer that is separated from the base substrate, The second metal layer is formed on one side of the second insulating layer that is separated from the base substrate, The first metal layer is provided in the same layer as the gate electrode, The second insulating layer includes a first portion, a second portion, and a first inclined portion connecting the first portion and the second portion. The inclination angle of the first inclined portion is less than 90°. The second metal layer is formed of the same material as the source and drain electrodes and is located on one side of the second portion that is separated from the base substrate. A notch is provided on one side of the second metal layer facing the display area and / or on one side of the second metal layer facing the opening area, enclosing the opening area. Display panel.

2. The thin-film transistor further, The first gate insulating layer and The interlayer dielectric layer is formed on one side of the first gate insulating layer that is separated from the base substrate, The first isolation column further includes a first insulating layer formed on one side of the first metal layer away from the base substrate, The first metal layer is located between the first gate insulating layer and the interlayer dielectric layer. The first insulating layer is provided in the same layer as the first gate insulating layer. The aforementioned second insulating layer is provided in the same layer as the interlayer dielectric layer. The display panel according to claim 1.

3. The orthographic projection of the second metal layer on the base substrate is located within the orthographic projection of the first metal layer on the base substrate. The display panel according to claim 1.

4. The first isolation column further comprises a third metal layer, The orthographic projection of the second metal layer on the base substrate is located within the orthographic projection of the third metal layer on the base substrate. The orthographic projection of the third metal layer on the base substrate is located within the orthographic projection of the first metal layer on the base substrate. The display panel according to claim 2.

5. The drive circuit layer further includes a storage capacitor, The aforementioned storage capacitor is A first electrode plate provided in the same layer as the gate electrode, The present invention includes a second electrode plate located between the first gate insulating layer and the interlayer dielectric layer, The third metal layer is provided in the same layer as the second electrode plate. The display panel according to claim 4.

6. The first metal layer is provided in the same layer as the first electrode plate. The display panel according to claim 5.

7. In the same cross-section, the ratio of the cross-sectional width of the second metal layer to the cross-sectional width of the first metal layer is 0.4 or more and 0.7 or less. In the same cross-section, the ratio of the cross-sectional width of the second metal layer to the cross-sectional width of the third metal layer is 0.5 or more and 0.9 or less. In the same cross-section, the ratio of the cross-sectional width of the third metal layer to the cross-sectional width of the first metal layer is 0.58 or more and less than 1. The cross-section is a plane extending in the radial direction of the first isolation column. The display panel according to claim 4.

8. The cross-sectional width of the first metal layer is 6.5 μm to 8.5 μm. The cross-sectional width of the second metal layer is 3.5 μm to 4.5 μm. The cross-sectional width of the third metal layer is 5 μm to 7 μm. The display panel according to claim 7.

9. The thicknesses of the first metal layer and the third metal layer are 2000 Å to 3000 Å. The thickness of the second metal layer is 6000 Å to 8000 Å. The display panel according to claim 7.

10. The inclination angle of the first inclined portion is between 10° and 45°. The display panel according to claim 1.

11. A buffer layer is further provided between the base substrate and the drive circuit layer. The thin-film transistor further includes a semiconductor layer and a second gate insulating layer that are sequentially formed on the buffer layer. The second gate insulating layer is located between the gate electrode and the semiconductor layer. The display panel according to claim 5.

12. The first isolation column is, A third insulating layer provided in the same layer as the second gate insulating layer, The fourth insulating layer is provided in the same layer as the buffer layer, further comprising The display panel according to claim 11.

13. The aforementioned display panel is A planarizing layer located in the display area and covering the thin-film transistor, A pixel definition layer located in the display area and formed on the planarization layer, for defining a plurality of pixel units, The system further includes a first barrier dam located in the isolation region, provided so as to surround the opening region, and provided in the same layer as the pixel definition layer. The display panel according to claim 1.

14. The display panel further includes a second isolation column formed on the base substrate and located in the isolation region, The second isolation column is provided so as to surround the opening area, The second isolation column includes at least a fourth metal layer, The fourth metal layer has the same structure as the second metal layer and is provided in the same layer as the second metal layer. The first barrier dam is located between the first isolation column and the second isolation column. The display panel according to claim 13.

15. The thin-film transistor further includes a first gate insulating layer and an interlayer dielectric layer formed on one side of the first gate insulating layer away from the base substrate. A buffer layer is further provided between the base substrate and the drive circuit layer. The thin-film transistor further includes a semiconductor layer and a second gate insulating layer that are sequentially formed on the buffer layer. The second gate insulating layer is located between the gate electrode and the semiconductor layer. The second isolation column further includes an insulating laminate located on one side of the fourth metal layer that approaches the base substrate, The insulating laminate is The buffer layer, the second gate insulating layer, the first gate insulating layer, and the interlayer dielectric layer are provided in the same layer, and are separated from the buffer layer, the second gate insulating layer, the first gate insulating layer, and the interlayer dielectric layer. The insulating laminate has an inclined surface with an inclination angle of 50° to 70°. The display panel according to claim 14.

16. One of the first isolation column and the second isolation column is located on one side of the first barrier dam approaching the display area, and the other is located on the other side of the first barrier dam approaching the opening area. The first isolation column is provided in multiple locations and / or Multiple of the aforementioned second isolation columns are provided. The display panel according to claim 14.

17. The display panel further includes a sealing film, The sealing film includes at least a first inorganic sealing layer, The first inorganic sealing layer is located in the display area and the isolation area and covers the drive circuit layer and the first isolation column. The display panel according to claim 1.

18. A display device including a display panel according to any one of claims 1 to 17.

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