Semiconductor equipment

Abstract

The present invention provides a novel semiconductor device having an oxide semiconductor film. [Solution] A semiconductor device having transistor 100 and transistor 150, wherein the first transistor 100 has a first gate electrode 104, a first insulating film 106 on the first gate electrode, a first oxide semiconductor film 108 on the first insulating film, a source electrode 112a and a drain electrode 112b electrically connected to the first oxide semiconductor film, a second insulating film 116 on the first oxide semiconductor film, a second gate electrode 120a on the second insulating film, and a third insulating film 118 on the second oxide semiconductor film; and the transistor 150 has a third oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the second insulating film, a fourth insulating film 152 on the channel region, a third gate electrode 154 on the fourth insulating film, and a third insulating film on the source region and the drain region.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a semiconductor device having an oxide semiconductor film. The present invention relates to a display device having said semiconductor device. Alternatively, one aspect of the present invention relates to an oxide semiconductor This invention relates to a method for fabricating a semiconductor device having a conductive film.

[0002] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the technical field relates to a product, method, or method of manufacture. Alternatively, the present invention relates to a professional Seth, machine, manufacture, or composition of matter This relates to semiconductor devices, display devices, light-emitting devices, energy storage devices, and memory devices. In particular, one aspect of the present invention relates to semiconductor devices, display devices, light-emitting devices, energy storage devices, and memory devices. This relates to the placement, the driving method thereof, or the manufacturing method thereof.

[0003] In this specification, a semiconductor device is defined as a device that can function by utilizing semiconductor properties. This refers to all types of devices, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. The device is a form of semiconductor device. Examples include imaging devices, display devices, liquid crystal display devices, light-emitting devices, and electric devices. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic equipment are subject to the following regulations: It may have a semiconductor device. [Background technology]

[0004] A transistor (field-effect transistor) is formed using a semiconductor thin film on a substrate having an insulating surface. The technology for constructing transistors (FETs, also known as thin-film transistors (TFTs)) is attracting attention. It is anticipated that the transistor will be used in integrated circuits (ICs) and image display devices (display devices), etc. It is widely applied in electronic devices. Silicon is a semiconductor thin film applicable to transistors. While semiconductor materials such as crystalline silicon are widely known, oxide semiconductors are attracting attention as other materials. It is being watched.

[0005] For example, a transistor having a self-aligning top gate structure can be fabricated using an oxide semiconductor. A technology for doing so has been disclosed (see Patent Document 1). [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2009-278115 [Overview of the project] [Problems that the invention aims to solve]

[0007] Examples of transistors having an oxide semiconductor film include inverse staggered type (bottom gate structure) Examples include oxide semiconductors (also called staghorn or top-gate structures) or staggered types (also called top-gate structures). When a transistor with a membrane is applied to a display device, it is more inverse than a staggered transistor. Staggered transistors have a relatively simple manufacturing process and lower production costs. Therefore, it is often used.

[0008] However, the screen size of display devices is increasing, or the image quality of display devices is increasing (for example, 4K x 2K (horizontal pixels = 3840 pixels, vertical pixels = 2160 pixels) or 8 It is represented by k×4k (horizontal pixels = 7680 pixels, vertical pixels = 4320 pixels) As high-resolution display devices advance, in inverse staggered transistors, the gate electrode and source electrode... Because there is parasitic capacitance between the electrode and the drain electrode, signal delay and other issues are large due to this parasitic capacitance. This resulted in a problem where the image quality of the display device deteriorated. Also, inverse staggered transistors In the case of a staggered transistor, the area occupied by the transistor is larger. There is a match.

[0009] In view of the above problems, in one embodiment of the present invention, a novel semiconductor device having an oxide semiconductor film One of the objectives is to provide a suitable location. Alternatively, in one embodiment of the present invention, a novel semiconductor One objective is to provide a method for manufacturing a body device. Alternatively, in one embodiment of the present invention... One of its challenges is to provide a novel display device.

[0010] Furthermore, the description of the above problems does not preclude the existence of other problems. The approach does not necessarily need to solve all of these problems. Other problems are addressed in the details. This will become clear from the descriptions in the documents, etc., and it is not possible to extract any issues other than those mentioned above from the descriptions in the specifications, etc. It is possible to release it. [Means for solving the problem]

[0011] One aspect of the present invention relates to a semiconductor device having a first transistor and a second transistor. The first transistor is configured such that it has a first gate electrode and a first on the first gate electrode An insulating film, a first oxide semiconductor film on the first insulating film, and an electrically charged first oxide semiconductor film A source electrode to be connected, and a drain electrode electrically connected to the first oxide semiconductor film, A second insulating film on the first oxide semiconductor film, and a second gate electrode on the second insulating film as... It comprises a second oxide semiconductor film capable of and a third insulating film on the second oxide semiconductor film, The second transistor has a channel region, a source region, and a drain region on the second insulating film. The third oxide semiconductor film includes a third insulating film on the channel region and a third insulating film on the fourth insulating film. A semiconductor device having a gate electrode and a third insulating film on the source region and drain region. It is placed there.

[0012] Another aspect of the present invention is a display device having a drive circuit section and a pixel section, The drive circuit section has a first transistor, and the pixel section has a second transistor, and the first The transistor has a first gate electrode, a first insulating film on the first gate electrode, and a first A first oxide semiconductor film on an insulating film, and a source electrically connected to the first oxide semiconductor film. An electrode, a drain electrode electrically connected to the first oxide semiconductor film, and the first oxide semiconductor A second insulating film on the body membrane and a second oxide that functions as a second gate electrode on the second insulating film. A second transistor comprising a monocrystalline semiconductor film and a third insulating film on a second oxide semiconductor film. This is a third oxide on the second insulating film, including a channel region, a source region and a drain region. A semiconductor film, a fourth insulating film on the channel region, and a third gate electrode on the fourth insulating film, A display device having a source region and a third insulating film on the drain region.

[0013] Furthermore, in the above embodiment, the first oxide semiconductor film, the second oxide semiconductor film, and the third Oxide semiconductor films are composed of In, M (where M is Al, Ga, Y, or Sn), and Zn, respectively. It is preferable to have the following. Also, in the above embodiment, the first oxide semiconductor film, the second oxide At least one of the semiconductor film and the third oxide semiconductor film has a multilayer structure. Preferred. Also, in the above embodiment, the first oxide semiconductor film, the second oxide semiconductor film, and At least one of the third oxide semiconductor films has a crystalline portion, and the crystalline portion is c-axis oriented It is preferable that it has directionality.

[0014] Furthermore, in the above embodiment, the first gate electrode and the second gate electrode are electrically connected. It would be preferable if this were done.

[0015] Furthermore, in the above embodiment, the second transistor is further electrically connected to the source region. It is preferable to have a source electrode and a drain electrode electrically connected to the drain region. It seems so.

[0016] Furthermore, in the above embodiment, the third insulating film contains either or both of hydrogen and nitrogen. It is desirable to have it.

[0017] Another aspect of the present invention is a display module having the above-mentioned display device and a touch sensor. Furthermore, another aspect of the present invention is a semiconductor device described in any one of the above aspects. An electronic device having the above-mentioned display device or the above-mentioned display module and operation keys or a battery It is a vessel. [Effects of the Invention]

[0018] According to one aspect of the present invention, a novel semiconductor device having an oxide semiconductor film can be provided. It is possible. Alternatively, according to one aspect of the present invention, a method for manufacturing a novel semiconductor device can be provided. It is possible. Alternatively, according to one aspect of the present invention, a novel display device can be provided.

[0019] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not necessarily have to possess all of these effects. Furthermore, other effects may be considered. This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings It is possible to extract effects other than those mentioned above from the descriptions in the surfaces, claims, etc. [Brief explanation of the drawing]

[0020] [Figure 1] Top view and cross-sectional view illustrating a semiconductor device. [Figure 2] A cross-sectional view illustrating a semiconductor device. [Figure 3] Top view and cross-sectional view illustrating a semiconductor device. [Figure 4] A cross-sectional view illustrating a semiconductor device. [Figure 5] Top view and cross-sectional view illustrating a semiconductor device. [Figure 6] A cross-sectional view illustrating a semiconductor device. [Figure 7] A diagram illustrating the band structure. [Figure 8] A cross-sectional view illustrating a semiconductor device. [Figure 9] Top view and cross-sectional view illustrating a semiconductor device. [Figure 10] A cross-sectional view illustrating a semiconductor device. [Figure 11] Top view and cross-sectional view illustrating a semiconductor device. [Figure 12] Top view and cross-sectional view illustrating a semiconductor device. [Figure 13] A cross-sectional view illustrating a semiconductor device. [Figure 14] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 15] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 16] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 17] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 18] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 19] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 20]A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 21] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 22] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 23] A cross-sectional view illustrating a semiconductor device. [Figure 24] A cross-sectional view illustrating a semiconductor device. [Figure 25] A cross-sectional view illustrating a semiconductor device. [Figure 26] Figures illustrating the XRD structural analysis of CAAC-OS and single-crystal oxide semiconductors, as well as a figure showing the limited-field electron diffraction pattern of CAAC-OS. [Figure 27] Cross-sectional TEM images of CAAC-OS, as well as planar TEM images and their image analysis results. [Figure 28] Figure showing the electron diffraction pattern of nc-OS, and a cross-sectional TEM image of nc-OS. [Figure 29] Cross-sectional TEM image of an a-like OS. [Figure 30] A diagram showing the changes in the crystalline structure of In-Ga-Zn oxide due to electron irradiation. [Figure 31] A block diagram showing one form of a display device and a circuit diagram showing one form of a pixel. [Figure 32] A top view and circuit diagram showing one form of a display device. [Figure 33] A top view showing one form of a display device. [Figure 34] A cross-sectional view showing one form of a display device. [Figure 35] A circuit diagram showing one form of display device. [Figure 36] Block diagrams and circuit diagrams illustrating the display device. [Figure 37] A diagram illustrating the circuit configuration of a resistive element, as well as the top surface and cross-section of the resistive element. [Figure 38] Circuit diagram and schematic cross-sectional view illustrating the sensor circuit section. [Figure 39] A top view and a cross-sectional view illustrating the display device. [Figure 40]A perspective view showing an example of a touch panel. [Figure 41] A schematic cross-sectional diagram illustrating an example of the outer periphery and terminal section of a display device. [Figure 42] A schematic cross-sectional diagram illustrating an example of the terminal section of a display device. [Figure 43] A cross-sectional view showing an example of a display device. [Figure 44] A cross-sectional view showing an example of a touch sensor. [Figure 45] A cross-sectional view showing an example of a touch panel. [Figure 46] Block diagram and timing chart of the touch sensor. [Figure 47] Circuit diagram of a touch sensor. [Figure 48] A diagram illustrating the manufacturing process of a display device using transverse electric field mode liquid crystal elements. [Figure 49] A diagram illustrating the display of a display device according to one aspect of the present invention. [Figure 50] A diagram illustrating the display of a display device according to one aspect of the present invention. [Figure 51] A diagram illustrating an example of a display method for a display device according to an embodiment. [Figure 52] A diagram illustrating an example of a display method for a display device according to an embodiment. [Figure 53] A diagram illustrating the display module. [Figure 54] A diagram illustrating electronic devices. [Figure 55] Perspective view of the display device. [Modes for carrying out the invention]

[0021] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is as follows The description is not limited to the present invention, and the form and details may not depart from the spirit and scope of the present invention. It is possible to change this in various ways. Therefore, the present invention can be described in the embodiments shown below. It should not be interpreted in a way that is limited to volume.

[0022] For the sake of ease of understanding, the position, size, and scope of each component shown in the drawings, etc., are as follows: The actual location, size, and range may not be represented. Therefore, the disclosed invention may not reflect the actual location, size, or range. It is not necessarily limited to the location, size, or scope disclosed in drawings, etc.

[0023] Furthermore, the ordinal numbers used in this specification, etc., as "1st," "2nd," etc., are used for convenience only. It does not indicate the order of processes or stacking order. Therefore, for example, "the first" is not "the second." This can be appropriately replaced with "" or "the third," etc., in the explanation. The ordinal numbers used and the ordinal numbers used to specify one aspect of the present invention do not coincide. There is a match.

[0024] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The relationships are used for convenience in explaining them with reference to the diagrams. Also, the positional relationships between the components are shown. This changes appropriately depending on the direction in which each configuration is described. Therefore, as described in the specification... It's not limited to specific words or phrases; it can be appropriately rephrased depending on the situation.

[0025] Furthermore, in this specification and other documents, when describing the structure of the invention using drawings, the same thing is used The symbols used are consistent across different drawings.

[0026] Furthermore, in this specification, a semiconductor device is defined as a device that can function by utilizing semiconductor properties. This refers to all types of devices, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. The device is a form of semiconductor device. Examples include imaging devices, display devices, liquid crystal display devices, light-emitting devices, and electric devices. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic equipment are subject to the following regulations: It may include semiconductor devices.

[0027] Furthermore, even when the term "semiconductor" is used in this specification, for example, if the conductivity is If the value is sufficiently low, it may have the properties of an "insulator". Also, "semiconductor" and " The term "insulator" has an ambiguous boundary and may not be strictly distinguishable in some cases. Therefore, this specification... The term "semiconductor" as used in this document may sometimes be replaced with "insulator." Similarly, this In some cases, the term "insulator" as used in specifications, etc., can be replaced with "semiconductor." In some cases, the term "insulator" as used in this specification may be replaced with "semi-insulator." .

[0028] Furthermore, even when the term "semiconductor" is used in this specification, for example, if the conductivity is If the value is sufficiently high, it may possess the properties of a "conductor." Also, "semiconductor" and " The term "conductor" has an ambiguous boundary and may not be strictly distinguishable in some cases. Therefore, this specification... The term "semiconductor" as used in this document may sometimes be replaced with "conductor." Similarly, this In some cases, the term "conductor" as used in specifications, etc., can be replaced with "semiconductor."

[0029] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a channel region, and current flows through the drain, the channel region and the source. This is possible. In this specification, the channel region is defined as the region where the current is mainly It refers to the area in which something flows.

[0030] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0031] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. When the inverter is ON, the part of the semiconductor through which current flows and the gate electrode overlap each other. In the region where a channel is formed, the source (source region or source) This refers to the distance between the electrode and the drain (drain region or drain electrode). In a transistor, the channel length is not necessarily the same across all regions. That is, The channel length of a single transistor may not be fixed to a single value. Therefore, In detailed documents, the channel length is defined as any one value in the region where the channel is formed, maximum This can be the value, minimum value, or mean value.

[0032] Channel width refers to, for example, the width of a semiconductor (or transistor) when it is in the ON state. A region or channel is formed where the part through which current flows and the gate electrode overlap. This refers to the length of the portion of a region where the source and drain are facing each other. In transistors, the channel width is not necessarily the same across all regions. That is, The channel width of a single transistor may not be fixed to a single value. Therefore, In detailed documents, the channel width is defined as any one value in the region where the channel is formed, the maximum This can be the value, minimum value, or mean value.

[0033] Furthermore, in this specification, etc., "electrically connected" means "having some kind of electrical effect." This includes cases where the connection is made via ". Here, "has some electrical effect The term "of" is not particularly limited as long as it enables the exchange of electrical signals between connected objects. For example, "things that have some kind of electrical effect" include electrodes and wiring, as well as transistors. Switching elements such as resistors, inductors, capacitors, and other various functional elements are available. This includes elements such as [specific components].

[0034] Furthermore, voltage is defined by a certain potential and a reference potential (e.g., ground potential (GND) or source potential). It often refers to the potential difference between the voltage and the electric potential. Therefore, it is possible to rephrase voltage as electric potential. be.

[0035] In this specification, a silicon oxidizride film is defined as having a composition that is more acidic than nitrogen. This refers to a membrane with a high element content, preferably containing 55 atomic% or more and 65 atomic% or less of oxygen, and 1 atomic% of nitrogen. Atomic percent to 20 atomic percent, silicon 25 atomic percent to 35 atomic percent, hydrogen 0.1 atomic percent This refers to substances that are included in a range of 10% to 10 atomic percent. A silicon nitride film is a film containing these substances. As a component, it refers to a membrane in which the nitrogen content is higher than the oxygen content, preferably with nitrogen content of 55 atomic percent or more. 5 atomic% or less, oxygen 1 atomic% to 20 atomic%, silicon 25 atomic% to 35 atomic% This refers to substances containing hydrogen in a concentration range of 0.1 atomic% to 10 atomic% or less.

[0036] Furthermore, in this specification, the terms "membrane" and "layer" are interchangeable. It is possible to change the term. For example, the term "conductive layer" can be changed to the term "conductive film." It may be possible to change it. Or, for example, change the term "insulating film" to "insulating layer". In some cases, it may be possible to change the terminology to this.

[0037] Furthermore, in this specification, "parallel" means that two lines are at an angle of -10° or more and 10° or less. This refers to a state in which the elements are positioned. Therefore, it also includes cases where the angle is between -5° and 5°. "Approximately parallel" means that two lines are positioned at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" means that two lines are positioned at an angle of 80° to 100°. This refers to a state where the angle is perpendicular. Therefore, it also includes cases where the angle is between 85° and 95°. It also refers to "approximately perpendicular." This refers to a state in which two straight lines are positioned at an angle between 60° and 120°.

[0038] (Embodiment 1) In this embodiment, a semiconductor device and a method for manufacturing a semiconductor device according to one aspect of the present invention are described below. This will be explained with reference to Figures 1 through 22.

[0039] <1-1. Example of Semiconductor Device Configuration 1> Figure 1(A) shows the top view of transistors 100 and 150, which are semiconductor devices according to one aspect of the present invention. This is a diagram, and Figure 1(B) shows a cross-section of the cross-section between the dashed line X1 and X2 shown in Figure 1(A). This corresponds to the figure. Also, Figure 2(A) shows the cross-section between the dashed line Y1-Y2 shown in Figure 1(A). This corresponds to a cross-sectional view of the cross-section, and Figure 2(B) shows the cross-section between the dashed line Y3-Y4 shown in Figure 1(A). This corresponds to a cross-sectional view of a cross-section.

[0040] Furthermore, in Figure 1(A), to avoid complexity, transistors 100 and 15 Some of the components of 0 (such as the insulating film that functions as a gate insulating film) are omitted in the illustration. In addition, in the top view of the transistor, the same structure as in Figure 1(A) will be used in subsequent drawings. In some cases, some of the constituent elements may be omitted in the illustration. Also, the dashed line X1-X2 direction is used as a channel. The direction of the length, the direction of the dashed-dotted line Y1-Y2, and the direction of the dashed-dotted line Y3-Y4 are referred to as the channel width direction. It may happen.

[0041] As shown in Figures 1(A) and 1(B), a semiconductor device according to one aspect of the present invention has a transistor on the same substrate. It has a zista 100 and a transistor 150. Note that transistor 100 is a bot It is a top-gate type (also called an inverse staggered type), and transistor 150 is a top-gate type ( (Also known as a hoop type.) Details of the structure of transistors 100 and 150 are as follows. The following explains this further.

[0042] [Example of the configuration of the first transistor] The transistor 100 consists of a conductive film 104 on a substrate 102 and the substrate 102 and the conductive film 104 The insulating film 106 above, the insulating film 107 on the insulating film 106, and the oxide semiconductor on the insulating film 107. The film 108, the conductive film 112a electrically connected to the oxide semiconductor film 108, and the oxide semiconductor A conductive film 112b electrically connected to the body film 108, an oxide semiconductor film 108, and a conductive film 11 Insulating films 114 and 116 on 2a and 112b, and oxide semiconductor film 12 on insulating film 116 It has 0a, an insulating film 116, and an insulating film 118 on the oxide semiconductor film 120a.

[0043] Furthermore, as shown in Figure 1(B), the transistor 100 has an insulating film 15 on the insulating film 118. A configuration having 6 is also possible.

[0044] Furthermore, in transistor 100, insulating films 106 and 107 are of transistor 100 The insulating films 114 and 116 function as the first gate insulating film, and transistor 100 The insulating film 118 functions as a second gate insulating film, and protects the transistor 100. It has the function of an insulating film. In this specification, etc., insulating films 106 and 107 are referred to as the first The insulating film, insulating films 114 and 116 as a second insulating film, and insulating film 118 as a third insulating film, They may be referred to by different names. Also, in transistor 100, the conductive film 104 is the The oxide semiconductor film 120a functions as the first gate electrode, and the second gate electrode The conductive film 112a has the function of a source electrode, and the conductive film 112b has the function of a source electrode. It functions as a drain electrode.

[0045] Furthermore, the oxide semiconductor film 108 consists of an oxide semiconductor film 108a and an oxide semiconductor film 108a It has an oxide semiconductor film 108b on top, and an oxide semiconductor film 108a and an oxide semiconductor film. The conductive film 108b consists of In, M (where M is Al, Ga, Y, or Sn), and Zn, respectively. , has.

[0046] For example, in the oxide semiconductor film 108a, the atomic ratio of In is greater than the atomic ratio of M. It is preferable that it has a region. Also, as the oxide semiconductor film 108b, It is preferable to have a region where the atomic ratio of In is less than that of a.

[0047] The oxide semiconductor film 108a has a region in which the atomic ratio of In is greater than the atomic ratio of M. So, the field-effect mobility of transistor 100 (sometimes simply called mobility or μFE) This can increase the field effect mobility of transistor 100 to 10c. Specifically, the field effect mobility of transistor 100 can be increased to 10c. m 2The field-effect mobility of transistor 100 is greater than / Vs, and more preferably 30 cm². 2 It becomes possible to exceed / Vs.

[0048] For example, a transistor with high field-effect mobility, as described above, can be used in the drive circuit section of a display device, particularly in the drive circuit section. A gate driver that generates a gate signal, or a source driver that supplies a data signal ( (This is a demultiplexer connected to the output terminal of the shift register of the source driver.) By using this, it is possible to provide a semiconductor device or display device with a narrow bezel (also called a narrow bezel). It is possible.

[0049] On the other hand, the oxide semiconductor film 108a has a region in which the atomic ratio of In is greater than the atomic ratio of M. In this case, the electrical characteristics of transistor 100 are more likely to fluctuate when light is irradiated. However, In a semiconductor device according to one aspect of the present invention, an oxide semiconductor film is placed on an oxide semiconductor film 108a. 108b is formed. Also, oxide semiconductor film 108b is oxide semiconductor film 108a Because it has a region with a lower atomic ratio of In than the oxide semiconductor film 108a, Eg is It becomes larger. Therefore, the stacking of oxide semiconductor film 108a and oxide semiconductor film 108b The oxide semiconductor film 108 structure is designed to enhance resistance to photo-negative bias stress testing. This becomes possible.

[0050] Furthermore, the oxide semiconductor film 108, particularly the channel region of the oxide semiconductor film 108a, is mixed in. Impurities such as hydrogen or water are problematic because they affect transistor characteristics. Therefore, in the channel region of the oxide semiconductor film 108a, hydrogen or water and other substances The fewer impurities, the better. Also, the channel region formed in the oxide semiconductor film 108a Oxygen deficiencies are problematic because they affect transistor characteristics. For example, oxide semiconductors When an oxygen deficiency is formed in the channel region of the body membrane 108a, hydrogen binds to the oxygen deficiency, It becomes a carrier source. A carrier source is generated in the channel region of the oxide semiconductor film 108a. When this occurs, the electrical characteristics of the transistor 100 having the oxide semiconductor film 108a change, Surfacely, a threshold voltage shift occurs. Therefore, the channel of the oxide semiconductor film 108a In the region, a smaller oxygen deficiency is preferable.

[0051] In the transistor 100 of the present invention, the insulating films 107, 114, and 116 contain oxygen or Excess oxygen is added, and this oxygen or excess oxygen fills the oxygen deficiencies in the oxide semiconductor film 108a. This makes it possible to realize highly reliable semiconductor devices.

[0052] [Example configuration of the second transistor] Transistor 150 has a channel region 120b_i and a source region 12 on the insulating film 116. Oxide semiconductor film 120b including 0b_s and drain region 120b_d, and channel region An insulating film 152 on region 120b_i, a conductive film 154 on the insulating film 152, and a source region 12 It has an insulating film 118 on 0b_s and drain region 120b_d. An insulating film 156 is provided on 118. In addition, the insulating films 118 and 156 have a source region An opening 171a reaching 120b_s and an opening 17 reaching the drain region 120b_d 1b is provided. Also, a guide is provided on the insulating film 156 so as to cover the openings 171a and 171b. Electromagnetic films 158a and 158b are provided.

[0053] Furthermore, in transistor 150, the insulating film 152 functions as a gate insulating film. In addition, in transistor 150, the conductive film 154 functions as a gate electrode. It has. Note that the insulating film 152 may sometimes be referred to as the fourth insulating film.

[0054] Thus, a semiconductor device according to one aspect of the present invention comprises at least two transistors of the same structure. It has a bottom gate type, as shown in transistor 100. This is a dual-gate transistor with a back gate electrode attached to the transistor, and on the other hand This is a top-gate type transistor, as shown in transistor 150.

[0055] Furthermore, the oxide semiconductor film 120a of transistor 100 and transistor 150 The oxide semiconductor film 120b is formed by processing the same oxide semiconductor film. In other words, in transistor 100, the oxide semiconductor film 120a is the back gate electric Having the function of an electrode, in transistor 150, the oxide semiconductor film 120b is active It functions as a layer. Therefore, transistor 100 and transistor 150 By sharing some manufacturing processes, transistors with different structures can be placed on the same substrate. This becomes possible.

[0056] Furthermore, by placing transistors with different structures on the same substrate, the integration density of the semiconductor device can be increased. It can be improved. Alternatively, by placing transistors with different structures on the same substrate, Each transistor can be assigned a different function. For example, transistors with different structures When a semiconductor device having transistors is used as a display device, one of the transistors (for example, a transistor) The transistor (100) is used in the drive circuit section, and the other transistor (for example, transistor 150) ) can be used in the transistors of the pixel section.

[0057] Note that in Figure 1, the channel length direction of transistor 100 and transistor 150 The channel length direction is considered to be the same, but is not limited to this, and the channel of transistor 100 The longitudinal direction and the channel length direction of transistor 150 may be in different directions. For example, the channel length direction of transistor 100 and the channel length direction of transistor 150 The configuration may also be one in which the elements are orthogonal to each other.

[0058] Furthermore, in transistor 100, the insulating film in contact with the oxide semiconductor film 108, specifically This includes an insulating film 107 formed below the oxide semiconductor film 108, and the oxide semiconductor film 10 The insulating film 114 formed above 8 contains excess oxygen. The insulating film 107, and By transferring oxygen or excess oxygen from the insulating film 114 to the oxide semiconductor film 108, acid It becomes possible to reduce oxygen vacancies in the ionized semiconductor film 108. Therefore, transistor 1 It is possible to suppress the electrical characteristics of 00, particularly the fluctuations of transistor 100 under light irradiation. Yes.

[0059] Furthermore, in transistor 150, an insulating film in contact with the oxide semiconductor film 120b, specifically Specifically, the insulating film 116 formed below the oxide semiconductor film 120b, and the oxide semiconductor film The insulating film 152 formed above 120b contains excess oxygen. 6. Transfer oxygen or excess oxygen from the insulating film 152 to the channel region 120b_i. This makes it possible to reduce oxygen deficiency in channel region 120b_i. Therefore, To suppress fluctuations in the electrical characteristics of transistor 150, particularly under light irradiation. It is possible.

[0060] Furthermore, in transistor 100, the oxide semiconductor film 120a is in contact with the insulating film 118. Furthermore, in transistor 150, the source region 120b_s and the drain region 1 20b_d is in contact with the insulating film 118. Oxide semiconductor film 120a, source region 120b_ By configuring the drain region 120b_d and the insulating film 118 to be in contact with each other, insulation Hydrogen contained in film 118 diffuses into the oxide semiconductor film, and the carrier density of the oxide semiconductor film It becomes possible to increase the height. That is, oxide semiconductor film 120a, source region 120b_ s, drain region 120b_d is an oxide conductor (OC: Oxide Conductor It has the function of (also known as r).

[0061] Here, we will explain oxide conductors. The oxide semiconductor films 120a and 120b are insulating. Prior to the process of forming the film 118, it has the function of a semiconductor and forms the insulating film 118. After the process, the oxide semiconductor film 120a, the source region 120b_s, and the The rain region 120b_d functions as a conductor.

[0062] The oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d In order to function as a conductor, the oxide semiconductor film 120a and the source region 120b_s are required. Furthermore, an oxygen vacancy is formed in the drain region 120b_d, and hydrogen is introduced into the oxygen vacancy from the insulating film 118. When this is added, a donor level is formed near the conduction band. As a result, the oxide semiconductor film 120 a, source region 120b_s, and drain region 120b_d become highly conductive. It becomes conductive. Conductive oxide semiconductor film 120a, source region 120b_s, and Dre The 120b_d regions can each be described as oxide conductors.

[0063] In this embodiment, the oxide semiconductor film 120a, the source region 120b_s, Furthermore, an example was given of a configuration in which hydrogen is added to the drain region 120b_d from the insulating film 118. However, it is not limited to this. For example, oxide semiconductor film 120a, source region 120b_s, Furthermore, other impurities may be added to the drain region 120b_d to form an oxide conductor. Examples of impurities include boron, carbon, nitrogen, fluorine, phosphorus, chlorine, helium, and neon. Examples include argon, krypton, and xenon. These impurities include... For example, it can be added by ion doping or plasma treatment. .

[0064] Generally, oxide semiconductors have a large energy gap, so they do not transmit visible light. It possesses. On the other hand, oxide conductors are oxide semiconductors that have donor levels near the conduction band. Therefore, oxide conductors are less affected by absorption due to donor levels, and are acidic to visible light. It has light transmittance comparable to that of a synthetic semiconductor.

[0065] Furthermore, since the channel region 120b_i is covered by the insulating film 152, the insulating film 118 It does not come into contact with it. Therefore, the channel region 120b_i has the function of a semiconductor.

[0066] Thus, the oxide semiconductor film 1 functions as the second gate electrode of transistor 100. 20a, and the channel region 120b_i and source region 120b_s of transistor 150, The drain region 120b_d is fabricated from the same oxide semiconductor film, and the oxide semiconductor This can be achieved by changing the composition of the insulating film that comes into contact with the body membrane.

[0067] Furthermore, in one embodiment of the present invention, excess acid is added to insulating film 107 and insulating films 114 and 116. To include the element, the manufacturing process does not increase, or increases very little. This manufacturing method is used. Therefore, it is possible to increase the productivity of transistors 100 and 150. be.

[0068] Specifically, in the process of forming the oxide semiconductor film 108a, a sputtering method is used. Furthermore, by forming an oxide semiconductor film 108a in an atmosphere containing oxygen gas, the oxide semiconductor Oxygen or excess oxygen is added to the insulating film 107, which will be the surface on which film 108a is formed.

[0069] Furthermore, in the process of forming oxide semiconductor films 120a and 120b, sputtering method By using this method, oxide semiconductor films 120a and 120b are formed in an atmosphere containing oxygen gas. The insulating film 116, which will be the surface on which the oxide semiconductor films 120a and 120b are formed, contains oxygen or excess Oxygen is added. When adding oxygen or excess oxygen to the insulating film 116, Oxygen or excess oxygen is also present in the insulating film 114 and oxide semiconductor film 108 located below 6. It may be added.

[0070] As described above, a semiconductor device according to one aspect of the present invention has two transistor structures on the same substrate It has a back gate electrode of one transistor, and The oxide semiconductor film that functions as the active layer of the other transistor, and the same oxide semiconductor film Processing makes it possible to suppress the increase in manufacturing steps.

[0071] <1-2. Components of Semiconductor Devices> The components included in the semiconductor device of this embodiment will be described in detail below.

[0072] [substrate] There are no major restrictions on the material of the substrate 102, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrates, ceramic substrates, quartz substrates, etc. A fire substrate or the like may be used as the substrate 102. Alternatively, silicon or silicon carbide may be used as the material. Single-crystal semiconductor substrates, polycrystalline semiconductor substrates, and compound semiconductors such as silicon germanium are used as materials. It is also possible to apply substrates, SOI substrates, etc., and semiconductor elements are provided on these substrates. The prepared material may be used as the substrate 102. Note that a glass substrate may be used as the substrate 102. If available, 6th generation (1500mm x 1850mm), 7th generation (1870mm x 220 0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280 By using large-area substrates such as 0mm, 10th generation (2950mm x 3400mm), Large-scale display devices can be manufactured.

[0073] Furthermore, a flexible substrate is used as the substrate 102, and the transistor 10 is directly mounted on the flexible substrate. A 0 may be formed. Alternatively, a release layer may be provided between the substrate 102 and the transistor 100. Good. The delamination layer is applied to the substrate 102 after the semiconductor device has been partially or completely completed on it. It can be separated and transferred to another substrate. In this case, transistor 100 has a low resistance It can be transferred to substrates with poor thermal resistance or flexible substrates.

[0074] [Conductive film that functions as a gate electrode, source electrode, and drain electrode] A conductive film 104 functions as a gate electrode, and a conductive film 112a functions as a source electrode. Conductive film 112b functions as a drain electrode, and conductive film 158a functions as a source electrode. The conductive film 158b, which functions as both a conductive film and a drain electrode, is made of chromium (Cr) and copper (Cu ), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo ), tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), nickel Metallic elements selected from kel (Ni), iron (Fe), and cobalt (Co), or the gold mentioned above. Using alloys composed of the group elements, or alloys combining the aforementioned metallic elements, each shape It is possible.

[0075] Furthermore, conductive films 104, 112a, 112b, 158a, and 158b, even in a single-layer structure, are two A multilayer structure of more than one layer is also possible. For example, a single-layer structure of an aluminum film containing silicon, A two-layer structure in which an aluminum film is laminated on a tungsten film, and an aluminum film is laminated on a tungsten film. A two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a titanium film, on the titanium film A three-layer structure of a luminium film and a titanium film on the aluminum film, the titanium film, the titanium Examples include a three-layer structure consisting of a copper film on a film and a titanium film on the copper film. Also, the above aluminum In addition to nium, titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and Scandinavian An alloy film or nitride film may be used, which may be a combination of one or more elements selected from um.

[0076] Furthermore, conductive films 104, 112a, 112b, 158a, and 158b contain indium stinic acid. Indium oxides containing tungsten oxide, indium oxides containing tungsten oxide, indium tungsten oxide Lead oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, Translucent indium zinc oxide, indium tin oxide with added silicon oxide, etc. Conductive materials can also be applied.

[0077] Furthermore, conductive films 104, 112a, 112b, 158a, and 158b have Cu-X alloy films. (X may be Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) By using a Cu-X alloy film, it can be processed using a wet etching process, thus reducing manufacturing costs. This will make it possible to suppress strikes.

[0078] [First gate insulating film] The insulating films 106 and 107 that function as gate insulating films of transistor 100 are, Plasma Enhanced Chemical Vapor Deposition (PECVD) By methods such as Vapor Deposition and sputtering, silicone oxide is produced. Silicon film, silicon oxide film, silicon nitride film, silicon nitride film, aluminum oxide film Hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, oxide Tantalum film, magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film. Insulating layers containing one or more types of films can be used. Instead of a laminated structure, a single insulating film selected from the above materials, or three or more insulating films, is used. You may also use [this].

[0079] Furthermore, the insulating film 106 functions as a blocking film that suppresses oxygen permeation. For example, excess acid in insulating films 107, 114, 116 and / or oxide semiconductor film 108 When a component is supplied, the insulating film 106 can suppress the permeation of oxygen.

[0080] Furthermore, the oxide semiconductor film 108, which functions as the channel region of transistor 100, is in contact with the The insulating film 107 is preferably an oxide insulating film, and is preferably composed of an excess of acid in a stoichiometric composition. It is more preferable to have a region containing elements (oxygen-rich region). In other words, insulating film 1 07 is an insulating film capable of releasing oxygen. Note that the insulating film 107 has an oxygen-rich region. To provide this, for example, an insulating film 107 can be formed in an oxygen atmosphere. Alternatively, a film can be formed. Oxygen may be added to the subsequent insulating film 107.

[0081] Furthermore, when hafnium oxide is used as the insulating film 107, the following effects are obtained. Hafnium has a higher dielectric constant than silicon oxide or silicon oxide / nitride. Therefore, Compared to the case using silicon oxide, the thickness of the insulating film 107 can be increased, thus tunnel This can reduce leakage current caused by current. In other words, a transistor with a small off-current It is possible to achieve this. Furthermore, hafnium oxide having a crystalline structure has an amorphous structure It has a higher dielectric constant compared to hafnium oxide, which has a low off-current. For use as a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of crystal structures include monoclinic and cubic systems. However, one aspect of the present invention is... The term "sama" is not limited to these examples.

[0082] In this embodiment, a silicon nitride film is formed as the insulating film 106, and the insulating film 107 It forms a silicon oxide film. Compared to the silicon oxide film, the silicon nitride film has a relative dielectric constant. Because the rate is high and the thickness required to obtain capacitance equivalent to that of a silicon oxide film is large, By including a silicon nitride film as the gate insulating film of ZISTA 150, the insulating film is physically made thicker. This can be done. Therefore, the decrease in the dielectric breakdown voltage of transistor 100 is suppressed, and furthermore, the dielectric breakdown voltage can be reduced. By improving the edge breakdown voltage, electrostatic discharge (ESD) breakdown of transistor 100 can be suppressed.

[0083] [First oxide semiconductor film] The materials shown above can be used as the oxide semiconductor film 108.

[0084] If the oxide semiconductor film 108a is In-M-Zn oxide, then In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used to achieve this satisfies In > M. Preferably, the atomic ratio of metal elements in such a sputtering target is I n:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4 .1 is one example.

[0085] Furthermore, if the oxide semiconductor film 108b is In-M-Zn oxide, The atomic ratio of metal elements in the sputtering target used to deposit the film is such that In ≤ M. It is preferable that this is satisfied. The atomic ratio of the metal elements in such a sputtering target is In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn= Examples include 1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, etc. ru.

[0086] Furthermore, the oxide semiconductor film 108a and the oxide semiconductor film 108b are made of In-M-Zn oxide In this case, the sputtering target is a target containing polycrystalline In-M-Zn oxide. It is preferable to use a target containing polycrystalline In-M-Zn oxide. Therefore, it is easier to form crystalline oxide semiconductor films 108a and oxide semiconductor films 108b. The atomic ratio of the oxide semiconductor film 108a and oxide semiconductor film 108b to be formed. Each of these represents the plasma of the atomic ratio of the metal elements contained in the sputtering target described above. Insulation can fluctuate by about 40%. For example, sputtering of oxide semiconductor film 108a When using an atomic ratio of In:Ga:Zn=4:2:4.1 as the target material, The atomic ratio of the oxide semiconductor film 108a will be approximately In:Ga:Zn=4:2:3. There are cases where this is the case.

[0087] Furthermore, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2. The energy gap is 5 eV or more, more preferably 3 eV or more. By using the oxide semiconductor film 108a, the off-current of transistor 100 is reduced. This is possible. In particular, the oxide semiconductor film 108a has an energy gap of 2 eV or more. Alternatively, an oxide semiconductor film with a voltage of 2 eV or more and 3.0 eV or less is used, and the oxide semiconductor film 108b When using an oxide semiconductor film with an energy gap of 2.5 eV or more and 3.5 eV or less, It is preferable. Furthermore, the energy of oxide semiconductor film 108b is better than that of oxide semiconductor film 108a. A larger gap is preferable.

[0088] Furthermore, the thicknesses of the oxide semiconductor film 108a and the oxide semiconductor film 108b are 3n each. m or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, more preferably 3 nm It shall be 50 nm or less.

[0089] In addition, as the oxide semiconductor film 108a, an oxide semiconductor film with a low carrier density is used. . For example, the carrier density of the oxide semiconductor film 108a is 1×10 17 per cm 3 or less, preferably preferably 1×10 15 per cm 3 or less, more preferably 1×10 13 per cm 3 or less, more preferably 1×10 11 per cm 3 or less.

[0090] Note that it is not limited to these, and those with an appropriate composition may be used according to the semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the required transistor. Also, in order to obtain the semiconductor characteristics of the required transistor, it is preferable to make the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the oxide semiconductor film 108a and the oxide semiconductor film 108b appropriate.

[0091] Note that as the oxide semiconductor film 108a and the oxide semiconductor film 108b, by using oxide semiconductor films with low impurity concentrations and low defect level densities, transistors with even more excellent electrical characteristics can be fabricated, which is preferable. Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high purity intrinsic or substantially high purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor film with high purity intrinsic or substantially high purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold ... It rarely exhibits an electrical characteristic where the voltage is negative (also known as normally-on). Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a low defect level density. Therefore, the trap level density may also be low. The highly intrinsic oxide semiconductor film has a remarkably low off-current and a channel width of 1 × 10⁻⁶. 6 μm Even with an element with a channel length L of 10 μm, the voltage between the source electrode and the drain electrode (drain In the range of 1V to 10V, the off-current is measured by a semiconductor parameter analyzer. Below the measurement limit, i.e., 1 × 10⁻⁶ -13 It is possible to obtain the characteristic of being A or less.

[0092] Therefore, channels can be channeled into the above-mentioned high-purity intrinsic, or substantially high-purity intrinsic oxide semiconductor film. Transistors in which a region is formed exhibit small fluctuations in electrical characteristics and are highly reliable transistors. This can be done. Furthermore, the charge trapped in the trap levels of the oxide semiconductor film disappears. The time required to do so is long, and it can sometimes behave as if it were a fixed charge. Therefore, A transistor in which a channel region is formed in an oxide semiconductor film with a high trap level density is an electric transistor. The gas properties may become unstable. Impurities include hydrogen, nitrogen, alkali metals, or Alkaline earth metals are among them.

[0093] The hydrogen contained in the oxide semiconductor film reacts with the oxygen bonded to the metal atoms to form water. This forms an oxygen vacancy in the lattice (or the part from which oxygen has been removed). When hydrogen enters, electrons, which act as carriers, are sometimes generated. Also, some of the hydrogen It can combine with oxygen atoms that bond with metal atoms to generate electrons, which act as carriers. Transistors using oxide semiconductor films containing hydrogen exhibit normally-on characteristics. It is inexpensive. For this reason, it is preferable that the oxide semiconductor film 108 has as little hydrogen as possible. Specifically, in the oxide semiconductor film 108, the hydrogen concentration obtained by SIMS analysis is Degrees, 2 × 10 20 atoms / cm 3 The following is preferably 5 × 10 19 atoms / cm 3 More preferably 1 × 10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 The following is preferably 1 × 10 18 atoms / cm 3 The following is more convenient: 5x1 0 17 atoms / cm 3 More preferably 1 × 10 16 atoms / cm 3 below Let's assume that.

[0094] Furthermore, the oxide semiconductor film 108a has a lower hydrogen concentration than the oxide semiconductor film 108b. It is preferable that it has a region. The oxide semiconductor film 108a is better than the oxide semiconductor film 108b. Having a region with low hydrogen concentration allows for the creation of a highly reliable semiconductor device.

[0095] Furthermore, in the oxide semiconductor film 108a, silicon and carbon, which are among the Group 14 elements, When included, the oxygen vacancies in the oxide semiconductor film 108a increase, causing it to become n-type. Therefore, the concentrations of silicon and carbon in the oxide semiconductor film 108a and the oxide semiconductor film 10 The concentrations of silicon and carbon near the interface with 8b (concentrations obtained by SIMS analysis) are 2× 10 18atoms / cm 3 Hereinafter, preferably 2×10 17 atoms / cm 3 or less .

[0096] Also, in the oxide semiconductor film 108a, the concentration of an alkali metal or an alkaline earth metal obtained by SIMS analysis is set to 1×10 or less, preferably 2× 18 atoms / cm 3 or less. An alkali metal and an alkaline earth metal may generate carriers when combined with an oxide semiconductor, and the off-current of a transistor may increase as a result. Therefore, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor film 108a 16 atoms / cm 3 . .

[0097] Also, when nitrogen is contained in the oxide semiconductor film 108a, carriers, i.e., electrons, are generated, the carrier density increases, and it is likely to become n-type. As a result, a transistor using an oxide semiconductor film containing nitrogen is likely to have normally-on characteristics. Therefore, in the oxide semiconductor film, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration obtained by SIMS analysis is preferably 5×10 18 atoms / cm 3 or less

[0098] Also, the oxide semiconductor film 108a and the oxide semiconductor film 108b may each have a non-single crystal structure . The non-single crystal structure is, for example, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor) described later, polycrystalline ​This includes crystalline structures, microcrystalline structures, or amorphous structures. In non-single-crystal structures, amorphous structures are the most common. While the defect level density is high, CAAC-OS has the lowest defect level density.

[0099] [Second gate insulating film] The insulating films 114 and 116 function as second gate insulating films of transistor 100. Furthermore, the insulating films 114 and 116 function as under-insulating films for the transistor 150. The insulating films 114 and 116 have the function of supplying oxygen to the oxide semiconductor films 108 and 120b. In other words, insulating films 114 and 116 contain oxygen. Also, insulating film 114 contains oxygen It is an insulating film that can transmit light. Note that insulating film 114 is an insulating film 11 that will be formed later. It also functions as a damage mitigation film for the oxide semiconductor film 108 during the formation of 6.

[0100] The insulating film 114 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 nm. Silicon oxide, silicon oxide, silicon nitride, etc., with a size of nm or smaller can be used.

[0101] Furthermore, the insulating film 114 preferably has a low defect count, and typically, ESR measurement is used to determine its defect count. Furthermore, the spin density of the signal appearing at g=2.001 originates from the dangling bond of silicon. 3 x 10 17 spins / cm 3 The following is preferable. This is because the insulating film 114 If the defect density is high, oxygen will bond to the defects, and oxygen in the insulating film 114 will be lost. The amount of light transmitted will decrease.

[0102] Furthermore, in the insulating film 114, all of the oxygen that enters the insulating film 114 from the outside is absorbed by the insulating film 11 Some oxygen does not move to the outside of 4 and remains in the insulating film 114. Also, oxygen in the insulating film 114 As it enters, the oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, thus insulating Oxygen migration may occur in the film 114. The insulating film 114 is permeable to oxygen. When an oxide insulating film is formed that can be made, the insulating film 116 provided on the insulating film 114 The desorbed oxygen can be transferred to the oxide semiconductor film 108 via the insulating film 114. .

[0103] Furthermore, the insulating film 114 is formed using an oxide insulating film with a low energy level density due to nitrogen oxides. This can be achieved. Furthermore, the level density caused by the nitrogen oxide is the value of the oxide semiconductor film. The energy at the top of the electron band (Ev_os) and the energy at the bottom of the conduction band of an oxide semiconductor film. It may be formed between (Ec_os) Silicon oxide nitride film with low emission levels, or aluminum oxide nitride with low nitrogen oxide emission levels. A nium film or the like can be used.

[0104] Furthermore, silicon oxidnitride films with low nitrogen oxide emissions are analyzed by the temperature-controlled desorption gas analysis method. In other words, it is a membrane that releases more ammonia than nitrogen oxides, and typically ammonia The amount released is 1 × 10 18 pieces / cm 3 The above 5 x 10 19 pieces / cm 3 The following applies. The amount of Monia released is when the film surface temperature is between 50°C and 650°C, preferably between 50°C and 55°C. This refers to the amount released by heat treatment at temperatures below 0°C.

[0105] Nitrogen oxides (NO x (x is 1 or 2), typically NO2 or NO is the insulating film 11 Levels are formed at 4, etc. These levels are located within the energy gap of the oxide semiconductor film 108. It is located there. Therefore, nitrogen oxides spread to the interface between the insulating film 114 and the oxide semiconductor film 108. When dispersed, the energy level may trap electrons on the insulating film 114 side. Because the trapped electrons remain near the interface between the insulating film 114 and the oxide semiconductor film 108. This shifts the transistor's threshold voltage in the positive direction.

[0106] Furthermore, nitrogen oxides react with ammonia and oxygen during heat treatment. Insulating film 114 The nitrogen oxides contained in react with the ammonia contained in the insulating film 116 during the heat treatment. Therefore, nitrogen oxides contained in the insulating film 114 are reduced. At the interface of the oxide semiconductor film 108, electrons are less likely to be trapped.

[0107] By using the above oxide insulating film as the insulating film 114, the threshold voltage of the transistor can be adjusted. This makes it possible to reduce the shift and reduce fluctuations in the electrical characteristics of the transistor. can.

[0108] Furthermore, the heat treatment in the transistor manufacturing process typically involves heating to temperatures between 300°C and 350°C. Due to the heat treatment, the insulating film 114 has a spectrum obtained by measuring at an ESR of 100K or less. In this case, the first signal is when the g value is 2.037 or higher and 2.039 or lower, and the second signal is when the g value is 2.001 or higher. A second signal of 0.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less. Null is observed. Note that the split width of the first signal and the second signal, and the The split width of the second signal and the third signal is approximately 5 in the X-band ESR measurement. It is mT. Also, the first signal is when the g value is between 2.037 and 2.039, and the g value is 2. A second signal between 0.001 and 2.003, and a g value between 1.964 and 1.966. The sum of the spin densities of the third signal is 1 × 10 18 spins / cm 3 It is less than, Table: 1 × 10 17 spins / cm 3 The above 1 x 10 18 spins / cm 3 Less than ru.

[0109] The first signal, the second signal, and the third signal mentioned above are nitrogen oxide-induced This corresponds to a Gnar. That is, it gives the first signal, the second signal, and the third signal. The lower the total spin density, the lower the nitrogen oxide content in the oxide insulating film. It can be said that...

[0110] Furthermore, the above oxide insulating film has a nitrogen concentration of 6 × 10 as measured by SIMS. 20 atoms / cm 3 The following applies:

[0111] The substrate temperature is between 220°C and 350°C, and PEC is performed using silane and nitrous oxide. By forming the above oxide insulating film using the VD method, a dense and hard film is obtained. It can be formed.

[0112] The insulating film 116 is an oxide insulating film containing more oxygen than satisfactorily satisfying the stoichiometric composition. It is formed using. An oxide insulating film containing more oxygen than satisfies the stoichiometric composition is Heating causes some of the oxygen to be removed. It contains more oxygen than the oxygen required to satisfy the stoichiometric composition. Oxide insulating films are used at temperatures between 100°C and 700°C, or between 100°C and 500°C. TDS analysis showed that the amount of oxygen released, converted to oxygen atoms, was 1.0 × 10⁻⁶.19 ate / c m 3 The above, or 3.0 × 10 20 atoms / cm 3 The above is an oxide insulating film. .

[0113] The insulating film 116 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxide nitride, etc., with a wavelength of 400 nm or less can be used.

[0114] Furthermore, it is preferable that the insulating film 116 has a low defect count, and typically, ESR measurement is used to determine this. Furthermore, the spin density of the signal appearing at g=2.001 originates from the dangling bond of silicon. is 1.5 × 10 18 spins / cm 3 Less than, and even 1 × 10 18 spins / cm 3 The following is preferable. Note that the insulating film 116 is an oxide semiconductor compared to the insulating film 114. Because it is separated from the body film 108, it can have a higher defect density than the insulating film 114.

[0115] Furthermore, insulating films 114 and 116 can be made of the same type of insulating material, thus providing insulation. In some cases, the interface between film 114 and insulating film 116 cannot be clearly identified. Therefore, in this implementation... In the diagram, the interface between insulating film 114 and insulating film 116 is shown with a dashed line. In the embodiment, a two-layer structure of insulating film 114 and insulating film 116 was described, but The invention is not limited to this, and for example, a single-layer structure of the insulating film 114 may also be used.

[0116] [Second oxide semiconductor film, and third oxide semiconductor film] The oxide semiconductor film 120a and oxide semiconductor film 120b are as described above. It can be formed using the same materials and the same manufacturing method as the conductive film 108.

[0117] In other words, oxide semiconductor film 120a and oxide semiconductor film 120b are oxide semiconductor films It contains metal elements included in 108. For example, an oxide semiconductor film 108 and an oxide semiconductor film By having 120a and the oxide semiconductor film 120b have the same metal element, This makes it possible to reduce manufacturing costs.

[0118] For example, the oxide semiconductor film 120a and the oxide semiconductor film 120b are In-M- In the case of Zn oxide, the sputtering target used to deposit In-M-Zn oxide The atomic ratio of the metal elements in the sputter is preferably such that In ≥ M. As for the atomic ratio of the metal elements in the target, In:M:Zn = 2:1:3, In:M: Examples include Zn=3:1:2 and In:M:Zn=4:2:4.1.

[0119] Furthermore, the structure of the oxide semiconductor film 120a and the oxide semiconductor film 120b is a single-layer structure. It can be made into a single layer or a laminated structure of two or more layers. Note that the oxide semiconductor film 120a, 12 In the case where 0b is a layered structure, the composition of the sputtering target is not limited to the above. i. When the oxide semiconductor films 120a and 120b are stacked in a laminated structure, the acid described above A structure similar to oxide semiconductor film 108 (for example, oxide semiconductor film 108a and oxide semiconductor film This can be a stacked structure with an oxide semiconductor film 108b on 108a. Alternatively, an oxide semiconductor film can be used. When the body films 120a and 120b are in a stacked structure, the oxide semiconductor film 108b and A stacked structure of oxide semiconductor film 108a on oxide semiconductor film 108b may also be used.

[0120] [An insulating film that functions as a protective insulating film for transistors] The insulating film 118 functions as a protective insulating film for the transistor 100. 8 is the source region 120b_s and drain region 120b_d of transistor 150. A machine that supplies impurities to the source region 120b_s and the drain region 120b_d, which are in contact with each other. To have the ability.

[0121] For example, the insulating film 118 may have either hydrogen or nitrogen, or both. The insulating film 118 contains nitrogen and silicon. Furthermore, the insulating film 118 contains oxygen, hydrogen, water, It has the function of blocking alkali metals, alkaline earth metals, etc. The insulating film 118 By providing this, the diffusion of oxygen from the oxide semiconductor film 108 to the outside and the insulating film 114, 11 The diffusion of oxygen contained in 6 to the outside, and the entry of hydrogen, water, etc. from the outside into the oxide semiconductor film 108. This can prevent accidental intrusion.

[0122] Furthermore, the insulating film 118 comprises an oxide semiconductor film 120a, a source region 120b_s, and a drain. The in region 120b_d has the function of supplying either hydrogen or nitrogen, or both. In particular, the insulating film 118 contains hydrogen, and the hydrogen is used in the oxide semiconductor film 120a, It is preferable that the drain region 120b_s and the drain region 120b_d have a function to supply fluid. The insulating film 118 is separated from the oxide semiconductor film 120a, the source region 120b_s, and the drain region When hydrogen is supplied to region 120b_d, the oxide semiconductor film 120a and the source region 120 b_s and the drain region 120b_d function as conductors.

[0123] For example, a nitride insulating film can be used as the insulating film 118. Examples include silicon nitride, silicon oxide nitride, aluminum nitride, and aluminum oxide nitride. These include:

[0124] Furthermore, the various films described above, such as conductive films, insulating films, and oxide semiconductor films, are produced by sputtering. It can be formed by the chemo- It may also be formed by the (Emical Vapor Deposition) method. Thermal CVD An example of the law is MOCVD (Metal Organic Chemical Vapor Deposition method and ALD (Atomic Layer Deposition) Method n) may also be used.

[0125] Thermal CVD is a film deposition method that does not use plasma, so defects can occur due to plasma damage. It has the advantage of never being accomplished.

[0126] In the thermal CVD method, the raw material gas and oxidizer are simultaneously introduced into the chamber, and the chamber is subjected to atmospheric pressure. Alternatively, by applying reduced pressure and reacting the film near or on the substrate, the film can be deposited on the substrate. You may go.

[0127] Furthermore, the ALD method maintains atmospheric pressure or reduced pressure inside the chamber and uses raw material gases for the reaction. The film is formed by introducing the material into a chamber, allowing it to react, and repeating this process. The material is inactivated along with the raw material gas. A carrier gas (such as argon or nitrogen) may be introduced. For example, two types The raw material gases of type 1 or more may be supplied to the chamber in sequence. In this case, if multiple types of raw material gases are mixed To prevent this from happening, after the reaction of the first raw material gas, an inert gas is introduced, and then the second raw material gas is introduced. Alternatively, instead of introducing an inert gas, the first source gas can be removed by vacuum evacuation. After that, a second raw material gas may be introduced. The first raw material gas is adsorbed and reacts on the surface of the substrate. First, the first layer is formed, and the second raw material gas, which is introduced later, is adsorbed and reacts, so that the second layer is formed. A thin film is formed by stacking layers on top of layer 1. By controlling the gas introduction sequence, the desired thickness is achieved. By repeating the process multiple times until the desired result is achieved, a thin film with excellent step coverage can be formed. The thickness can be adjusted by the number of times gas is introduced, allowing for precise film thickness control. It is possible and suitable for fabricating miniature FETs.

[0128] Thermal CVD methods such as MOCVD are used for the conductive film, insulating film, oxide semiconductor film, etc., of the above embodiments. It can form various films, such as metal oxide films, for example, an In-Ga-Zn-O film. When forming a film, use trimethylindium (In(CH3)3) or trimethylgallium (G a(CH3)3) and dimethylzinc (Zn(CH3)2) can be used. , and not limited to these combinations, triethylgallium can be substituted for trimethylgallium. Ga(C2H5)3) can also be used, and diethylzinc (Zn( C2H5)2) can also be used.

[0129] For example, when forming a hafnium oxide film using a film deposition apparatus that utilizes ALD, the solvent and a liquid containing a hafnium precursor (such as hafnium alkoxide or tetrakisdimethylamide) Hafnium (TDMAH, Hf[N(CH3)2]4) and tetrakiss (ethylmethylamine) The raw material gas is a vaporized hafnium amide (such as hafnium), and ozone is used as an oxidizer. Two types of gases (O3) are used.

[0130] For example, when forming an aluminum oxide film using a film deposition apparatus that utilizes ALD, A liquid containing a medium and an aluminum precursor (trimethylaluminum (TMA, Al(CH3)) 3) etc.) are vaporized raw material gases, and two types of gases are used as oxidizers: H2O. The materials include tris(dimethylamide)aluminum, triisobutylaluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedione) There is.

[0131] For example, when forming a silicon oxide film using a film deposition apparatus that utilizes ALD, hexa Chlorodisilane is adsorbed onto the film-forming surface, and chlorine contained in the adsorbed material is removed, resulting in an oxidizing gas (O 2. A radical of nitrous oxide is supplied and reacted with the adsorbed material.

[0132] For example, when depositing a tungsten film using a film deposition apparatus that utilizes ALD, WF6 The initial tungsten film is formed by sequentially introducing gas and B2H6 gas, and then WF6 gas and A tungsten film is formed using H2 gas. Note that SiH4 gas can be used instead of B2H6 gas. You may also use "S".

[0133] For example, oxide semiconductor films, such as In-Ga-Zn-, can be deposited using an ALD-based film deposition system. When forming an O film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Then, a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then Z A ZnO layer is formed using n(CH3)2 gas and O3 gas. Note the order of these layers. This is not the only example. Furthermore, these gases can be used to create In-Ga-O layers and In-Zn-O layers. Alternatively, a mixed compound layer such as a Ga-Zn-O layer may be formed. Note that Ar gas can be used instead of O3 gas. H2O gas obtained by bubbling with an inert gas such as can also be used, but O without H It is preferable to use three gases.

[0134] <1-3. Semiconductor device configuration example 2> Next, regarding configurations different from those shown in Figures 1(A)(B) and 2(A)(B), This will be explained using Figures 3 through 10.

[0135] Figure 3(A) shows a semiconductor device according to one aspect of the present invention, which includes transistor 100A and a transistor. Figure 3(B) is a top view of the 150, and shows the area between X1 and X2 shown by the dashed line in Figure 3(A). This corresponds to a cross-sectional view of the cross-section in [the figure]. Also, Figure 4 shows the dashed line Y1-Y shown in Figure 3(A). This corresponds to a cross-sectional view of the cross-section between the two points. Also, Figure 5(A) shows a semiconductor according to one embodiment of the present invention. Figure 5(B) is a top view of the device, consisting of transistors 100B and 150. ) corresponds to the cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 5(A). Figure 6 corresponds to a cross-sectional view of the section between the dashed line Y1 and Y2 shown in Figure 5(A).

[0136] Furthermore, Figure 9(A) shows a semiconductor device according to one aspect of the present invention, which includes a transistor 100C and Figure 9(B) is a top view of transistor 150, and the dashed line X1- shown in Figure 9(A) is shown below. This corresponds to a cross-sectional view of the cross-section between X2. Also, Figure 10(A) is the same as shown in Figure 9(A). This corresponds to a cross-sectional view of the section between the dashed lines Y1 and Y2, and Figure 10(B) is shown in Figure 9(A). This corresponds to a cross-sectional view of the section between the dashed lines Y3 and Y4.

[0137] The semiconductor device shown in Figures 3(A)(B) and 4 is the same as the one shown in Figures 1(A)(B) and 2(A). (B) Replace transistor 100A with transistor 100A in the semiconductor device shown The configuration is as follows. Also, the semiconductor device shown in Figures 5(A)(B) and 6 is as shown in Figure 1(A). (B) and the transistor 100 in the semiconductor device shown in Figure 2(A)(B) The configuration includes transistor 100B. See also Figures 9(A)(B) and 10(A). The semiconductor device shown in (B) is the same as the semiconductor device shown in Figures 1(A)(B) and 2(A)(B). This configuration has transistor 100C instead of transistor 100.

[0138] Therefore, the explanation of transistor 150, which was explained earlier, will be omitted below. This document provides details about transistors 100A, 100B, and 100C. ru.

[0139] [Example of the configuration of the first transistor (modification 1)] Transistor 100A is provided with an opening 132 in the transistor 100 shown above. The only difference is that it is the same as transistor 100 in other respects and has the same effect. It will produce results. Below, we will explain the configuration which differs from that of transistor 100.

[0140] As shown in Figures 3(A) and 4, an oxide semiconductor film that functions as a second gate electrode. 120a is provided in the opening 132 in the insulating films 106, 107, 114, and 116. It is connected to the conductive film 104 which functions as the first gate electrode. The oxide semiconductor film 120a is given the same potential.

[0141] In this embodiment, an opening 132 is provided, and the conductive film 104 and the oxide semiconductor film The example given illustrates a configuration for connecting to 120a, but it is not limited to this. For example, opening 1 Multiple 32s are formed, and the conductive film 104 and the oxide semiconductor film 120a are connected in this configuration. Good. Note that the transistor 100 shown in Figures 1(A)(B) and 2(A)(B) is... In the case where the conductive film 104 and the oxide semiconductor film 120a are not connected, the conductive film 104 and The oxide semiconductor film 120a can each be given a different potential.

[0142] Furthermore, as shown in Figure 3(B), the oxide semiconductor film 108 acts as the first gate electrode. The conductive film 104 that can perform the function and the oxide semiconductor film 120a that functions as a second gate electrode It is positioned opposite to it and sandwiched between two films that function as gate electrodes. The length in the channel length direction of the oxide semiconductor film 120a that functions as the gate electrode and the channel The length in the channel width direction is the length in the channel length direction and the length in the channel width direction of the oxide semiconductor film 108. The upper and side surfaces of the oxide semiconductor film 108 are longer than the length of the film, and the insulating films 114 and 11 It is covered by an oxide semiconductor film 120a via 6. Also, the oxide semiconductor film 120a and The conductive film 104 is provided in the openings 132 in the insulating films 106, 107, 114, and 116. Because they are connected in this manner, the side surface of the oxide semiconductor film 108 that extends in the channel width direction is oxidized. It is facing the monocrystalline semiconductor film 120a.

[0143] In other words, the conductive film 104 and the oxide semiconductor film 120a are insulating films 106, 107, The openings 132 provided in 114 and 116 are connected, and insulating films 106 and 10 The oxide semiconductor film 108 is surrounded via 7, 114, and 116.

[0144] Having such a configuration, the oxide semiconductor film 10 included in the transistor 100A 8 is a conductive film 104 that functions as a first gate electrode and a second gate electrode that functions as a second gate electrode. The oxide semiconductor film 120a can be electrically surrounded by an electric field. Transistor 10 As in 0A, the channel region is affected by the electric fields of the first and second gate electrodes. The device structure of the transistor that electrically surrounds the formed oxide semiconductor film is called Surrou This can be called an nded channel (S-channel) structure.

[0145] Since transistor 100A has an S-channel structure, the first gate electrode and The conductive film 104 functions in such a way that it effectively induces an electric field to create a channel in the oxide semiconductor. Because it can be applied to the conductive film 108, the current driving capability of transistor 100A is improved. This makes it possible to obtain high on-current characteristics. Furthermore, it is possible to increase the on-current. Therefore, it is possible to miniaturize transistor 100A. Also, transistor 1 00A is a conductive film 104 that functions as a first gate electrode and a second gate electrode Because it has a structure surrounded by an oxide semiconductor film 120a that can perform functions, transistor 100 The mechanical strength of A can be increased.

[0146] [Example configuration of the first transistor (modification 2)] Transistor 100B is composed of transistor 100 as shown above and oxide semiconductor film 108. The configuration is different. Other than that, it is the same as transistor 100 and has the same effect. This produces the desired effect. The following describes a configuration that differs from transistor 100.

[0147] Transistor 100B has three layers of oxide semiconductor film 108 on transistor 100. It has a layered structure. More specifically, the oxide semiconductor film 1 of transistor 100B 08 is the oxide semiconductor film 108c on the insulating film 107, and the oxide on the oxide semiconductor film 108c. It comprises a monocrystalline semiconductor film 108a and an oxide semiconductor film 108b on the oxide semiconductor film 108a. ru.

[0148] Here, the band structure of the insulating film in contact with the oxide semiconductor films 108a, 108b, and 108c is Figure 7 shows the band structure of the insulating film in contact with the oxide semiconductor films 108a and 108b. I will explain.

[0149] Figure 7(A) shows insulating film 107, oxide semiconductor films 108a, 108b, 108c, and an insulating film. This is an example of a band structure in the film thickness direction of a laminated structure having a border film 114. Also, Figure 7(B) A laminated structure having insulating film 107, oxide semiconductor films 108a, 108b, and insulating film 114 This is an example of the band structure in the film thickness direction. Note that the band structure is shown in an anechoic manner for ease of understanding. Conduction band of the border film 107, oxide semiconductor films 108a, 108b, 108c, and insulating film 114 This shows the lower energy level (Ec).

[0150] Furthermore, Figure 7(A) shows that silicon oxide films are used as insulating films 107 and 114, and oxide semiconductors As a body membrane (10⁸c), the atomic ratio of metal elements is In:Ga:Zn = 1:1:1.2 in a metal oxide film. Using an oxide semiconductor film formed with a material target, the oxide semiconductor film 108a is used Using a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 4:2:4.1 Using an oxide semiconductor film formed by this process, the atomic ratio of metal elements is used as the oxide semiconductor film 108b. The oxide formed using a metal oxide target with an In:Ga:Zn ratio of 1:1:1.2. This is a band diagram of a configuration using a semiconductor film.

[0151] Furthermore, Figure 7(B) shows that silicon oxide films are used as insulating films 107 and 114, and oxide semiconductors As a body membrane 10⁸a, the atomic ratio of metal elements is In:Ga:Zn = 4:2:4.1 in a metal oxide. Using an oxide semiconductor film formed with a material target, the oxide semiconductor film 108b is used Using a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 1:1:1.2 This is a band diagram of a configuration using an oxide semiconductor film formed by [the process described above].

[0152] As shown in Figure 7(A), in the oxide semiconductor films 108a, 108b, and 108c, The energy level at the lower end of the guide band changes smoothly. Also, as shown in Figure 7(B), oxidation In the monosemiconductor films 108a and 108b, the energy levels at the lower edge of the conduction band change smoothly. In other words, it can be said that it changes continuously or connects continuously. In order to have a band structure, the boundary between oxide semiconductor film 108a and oxide semiconductor film 108b At the surface, or at the interface between the oxide semiconductor film 108c and the oxide semiconductor film 108a, Assume that there are no impurities that form defect levels, such as p-centers or recombination centers.

[0153] To form a continuous junction in oxide semiconductor films 108a, 108b, and 108c, load Each film is deposited using a multi-chamber type film deposition apparatus (sputtering apparatus) equipped with a locking chamber. It is necessary to continuously stack the materials without exposing them to the atmosphere.

[0154] By using the configuration shown in Figures 7(A) and 7(B), the oxide semiconductor film 108a forms a well. In a transistor using the above stacked structure, the channel region is an oxide semiconductor film 10 It can be seen that it is formed in 8a.

[0155] Furthermore, the boundary between the oxide semiconductor film 108a and the insulating film (insulating film 107 or insulating film 114) The trap levels that may be formed near the surface are provided by the oxide semiconductor films 108b and 108c. This results in a distance from the oxide semiconductor film 108a.

[0156] Furthermore, the trap level functions as a channel region in the conduction band of the oxide semiconductor film 108a. The energy levels at the edges (Ec) can be farther from the vacuum level, and electrons can enter the trap levels. This makes it easier for electrons to accumulate. The accumulation of electrons in the trap level causes negative fixed This results in an electric charge, and the transistor's threshold voltage shifts to the positive direction. Therefore, , the trap level is more true than the energy level (Ec) of the lower end of the conduction band of the oxide semiconductor film 108a. It is preferable to configure it so that it approaches the empty level. By doing so, the trap level This makes it more difficult for electrons to accumulate, and it is possible to increase the on-current of the transistor. This can increase the field effect mobility.

[0157] Furthermore, oxide semiconductor films 108b and 108c are located below the conduction band compared to oxide semiconductor film 108a. The edge energy levels are close to the vacuum level, typically in the conduction band of oxide semiconductor film 108a. The energy levels at the edge and the energy levels at the lower edge of the conduction band of the oxide semiconductor films 108b and 108c. The difference from the position is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV The following applies: the electron affinity of the oxide semiconductor films 108b and 108c, and the oxide semiconductor The difference with the electron affinity of the body membrane 108a is 0.15 eV or greater, or 0.5 eV or greater, and 2 It is less than or equal to eV, or less than 1 eV.

[0158] With this configuration, the oxide semiconductor film 108a becomes the main current path. In other words, oxide semiconductor film 108a has the function of a channel region, and oxide semiconductor film 1 08b and 108c function as oxide insulating films. Also, oxide semiconductor film 108 b and 108c are metal elements that constitute the oxide semiconductor film 108a in which the channel region is formed. Since it is an oxide semiconductor film composed of one or more types, the oxide semiconductor film 108c and oxide The interface with the semiconductor film 108a, or the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b At the interface, interfacial scattering is less likely to occur. Therefore, at the interface, carrier movement is Because it is not inhibited, the field-effect mobility of the transistor increases.

[0159] Furthermore, the oxide semiconductor films 108b and 108c function as part of the channel region. To prevent this, materials with sufficiently low conductivity shall be used. Therefore, oxide semiconductors Films 108b and 108c are also called oxide insulating films, based on their physical properties and / or functions. Alternatively, oxide semiconductor films 10⁸b and 10⁸c have electron affinity (vacuum level and conduction band). The difference from the lower energy level is smaller than that of the oxide semiconductor film 108a, and the energy at the lower end of the conduction band The energy level is the difference between the energy level of the lower end of the conduction band of the oxide semiconductor film 108a (band off). The material shall have a set. In addition, the drain voltage depends on the magnitude of the drain voltage. In order to suppress the occurrence of a difference in voltage values, the propagation of the oxide semiconductor films 108b and 108c The energy level at the lower end of the conduction band is different from the energy level at the lower end of the conduction band of the oxide semiconductor film 108a. It is preferable to use a material that is closer to the vacuum level. For example, the conductivity of the oxide semiconductor film 108b Energy levels at the bottom of the band and the energy at the bottom of the conduction band of oxide semiconductor films 108a and 108c - The difference from the level is preferably 0.2 eV or more, more preferably 0.5 eV or more.

[0160] Furthermore, the oxide semiconductor films 108b and 108c do not contain a spinel-type crystal structure within the film. It is preferable that the oxide semiconductor films 108b and 108c contain a spinel-type crystal structure. If included, at the interface between the spinel-type crystal structure and other regions, conductive films 112a, 11 In some cases, the constituent elements of 2b may diffuse into the oxide semiconductor film 108a. When conductive films 108b and 108c are CAAC-OS, the structure of conductive films 112a and 112b The blocking properties of constituent elements, such as copper, become higher, which is preferable.

[0161] The thickness of the oxide semiconductor films 108b and 108c depends on the constituent elements of the conductive films 112a and 112b. A film thickness greater than or equal to that which can suppress diffusion into the oxide semiconductor film 108a, and provides insulation. The film thickness is set to a level that suppresses the supply of oxygen from film 114 to oxide semiconductor film 108a. For example, If the thickness of the oxide semiconductor films 108b and 108c is 10 nm or more, the conductive film 112a, This can suppress the diffusion of constituent elements of 112b into the oxide semiconductor film 108a. Furthermore, if the thickness of the oxide semiconductor films 108b and 108c is 100 nm or less, the insulating film 114 This allows for effective oxygen supply to the oxide semiconductor film 108a.

[0162] Furthermore, in this embodiment, the oxide semiconductor films 108b and 108c are made of metal elements. The atomic ratio was formed using a metal oxide target with In:Ga:Zn = 1:1:1.2. Although examples have been given of configurations using an oxide semiconductor film, the system is not limited to this. For example, acid For the ionized semiconductor films 10⁸b and 10⁸c, the ratio of In:Ga:Zn is 1:1:1 [atomic ratio]. In:Ga:Zn = 1:3:2 [atomic ratio], In:Ga:Zn = 1:3:4 [atomic ratio] ], or using a metal oxide target with an atomic ratio of In:Ga:Zn=1:3:6 The resulting oxide semiconductor film may also be used.

[0163] Furthermore, the oxide semiconductor films 108b and 108c are defined as In:Ga:Zn=1:1:1 [original When using a metal oxide target with a specific [number of particles ratio], the oxide semiconductor films 108b and 108c are as follows: In some cases, In:Ga:Zn = 1:β1 (0 < β1 ≤ 2):β2 (0 < β2 ≤ 2) Furthermore, as oxide semiconductor films 108b and 108c, In:Ga:Zn=1:3:4[original When using a metal oxide target with a specific [number of particles ratio], the oxide semiconductor films 108b and 108c are as follows: In some cases, In:Ga:Zn = 1:β3 (1≦β3≦5):β4 (2≦β4≦6). Furthermore, as oxide semiconductor films 108b and 108c, In:Ga:Zn=1:3:6[original When using a metal oxide target with a specific [number of particles ratio], the oxide semiconductor films 108b and 108c are as follows: In some cases, In:Ga:Zn = 1:β5 (1≦β5≦5):β6 (4≦β6≦8) .

[0164] Furthermore, the oxide semiconductor film 108b of transistor 100 and transistor 100B The oxide semiconductor film 108b possessed by the conductive films 112a and 112b is shown in the drawing as being exposed to moisture. The oxide semiconductor film in the exposed region becomes thinner; in other words, a part of the oxide semiconductor film has a depression. The shape is illustrated as an example. However, one aspect of the present invention is not limited thereto, and the conductive film 11 The oxide semiconductor film in the region exposed from 2a and 112b does not need to have a recess. An example is shown in Figures 8(A) and 8(B). Figures 8(A) and 8(B) are cross-sectional views showing an example of a semiconductor device. Figure 8(A) shows the oxide semiconductor film 108b of the transistor 100 shown above. The structure does not have a recess, and Figure 8(B) shows the oxide semiconductor of transistor 100B shown above. The body membrane 108b has a structure that does not have a recess.

[0165] [Example of the configuration of the first transistor (modification 3)] Transistor 100C is provided with transistor 100 as shown above, and insulating films 114 and 116. The difference lies in the location where it is kicked and the fact that the insulating film 162 is provided. Regarding the other configurations, It is similar to the Rangista 100 and produces the same effect.

[0166] Transistor 100C has a conductive film 104 and insulating films 106 and 107 on the conductive film 104. , an oxide semiconductor film 108 on the insulating film 107, and an insulating film 114 on the oxide semiconductor film 108, 116, conductive films 112a and 112b on the insulating film 116, insulating film 116, and conductive film 1 The insulating film 162 on 12a and 112b, the oxide semiconductor film 120a on the insulating film 162, and It comprises a border film 162 and an insulating film 118 on an oxide semiconductor film 120a.

[0167] Furthermore, the conductive film 112a is transmitted through the openings 173a provided in the insulating films 114 and 116. , is electrically connected to the oxide semiconductor film 108. Also, the conductive film 112b is an insulating film 1 The oxide semiconductor film 108 is electrically connected through the openings 173b provided in 14 and 116. It continues.

[0168] The insulating film 162 is formed using the same materials and methods as insulating films 114 and 116. It is possible.

[0169] The transistor 100 shown in Figures 1(A)(B) and 2(A)(B) is a so-called channel energy In contrast to the switch-type transistor shown in Figures 9(A)(B) and 10(A)(B) Transistor 100C is a so-called channel-protected transistor. Transistor 1 can be either a channel-etched or channel-protected type. It can be applied to the standard. <1-4. Example of Semiconductor Device Configuration 3> Next, regarding configurations different from those shown in Figures 1(A)(B) and 2(A)(B), This will be explained using Figures 11 through 13.

[0170] Furthermore, Figure 11(A) shows a semiconductor device according to one aspect of the present invention, which includes a transistor 100 and Figure 11(B) is a top view of transistor 150A, and the dashed line shown in Figure 11(A) is shown in Figure 11(A). This corresponds to a cross-sectional view of the cross-section between X1 and X2. Also, Figure 13(A) is the same as Figure 11(A). This corresponds to a cross-sectional view of the section between Y3 and Y4 shown by the dashed line. Also, Figure 12(A) A semiconductor device according to one aspect of the present invention, comprising transistor 100 and transistor 150B This is a top view, and Figure 12(B) shows the cross-section between the dashed line X1-X2 shown in Figure 12(A). This corresponds to a cross-sectional view of a cross-section. Also, Figure 13(B) shows the dashed line Y3-Y shown in Figure 12(A). This corresponds to a cross-sectional view of the cross-section at 4 bays.

[0171] The semiconductor devices shown in Figures 11(A)(B) and 13(A) are the same as those shown in Figures 1(A)(B) and 13(A). The semiconductor device shown in Figures 2(A) and 2(B) has a transistor 150 instead of a transistor The configuration has 150A. Also, the semiconductor shown in Figures 12(A)(B) and 13(B) The device has transistors in the semiconductor device shown in Figures 1(A)(B) and 2(A)(B). This configuration uses a transistor 150B instead of a 150 transistor.

[0172] Therefore, the explanation of transistor 100, which was explained earlier, will be omitted below. This section provides details about the 150A transistor and the 150B transistor.

[0173] [Example configuration of the second transistor (modification 1)] The transistor 150A shown in Figures 11(A)(B) and 13(A) is located on substrate 102. The conductive film 104a, the substrate 102 and insulating films 106 and 107 on the conductive film 104a, and insulation Insulating films 114 and 116 on films 106 and 107, and channel region 120b on insulating film 116 Oxide semiconductor film 1 including _i, source region 120b_s, and drain region 120b_d 20b, the insulating film 152 on the channel region 120b_i, and the gate electrode on the insulating film 152. A conductive film 154 that functions as a source region 120b_s and a drain region 120b_ It has an insulating film 118 on d, and an insulating film 156 is provided on the insulating film 118. Furthermore, the insulating films 118 and 156 have an opening 171a that reaches the source region 120b_s. An opening 171b is provided that reaches the drain region 120b_d. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover a and 171b.

[0174] The conductive film 104a functions as the back gate electrode of the transistor 150A. Furthermore, openings are provided in the insulating films 106, 107, 114, 116, and 152, and through these openings The conductive film 104a and the conductive film 154 may be electrically connected.

[0175] Thus, transistor 150A provides back gate power to transistor 150 as shown above. The configuration includes a conductive film 104a that functions as an electrode. It is formed by processing the same conductive film as 04. Therefore, without increasing the manufacturing process, conductive This makes it possible to form film 104a.

[0176] [Example configuration of the second transistor (modification 2)] The transistor 150B shown in Figures 12(A)(B) and 13(B) is located on substrate 102. The insulating films 106 and 107, the conductive film 112c on the insulating film 107, and Insulating films 114 and 116 on the film 112c, and channel region 120b_i on the insulating film 116 The oxide semiconductor film 120 includes a source region 120b_s and a drain region 120b_d. b, an insulating film 152 on the channel region 120b_i, and a gate electrode on the insulating film 152 A conductive film 154 that functions in the source region 120b_s and drain region 120b_d It has an insulating film 118 and a further insulating film 156 provided on the insulating film 118. Furthermore, the insulating films 118 and 156 have an opening 171a that reaches the source region 120b_s, and An opening 171b is provided that reaches the rain region 120b_d. Also, opening 171a, Conductive films 158a and 158b are provided on the insulating film 156 so as to cover 171b.

[0177] The conductive film 112c functions as the back gate electrode of the transistor 150B. Furthermore, openings are provided in the insulating films 114, 116, and 152, and the conductive film 112 is provided through these openings. c and the conductive film 154 may be electrically connected.

[0178] Thus, transistor 150B provides back gate power to transistor 150 as shown above. The configuration includes a conductive film 112c that functions as an electrode. The conductive film 112c is a conductive film 1 It is formed by processing the same conductive film as 12a and 112b. Therefore, the manufacturing process is increased. This makes it possible to form the conductive film 112c without doing so.

[0179] Furthermore, the transistor according to this embodiment can be freely combined with each of the above structures. It is possible to do so.

[0180] <1-5. Method for fabricating semiconductor devices> Next, transistor 100 and transistor 15, which are semiconductor devices according to one aspect of the present invention. The method for producing 0 will be explained using Figures 14 to 22. This is a cross-sectional view in the channel length direction, showing a method for fabricating a semiconductor device.

[0181] First, a conductive film is formed on the substrate 102, and the conductive film is subjected to a lithography process and an etching process. The process is carried out to form a conductive film 104 that functions as the first gate electrode. Insulating films 106 and 107, which function as the first gate insulating film, are formed on the film 104 (Figure 14(A)).

[0182] In this embodiment, a glass substrate is used as the substrate 102 and functions as the first gate electrode. As the conductive film 104, a tungsten film with a thickness of 100 nm is formed by sputtering. Furthermore, a silicon nitride film with a thickness of 400 nm is used as the insulating film 106 by the PECVD method. A silicon oxidizride film with a thickness of 50 nm is formed as insulating film 107 by the PECVD method. To form.

[0183] Furthermore, the insulating film 106 can be a laminated structure of silicon nitride films. The insulating film 106 is made of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. A three-layer laminated structure with a silicon film can be formed. An example of this three-layer laminated structure is as follows: It can be formed in this way.

[0184] For example, the first silicon nitride film is silane at a flow rate of 200 sccm, and silane at a flow rate of 2000 sccm. PE-CV uses sccm of nitrogen and ammonia gas at a flow rate of 100 sccm as raw material gases. It supplies power to the reaction chamber of apparatus D, controls the pressure inside the reaction chamber to 100 Pa, and uses a high frequency of 27.12 MHz. If you supply 2000W of power using a frequency power supply and form it to a thickness of 50nm, good.

[0185] The second silicon nitride film was a silane at a flow rate of 200 sccm, and a flow rate of 2000 sccm Nitrogen and ammonia gas at a flow rate of 2000 sccm are used as raw material gases in a PECVD apparatus. A 27.12 MHz high-frequency power supply is supplied to the reaction chamber, controlling the pressure inside the chamber to 100 Pa. By supplying 2000W of power using this method, the material can be formed to a thickness of 300nm.

[0186] The third silicon nitride film is a silane at a flow rate of 200 sccm, and a silane at a flow rate of 5000 sccm. A nitrogen atom at a concentration of 1 cm is supplied as a raw material gas to the reaction chamber of the PECVD apparatus, and the pressure inside the reaction chamber is set to 100. It is controlled to Pa and supplied with 2000W of power using a 27.12MHz high-frequency power supply, It should be formed so that the depth is 50 nm.

[0187] Furthermore, the first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during formation can be kept below 350°C.

[0188] By making the insulating film 106 a three-layer laminated structure of silicon nitride films, for example, conductive film 10 When a conductive film containing copper (Cu) is used in step 4, the following effects are achieved.

[0189] The first silicon nitride film suppresses the diffusion of copper (Cu) elements from the conductive film 104. Yes, it is possible. The second silicon nitride film has the function of releasing hydrogen and functions as a gate insulating film. The dielectric strength of the insulating film can be improved. The third silicon nitride film is the third silicon nitride Low hydrogen release from the first film, and diffusion of hydrogen released from the second silicon nitride film. It can be suppressed.

[0190] The insulating film 107 is an oxide semiconductor film 108 that will be formed later (more specifically, an oxide To improve the interfacial properties with the semiconductor film 108b), an insulating film containing oxygen is formed. preferable.

[0191] Next, oxide semiconductor film 108a_0 and oxide semiconductor film 108b_0 are placed on insulating film 107. It forms (see Figures 14(B) and 15(A)).

[0192] Figure 14(B) shows the process of forming an oxide semiconductor film 108a_0 on an insulating film 107. This is a schematic cross-sectional view of the inside of a film deposition apparatus. In Figure 14(B), a sputtering apparatus is used as the film deposition apparatus. Using a device, the target 191 installed inside the sputtering apparatus and target 1 A schematic representation shows plasma 192 formed below 91.

[0193] First, when forming the oxide semiconductor film 108a_0, in an atmosphere containing a first oxygen gas Plasma is discharged. At that time, the insulating film that will form the oxide semiconductor film 108a_0 is discharged. Oxygen is added to 107. Also, when forming the oxide semiconductor film 108a_0, In addition to oxygen gas (1), an inert gas (e.g., helium gas, argon gas, xenon gas) is also used. (and so on) may be mixed together.

[0194] The first oxygen gas is included at least when forming the oxide semiconductor film 108a_0. It is sufficient that the first part of the total film deposition gas when forming the oxide semiconductor film 108a_0 is present. The proportion of oxygen gas is more than 0% and less than or equal to 100%, preferably 10% to 100%. More preferably, the percentage is between 30% and 100%.

[0195] In Figure 14(B), the oxygen or excess oxygen added to the insulating film 107 is schematically represented. This is represented by a dashed arrow.

[0196] Note that the substrate temperature during the formation of oxide semiconductor film 108a_0 and oxide semiconductor film 108b_0 The degrees may be the same or different. However, the oxide semiconductor film 108a_0 and the oxide semiconductor film By keeping the substrate temperature the same as that of the conductive film 108b_0, manufacturing costs can be reduced. It is suitable for this purpose.

[0197] For example, when depositing oxide semiconductor films 108a_0 and 108b_0 The substrate temperature is preferably above room temperature and below 340°C, more preferably above room temperature and below 300°C. The temperature is preferably between 100°C and 250°C, and more preferably between 100°C and 200°C. The oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 are heated to form the film. This enhances the crystallinity of the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0. This is possible. On the other hand, as the substrate 102, a large glass substrate (for example, a 6th generation or later) When using the 10th generation, oxide semiconductor film 108a_0 and oxide semiconductor film 108b_0 When the substrate temperature during film formation is set to 150°C or higher and less than 340°C, the substrate 102 deforms. It may warp or bend. Therefore, when using large glass substrates, Substrate temperature during film deposition of oxide semiconductor film 108a_0 and oxide semiconductor film 108b_0 By keeping the temperature between 100°C and 150°C, deformation of the glass substrate can be suppressed.

[0198] Furthermore, it is necessary to increase the purity of the sputtering gas. For example, as a sputtering gas The oxygen gas or argon gas used has a dew point of -40°C or lower, preferably -80°C or lower. A gas that has been purified to a temperature of -100°C or lower, more preferably -120°C or lower. By using this method, it is possible to prevent moisture and other substances from being incorporated into the oxide semiconductor film as much as possible. .

[0199] Furthermore, when depositing an oxide semiconductor film by sputtering, in the sputtering apparatus... The chamber is designed to remove as much water and other impurities as possible from the oxide semiconductor film. Using an adsorption-type vacuum pump such as an IO pump to create a high vacuum (5 × 10⁻¹⁰ -7 Pa to 1× 10 -4It is preferable to exhaust the gas (to about Pa). Alternatively, use a turbomolecular pump and cold By combining traps, gases, especially those containing carbon or hydrogen, enter the chamber from the exhaust system. It is preferable to prevent backflow.

[0200] Furthermore, after the oxide semiconductor film 108a_0 is formed, the oxide semiconductor film 108b _0 is formed on the oxide semiconductor film 108a_0. Note that the oxide semiconductor film 108b_ During the formation of 0, the plasma can be discharged in an atmosphere containing a second oxygen gas.

[0201] Furthermore, the proportion of the first oxygen gas when forming the oxide semiconductor film 108a_0 and the oxide semiconductor film... The proportion of the second oxygen gas used when forming the conductive film 108b_0 may be the same or different. For example, the second acid in the entire deposition gas when forming an oxide semiconductor film 108b_0 The proportion of the elemental gas should be greater than 0% and less than or equal to 100%, preferably between 10% and 100%. More preferably, it is between 30% and 100%.

[0202] Furthermore, when forming the oxide semiconductor film 108b_0, a second oxygen gas and argon gas are used. When using this method, it is preferable to have a higher flow rate of argon gas than the flow rate of the second oxygen gas. By increasing the flow rate of argon gas, the oxide semiconductor film 108b_0 can be made into a dense film. This is possible. In addition, in order to make the oxide semiconductor film 108b_0 a dense film, the base during formation is The substrate temperature should be increased. Typically, the temperature should be 250°C or lower, preferably between 150°C and 190°C. When the semiconductor film 108b_0 is a dense film, the gold contained in the conductive films 112a and 112b This can suppress the penetration of group elements into the oxide semiconductor film 108a_0.

[0203] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: Using a 2:4.1 [atomic ratio], an oxide semiconductor film 108a_ was produced by sputtering. A 0 is formed, and then in a vacuum, the In-Ga-Zn metal oxide target (In: Using Ga:Zn=1:1:1.2 (atomic ratio), oxide semiconductors are produced by sputtering. A conductive film 108b_0 is formed. Also, the substrate temperature during the formation of the oxide semiconductor film 108a_0 The temperature is set to 170°C, and the substrate temperature during the formation of the oxide semiconductor film 108b_0 is set to 170°C. Furthermore, the deposition gas used during the formation of the oxide semiconductor film 108a_0 was oxygen at a flow rate of 60 sccm. A gas and argon gas at a flow rate of 140 sccm are used. Also, an oxide semiconductor film 108 The film-forming gas used during the formation of b_0 is oxygen gas at a flow rate of 100 sccm, and at a flow rate of 100 sc Use cm of argon gas and

[0204] Next, the oxide semiconductor films 108a_0 and 108b_ are processed into the desired shapes. This process forms island-shaped oxide semiconductor films 108a and island-shaped oxide semiconductor films 108b. (See Figure 15(B)).

[0205] Next, a conductive film is formed on the insulating film 107 and the oxide semiconductor film 108, and the conductive film is desired By processing the material into this shape, conductive films 112a and 112b are formed (see Figure 16(A)).

[0206] In this embodiment, the conductive films 112a and 112b are tungsten films with a thickness of 50 nm. A laminated film consisting of a 400nm thick aluminum film and a similar film is then processed by sputtering. The film is then formed. In this embodiment, the conductive films 112a and 112b consist of two layers. Although a layered structure was used, the structure is not limited to this. For example, the conductive films 112a and 112b may have different thicknesses. A tungsten film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a film with a thickness of 100 nm A three-layer laminated structure in which a titanium film is sequentially stacked may also be used.

[0207] Furthermore, after the formation of conductive films 112a and 112b, the oxide semiconductor film 108 (more specifically) The surface (back channel side) of the oxide semiconductor film 108b) may be cleaned. For example, this can be done by washing with an etchant such as an aqueous phosphoric acid solution. Furthermore, impurities adhering to the surface of the oxide semiconductor film 108b (for example, conductive films 112a, 112 It is possible to remove elements (such as those contained in b). However, it is not always necessary to perform this cleaning. In some cases, cleaning may not be necessary.

[0208] Furthermore, either the step of forming conductive films 112a and 112b, or the cleaning step described above, In both cases, the region exposed from the conductive film 112a, 112b of the oxide semiconductor film 108. However, it may become thinner.

[0209] Next, insulating films 107, oxide semiconductor film 108, and conductive films 112a and 112b are placed on the insulating film 107, oxide semiconductor film 108, and conductive films 112a and 112b. Film 114 and insulating film 116 are formed (see Figure 16(B)).

[0210] Furthermore, after forming the insulating film 114, the insulating film 116 is formed continuously without exposure to the atmosphere. It is preferable to do so. After forming the insulating film 114, do not open it to the atmosphere, and control the flow rate, pressure, and high of the raw material gas. By adjusting the frequency power and substrate temperature to one or more units, the insulating film 116 is formed continuously, The concentration of impurities originating from atmospheric components at the interface between the edge film 114 and the insulating film 116 is reduced. In addition, oxygen contained in the insulating films 114 and 116 is transferred to the oxide semiconductor film 108. This makes it possible to reduce the amount of oxygen vacancies in the oxide semiconductor film 108. .

[0211] For example, a silicon oxide nitride film is formed as the insulating film 114 using the PECVD method. This is possible. In this case, the raw material gases include a silicon-containing sedimentary gas and an oxidizing gas. It is preferable to use [a specific type of gas]. Typical examples of silicon-containing sedimentary gases include silane and disila. Examples include nitrates, trisilanes, and silane fluorides. Oxidizing gases include nitrous oxide and nitrogen dioxide. There are elements such as [unclear]. Also, the flow rate of the oxidizing gas is greater than 20 times the flow rate of the sedimentary gas mentioned above. The pressure should be less than 100 times, preferably between 40 and 80 times, and the pressure inside the processing chamber should be less than 100 Pa. By using a PECVD method with a pressure of full, preferably 50 Pa or less, the insulating film 114 is treated with nitrogen This results in an insulating film that contains and has a low defect rate.

[0212] In this embodiment, the insulating film 114 is set to a temperature of 220°C for holding the substrate 102. The raw materials are silane at a flow rate of 50 sccm and nitrous oxide at a flow rate of 2000 sccm. The pressure inside the processing chamber is set to 20 Pa, and the high-frequency power supplied to the parallel plate electrodes is 13.56 MHz. Hz, 100W (power density is 1.6 × 10⁻⁶) -2 W / cm 2 The PECVD method is used as follows: A silicon oxide nitride film is formed using this method.

[0213] As the insulating film 116, the substrate placed in the vacuum-evacuated processing chamber of the PECVD apparatus Maintain the temperature between 180°C and 350°C, introduce the raw material gas into the processing chamber, and adjust the pressure within the processing chamber. The pressure is set to 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less. , 0.17 W / cm² is applied to the electrode installed in the processing chamber. 2 More than 0.5W / cm 2 Below, further better The current level is 0.25 W / cm². 2 More than 0.35W / cm 2 The following conditions apply to supplying high-frequency power: This then forms a silicon oxide film or a silicon oxide-nitride film.

[0214] As for the film deposition conditions for the insulating film 116, the above pressure is used in the reaction chamber and the above power density is used in the high-frequency current By supplying power, the decomposition efficiency of the raw material gas in the plasma increases, and the amount of oxygen radicals increases. As the oxidation of the raw material gas progresses, the oxygen content in the insulating film 116 becomes less than the stoichiometric composition. The number also increases. On the other hand, in films formed at the above temperature, the bonding force between silicon and oxygen Because the bond is weak, some of the oxygen in the film is removed by the subsequent heat treatment. As a result, stoichiometric An oxide containing more oxygen than the theoretically required oxygen composition, with some of the oxygen being removed upon heating. An insulating film can be formed.

[0215] Furthermore, in the process of forming the insulating film 116, the insulating film 114 protects the oxide semiconductor film 108. It forms a film. Therefore, while reducing damage to the oxide semiconductor film 108, the power density is The insulating film 116 can be formed using high-frequency power.

[0216] Furthermore, in the film formation conditions for the insulating film 116, silicon-containing deposition gas against oxidizing gas By increasing the flow rate of the material, it is possible to reduce the amount of defects in the insulating film 116. ESR measurement revealed that g=2.001 originates from the dangling bond of silicon. The spin density of the signal is 6 × 10 17 spins / cm 3 Less than 3 × 10 17 spins / cm 3 The following is preferably 1.5 × 10 17 spins / cm 3 The following is missing It is possible to form an oxide insulating film with fewer depressions. As a result, the signal of transistor 100 It can enhance reliability.

[0217] Furthermore, after forming the insulating films 114 and 116, a heat treatment (hereinafter referred to as the first heat treatment) is performed. It is preferable to perform the following. The first heat treatment removes nitrogen acid contained in the insulating films 114 and 116. The amount of oxidized material can be reduced by the first heat treatment. Some of the oxygen contained in the oxide semiconductor film 108 is transferred to the oxide semiconductor film 108. This can reduce the amount of oxygen deficiency.

[0218] The temperature of the first heat treatment is typically less than 400°C, preferably less than 375°C, and Preferably, the temperature is 150°C to 350°C. The first heat treatment involves nitrogen, oxygen, and superdry Dry air (water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb) The procedure can be carried out under the atmosphere of air or a noble gas (argon, helium, etc.). Preferably, the above nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. For heat treatment, electric furnaces, RTA (Rapid Thermal Annealing), etc. are used. It is possible.

[0219] Next, an oxide semiconductor film 120 is formed on the insulating film 116 (see Figures 17(A) and 17(B)). .

[0220] Figure 17(A) shows the film formation process when forming an oxide semiconductor film 120 on an insulating film 116. This is a schematic cross-sectional view of the inside of the apparatus. In Figure 17(A), a sputtering apparatus is used as the film deposition apparatus. The sputtering apparatus uses a target 193 installed inside the sputtering apparatus, and the target 193 A plasma 194 formed below is schematically represented.

[0221] First, when forming the oxide semiconductor film 120, a third oxygen gas is used in the atmosphere. A discharge is made. At that time, in the insulating film 116 which will be the surface to be formed on the oxide semiconductor film 120, Oxygen is added. Also, when forming the oxide semiconductor film 120, in addition to the third oxygen gas by mixing in an inert gas (for example, helium gas, argon gas, xenon gas, etc.) This is also acceptable. For example, using argon gas and a third oxygen gas, the flow rate of the argon gas is different from It is also preferable to increase the flow rate of the third oxygen gas. Then, oxygen can be suitably added to the insulating film 116. One example is an oxide semiconductor film. The formation conditions for 120 are that the proportion of the third oxygen gas in the total film deposition gas is 50% or more. It should be 100% or less, preferably between 80% and 100%.

[0222] In Figure 17(A), the oxygen or excess oxygen added to the insulating film 116 is schematically represented. This is represented by a dashed arrow.

[0223] Furthermore, the substrate temperature when depositing the oxide semiconductor film 120 should be between room temperature and less than 340°C. Preferably, room temperature or higher and 300°C or lower, more preferably 100°C or higher and 250°C or lower, further Preferably, the temperature is between 100°C and 200°C. The oxide semiconductor film 120 is heated to form the film. This makes it possible to improve the crystallinity of the oxide semiconductor film 120. On the other hand, as the substrate 102 Therefore, when using large glass substrates (for example, 6th to 10th generation), oxide semiconductors When the substrate temperature during film deposition of film 120 is set to 150°C or higher and less than 340°C, the substrate 102 It may deform (warp or bend). Therefore, when using large glass substrates... Therefore, the substrate temperature when depositing the oxide semiconductor film 120 is set to 100°C or higher and less than 150°C. This makes it possible to suppress deformation of the glass substrate.

[0224] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: Using a 2:4.1 [atomic ratio], an oxide semiconductor film 120 was formed by sputtering. The substrate temperature during the formation of the oxide semiconductor film 120 is set to 170°C. Oxygen gas at a flow rate of 100 sccm is used as the deposition gas when forming the semiconductor film 120. .

[0225] As the oxide semiconductor film 120, for example, the oxide semiconductor film described above (for example, In: Ga:Zn=1:1:1[atomic ratio], In:Ga:Zn=1:3:2[atomic ratio], I n:Ga:Zn=1:3:4[atomic ratio], In:Ga:Zn=1:3:6[atomic ratio] In:Ga:Zn = 3:1:2 [atomic ratio], In:Ga:Zn = 4:2:3 [atomic ratio] You may also use [ratio], etc.

[0226] Next, the oxide semiconductor film 120 is processed into a desired shape to form an island-shaped oxide semiconductor film 1 20a and island-shaped oxide semiconductor films 120b are formed (see Figure 18(A)).

[0227] Next, insulating film 152_0 is applied to insulating film 116 and oxide semiconductor films 120a and 120b. , a conductive film 154_0 and are formed (see Figure 18(B)).

[0228] The insulating film 152_0 is one of the insulating films 106, 107 or insulating films 114, 11 A similar insulating film to that in 6 can be formed. In this embodiment, as insulating film 152_0 Then, a silicon oxidizride film with a thickness of 100 nm is formed using a PECVD apparatus.

[0229] Furthermore, the conductive film 154_0 may be the conductive film 104 shown above, or conductive film 112a, 1 A conductive film similar to 12b can be formed. In this embodiment, conductive film 154_0 As such, using a sputtering apparatus, a tantalum nitride film with a thickness of 30 nm and a film with a thickness of 150 nm Forms a tungsten film of m.

[0230] Next, a mask 195 is formed on the desired region of the conductive film 154_0 (see Figure 19(A)). ).

[0231] For mask 195, an organic resin film such as a resist is formed using a spin coater or the like. That's all you need to do.

[0232] Next, the conductive film 154_0 and the insulating film 152_0 are processed using the mask 195. And so, an insulating film 152 superimposed on the oxide semiconductor film 120b, and a conductive film 1 on the insulating film 152 54 is formed (see Figure 19(B)).

[0233] Furthermore, there are no particular limitations on the processing method for the conductive film 154_0 and the insulating film 152_0. Either a wet etching method or a dry etching method can be used.

[0234] Next, insulating film 116, oxide semiconductor film 120a, oxide semiconductor film 120b, and conductive film An insulating film 118 is formed on 154. Note that by forming the insulating film 118, the insulating film 11 The carrier density of the oxide semiconductor film 120a in contact with 8 increases, and the transistor 100 forms This is achieved. Furthermore, by forming the insulating film 118, the oxide semiconductor film 120b and the insulating film 11 The regions that are in contact with 8 become the source region 120b_s and the drain region 120b_d. This forms transistor 150 (see Figure 20(A)).

[0235] The insulating film 118 contains either hydrogen or nitrogen, or both. For example, a silicon nitride film is preferable. Also, as the insulating film 118, for example For example, it can be formed using the sputtering method or the PECVD method. When depositing the edge film 118 by PECVD, the substrate temperature should be less than 400°C, preferably 375°C. The temperature is less than ℃, more preferably 180℃ or higher and 350℃ or lower. It is preferable to set the substrate temperature within the above-mentioned range, as this allows for the formation of a dense film. By setting the substrate temperature when depositing the insulating film 118 to the above range, the insulating film 114, 1 This makes it possible to transfer oxygen or excess oxygen from 16 to the oxide semiconductor film 108.

[0236] In this embodiment, the insulating film 118 is a silicon nitride film with a thickness of 100 nm. This is formed using a PECVD apparatus.

[0237] Furthermore, when forming a silicon nitride film as the insulating film 118 by the PECVD method, It is preferable to use a sedimentary gas containing nitrogen, nitrogen, and ammonia as raw material gases. By using a small amount of ammonia compared to the original, the ammonia dissociates in the plasma and becomes active. Seeds are generated. These active species bond silicon and hydrogen contained in the silicon-containing sedimentary gas. It breaks the triple bond between silicon and nitrogen. As a result, the bonding between silicon and nitrogen is promoted, It forms a dense silicon nitride film with fewer silicon and hydrogen bonds and fewer defects. Yes, it is possible. On the other hand, if the amount of ammonia relative to nitrogen is high, the sedimentary gas containing silicon and nitrogen The decomposition of the elements did not proceed, and silicon and hydrogen bonds remained, resulting in an increase in defects and a rough texture. A silicon nitride film is formed. For these reasons, in the raw material gas, ammonia It is preferable to set the nitrogen flow rate ratio to 5 to 50 times, or 10 to 50 times.

[0238] Furthermore, after forming the insulating film 118, a heat treatment equivalent to the first heat treatment described above (hereinafter referred to as the first heat treatment) is performed. (The heat treatment described in 2 may also be performed.) In this way, when forming the oxide semiconductor film 120 After adding oxygen to the insulating film 116, the temperature is lowered to less than 400°C, preferably less than 375°C, and further... Preferably, the insulating film 116 is heated at a temperature of 180°C to 350°C. Transfer of oxygen or excess oxygen into the oxide semiconductor film 108 (particularly oxide semiconductor film 108b) This allows for the elimination of oxygen vacancies in the oxide semiconductor film 108.

[0239] Next, an insulating film 156 is formed on the insulating film 118 (see Figure 20(B)).

[0240] As the insulating film 156, a material that can be used for the insulating films 114 and 116 described above may be used. It is fine to use it. In this embodiment, as the insulating film 156, a PECVD apparatus is used. A silicon oxide-nitride film with a thickness of 400 nm is formed.

[0241] Next, the insulating film 118 and 156 are in the source region 120b_s of the oxide semiconductor film 120b. The opening 171a reaches the drain region 120b_d of the oxide semiconductor film 120b. Opening 171b is formed (see Figure 21(A)).

[0242] The method for forming openings 171a and 171b is not particularly limited to a wet etching method. Dry etching or similar methods can be used.

[0243] Next, a conductive film 158_0 is applied on the insulating film 156 so as to cover the openings 171a and 171b. Form (see Figure 21(B)).

[0244] The conductive film 158_0 is used for conductive film 104 and conductive films 112a and 112b. Any material that can do this should be used. In this embodiment, the conductive film 158_0 is S Using a puttering device, a 50nm thick titanium film and a 400nm thick aluminum film are formed. A film and a titanium film with a thickness of 100 nm are formed.

[0245] Next, by processing the conductive film 158_0 into the desired shape, conductive films 158a and 158b are obtained. Form (see Figure 22).

[0246] In the above process, transistor 100 and transistor 150 shown in Figures 1(A) and 1(B) are obtained. These can be formed on the same substrate.

[0247] Furthermore, in the manufacturing process of transistors 100 and 150, the substrate temperature is Less than 400°C, preferably less than 375°C, and more preferably 180°C to 350°C. This significantly reduces substrate deformation (distortion or warping) even when using large-area substrates. This is preferable because it allows for this.

[0248] <1-6. Semiconductor device configuration example 4> Next, a semiconductor device according to one aspect of the present invention will be described in a configuration different from the one described above. Here, transistors 100 and 150 are manufactured using the same process. Capacitive elements that can be fabricated will be explained using Figures 23 and 24. Note that Figure 23(A Figures 24(A), (B), and (C) are cross-sectional views illustrating a semiconductor device, and Figures 24(A), (B), and (C) are, This is a cross-sectional view illustrating a semiconductor device. Also, the semiconductor devices shown in Figures 23 and 24 are a pair. This is a so-called multilayer capacitive element in which a dielectric film is sandwiched between electrodes.

[0249] The capacitance element shown in Figure 23(A) consists of a conductive film 104b on the substrate 102 and the substrate 102 and the conductive film. insulating films 106 and 107 on the insulating film 104b, conductive film 112d on the insulating film 107, insulating film The conductive film 1 has 107 and insulating films 114, 116, and 118 on the conductive film 112d. 04b is formed by processing the same conductive film as conductive film 104. Also, conductive film 112 d is formed by processing the same conductive film as conductive films 112a and 112b. Figure 23(A The capacitive element shown in the image has a pair of electrodes, one of which is a conductive film 104b and the other is a conductive film 112d Furthermore, insulating films 106 and 107 function as dielectric films for the capacitive element.

[0250] The capacitance element shown in Figure 23(B) consists of a conductive film 104b on the substrate 102 and the substrate 102 and the conductive film. Insulating films 106, 107, 114, and 116 on film 104b, and oxide semiconductor on insulating film 116 It comprises a conductive film 120c, an insulating film 116, and an insulating film 118 on the oxide semiconductor film 120c. The oxide semiconductor film 120c is the same oxide semiconductor film as oxide semiconductor films 120a and 120b. It is formed by processing a body membrane. The capacitive element shown in Figure 23(B) has one of a pair of electrodes One is a conductive film 104b, and the other is an oxide semiconductor film 120c. Also, insulating films 106, 1 07, 114, and 116 function as dielectric films for the capacitive elements.

[0251] The capacitive element shown in Figure 23(C) consists of insulating films 106 and 107 on the substrate 102, and insulating film 10 7 The conductive film 112e, the insulating film 107, and the insulating films 114, 116 on the conductive film 112e The oxide semiconductor film 120c on the insulating film 116, and the insulating film 116 and the oxide semiconductor film 12 It has an insulating film 118 on 0c, and the conductive film 112e is the same as conductive films 112a and 112b. It is formed by processing a conductive film. The capacitive element shown in Figure 23(C) is formed by one of a pair of electrodes. One side is a conductive film 112e, and the other side is an oxide semiconductor film 120c. Also, insulating film 114 , 116 functions as the dielectric film of the capacitive element.

[0252] The capacitance element shown in Figure 24(A) consists of a conductive film 104b on the substrate 102 and the substrate 102 and the conductive film. Insulating films 106, 107, 114, 116, 118, 156 on film 104b, and insulating film 1 56 has a conductive film 158c on it. The conductive film 158c is made up of conductive films 158a and 158b. It is formed by processing the same conductive film. The capacitive element shown in Figure 24(A) is a pair of electrodes One is a conductive film 104b, and the other is a conductive film 158c. Also, insulating films 106, 10 Numbers 7, 114, 116, 118, and 156 function as dielectric films for the capacitive elements.

[0253] The capacitive element shown in Figure 24(B) consists of insulating films 106 and 107 on the substrate 102, and insulating film 10 7 The conductive film 112e on the conductive film 107 and the insulating films 114, 116 on the conductive film 112e, It has 118, 156 and a conductive film 158c on the insulating film 156. As shown in Figure 24(B). In the capacitive element, one of the pair of electrodes is a conductive film 112e, and the other is a conductive film 158c. Furthermore, insulating films 114, 116, 118, and 156 function as dielectric films for the capacitive elements.

[0254] The capacitive element shown in Figure 24(C) consists of insulating films 106, 107, 114, and 11 on the substrate 102. 6, an oxide semiconductor film 120c on the insulating film 116, and the insulating film 116 and the oxide semiconductor film 1 It has insulating films 118 and 156 on 20c, and a conductive film 158c on insulating film 156. The capacitive element shown in 24(C) has an oxide semiconductor film 120c on one side of a pair of electrodes, and the other side This is the conductive film 158c. In addition, the insulating films 118 and 156 function as dielectric films of the capacitive element. do.

[0255] Note that the capacitive elements shown in Figures 23 and 24 include, for example, those stacked with transistors. This reduces the area occupied by the capacitive element. The capacitive element and the transistor are stacked. An example of this is shown in Figure 25. Figure 25 is a diagram illustrating a cross-section of a semiconductor device.

[0256] The semiconductor device shown in Figure 25 consists of the capacitive element shown in Figure 23(A) and the transistor 1 shown earlier. 50 and are stacked in this configuration. Thus, the transistor according to one aspect of the present invention has a capacitance element It may also be used in stacked form with various other elements. Furthermore, the capacitive elements shown in Figures 23 and 24 However, the lower electrode of the pair of electrodes is smaller than the upper electrode of the pair. However, this is not limited to cases where the lower electrode of a pair of electrodes is larger than the upper electrode of the pair. It can also be used as a composition.

[0257] In this embodiment, one aspect of the present invention has been described. Or, other embodiments may be described. In this context, one aspect of the present invention will be described. However, this aspect of the present invention is not limited to these. Not done. In other words, various aspects of the invention are described in this embodiment and other embodiments. Therefore, one aspect of the present invention is not limited to a specific aspect. For example, one aspect of the present invention For example, the channel formation region and source / drain region of a transistor are made of oxide semiconductor material. While examples of cases where this is the case have been shown, one aspect of the present invention is not limited thereto. In some cases, Alternatively, depending on the situation, various transistors, transistors, etc. in one aspect of the present invention Channel formation regions, or the source and drain regions of transistors, contain various semiconductor materials. It may be done. Depending on the circumstances, or depending on the situation, various aspects of one aspect of the present invention may be used. A transistor, the channel formation region of a transistor, or the source-drain region of a transistor. Examples of materials in the ion region include silicon, germanium, silicon germanium, and silicon carbide. , gallium arsenide, aluminum gallium arsenide, indium phosphide, gallium nitride, or It may have at least one of the following: an organic semiconductor, or for example, in some cases , or, depending on the situation, various transistors in one aspect of the present invention, transistors The channel formation region, or the source and drain regions of a transistor, etc., are made of oxide semiconductors. It is not necessary to have it.

[0258] The configuration shown in this embodiment can be used in appropriate combination with other embodiments. Cut.

[0259] (Embodiment 2) In this embodiment, the structure of the oxide semiconductor, etc., will be discussed with reference to Figures 26 to 30. I will explain.

[0260] <2-1. Structure of Oxide Semiconductors> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It is possible. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Solid semiconductor, nc-OS (nanocrystalline oxide semiconductor) ductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- (like oxide semiconductors) and amorphous oxide semiconductors, etc. be.

[0261] From another perspective, oxide semiconductors include amorphous oxide semiconductors and other crystalline oxides. Semiconductors can be divided into two categories. Crystalline oxide semiconductors include single-crystal oxide semiconductors and CAAC. Examples include -OS, polycrystalline oxide semiconductors, and nc-OS.

[0262] Amorphous structures are generally isotropic and lack heterogeneity; they are metastable states with a specific arrangement of atoms. The position is not fixed, the connection angle is flexible, and it has short-range order but not long-range order. It is said that there isn't one.

[0263] Conversely, stable oxide semiconductors can be made into completely amorphous (completely amorphous) semiconductors. It cannot be called an oxide semiconductor (orphous). Also, it is not isotropic (for example, in a very small region). Oxide semiconductors that have a periodic structure cannot be called perfectly amorphous oxide semiconductors. On the other hand, a-like OSs are not isotropic but are unstable due to their porous (also called void) structure. It has such a structure. In terms of being unstable, a-like OS is an amorphous oxide in terms of its physical properties. It's similar to a semiconductor.

[0264] <2-2.CAAC-OS> First, let me explain CAAC-OS.

[0265] CAAC-OS is an oxide having multiple c-axis oriented crystalline portions (also called pellets). It is a type of semiconductor.

[0266] CAAC-OS was analyzed by X-ray diffraction (XRD). Let's explain the case of analysis. For example, InGaZnO4, which is classified as having the space group R-3m. Structural analysis was performed on CAAC-OS, which has crystals, using the out-of-plane method. Then, as shown in Figure 26(A), a peak appears near 31° at the diffraction angle (2θ). The mark is attributed to the (009) plane of the InGaZnO4 crystal, therefore CAAC-OS Therefore, the crystal has c-axis orientation, and the c-axis is the surface that forms the CAAC-OS film (also known as the film-forming surface). It can be confirmed that it is facing in a direction approximately perpendicular to the upper surface. Note that 2θ is 31 In addition to the peak near °, a peak may also appear when 2θ is near 36°. The nearby peaks are due to a crystal structure classified as space group Fd-3m. Therefore, CAA It is preferable that C-OS does not exhibit this peak.

[0267] On the other hand, for CAAC-OS, in-pl X-rays are incident from a direction parallel to the surface being formed. Structural analysis using the ANE method reveals a peak near 2θ = 56°. This peak is... It is attributed to the (110) plane of the InGaZnO4 crystal. And 2θ is fixed near 56°. Then, the sample is rotated around the normal vector of the sample surface as the axis (φ axis) while being analyzed (φ scan). Even after performing this procedure, no clear peak appears, as shown in Figure 26(B). On the other hand, single crystal InGa When 2θ is fixed near 56° and a φ scan is performed on ZnO4, the result is shown in Figure 26(C). Six peaks are observed that are attributed to the crystal plane equivalent to the (110) plane. Therefore, Structural analysis using XRD revealed that CAAC-OS has irregular orientations in the a-axis and b-axis. This can be confirmed.

[0268] Next, we will explain CAAC-OS analyzed by electron diffraction. For example, InGa For CAAC-OS having ZnO4 crystals, a pro is applied parallel to the surface of the CAAC-OS being formed. When an electron beam with a diameter of 300 nm is incident, a diffraction pattern like the one shown in Figure 26(D) is observed. This is also called a limited-field electron diffraction pattern. A specific diffraction pattern may appear. The nGaZnO4 crystal contains spots originating from the (009) plane. Therefore, electrons Diffraction also reveals that the pellets contained in CAAC-OS exhibit c-axis orientation, and the c-axis is formed. It can be seen that it is oriented in a direction approximately perpendicular to the surface or top surface. On the other hand, for the same sample, the sample surface Figure 26 shows the diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicularly to the surface. As shown in Figure 26(E), a ring-shaped diffraction pattern can be observed. Therefore, Pro Electron diffraction using an electron beam with a beam diameter of 300 nm also revealed the presence of particles in CAAC-OS. It can be seen that the a-axis and b-axis of Lett do not have orientation. Note that in Figure 26(E) The first ring is caused by the (010) and (100) planes of the InGaZnO4 crystal, etc. It is thought that the second ring in Figure 26(E) is caused by the (110) plane, etc. It is thought that...

[0269] Furthermore, a transmission electron microscope (TEM) Combined analysis of bright-field images and diffraction patterns of CAAC-OS using an icroscope. When observing the image (also called a high-resolution TEM image), multiple pellets can be identified. On the other hand, even in high-resolution TEM images, the boundaries between pellets, i.e., the grain boundaries, are not visible. Also called boundary.) There are cases where it is not possible to clearly confirm this. Therefore, CAA C-OS is less prone to the decrease in electron mobility caused by grain boundaries.

[0270] Figure 27(A) shows a high-resolution cross-section of CAAC-OS observed from a direction approximately parallel to the sample surface. The TEM image is shown. For observing high-resolution TEM images, spherical aberration correction is required. The aberration correction function was used. High spherical aberration correction function was used. High-resolution TEM images are specifically called Cs-corrected high-resolution TEM images. For example, the JEM-ARM200F atomic resolution analytical electron microscope manufactured by JEOL Ltd. Therefore, it can be observed.

[0271] From Figure 27(A), we can identify the pellet, which is a region in which metal atoms are arranged in layers. This is possible. The size of a single pellet can be 1 nm or larger, or 3 nm or larger. I understand. Therefore, pellets can be called nanocrystals (nc). It can also be done as follows: CAAC-OS can be changed to CANC(C-Axis Aligned na It can also be called an oxide semiconductor having nocrystals. The pellet is CAA It reflects the unevenness of the surface or top surface of the C-OS, and the surface or top surface of the CAAC-OS It will be parallel to the top surface.

[0272] Furthermore, Figures 27(B) and 27(C) show CAA observed from a direction approximately perpendicular to the sample surface. Figures 27(D) and 27(E) show high-resolution TEM images of the C-OS plane with Cs correction. These are images obtained by image processing Figure 27(B) and Figure 27(C), respectively. Below, we will discuss image processing. Let me explain the method. First, Figure 27(B) is the Fast Fourier Transform (FFT). The FFT image is obtained by performing a Fourier Transform (FFT) process. Next, In the obtained FFT image, the origin is referenced at 2.8 nm. -1 from 5.0nm -1 The range between Next, we perform a masking process on the masked FFT image. Then, we perform an inverse Fast Fourier Transform (IFFT) on the masked FFT image. By processing with an Inverse Fast Fourier Transform, the image is transformed. The processed image is obtained. This obtained image is called an FFT filtered image. The filtered image is an image obtained by extracting the periodic component from the Cs-corrected high-resolution TEM image, and This shows the child array.

[0273] In Figure 27(D), areas with disordered grid arrangement are shown with dashed lines. The area enclosed by the dashed lines is It is a single pellet. The area indicated by the dashed line is the connection point between the pellets. Yes. The dashed line is hexagonal, indicating that the pellet is hexagonal. The shape of a lett is not always a regular hexagon; it is often a non-regular hexagon.

[0274] In Figure 27(E), a point is drawn between a region with a aligned grid arrangement and another region with a aligned grid arrangement. The grain boundaries are shown by lines, and the orientation of the lattice arrangement is indicated by dashed lines. Clear grain boundaries are also visible near the dotted lines. It cannot be confirmed. Connecting the surrounding grid points to the grid point near the dotted line forms a distorted hexagon. Shapes can be formed. In other words, the formation of grain boundaries is suppressed by distorting the lattice arrangement. This indicates that the atomic arrangement of CAAC-OS is not dense in the ab-plane direction. This can lead to distortion, for example, as the substitution of metal elements changes the bond distance between atoms. This is thought to be because it allows for such tolerance.

[0275] As described above, CAAC-OS has c-axis orientation and in the ab-plane direction Multiple pellets (nanocrystals) are linked together, forming a distorted crystalline structure. Therefore, C AAC-OS, CAA crystal(c-axis-aligned abp It can also be called an oxide semiconductor having a lane-anchored crystal. Cut.

[0276] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of oxide semiconductors depends on the impurities. Since it can decrease due to contamination or the formation of defects, looking at it from the opposite perspective, CAAC-O S can be described as an oxide semiconductor with few impurities or defects (such as oxygen vacancies).

[0277] Impurities are elements other than the main components of oxide semiconductors, such as hydrogen, carbon, silicon, and transition gold. There are group elements, for example. For example, silicon and other metal elements that make up oxide semiconductors are more acidic than the metal elements that make up oxide semiconductors. Elements with strong bonding forces can remove oxygen from oxide semiconductors, thereby altering the atomic arrangement of the oxide semiconductor. This disrupts the crystallinity and reduces its properties. Also, heavy metals such as iron and nickel, and argon, Because carbon dioxide and other elements have large atomic radii (or molecular radii), the atomic arrangement of oxide semiconductors This disrupts the crystallinity and reduces its properties.

[0278] When oxide semiconductors contain impurities or defects, their properties may change due to light, heat, etc. Yes. For example, impurities contained in oxide semiconductors can act as carrier traps, or they can cause carriers to be trapped. It can sometimes be a source of rear-borne emissions. For example, oxygen vacancies in oxide semiconductors can be carrier traps. In some cases, this can result in the capture of hydrogen, or it can become a carrier source.

[0279] CAAC-OS, with its low impurity and oxygen vacancy rate, is suitable for oxide semiconductors with low carrier density. Yes, there is. Specifically, 8 x 10 11 pieces / cm 3 Less than 1 × 10 11 / cm 3 less than More preferably 1 × 10 10 pieces / cm 3 It is less than 1 × 10 -9 pieces / cm 3 The above It can be made into an oxide semiconductor with high carrier density. Such an oxide semiconductor can be made into a high-purity true These are called intrinsic or substantially high-purity oxide semiconductors. CAAC-OS has a low impurity concentration. Furthermore, it has a low defect level density. In other words, it can be said to be an oxide semiconductor with stable properties.

[0280] <2-3.nc-OS> Next, I will explain nc-OS.

[0281] This section describes the case of analyzing nc-OS using XRD. For example, when analyzing nc-OS... Furthermore, when structural analysis is performed using the out-of-plane method, peaks indicating orientation do not appear. In other words, nc-OS crystals do not have orientation.

[0282] Furthermore, for example, nc-OS having InGaZnO4 crystals is thinned, and the thickness is 34n When an electron beam with a probe diameter of 50 nm is incident on the region m parallel to the surface to be formed, Figure 2 A ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in 8(A) was observed. Furthermore, the diffraction pattern when an electron beam with a probe diameter of 1 nm is incident on the same sample ( The nanobeam electron diffraction pattern is shown in Figure 28(B). From Figure 28(B), a ring-shaped region is observed. Multiple spots are observed within the region. Therefore, nc-OS has a probe diameter of 50 nm. Order is not observed when an electron beam is incident, but when an electron beam with a probe diameter of 1 nm is used... Order can be confirmed by applying an incident beam of light.

[0283] Furthermore, when an electron beam with a probe diameter of 1 nm is incident on a region with a thickness of less than 10 nm, As shown in Figure 28(C), an electron diffraction pattern is observed in which the spots are arranged in a roughly regular hexagonal shape. It may be measured. Therefore, in the range of thickness less than 10 nm, nc-OS is It can be seen that there are regions with high order, i.e., crystals. Furthermore, the crystals are oriented in various directions. Therefore, there are regions where a regular electron diffraction pattern is not observed.

[0284] Figure 28(D) shows the Cs-corrected height of the cross-section of nc-OS observed from a direction approximately parallel to the surface being formed. The high-resolution TEM image is shown. nc-OS is the area indicated by the auxiliary line in the high-resolution TEM image. How can we identify regions where the crystalline structure can be observed, and regions where the crystalline structure cannot be clearly identified? It has a region and a crystal portion contained in nc-OS, with a size of 1 nm to 10 nm. The size is often between 1 nm and 3 nm. Oxide semiconductors with a wavelength greater than 10 nm but less than or equal to 100 nm are called microcrystalline oxide semiconductors (MICR). It is called a crystalline oxide semiconductor. Yes, nc-OS is useful in situations where, for example, grain boundaries cannot be clearly identified in high-resolution TEM images. There is a possibility that the nanocrystals share the same origin as the pellets in CAAC-OS. It has properties. Therefore, in the following, the crystalline portion of nc-OS may be referred to as a pellet.

[0285] Thus, nc-OS is suitable for very small regions (for example, regions between 1 nm and 10 nm, etc.) The atomic arrangement has periodicity in the region between 1 nm and 3 nm. Also, nc-OS There is no regularity in the crystal orientation between different pellets. Therefore, orientation is not observed throughout the entire film. Therefore, nc-OS can be analyzed using methods that produce a-like OS or amorphous OS. It can sometimes be indistinguishable from crystalline oxide semiconductors.

[0286] Furthermore, since there is no regularity in the crystal orientation between pellets (nanocrystals), nc-OS , an oxidation having RANC (Random Aligned nanocrystals) Material semiconductors, or NANCs (Non-Aligned nanocrystals) It can also be called an oxide semiconductor.

[0287] nc-OS is an oxide semiconductor with higher orderliness than amorphous oxide semiconductors. nc-OS has a lower defect level density than a-like OS and amorphous oxide semiconductors. However, nc-OS does not show any regularity in crystal orientation between different pellets. Therefore, nc-OS has a higher defect level density compared to CAAC-OS.

[0288] <2-4. a-like OS> a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor.

[0289] Figure 29 shows a high-resolution cross-sectional TEM image of an a-like OS. Here, Figure 29(A) This is a high-resolution cross-sectional TEM image of a-like OS at the start of electron irradiation. Figure 29( B) is 4.3 × 10 8 e - / nm 2 electrons (e - ) a-like OS after irradiation This is a high-resolution cross-sectional TEM image. From Figures 29(A) and 29(B), a-like O It can be seen that, from the start of electron irradiation, striped bright regions extending in the vertical direction are observed in S. Furthermore, it can be seen that the shape of the bright region changes after electron irradiation. Note that the bright region is porous or low This is presumed to be a density region.

[0290] Due to its porous nature, a-like OS has an unstable structure. Below, a-lik This demonstrates that e OS has a less stable structure compared to CAAC-OS and nc-OS. Therefore, it shows the structural changes caused by electron irradiation.

[0291] Prepare a-like OS, nc-OS, and CAAC-OS as samples. This sample is also an In-Ga-Zn oxide.

[0292] First, obtain the high-resolution cross-sectional TEM images of each sample. From the high-resolution cross-sectional TEM images, each sample has a crystalline part.

[0293] The unit cell of the InGaZnO4 crystal is known to have a structure in which three In-O layers and six Ga-Zn -O layers, a total of nine layers, are stacked in layers in the c-axis direction. The distance between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also called the d value). From crystal structure analysis, the value is determined to be 0.29 nm. Therefore, hereinafter, a portion where the lattice fringe spacing is between 0.28 nm and 0.30 nm is regarded as the crystalline part of InGaZ nO4. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal.

[0294] Fig. 30 shows an example of investigating the average size of the crystalline parts (from 22 to 30 locations) of each sample. Note that the length of the lattice fringes described above is regarded as the size of the crystalline part. From Fig. 30, it can be seen that the crystalline part of a-like OS increases with the cumulative irradiation dose of electrons related to the acquisition of TEM images and the like. From Fig. 30, at the initial stage of observation by TEM, the crystalline part (also called the initial nucleus) with a size of about 1.2 nm grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e ) reaches 4.2×10 - 8 e - 2 / nm 8 - 2 On the other hand, it can be seen that there is no change in the size of the crystalline part of nc-OS and CAAC-OS within the range from the start of electron irradiation to when the cumulative irradiation dose of electrons reaches 4.2×10e - / nm 2 Fig. 30​​​Therefore, regardless of the cumulative electron irradiation dose, the sizes of the crystal parts of nc-OS and CAAC-OS are found to be about 1.3 nm and about 1.8 nm, respectively. Note that electron beam irradiation and TEM observation were performed using a Hitachi transmission electron microscope H-9000NAR. The electron beam irradiation conditions were an acceleration voltage of 300 kV, a current density of 6.7×10 5 e - / (nm 2 ·s), and the diameter of the irradiation region was 230 nm.

[0295] Thus, crystal growth of a-like OS can be observed by electron irradiation in some cases. On the other hand, crystal growth of nc-OS and CAAC-OS is hardly observed by electron irradiation. That is, it can be seen that a-like OS has an unstable structure compared to nc-OS and CAAC-OS.

[0296] In addition, because of having voids, a-like OS has a lower density structure compared to nc-OS and CAAC-OS. Specifically, the density of a-like OS is 78.6% or more and less than 92.3% of the density of a single crystal with the same composition. Also, the density of nc-OS and the density of CAAC-OS are 92.3% or more and less than 100% of the density of a single crystal with the same composition. An oxide semiconductor with a density less than 78% of the density of a single crystal is difficult to form a film itself.

[0297] For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a single crystal InGaZnO4 having a rhombohedral crystal structure is 6.357 g / cm 3 . Therefore, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a-like OS is 5.0 g / cm3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor satisfying In:Ga:Zn=1:1:1 [atomic ratio] The densities of nc-OS and CAAC-OS are 5.9 g / cm³. 3 More than 6.3g / cm 3 It will be less than.

[0298] If single crystals with the same composition do not exist, single crystals with different compositions can be combined in any proportion. By combining these, it is possible to estimate the density equivalent to a single crystal at the desired composition. The density corresponding to a single crystal of the desired composition is determined by the ratio of single crystals of different compositions combined. The density can be estimated using a weighted average. However, the density should be calculated using as few types of single crystals as possible. It is preferable to estimate by combining the factors.

[0299] As described above, oxide semiconductors can take on various structures, each possessing a variety of properties. Oxide semiconductors include, for example, amorphous oxide semiconductors, a-like OS, and nc-OS. The laminated film may have two or more types of CAAC-OS.

[0300] The configuration shown in this embodiment may be appropriately combined with the configurations shown in other embodiments or other examples. They can be used in combination.

[0301] (Embodiment 3) In this embodiment, a display device having a semiconductor device according to one aspect of the present invention is shown in Figure 31. This will be explained with reference to Figure 35. In this embodiment, the display element of the display device is Next, we will specifically describe a configuration having liquid crystal elements (liquid crystal display device).

[0302] <3-1.Liquid crystal display device> The liquid crystal display device 880 shown in Figure 31(A) comprises a pixel unit 871 and a gate driver 874. , source driver 876 and gate driver 8, each arranged in parallel or approximately parallel to the others. m scan lines 877 whose potential is controlled by 74, and each arranged in parallel or approximately parallel Furthermore, it has n signal lines 879 whose potential is controlled by the source driver 876. Furthermore, the pixel section 871 has a plurality of pixels 870 arranged in a matrix. , along the signal line 879, there are common lines 875, each arranged parallel or nearly parallel to the signal line 879. Furthermore, the gate driver 874 and source driver 876 are collectively referred to as the drive circuit section. There is a match.

[0303] Each scan line 877 is one of the pixels 870 arranged in m rows and n columns in the pixel section 871. It is electrically connected to n pixels 870 arranged in any row. Also, each signal Line 879 is a set of m pixels 870 arranged in m rows and n columns, with m pixels located in any of the columns. It is electrically connected to pixel 870. m and n are both integers greater than or equal to 1. Also, each com Line 875 consists of m pixels 870 arranged in m rows and n columns, with m pixels located in any row. It is electrically connected to pixel 870.

[0304] Figure 31(B) shows the use of the pixel 870 of the liquid crystal display device 880 shown in Figure 31(A). This shows an example of a possible circuit configuration.

[0305] The pixel 870 shown in Figure 31(B) consists of a liquid crystal element 851, a transistor 852, and a capacitance element. It has child 855 and

[0306] Transistor 852 is connected to transistor 100 as described in the previous embodiment 1, or to Transistor 150 can be applied. In particular, for pixel 870, transistor 150 is used. When used, there is no overlap between the gate electrode and the source or drain electrode, thus preventing parasitic interference. It is preferable because it allows for a reduction in volume.

[0307] One of the pair of electrodes of the liquid crystal element 851 is connected to the transistor 852, and the potential is such that the pixel It is set appropriately according to the specifications of 870. The other of the pair of electrodes of the liquid crystal element 851 is a common wire. It is connected to 875, and a common potential is provided. The liquid crystal element 851 is The orientation of the liquid crystal is controlled by data written to transistor 852.

[0308] Furthermore, the liquid crystal element 851 controls the transmission or non-transmission of light through the optical modulation effect of the liquid crystal. It is an element that does this. Furthermore, the optical modulation effect of liquid crystals is due to the electric field (horizontal electric field, vertical electric field) applied to the liquid crystal. It is controlled by an electric field in the direction or an electric field in the oblique direction. Note that the liquid crystal element 851 is used Examples of liquid crystals include thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, and polymer dispersed liquid crystals. Ferroelectric liquid crystals, antiferroelectric liquid crystals, etc., can be used. These liquid crystal materials are suitable for the conditions. More specifically, the cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. It shows the phases, etc.

[0309] Furthermore, when employing a transverse electric field method, it is also possible to use a liquid crystal that exhibits a blue phase without using an alignment layer. The blue phase is one of the liquid crystal phases, and as the temperature of cholesteric liquid crystal is increased, the cholesteric phase This phase appears just before the transition from the blue phase to the isotropic phase. The blue phase only appears within a narrow temperature range. To improve the temperature range, a liquid crystal assembly containing several weight percent or more of chiral agent was mixed in. The resulting material is used in the liquid crystal layer. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent provides a fast response. It has a short intensity and is optically isotropic. Furthermore, it is a liquid crystal mixture containing a blue phase liquid crystal and a chiral agent. The resulting product does not require alignment processing and has low viewing angle dependence. Furthermore, it does not require an alignment layer. Therefore, rubbing is unnecessary, thus preventing electrostatic discharge damage caused by rubbing. This can be stopped, reducing defects and damage to liquid crystal displays during the manufacturing process.

[0310] The driving method for the liquid crystal display device 880 having liquid crystal elements 851 is TN (Twisted Nematic mode, IPS (In-Plane-Switching) mode , FFS (Fringe Field Switching) mode, ASM (Axia (Symmetric Micro-cell) mode, OCB (Optical Compensated Birefringence) mode, F LC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, etc. It can be used.

[0311] Furthermore, the liquid crystal display device 880 is a normally black type liquid crystal display device, for example, a vertically aligned ( A transmissive liquid crystal display device employing VA mode may also be used. As for the vertical alignment mode, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, ASV Modes and other features can be used.

[0312] <3-2. Liquid crystal display device in transverse electric field mode> First, let's look at liquid crystal display devices in transverse field mode, specifically FFS mode and IPS mode liquid crystals. I will now explain the display device.

[0313] In the configuration of pixel 870 shown in Figure 31(B), the source electrode of transistor 852 and One end of the drain electrode is electrically connected to the signal line 879, and the other end is connected to a pair of liquid crystal elements 851. It is electrically connected to one of the electrodes. Also, the gate electrode of transistor 852 is connected to the scan line. It is electrically connected to 877. Transistor 852 writes data to the data signal. It has a control function.

[0314] In the configuration of the pixel 870 shown in Figure 31(B), one of the pair of electrodes of the capacitive element 855 is It is connected to the source electrode and the other drain electrode of transistor 852. Capacitive element 85 The other end of the pair of electrodes 5 is electrically connected to the common wire 875. The potential of the common wire 875 The value is set appropriately according to the specifications of pixel 870. Capacitive element 855 receives the written data It has the function of a holding capacity for holding data. In the crystal display device 880, one of the pair of electrodes of the capacitive element 855 is connected to the liquid crystal element 851. It is part or all of one of a pair of electrodes, and the other of the pair of electrodes of the capacitive element 855 is liquid crystal. This is part or all of the other electrode of the pair of electrodes of element 851.

[0315] <3-3. Example of element substrate configuration for transverse electric field mode 1> Next, we will describe the specific configuration of the element substrate included in the liquid crystal display device 880. , Multiple pixels 870a, 87 The top views of 0b and 870c are shown in Figure 32(A).

[0316] In Figure 32(A), the conductive film 843, which functions as a scan line, is positioned approximately perpendicular to the signal line. It is provided extending in the direction (left-right direction in the diagram). The conductive film 848a, which functions as a signal line, It is provided extending in a direction approximately perpendicular to the scan line (up and down in the diagram). The conductive film 843, which functions as a signal line, is electrically connected to the gate driver 874. The conductive film 848a, which functions as such, is electrically connected to the source driver 876 (Figure 31(A)).

[0317] Transistor 852 is located near the intersection of the scan line and the signal line. The gate electrode 852 has a conductive film 843 that functions as a gate electrode, and a gate insulating film (Figure 32(A (Not shown) an oxide semiconductor film in which a channel region is formed on the gate insulating film. 820, composed of conductive films 848a and 848b that function as source and drain electrodes. The conductive film 843 also functions as a scanning line and is superimposed on the oxide semiconductor film 820. The region that does this functions as the gate electrode of transistor 852. Also, the conductive film 848a is It also functions as a signal line, and the region that overlaps with the oxide semiconductor film 820 is the signal line of transistor 852. It functions as a drain electrode or a drain electrode.

[0318] Furthermore, the conductive film 848b is electrically connected to the oxide semiconductor film 819a, which has the function of a pixel electrode. They are connected. Also, on the oxide semiconductor film 819a, an insulating film (shown in Figure 32(A)) A conductive film 829 is provided via (z). The conductive film 829 is a common electrode. It has a function.

[0319] The conductive film 829 has striped regions that extend in a direction intersecting the signal lines. This region is connected to a region that extends in a direction parallel or nearly parallel to the signal line. Therefore, liquid In the multiple pixels of the crystal display device 880, the conductive film 829 having striped regions is in each region The regions are at the same potential.

[0320] Capacitive element 855 is formed in the region where the oxide semiconductor film 819a and the conductive film 829 overlap. The oxide semiconductor film 819a and the conductive film 829 are translucent. That is, the capacitive element 85 5 is translucent.

[0321] Furthermore, since the capacitive element 855 is light-transmitting, the capacitive element 855 can be placed within the pixel 870. It can be formed (over a large area). Therefore, while increasing the opening ratio, typically it can be 50% or more. Preferably, it is possible to make it 60% or more, and a display device with increased charge amount It can be obtained. For example, in a high-resolution display device, such as a liquid crystal display device, the image The area of ​​the basic elements becomes smaller, and the area of ​​the capacitive elements also becomes smaller. Therefore, a high-resolution display device is possible. In this case, the amount of charge accumulated in the capacitive element becomes smaller. However, as shown in this embodiment Since the capacitive element 855 is light-transmitting, by providing the capacitive element in each pixel, In this case, a sufficient amount of charge can be obtained while increasing the aperture ratio. Typically, when the pixel density is 2 High resolutions of 00ppi or higher, even 300ppi or higher, and even 500ppi or higher It can be suitably used in display devices.

[0322] Furthermore, in liquid crystal display devices, the larger the capacitance value of the capacitive element, the more the electric field is applied. In this, the period during which the orientation of liquid crystal molecules in a liquid crystal element can be kept constant can be extended. It is possible. When displaying a still image, the duration can be extended, thus reducing the number of times the image data is rewritten. The number can be reduced, and power consumption can be reduced. The structure shown allows for an increased aperture ratio even in high-resolution display devices, It can efficiently utilize light from light sources such as backlights, reducing the power consumption of the display device. It is possible.

[0323] Next, Figure 32(B) shows a cross-sectional view along the dashed line Q1-R1 in Figure 32(A). Transistor 852, shown in 32(B), is a top-gate type transistor. The dashed line Q1-R1 represents a cross-sectional view of transistor 852 along its channel length.

[0324] The transistor 852 shown in Figures 32(A) and 32(B) is connected to an insulating film 8 formed on the substrate 802. It is formed on 06, 807, 814, and 816. In addition, transistor 852 is made of oxide semiconductor A conductive film 820, an insulating film 832 provided on the oxide semiconductor film 820, and on the insulating film 832 The conductive film 843, the insulating film 816, the oxide semiconductor film 820, and the insulating film on the conductive film 843. It has 834 and, in addition, the oxide semiconductor film 820 has a source region 820s and a channel region It has a region 820i and a drain region 820d. In addition, an insulating film 834 is on top of the insulating film 83 A 6 is provided, and conductive films 848a and 848b are provided on the insulating film 836. The film 848a, through the openings provided in the insulating films 836 and 834, enters the source region 820s And they are electrically connected. Also, the conductive film 848b is provided on the insulating films 836 and 834. It is electrically connected to the drain area 820d through the opening.

[0325] Furthermore, the insulating film 832 also functions as the gate insulating film of transistor 852. Furthermore, the conductive film 843 functions as the gate electrode of the transistor 852, and the conductive film 84 8a functions as a source electrode, and the conductive film 848b functions as a drain electrode. It has.

[0326] Note that the substrate 802, insulating films 806, 807, 814, 816, 832, 834, and 836 The oxide semiconductor film 820 and the conductive films 848a and 848b are respectively attached to the substrate 10 shown above. 2. Insulating film 106, 107, 114, 116, 152, 118, 156, Oxide semiconductor film It can be formed using the same materials and methods as 120a and conductive films 112a and 112b. Cut.

[0327] Furthermore, an insulating film 838 is provided on the insulating film 836 and the conductive films 848a, 848b. Furthermore, an oxide semiconductor film 819a is provided on the insulating film 838, and an oxide semiconductor film 81 9a is electrically connected to the conductive film 848b through an opening provided in the insulating film 838. Furthermore, an insulating film 840 is provided on the insulating film 836 and the oxide semiconductor film 819a. A conductive film 829 is provided on the insulating film 840.

[0328] The insulating film 838 can be formed using the same materials and methods as the insulating film 836. Furthermore, the oxide semiconductor film 819a is made of the same materials and techniques as the oxide semiconductor film 820. It can be formed by law. Furthermore, the insulating film 840 can be made from the same material as insulating film 834. It can be formed by materials and methods. The conductive film 829 is an oxide semiconductor film 820. It can be formed using the same materials and methods.

[0329] The oxide semiconductor film 819a functions as a pixel electrode of the display device, and the conductive film 829 is It functions as a common electrode in a display device. Furthermore, the oxide semiconductor film 819a and insulating film... Capacitive element 855 is formed with 840 and the conductive film 829.

[0330] In this embodiment, the oxide semiconductor film 819a is shown in the top view as having a rectangular shape. However, it is not limited to this. For example, the oxide semiconductor film 819a may be shaped like a comb or a slash. It may also have a shape that includes a lid.

[0331] <3-4. Liquid crystal display devices in vertical orientation mode> Next, the liquid operating in Vertical Alignment (VA) mode. The configuration of a pixel having a liquid crystal element will be explained using Figures 33 to 35. Figure 33 shows a liquid crystal. Figure 34 is a top view of the pixels of the display device, and the dotted line Z1-Z2 shown in Figure 33 is shown below. This corresponds to a cross-sectional view of the cut surface. Figure 35 also shows the equivalent circuit of a pixel in a liquid crystal display device. This is a diagram.

[0332] VA type refers to a method of controlling the arrangement of liquid crystal molecules in a liquid crystal display panel. In a liquid crystal display device, when no voltage is applied, the liquid crystal molecules are perpendicular to the panel surface. It is a suitable method.

[0333] In the following, we will divide a pixel into several regions (subpixels), and each It is designed to tilt the molecule in a different direction. This is called multi-domainization or multi-domainization. This is called in-design. The following explanation will discuss liquid crystal display devices that take multi-domain design into consideration. I will explain.

[0334] The liquid crystal display device shown in Figures 33 and 34 has a transistor 852a on the substrate 802 and An insulating film 838 on the transistor 852a, and a transistor provided on the insulating film 838. It has a conductive film 824 electrically connected to 852a, and a capacitive element 855a. The conductive film 824 functions as a pixel electrode. Furthermore, the conductive film 824 has slits 8 A slit 46 is provided. The slit 846 has the function of controlling the orientation of the liquid crystal.

[0335] Furthermore, a substrate 803 is provided in a position that overlaps with substrate 802, and substrate 803 A liquid crystal layer 881 is provided between them. In addition, a colored film 866 and a conductive film are provided on the substrate 803. 868 and structure 869 are provided. Note that the conductive film 868 is a common electrode. It has the ability. In addition, the conductive film 868 is provided with a slit 872. The structure 869 and the part 872 have the function of controlling the orientation of the liquid crystal. Also, the liquid crystal layer 88 Alignment films 848 and 878 are provided on the surface in contact with 1.

[0336] In the top view shown in Figure 33, the conductive film 824, which functions as a pixel electrode, and the common The conductive film 868, which functions as an electrode, is represented by a solid line, and for transistors 852a, etc., the broken It is represented by lines.

[0337] Furthermore, transistor 852b is provided adjacent to transistor 852a. Transistor 852a and transistor 852b are both connected to conductive film 848a. Furthermore, in transistors 852a and 852b, the conductive film 848a is used as the source electrode. It has the function of a signal line in a liquid crystal display device.

[0338] Furthermore, transistors 852a and 852b are replaced with the transistors described in Embodiment 1 above. Transistor 100, or transistor 150, can be applied. In particular, transistor 150 Using this method, there is no overlap between the gate electrode and the source or drain electrode, It is preferable because it can reduce raw volume.

[0339] When a voltage is applied to the conductive film 824 having a slit 846, near the slit 846 A distortion of the electric field (oblique electric field) occurs. Slit 846 and structure 869 on the substrate 803 side, By arranging the and slit 872 alternately or opposite each other, an oblique electric field can be effectively generated. This allows for the control of the liquid crystal orientation. Furthermore, the direction of liquid crystal orientation can be controlled by transistor 8. The liquid crystal is aligned between the pixel on which transistor 52a is formed and the pixel on which transistor 852b is formed. It is preferable to vary the direction. That is, multi-domain configuration to improve the viewing angle of the liquid crystal display device. This will make it possible to expand the scope.

[0340] Note that either the structure 869 on the substrate 803 side, or the slit 872 on the substrate 803 side It is not necessary to form one or both of them.

[0341] Transistor 852a has insulating films 806, 807, 814 formed on substrate 802. It is provided on 816. Also, transistor 852a is an oxide semiconductor film 820 and an oxide An insulating film 832 on a semiconductor film 820, a conductive film 843b on the insulating film 832, and an oxide semiconductor A conductive film 848a electrically connected to the source region 820s of the body film 820, and an oxide semiconductor It has a conductive film 848b that is electrically connected to the drain region 820d of the film 820. Oh, the insulating film 832 has the function of a gate insulating film, and the conductive film 843b is a gate electrode It has the function of a conductive film. Furthermore, the conductive film 848a has the function of a source electrode and is conductive. The film 848b functions as a drain electrode. Also, the oxide in contact with the insulating film 832... A channel region 820i is formed in the semiconductor film 820.

[0342] Furthermore, the source region 820s, the drain region 820d, and the conductive film 843b are insulated. Films 834 and 836 are provided, and conductive films 848a and 848b are provided on insulating films 834 and 836. The oxide semiconductor film 820 is electrically connected through the opening.

[0343] Capacitive element 855a consists of a conductive film 843a and insulating films 834, 836 on the conductive film 843a. It has 838 and a conductive film 824 on the insulating film 838. The conductive film 843a is a transient The conductive film 843b present on TA852a is formed through a process of processing the same conductive film.

[0344] Here, an example of the equivalent circuit of the liquid crystal display device shown in Figures 33 and 34 is shown in Figure 35.

[0345] As shown in Figure 35, transistors 852a and 852b are both gates. Conductive film 843b that functions as source wiring and conductive film 848a that functions as source wiring and They are connected by gas. In this case, the potentials of conductive film 843a and conductive film 843c are different. By doing so, the liquid crystal element 851a and the liquid crystal element 851b can be made to operate in different ways. In other words, the potentials of conductive film 843a and conductive film 843c are controlled. Therefore, the field of view can be widened. Note that conductive films 843a and 843b are made of It functions as a wiring harness.

[0346] This embodiment can be appropriately combined with other embodiments shown herein. ru.

[0347] (Embodiment 4) In this embodiment, a semiconductor device according to one aspect of the present invention, and a display device having said semiconductor device The arrangement will be explained using Figures 36 to 39. In this embodiment, the table The display device has a light-emitting element (particularly an electroluminescent (EL) element) as its display element. I will now explain the configuration in detail.

[0348] <4-1. Explanation regarding display devices> The display device shown in Figure 36(A) has a region having pixels of the display element (hereinafter referred to as the pixel portion 502 and ( ) and a circuit section ( ) which is located outside the pixel section 502 and has a circuit for driving the pixels. (Hereinafter referred to as the drive circuit section 504) and for correcting the temperature of the transistor or light-emitting element The circuit section (hereinafter referred to as the sensor circuit section 508) and the circuit having a function to protect the element (hereinafter referred to as, It has a protection circuit section (referred to as 506) and a terminal section 507. Furthermore, it has a sensor circuit section 508, The protection circuit section 506 may be omitted.

[0349] Part or all of the drive circuit section 504 is formed on the same substrate as the pixel section 502. This is desirable. This allows for a reduction in the number of components and terminals. Drive circuit section 504 If part or all of it is not formed on the same substrate as the pixel section 502, the drive cycle Part or all of road section 504 is COG or TAB (Tape Automated B It can be implemented by (onding).

[0350] In Figure 36(A), the gate driver 504a and the source driver 504b are Therefore, although an example is shown in which the drive circuit section 504 is formed, the configuration is not limited to this. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed from a single-crystal semiconductor film or a polycrystalline semiconductor film) is put into practice. It can also be used as a mounting configuration.

[0351] The pixel section 502 is arranged in X rows (where X is a natural number greater than or equal to 2) and Y columns (where Y is a natural number greater than or equal to 2). It has a circuit for driving multiple display elements (hereinafter referred to as the pixel circuit 501), and the drive cycle The path section 504 is a circuit that outputs a signal (scan signal) for selecting pixels (hereinafter referred to as a gate driver). 504a) is used to supply signals (data signals) for driving the pixel display elements. It has a drive circuit such as the circuit (hereinafter referred to as source driver 504b).

[0352] The gate driver 504a has a shift register, etc. The gate driver 504a is A signal to drive the shift register is input via terminal 507, and the signal is output. For example, the gate driver 504a receives input such as a start pulse signal and a clock signal. The gate driver 504a outputs a pulse signal. The scanning signal is applied to the wiring (and It has the function of controlling the potential of the scan lines (referred to as GL_1 to GL_X) below. Multiple drivers 504a are provided, and multiple gate drivers 504a are used to control the scan line GL_1 The path to GL_X may be divided and controlled. Alternatively, the gate driver 504a may use an initialization signal. It has the function of supplying, however, the gate driver 50 4a can also supply another signal. For example, as shown in Figure 36(A), The driver 504a is a wiring that controls the potential of the light-emitting element (hereinafter referred to as ANODE_1 to A It is electrically connected to (NODE_X).

[0353] The source driver 504b has a shift register, etc. The source driver 504b Through terminal 507, in addition to signals for driving the shift register, the data signals are generated. A signal (image signal) is input. The source driver 504b uses the image signal to create a pixel circuit. It has the function of generating data signals to write to 501. Also, source driver 504b The data signal is transmitted according to the pulse signal obtained by inputting the start pulse, clock signal, etc. It has the function of controlling the output of the number. In addition, the source driver 504b is given a data signal. It has the function of controlling the potential of the wiring (hereinafter referred to as data lines DL_1 to DL_Y). Alternatively, source driver 504b may have the ability to supply initialization signals. However, this is not limited to the source driver 504b, which may also supply other signals. It is possible.

[0354] The source driver 504b is configured using, for example, multiple analog switches. The source driver 504b sequentially turns on multiple analog switches, The image signal can be time-division converted into a data signal.

[0355] Each of the multiple pixel circuits 501 receives a scan signal from one of the multiple scan lines GL. A pulse signal is input via one of several data lines DL to which a data signal is supplied. A data signal is input. Also, each of the multiple pixel circuits 501 is a gate driver. 504a controls the writing and retention of data in the data signal. For example, m rows and n columns. The pixel circuit 501 of the eye is connected to the gate driver via the scan line GL_m (where m is a natural number less than or equal to X). A pulse signal is input from 504a, and the data line DL_n( A data signal is input from the source driver 504b via n (where n is a natural number less than or equal to Y).

[0356] The protection circuit section 506 shown in Figure 36(A) includes, for example, a gate driver 504a and a pixel circuit It is connected to the scan line GL, which is the wiring between 501. Alternatively, the protection circuit section 506 is the source It is connected to the data line DL, which is the wiring between driver 504b and pixel circuit 501. The protection circuit section 506 is connected to the wiring between the gate driver 504a and the terminal section 507. It is possible. Alternatively, the protection circuit section 506 is connected to the source driver 504b and the terminal section 507. It can be connected to the wiring between them. The protection circuit unit 506 is connected to the wiring it connects to. A circuit that causes a wire to become conductive with another wire when a potential outside a certain range is applied. ru.

[0357] As shown in Figure 36(A), the pixel section 502 and the drive circuit section 504 are each protected by a protection circuit section 5 By providing 06, ESD (Electrostatic Discharge) This can improve the resistance of the display device to overcurrents generated by electrostatic discharge, etc. However, the configuration of the protection circuit section 506 is not limited to this, for example, the gate driver 504 A configuration in which the protection circuit unit 506 is connected to a, or the protection circuit unit 50 is connected to the source driver 504b. It is also possible to configure it by connecting 6. Alternatively, the protection circuit section 506 can be connected to the terminal section 507. It can also be configured as a continuous unit.

[0358] <4-2. Example of Protection Circuit Configuration> The protection circuit section 506 can have the configuration shown in Figure 37(A).

[0359] Figure 37(A) shows an example of a circuit configuration that can be used as a protection circuit section 506. The protection circuit section 506 includes a transistor 510 and a resistor element 512. One of the source and drain electrodes of the TA510 is electrically connected to the data line DL. The source electrode and drain electrode of the transistor 510 are connected to one electrode of the resistive element 512. It is electrically connected to the gate electrode of transistor 510. It is electrically connected to the source electrode and the other drain electrode. In addition, the other of the resistive element 512 The electrode on one side is electrically connected to the scan line GL. Furthermore, a second gate is connected to transistor 510. An electrode may be provided.

[0360] As transistor 510, transistors 100 and 150 as shown in Embodiment 1 are used. This is possible. The resistive element 512 can be configured as shown in Figures 37(B) and 37(C). It is possible.

[0361] Figure 37(B) is an example of a top view of the resistor element 512, and Figure 37(C) is an example of Figure 37(B). This corresponds to a cross-sectional view of the section of the dashed line A3-A4 shown in ).

[0362] The resistive element 512 consists of electrodes 542a and 542b on the substrate 532, the substrate 532, and the electrodes. Insulating films 544 and 546 on 542a and 542b, electrodes 542a and 542b, and insulating film The oxide semiconductor film 550 on 546, the insulating film 546, and the insulating film on the oxide semiconductor film 550 It has a film 548.

[0363] Substrate 532, insulating film 544, 546, electrodes 542a, 542b, oxide semiconductor film 550 As for the substrate 102, insulating films 114 and 116 described above, respectively, the insulating films 548 are: , conductive films 112a, 112b, oxide semiconductor film 120, and insulating film 118 are made of the same material It can be used.

[0364] Electrodes 542a and 542b are electrically connected via an oxide semiconductor film 550. The oxide semiconductor film 550 has the function of a resistor.

[0365] As shown in Figures 37(B) and 37(C), the shape (length or width) of the oxide semiconductor film 550 is adjusted. By adjusting the thickness of the oxide semiconductor film 550, any desired resistance value can be obtained. It is possible.

[0366] Furthermore, the terminal section 507 shown in Figure 36(A) supplies power and control signals to the display device from an external circuit. This refers to the part where terminals for inputting numbers and image signals are provided. Also, in Figure 36(A) The sensor circuit section 508 shown has the function of correcting the temperature of the transistor or light-emitting element. .

[0367] <4-3. Example of Sensor Circuit Configuration> The sensor circuit section 508 can have the configuration shown in Figure 38.

[0368] Figure 38(A) shows an example of a circuit configuration that can be used as the sensor circuit section 508. The sensor circuit section 508 includes a transistor 556, a resistor 558, and a light-emitting element for monitoring. It has element 572m and the gate electrode of transistor 556 is a gate wire for monitoring. Electrically connected to MONI_G, the source and drain electrodes of transistor 556 One end is electrically connected to one electrode of the light-emitting element 572m, and the other end is connected to the saw of transistor 556. The other end of the drain electrode is electrically connected to the monitoring drain wire MONI_D. It is done. Also, one electrode of the resistor element 558 is connected to the source electrode of the transistor 556. The other electrode of the rain electrode is electrically connected, and the other electrode of the resistive element 558 is used for monitoring. It is electrically connected to node line MONI_ANO. Also, one electrode of light-emitting element 572m It is electrically connected to the source line MONI_S for monitoring, and the other side of the light-emitting element 572m The electrodes are electrically connected to the cathode wire.

[0369] Note that transistor 556 is a drive transistor within the pixel section 502, for example, a transistor It has the same function as the TA554. For example, the sensor circuit section 508 emits electricity to the light-emitting element 572m. When current flows, the gate electrode, source electrode, and drain electrode of transistor 556, and It also has the function of monitoring the voltage and current of the anode line. Furthermore, as shown in Figure 38(A) , gate wire MONI_G for monitoring, drain wire MONI_D for monitoring, monitor The anode line MONI_ANO and the source line MONI_S for monitoring are respectively Because they are set up independently, it is possible to measure each signal separately.

[0370] For example, by measuring the potential of the source line for monitoring, the light-emitting element 572 for monitoring... The characteristics of m can be measured. Alternatively, the gate line MONI_G for monitoring, monitor Measure the potential of the drain wire MONI_D and the source wire MONI_S for monitoring. By doing so, the characteristics of transistor 556 can be measured. Alternatively, a monitor can be used. Measure the potentials of the node line MONI_ANO and the drain line MONI_D for monitoring. This allows us to measure the characteristics of the resistive element 558.

[0371] Alternatively, use the anode line MONI_ANO for monitoring and the gate line MO for monitoring. Apply voltage to NI_G, and monitor drain wire MONI_D and monitor saw By measuring the potential of the drain wire, the temperature can be measured from the potential of the monitoring drain wire MONI_D. It can be determined. Alternatively, the anode line MONI_ANO for monitoring, and monitor Apply voltage to the gate wire MONI_G for monitoring, and the drain wire MONI_D and By measuring the potential of the monitoring source wire, the potential of the monitoring source wire MONI_S can be determined. From this position, the Vgs of transistor 556 and the voltage applied to the light-emitting element 572m are measured. It can be determined.

[0372] Using the measured values ​​described above, the other electrode of the light-emitting element 572m is electrically connected. Correction can be performed by changing the cathode wire potential or the video data potential. Furthermore, as shown in Figure 36(A), sensor circuit sections 508 are provided at the four corners of the pixel section 502. In this configuration, the method of correction may be changed depending on the position of each pixel.

[0373] Furthermore, the sensor circuit section 508 can be configured as shown in Figure 38(B), for example. Figure 38(B) is a schematic cross-sectional view illustrating the sensor circuit section 508.

[0374] The sensor circuit section 508 shown in Figure 38(B) includes a transistor 556 and a resistor element 558. , has. Transistor 556 has a conductive film 104 on the substrate 102, and substrate 102 and conductive insulating films 106 and 107 on the film 104, an oxide semiconductor film 108 on the insulating film 107, and acid A conductive film 112a is electrically connected to the oxide semiconductor film 108, and the oxide semiconductor film 108 is electrically connected to the conductive film 112a. A conductive film 112b, an oxide semiconductor film 108, and conductive films 112a and 11 are connected by gas. It has insulating films 114 and 116 on 2b, and an oxide semiconductor film 120a on insulating film 116. ru.

[0375] Furthermore, the resistive element 558 is connected to the insulating films 106 and 107 on the substrate 102, and to the insulating film 107 The conductive films 112b and 112c, the insulating film 107, and the insulating film on the conductive films 112b and 112c. 114, 116, oxide semiconductor film 120c on insulating film 116, and oxide semiconductor film 120 The oxide semiconductor film 120c has an insulating film 118 on c, and the insulating film 114, The conductive film 112b is electrically connected to the opening 152a provided in 16. The oxide semiconductor film 120c is separated by the openings 152d provided in the insulating films 114 and 116. The conductive film 112b is electrically connected to the conductive film 112c. It functions as the other of the source electrode and drain electrode, and in the resistive element 558, a pair It functions as one of the electrodes. Also, the conductive film 112c is a pair of electrodes of the resistive element 558. It functions as the other. Also, the conductive film 112c is the anode line MONI_AN for monitoring. Functions as O.

[0376] Furthermore, transistor 556 has the same function as transistor 100 shown in Embodiment 1. It has. Therefore, in each component of transistor 556, transistor 1 It has the same sign and hatching as 00. Therefore, it is used in transistor 556. Each component is a material that can be used in the transistor 100 shown in Embodiment 1. It can be formed by taking into consideration the materials, etc. Note that transistor 556 is in Embodiment 1 A configuration similar to that of transistor 150 shown may also be used.

[0377] Furthermore, the other electrode of the pair of electrodes of the resistor element 558 is connected to the source electrode of the transistor 556. A conductive film that functions as a rain electrode is formed by processing the same conductive film. The oxide semiconductor film 120c is made by processing the same oxide semiconductor film as the oxide semiconductor film 120a. It is formed by oxidizing. As described in Embodiment 1, the oxide semiconductor film 120a is formed by oxidizing Because it can be used as a material conductor (OC), it is the same oxide as oxide semiconductor film 120a. The oxide semiconductor film 120c, formed by processing a semiconductor film, is also an oxide conductor (OC). It can be used as such. Therefore, in the circuit diagram shown in Figure 38(A), the resistor element 55 The symbol OC is added to 8.

[0378] The oxide semiconductor film 120c of the resistive element 558 is similar to the oxide semiconductor film 120b. The material and the same method are used to form it. For example, the oxide semiconductor film 120c is Indium gallium zinc oxide (IGZO), indium tin oxide (ITO), indium Materials such as zinc oxide and indium tin oxide (ITSO) with added silicon oxide are used. It is possible.

[0379] <4-4. Example of Pixel Circuit Configuration> The multiple pixel circuits 501 shown in Figure 36(A) may be configured as shown in Figure 36(B), for example. It is possible.

[0380] The pixel circuit 501 shown in Figure 36(B) consists of transistors 552 and 554 and a capacitive element 56 It has 2 and a light-emitting element 572. Transistor 552 and transistor 554 Either one or both of the transistors 100 or 1 shown in Embodiment 1 above are included. 50 can be applied.

[0381] One of the source and drain electrodes of transistor 552 is supplied with a data signal. It is electrically connected to the wiring (hereinafter referred to as the signal line DL_n). Furthermore, transistor 55 The gate electrode of 2 supplies electrical signals to the wiring to which the gate signal is supplied (hereinafter referred to as scan line GL_m). It connects to the target.

[0382] Transistor 552, by being either on or off, controls the data signal. It has a function to control the writing of data.

[0383] One of the pair of electrodes of the capacitive element 562 is connected to the source electrode and drain of the transistor 552. It is electrically connected to the other electrode. Also, the other electrode of the pair of electrodes of the capacitive element 562 is a transistor. It is electrically connected to the second gate electrode (also called the back gate electrode) of the ZISTA 554. The capacitive element 562 functions as a holding capacitor to retain the written data.

[0384] One of the source and drain electrodes of transistor 554 is the anode wire. It is electrically connected to _m).

[0385] The anode and cathode of the light-emitting element 572 are connected to the source electrode of the transistor 554. The other end of the drain electrode is electrically connected to the other end of the cathode wire. They are electrically connected. Furthermore, one of the anodes and cathodes of the light-emitting element 572 has a capacitive element. The other electrode of the pair of electrodes 562 is electrically connected.

[0386] For example, an organic EL element can be used as the light-emitting element 572. Sub-element 572 is not limited to this, and an inorganic EL element made of inorganic material may also be used.

[0387] In a display device having the pixel circuit 501 shown in Figure 36(B), for example, the ge shown in Figure 36(A) The driver 504a sequentially selects the pixel circuit 501 for each row, and the transistor 552 Turn it on and write the data signal.

[0388] When data is written to the pixel circuit 501, the transistor 552 turns off. It enters a holding state. Furthermore, in accordance with the potential of the written data signal, transistor 554 The amount of current flowing between the source electrode and the drain electrode is controlled, and the light-emitting element 572 controls the amount of current flowing through it. It emits light with brightness corresponding to the flow rate. By performing this sequentially for each row, an image can be displayed.

[0389] Furthermore, in this embodiment, the display element of the display device is a light-emitting element 572. While the configuration has been illustrated, the display device is not limited to this and may have various elements. .

[0390] An example of the above element is an electroluminescent (EL) element (organic and inorganic materials) EL elements including organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements ( Transistors that emit light in response to electric current, electron emission elements, liquid crystal elements, electron ink elements, electrical Electrophoretic elements, electrowetting elements, plasma displays (PDPs), MEMS (Micro-electro-mechanical systems) displays (e.g., gratings) Glyte bulbs (GLV), digital micromirror devices (DMD), digital mirrors Microshutter (DMS) element, Interference Modulation (IMO) D) Elements, piezoelectric ceramic displays, etc., due to electrical or magnetic action Some display media have properties such as contrast, brightness, reflectance, and transmittance that change. An example of a display device using an L element is an EL display. Examples of display devices used include field emission displays (FEDs) or S ED type flat-panel display (SED: Surface-conduction Ele) Examples include ctron-emitter displays. One example is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display) (i) Reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays, etc. There are. An example of a display device using an electronic ink element or electrophoretic element is an electronic paper display. —and so on. In this case, some or all of the pixel electrodes can function as reflective electrodes. Good. For example, some or all of the pixel electrodes may be made of aluminum, silver, etc. This would be a good approach. Furthermore, in that case, a memory circuit such as an SRAM should be placed below the reflective electrode. This is also possible. This will further reduce power consumption.

[0391] Furthermore, the display method used by the display device may include progressive scanning or interlaced scanning. It is possible to do so. Also, when displaying in color, the color elements controlled by pixels are RGB( It is not limited to the three colors (R represents red, G represents green, and B represents blue). For example, an R pixel and a G pixel It may consist of four pixels: one B pixel and two W (white) pixels. Alternatively, it may be a PenTile arrangement. Uni (sea urchin) uses two of the RGB colors to form one color element, and then selects two different colors based on that color element. Alternatively, you may configure it as follows: Add one or more colors such as yellow, cyan, and magenta to RGB. This is also acceptable. Furthermore, the size of the display area for each dot of the color element may differ. Furthermore, the disclosed invention is not limited to a color display device, but also includes a monochrome display device. It can also be applied to display devices.

[0392] In addition, the display device has a backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) White light (W) may be provided. Also, a colored layer (also called a color filter) may be provided in the display device. A colored layer may be provided. For example, red (R), green (G), blue (B) ), yellow (Y), etc. can be used in appropriate combinations. By using a colored layer This allows for higher color reproduction compared to cases where a colored layer is not used. By arranging a region having a colored layer and a region without a colored layer, a region without a colored layer is created. White light in the area may be used directly for display. A portion of the area may be placed without a colored layer. By placing it in this position, the reduction in brightness caused by the colored layer during bright displays can be minimized, and power consumption is reduced by 2 In some cases, the emission can be reduced by 10% to 30%. However, this is due to the spontaneous generation of organic EL elements and inorganic EL elements. When displaying full color using optical elements, R, G, B, Y, and white (W) are used respectively. It is also acceptable to emit light from an element having the specified light-emitting color. By using a self-luminescent element, the colored layer can be In some cases, power consumption can be reduced even further than when using this method.

[0393] <4-5. Example of pixel configuration for a display device> Here, an example of a display device having the pixel circuit shown in Figure 36(B) is shown in Figure 39(A). (B) will be used for explanation. Figure 39(A) is a top view of the pixel section of the display device, and Figure 39( B) is a cross-sectional view between the dashed line X1 and X2 shown in Figure 39(A). Note that Figure 39(A) In order to avoid complexity in the drawings, some of the components are omitted from the illustrations.

[0394] The display device shown in Figures 39(A) and 39(B) functions as the first gate electrode on the substrate 702. A conductive film 704, insulating films 706 and 707 on the conductive film 704, and an oxide on the insulating film 707. The semiconductor film 708, the insulating film 707, and the source electrode and drain on the oxide semiconductor film 708. Conductive films 712a and 712b that function as electrodes, and conductive film 712c on insulating film 707 insulating films 714, 7 covering oxide semiconductor film 708 and conductive films 712a, 712b, 712c. 16, and an oxide semiconductor film 720 that functions as a second gate electrode on the insulating film 716, and The insulating film 718 on the edge film 716 and the oxide semiconductor film 720, and the planarized insulating film on the insulating film 718. An insulating film 722 that functions as a film, and a conductive film 72 that functions as a pixel electrode on the insulating film 722. 4a and 724b have a function to suppress electrical connection between conductive film 724a and conductive film 724b. A structure 726 having conductive films 724a, 724b and an EL layer 728 on the structure 726 It has a conductive film 730 on the EL layer 728.

[0395] Furthermore, the conductive film 712c is transmitted through the openings 752c provided in the insulating films 706 and 707. It is electrically connected to the conductive film 704. It also functions as a second gate electrode. The body film 720 penetrates the conductive film 712 through openings 752a provided in the insulating films 714 and 716. b is electrically connected. Also, the conductive film 724a is insulated with insulating films 714, 716, 718, 7 The conductive film 712b is electrically connected to the opening 752b provided in 22.

[0396] Furthermore, the conductive film 724a, which functions as a pixel electrode, the EL layer 728, and the conductive film 730, The light-emitting element 572 is formed. The EL layer 728 is formed by sputtering, deposition, etc. Methods (including vacuum deposition), printing methods (e.g., letterpress printing, intaglio printing, gravure printing, It can be formed by methods such as lithography, stencil printing, inkjet printing, and coating. ru.

[0397] As shown in Figures 36(B) and 39(A)(B), the pixel configuration of the display device is as follows: By using a configuration with two transistors and one capacitive element, the number of wires can be reduced. This is possible. For example, as shown in Figures 36(B) and 39(A), the pixels have a gate. It can consist of three lines: a T line, a data line, and an anode line. This makes it possible to increase the aperture ratio of the pixels in the display device. Also, it reduces the number of wires. Therefore, short circuits between adjacent wires are less likely to occur, providing a display device with a high yield. It becomes possible to do so.

[0398] The configuration shown in this embodiment may be used in appropriate combination with the configurations shown in other embodiments. It is possible.

[0399] (Embodiment 5) In this embodiment, a display device having a semiconductor device according to one aspect of the present invention, and the display Electronic devices with input devices attached to the apparatus will be explained using Figures 40 to 47.

[0400] <5-1. Explanation regarding the touch panel> In this embodiment, as an example of electronic equipment, a display device and an input device are combined. This document describes the Touch Panel 2000. It also explains the Touch Sensor as an example of an input device. This section explains when to use "sa".

[0401] Figures 40(A) and 40(B) are perspective views of the Touch Panel 2000. In section B), for clarity, typical components of the touch panel 2000 are shown.

[0402] The touch panel 2000 has a display device 2501 and a touch sensor 2595 (Figure 4). See 0(B). Also, the touch panel 2000 is made up of substrate 2510, substrate 2570, and substrate It has a plate 2590. Note that substrates 2510, 2570, and 2590 are all It is flexible. However, any one of substrates 2510, 2570, and 2590 The configuration may be one or all of which lack flexibility.

[0403] The display device 2501 has multiple pixels on the substrate 2510 and supplies signals to these pixels. It has multiple wirings 2511. The multiple wirings 2511 are located on the outer periphery of the substrate 2510. The wiring is routed, and wiring 2519 is formed on wiring 2511. Wiring 2519 is FPC Connect electrically to 2509(1).

[0404] Here, we will describe an example of the configuration of the outer periphery and terminal portion of the substrate 2510 of the display device 2501. Next, we will explain using Figures 41 and 42. Figure 41(A) illustrates an example of the outer periphery of the substrate. This is a cross-sectional view, and Figures 41(B) and 41(C) are cross-sectional views illustrating an example of a terminal section. Figures 42(A), (B), and (C) are cross-sectional views illustrating an example of a terminal section.

[0405] The configuration shown in Figure 41(A) consists of an insulating film 906 on the substrate 2510 and an insulating film 906. Film 907, insulating films 914 and 916 on insulating film 907, insulating film 906 and insulating film 916 The insulating film 918 on top, the insulating film 956 on the insulating film 918, and the insulating film 940 on the insulating film 956 It also includes an insulating film 956 and a sealing material 942 on the insulating film 940.

[0406] Insulating films 906, 907, 914, 916, 918, and 956 are, respectively, in Embodiment 1 Similar materials and methods as shown for insulating films 106, 107, 114, 116, 118, and 156. It can be formed more effectively.

[0407] Furthermore, the insulating film 940 can be an organic insulating material such as an acrylic resin. This can be achieved. By forming an insulating film 940, irregularities caused by transistors, etc., can be smoothed out. It can be flattened. Also, as the sealing material 942, for example, epoxy resin or glass It is preferable to use sprit. Also, as a material used for sealing, moisture and oxygen It is preferable to use a material that does not allow light to pass through.

[0408] As shown in Figure 41(A), the outer periphery of the substrate is configured such that insulating film 906 and insulating film 918 However, because it is installed in contact with the surface, it can suppress the intrusion of impurities such as moisture from the outside. can.

[0409] The configuration shown in Figure 41(B) consists of a conductive film 904 on the substrate 2510, and the substrate 2510 and conductive The insulating film 906 on film 904, the insulating film 907 on insulating film 906, and the conductive film on insulating film 907. Film 912, insulating films 914 and 916 on the conductive film 912, insulating film 916 and conductive film 912 The oxide semiconductor film 920 on top, the insulating films 906, 916 and the insulating film on the oxide semiconductor film 920 It has a film 918 and an insulating film 956 on the insulating film 918. Also, insulating films 914, 916 An opening 930a reaching the oxide semiconductor film 920 is provided therein. Also, insulating film 918 In addition, an opening 930b is provided in 956 that reaches the oxide semiconductor film 920. The semiconductor film 920 is electrically connected to the FPC2509(1) via the anisotropic conductive film 944. It continues.

[0410] The conductive films 904, 912, and oxide semiconductor film 920 are as shown in Embodiment 1. Formed using the same materials and methods as the electrolytic film 104, conductive film 112, and oxide semiconductor film 120. It is possible.

[0411] In Figure 41(B), the configuration for providing the conductive film 904 on the substrate 2510 is described below. As illustrated, the example is not limited to this, and for example, as shown in Figure 41(C), on the substrate 2510 A configuration without the conductive film 904 is also possible.

[0412] Furthermore, in Figures 41(B) and 41(C), an oxide semiconductor film 920 is provided on the conductive film 912. While the above is an example of a configuration, it is not limited to this. For example, as shown in Figure 42(A), Alternatively, the oxide semiconductor film 920 may not be provided on the electrode film 912. As shown in ( ), a configuration may be made in which the conductive film 904 and the oxide semiconductor film 920 are not provided. Alternatively, as shown in Figure 42(C), a conductive film 958 is provided to cover the opening 930b. It may also be a configuration. In the configuration shown in Figure 42(C), the anisotropic conductive film 944 is the conductive film 958 The conductive film 912 is electrically connected to the oxide semiconductor film 920.

[0413] Furthermore, as shown in Figures 41(B) and 41(C), the anisotropic conductive film 944 is connected. A configuration in which an oxide semiconductor film 920 is provided in the region is preferable. This configuration improves the adhesion between the terminal portion and the anisotropic conductive film 944. .

[0414] Furthermore, the substrate 2590 is electrically connected to the touch sensor 2595. It has a plurality of consecutive wirings 2598. The plurality of wirings 2598 are located on the outer periphery of the substrate 2590. It is routed, and part of it forms a terminal. This terminal then connects to FPC2509(2) and electrical They are connected precisely. Note that in Figure 40(B), for clarity, the back side of substrate 2590 (substrate 2 The electrodes and wiring of the touch sensor 2595, which is located on the side opposite to 510, are shown with solid lines. It is.

[0415] For example, a capacitive touch sensor can be used as the touch sensor 2595. Capacitive capacitance methods include surface capacitance and projected capacitance.

[0416] Projected capacitance systems are classified into self-capacitance and mutual-capacitance types, mainly based on differences in their driving methods. There are several advantages. Using a mutual capacitance method is preferable because it enables simultaneous multi-point detection.

[0417] Note that the touch sensor 2595 shown in Figure 40(B) is a projected capacitive touch sensor. This configuration applies the "S" setting.

[0418] Furthermore, the touch sensor 2595 can detect the proximity or contact of an object to be detected, such as a finger. Yes, various sensors can be applied.

[0419] The projected capacitive touch sensor 2595 has electrodes 2591 and 2592. Electrode 2591 is electrically connected to one of the multiple wires 2598, and electrode 2592 is Connect electrically to any of the other wires 2598.

[0420] As shown in Figures 40(A) and 40(B), the electrode 2592 is arranged in multiple repeating directions. It has a shape in which the quadrilaterals are connected at their corners.

[0421] Electrode 2591 is quadrilateral and repeats in a direction intersecting the direction in which electrode 2592 extends. It is positioned.

[0422] Wiring 2594 is electrically connected to the two electrodes 2591 that sandwich electrode 2592. A shape that minimizes the area of ​​the intersection between electrode 2592 and wiring 2594 is preferable. This reduces the area where electrodes are not provided, thereby reducing variations in transmittance. Yes, it is possible. As a result, it reduces the variation in brightness of the light transmitted through the touch sensor 2595. It is possible.

[0423] Note that the shapes of electrodes 2591 and 2592 are not limited to these and can take on various shapes. For example, multiple electrodes 2591 are arranged so that there are as few gaps as possible, and an insulating layer is used. Multiple electrodes 2592 are provided spaced apart so that there is a region that does not overlap with electrode 2591. This configuration may also be used. In this case, between the two adjacent electrodes 2592, there is an electrical connection between them. Providing an insulated dummy electrode is preferable because it reduces the area of ​​regions with different transmittances. .

[0424] Note that conductive films such as electrode 2591, electrode 2592, and wiring 2598, i.e., touch panel Materials that can be used for wiring and electrodes that make up the circuit include indium oxide, tin oxide, and acid Examples include transparent conductive films containing zinc oxide (e.g., ITO). Also, touch panels. For example, materials that can be used for the wiring and electrodes that make up the system are preferred if they have a low resistance. For example, silver, copper, aluminum, carbon nanotubes, graphene, halogen Metal halides (such as silver halides) may also be used. Furthermore, extremely thin (for example, Even when using metal nanowires composed of multiple conductors (with a diameter of several nanometers), That's fine. Alternatively, a metal mesh made of conductive material in a network structure may be used. For example, Ag Nanowires, Cu nanowires, Al nanowires, Ag mesh, Cu mesh, Al mesh You may also use materials such as scouring pads. For example, Ag nanowires can be used for the wiring and electrodes that make up a touch panel. When using this material, the transmittance in visible light should be 89% or higher, and the sheet resistance should be 40 Ω / cm². 2 That's all. 100Ω / cm 2 The following is possible. Also, the wiring that constitutes the touch panel as described above. Examples of materials that can be used for electrodes include metal nanowires, metal meshes, and carbon Nanotubes, graphene, and other materials have high transmittance in visible light, and are therefore used in display elements. It may also be used as an electrode (for example, a pixel electrode or a common electrode).

[0425] <5-2. Explanation regarding display devices> Next, the details of the display device 2501 will be explained using Figures 43(A) and 43(B). Figure 4 3(A)(B) corresponds to the cross-sectional view between the dashed line X1 and X2 shown in Figure 40(B).

[0426] The display device 2501 has a plurality of pixels arranged in a matrix. These pixels are display elements. It has a child and a pixel circuit that drives the display element.

[0427] [Configuration using EL elements as display elements] First, the configuration using EL elements as display elements will be explained below using Figure 43(A). This will be done. Note that in the following explanation, the case where an EL element emitting white light is applied will be described. As will be explained later, EL elements are not limited to this. For example, light emitted from each adjacent pixel. You may use EL elements with different light-emitting colors so that the colors are different.

[0428] For example, substrates 2510 and 2570 have a water vapor transmission rate of 10 -5 g / (m 2 (day) or less, preferably 10 -6 g / (m 2 It has flexibility of less than or equal to (day). The material can be suitably used. Alternatively, the thermal expansion coefficient of substrate 2510 and substrate 2570 It is preferable to use a material with a coefficient of thermal expansion that is approximately equal to that of the material. For example, a material with a coefficient of linear expansion of 1 × 10⁻⁶. - 3 / K or less, preferably 5 × 10 -5 / K or less, more comfortable 1×10 -5 / K or less Certain materials can be used suitably.

[0429] Furthermore, the substrate 2510 has an insulating layer 2510a that prevents the diffusion of impurities to the EL element, and a flexible Adhesive layer 2 for bonding substrate 2510b, insulating layer 2510a, and flexible substrate 2510b It is a laminate having 510c. In addition, the substrate 2570 is a laminate that prevents the diffusion of impurities into the EL element. An insulating layer 2570a to prevent leakage, a flexible substrate 2570b, and the insulating layer 2570a and the flexible substrate The laminate has an adhesive layer 2570c that bonds 2570b together.

[0430] Examples of adhesive layers 2510c and 2570c include polyester, polyolefin, etc. Polyamide (nylon, aramid, etc.), polyimide, polycarbonate, or acrylic Materials containing yl resin, polyurethane, epoxy resin, or resin having siloxane bonds You can use it.

[0431] Furthermore, a sealing layer 2560 is provided between substrate 2510 and substrate 2570. (Sealing layer 2560) It is preferable that it has a refractive index greater than that of air. Also, as shown in Figure 43(A), sealing If light is to be extracted to the layer 2560 side, the sealing layer 2560 can also function as an optical element.

[0432] Alternatively, a sealing material 2561 may be formed on the outer periphery of the sealing layer 2560. By using 1, the substrate 2510, substrate 2570, sealing layer 2560, and sealing material 2 The region enclosed by 561 can be configured to have an EL element 2550. Layer 2560 may be filled with an inert gas (such as nitrogen or argon). A desiccant may be provided inside the gaseous body to adsorb moisture and other substances.

[0433] Furthermore, the display device 2501 shown in Figure 43(A) has pixels 2505. 505 consists of a light-emitting module 2580, an EL element 2550, and power supplied to the EL element 2550. It has a transistor 2502t that can be supplied. 2t functions as part of the pixel circuit.

[0434] Furthermore, the light-emitting module 2580 includes an EL element 2550 and a colored layer 2567. Furthermore, the EL element 2550 has a lower electrode, an upper electrode, and an EL between the lower electrode and the upper electrode. It has layers.

[0435] Furthermore, if the sealing layer 2560 is provided on the side from which light is extracted, the sealing layer 2560 is E It is in contact with the L element 2550 and the colored layer 2567.

[0436] The colored layer 2567 is located in a position that overlaps with the EL element 2550. As a result, the EL element 25 A portion of the light emitted by 50 passes through the colored layer 2567 and is emitted in the direction of the arrow shown in the figure as part of the light-emitting module. It is ejected to the outside of the 2580.

[0437] Furthermore, the display device 2501 is provided with a light-shielding layer 2568 in the direction from which light is emitted. Layer 2568 is provided so as to surround the colored layer 2567.

[0438] The colored layer 2567 only needs to have the function of transmitting light in a specific wavelength band, for example. For example, a color filter that transmits light in the red wavelength range, and a color filter that transmits light in the green wavelength range. A color filter that transmits light in the blue wavelength range, and a color filter that transmits light in the yellow wavelength range. Various color filters can be used. Each color filter uses different materials. This includes printing methods, inkjet methods, and etching methods using photolithography technology. It can be formed with.

[0439] Furthermore, the display device 2501 is provided with an insulating layer 2521. The insulating layer 2521 is made of transistors. It covers the ZISTA 2502t, etc. The insulating layer 2521 flattens the irregularities caused by the pixel circuit. It has the function to do so. Furthermore, it provides the insulating layer 2521 with a function to suppress the diffusion of impurities. This may be done. This can lead to a decrease in the reliability of transistors such as the 2502t due to the diffusion of impurities. This can suppress it.

[0440] Furthermore, the EL element 2550 is formed above the insulating layer 2521. The lower electrode of 50 is provided with a partition wall 2528 that overlaps the end of the lower electrode. A spacer is formed on the partition wall 2528 to control the distance between substrate 2510 and substrate 2570. You may do so.

[0441] Furthermore, the scan line drive circuit 2504 includes a transistor 2503t and a capacitive element 2503c. It has the following features. Furthermore, the drive circuit can be formed on the same substrate using the same process as the pixel circuit. .

[0442] Furthermore, wiring 2511 that can supply signals is provided on the circuit board 2510. Furthermore, wiring 2519 is provided on wiring 2511. Also, wiring 2519 has FP C2509(1) is electrically connected. Also, FPC2509(1) receives the video signal. It has the function of supplying clock signals, start signals, reset signals, etc. Note: FPC2 A printed circuit board (PWB) may be attached to 509(1).

[0443] Note that either or both of transistors 2502t and 2503t may be included. The transistor shown in the previous embodiment can be applied to this. The transistor has a highly purified and crystallinity oxide semiconductor film. The transistor is in the off state. The current value (off-current value) in this case can be reduced. Therefore, electrical signals such as image signals The retention time can be extended, and the write interval can also be set to be longer when the power is on. This reduces the frequency of refresh operations, thus lowering power consumption. This will produce the desired result. Details of the refresh operation will be described later.

[0444] Furthermore, the transistor used in this embodiment is capable of obtaining a relatively high field-effect mobility. Therefore, high-speed operation is possible. For example, a transistor capable of such high-speed operation can be used in a display device. By using it in position 2501, the switching transistor of the pixel circuit and the drive circuit are used. The driver transistor can be formed on the same substrate. In other words, a separate drive circuit Therefore, since there is no need to use semiconductor devices formed from silicon wafers, etc., The number of parts in the device can be reduced. Furthermore, high-speed driving is possible in the pixel circuit. By using transistors, high-quality images can be provided.

[0445] [Configuration using liquid crystal elements as display elements] Next, regarding the configuration using liquid crystal elements as display elements, the following explanation will be given using Figure 43(B). To illuminate. In the following explanation, a reflective liquid crystal display device that reflects ambient light will be used. This will be explained, but liquid crystal display devices are not limited to these. For example, the light source (backlight) By providing side lights, etc., a transmissive liquid crystal display device, or a device that combines both reflective and transmissive types, is used. It may also be used as a liquid crystal display device with the necessary capabilities.

[0446] The display device 2501 shown in Figure 43(B) is the same as the display device 2501 shown in Figure 43(A) and the following: The only difference is that the configuration is the same as the display device 2501 shown in Figure 43(A). That is the case.

[0447] The pixel 2505 of the display device 2501 shown in Figure 43(B) consists of a liquid crystal element 2551 and a liquid crystal element It has a transistor 2502t that can supply power to child 2551.

[0448] Furthermore, the liquid crystal element 2551 consists of a lower electrode (also called a pixel electrode), an upper electrode, and a lower electrode. A liquid crystal layer 2529 is located between the lower electrode and the upper electrode. The liquid crystal element 2551 has a lower electrode and an upper The orientation state of the liquid crystal layer 2529 can be changed by the voltage applied between it and the electrodes. Furthermore, spacers 2530a and 2530b are provided within the liquid crystal layer 2529. It is possible. Also, although not shown in Figure 43(B), the liquid crystal layer 25 of the upper electrode and lower electrode Alternatively, an orientation film may be provided on each side that is in contact with 29.

[0449] The liquid crystal layer 2529 can be a thermotropic liquid crystal, a low molecular weight liquid crystal, a polymer liquid crystal, or a polymer Dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc., can be used. These liquid crystal materials Depending on the conditions, the cholesteric phase, smectic phase, cubic phase, chiral nematics It exhibits phases such as cubic and isotropic. Furthermore, when a transverse electric field method is adopted as a liquid crystal display device, the alignment layer A liquid crystal that exhibits a blue phase without using coreless may also be used. The blue phase is one of the liquid crystal phases, and coreless As the temperature of a telic liquid crystal is increased, this phenomenon occurs just before the transition from the cholesteric phase to the isotropic phase. It is a phase. The blue phase only appears in a narrow temperature range, so in order to improve the temperature range, several steps are taken. A liquid crystal composition containing a chiral agent (by weight %) is used in the liquid crystal layer. The liquid crystal exhibits a blue phase and Liquid crystal compositions containing chiral agents have a short response speed. Furthermore, liquid crystals exhibiting a blue phase and chiral agents... Liquid crystal compositions containing the agent do not require alignment treatment. Furthermore, when using liquid crystals exhibiting a blue phase... In addition, the viewing angle dependence of the liquid crystal elements is small. Furthermore, since an alignment layer is not required, rubbing treatment is not necessary. Since this is also unnecessary, electrostatic discharge damage caused by rubbing can be prevented. This can reduce defects and damage to liquid crystal display devices during the manufacturing process.

[0450] Spacers 2530a and 2530b are obtained by selectively etching the insulating film. Spacers 2530a and 2530b are the distance between substrate 2510 and substrate 2570. These are provided to control the (cell gap). Note that spacers 2530a and 2530b are also included. They may be of different sizes, and are preferably provided in a columnar or spherical shape. In 43(B), spacers 2530a and 2530b are provided on the substrate 2570 side. While examples of configuration have been given, the system is not limited to these and may also be provided on the substrate 2510 side.

[0451] Furthermore, the upper electrode of the liquid crystal element 2551 is provided on the substrate 2570 side. An insulating layer 2531 is provided between the electrode, the colored layer 2567, and the light-shielding layer 2568. The edge layer 2531 has the function of flattening the irregularities caused by the colored layer 2567 and the light-shielding layer 2568. It has. For example, an organic resin film may be used as the insulating layer 2531. Also, liquid crystal element The lower electrode of 2551 functions as a reflective electrode. Display device 2 shown in Figure 43(B) 501 is a reverse ray that uses ambient light to reflect light with the lower electrode and displays it through the colored layer 2567. This is a transmissive liquid crystal display device. Note that if a transmissive liquid crystal display device is used, a transparent electrode is used at the lower electrode. You can simply assign it a function as an extreme.

[0452] Furthermore, the display device 2501 shown in Figure 43(B) has an insulating layer 2522. 22 covers transistor 2502t, etc. Note that the insulating layer 2522 is due to the pixel circuit. It has a function for flattening the unevenness and a function for forming unevenness on the lower electrode of the liquid crystal element. This makes it possible to form irregularities on the surface of the lower electrode. Therefore, ambient light When light is incident on the lower electrode, it becomes possible for the light to be diffusely reflected on the surface of the lower electrode. This improves visibility. In the case of a transmissive liquid crystal display device, the above-mentioned irregularities are provided. It may also be a configuration that does not allow for this.

[0453] <5-3. Explanation of Touch Sensors> Next, we will explain the details of the touch sensor 2595 using Figure 44. Figure 44 is a diagram. This corresponds to the cross-sectional view between the dashed line X3 and X4 shown in 40(B).

[0454] The touch sensor 2595 has electrodes 2591 and electrodes arranged in a staggered pattern on the substrate 2590. 2592, an insulating layer 2593 covering electrodes 2591 and 2592, and adjacent electrodes 25 It has wiring 2594 that electrically connects 91.

[0455] Electrodes 2591 and 2592 are formed using a light-transmitting conductive material. Conductive materials having this property include indium oxide, indium tin oxide, and indium zinc oxide. Conductive oxides such as zinc oxide, zinc oxide, and zinc oxide with added gallium can be used. Furthermore, a film containing graphene can also be used. A film containing graphene is, for example, a film-like structure. A film containing graphene oxide formed on the surface can be reduced to form a new film. Methods such as applying heat can be cited.

[0456] For example, a light-transmitting conductive material is deposited on a substrate 2590 by sputtering. Afterwards, various patterning techniques such as photolithography are used to remove unwanted parts. Electrodes 2591 and 2592 can be formed.

[0457] Furthermore, the materials used for the insulating layer 2593 include, for example, resins such as acrylic and epoxy. In addition to resins containing siloxane bonds, silicon oxide, silicon oxide nitride, aluminum oxide Inorganic insulating materials such as MU can also be used.

[0458] Furthermore, an opening reaching the electrode 2591 is provided in the insulating layer 2593, and the wiring 2594 is adjacent to it. It is electrically connected to electrode 2591. The light-transmitting conductive material increases the aperture ratio of the touch panel. Because it can be done this way, it can be suitably used in wiring 2594. Also, electrode 2591 Furthermore, materials with higher conductivity than electrode 2592 are preferable for wiring 2594 because they can reduce electrical resistance. It can be used appropriately.

[0459] The electrode 2592 extends in one direction, and multiple electrodes 2592 are arranged in a stripe pattern. Furthermore, the wiring 2594 is provided intersecting with the electrode 2592.

[0460] A pair of electrodes 2591 are provided flanking one electrode 2592. Also, the wiring 2594 is A pair of electrodes 2591 are electrically connected.

[0461] Note that the multiple electrodes 2591 are not necessarily arranged in a direction perpendicular to that of a single electrode 2592. It is not necessary to do so; they may be positioned to form an angle greater than 0 degrees but less than 90 degrees.

[0462] Furthermore, wiring 2598 is electrically connected to electrode 2591 or electrode 2592. A portion of the wiring 2598 functions as a terminal. Wiring 2598 can be, for example, made of aluminum. Nium, gold, platinum, silver, nickel, titanium, tungsten, chromium, molybdenum, iron, corn Using metallic materials such as balsamic, copper, or palladium, or alloy materials containing such metallic materials. It is possible.

[0463] Furthermore, an insulating layer is provided to cover the insulating layer 2593 and the wiring 2594, and the touch sensor 2595 It may be protected.

[0464] Furthermore, the connecting layer 2599 electrically connects the wiring 2598 and the FPC2509(2). .

[0465] The connecting layer 2599 is an anisotropic conductive film (ACF: Anisotropic C (conductive film) or anisotropic conductive paste (ACP: Anisotropic) You can use tools such as IC Conductive Paste.

[0466] <5-4. Explanation regarding the touch panel> Next, we will explain the details of the touch panel 2000 using Figure 45. Figure 45 is a diagram. This corresponds to the cross-sectional view between the dashed line X5 and X6 shown in 40(A).

[0467] The touch panel 2000 shown in Figure 45 is a combination of the display device 2501 described in Figure 43(A) and This configuration involves bonding together the touch sensor 2595, as explained in Figure 44, with the other components.

[0468] Furthermore, the touch panel 2000 shown in Figure 45 has the configuration described in Figures 43(A) and 44. In addition, it has an adhesive layer 2597 and an anti-reflective layer 2569.

[0469] The adhesive layer 2597 is provided in contact with the wiring 2594. The substrate 2590 is attached to the substrate 2570 so that the sensor 2595 overlaps the display device 2501. They are joined together. Furthermore, it is preferable that the adhesive layer 2597 has light-transmitting properties. Also, adhesive layer 2 For 597, a thermosetting resin or an ultraviolet curing resin can be used. For example, Using acrylic resin, urethane resin, epoxy resin, or siloxane resin It is possible.

[0470] The anti-reflective layer 2569 is provided in a position that overlaps with the pixel. For example, a circular polarizer can be used.

[0471] <5-5. Explanation of the touch panel operating method> Next, an example of a touch panel driving method will be explained using Figure 46.

[0472] Figure 46(A) is a block diagram showing the configuration of a mutually capacitive touch sensor. Figure 46 (A) shows the pulse voltage output circuit 2601 and the current detection circuit 2602. In Figure 46(A), the electrodes 2621 to which the pulse voltage is applied are designated as X1-X6, and the current changes... The electrodes 2622 that detect the change are shown as Y1-Y6, each represented by six wires. Furthermore, Figure 46(A) shows the capacitance formed by the superposition of electrode 2621 and electrode 2622. This indicates 2603. Note that electrodes 2621 and 2622 have interchangeable functions. You may do so.

[0473] The pulse voltage output circuit 2601 is a circuit for sequentially applying pulses to the X1-X6 wiring. Therefore, when a pulse voltage is applied to the wiring X1-X6, the capacitance 2603 is formed. An electric field is generated between pole 2621 and electrode 2622. This electric field generated between electrodes is affected by shielding, etc. By causing a change in the mutual capacitance of the 2603 capacitance, the proximity of the detected object, or It can detect contact.

[0474] The current detection circuit 2602 detects changes in the mutual capacitance of capacitor 2603, and the wiring of Y1-Y6 This is a circuit for detecting changes in current. In the wiring of Y1-Y6, proximity of the object to be detected, Alternatively, if there is no contact, the detected current value will not change, but if the object being detected is nearby, When the mutual capacitance decreases due to contact, a change in the current value is detected. Output can be performed using an integrating circuit or similar.

[0475] Next, Figure 46(B) shows the input of the mutual capacitive touch sensor shown in Figure 46(A). The timing chart of the output waveform is shown. Figure 46(B) shows the timing of each matrix in one frame period. The system will detect the object to be detected. Also, in Figure 46(B), the case where the object to be detected is not detected ( This shows two cases: one where the object to be detected is not touched, and another where the object to be detected is touched. Regarding the wiring of Y1-Y6, the waveforms shown represent the voltage values ​​corresponding to the detected current values. Yes, they are.

[0476] A pulse voltage is applied sequentially to the wiring of X1-X6, and Y1- The waveform changes in the Y6 wiring. If there is no proximity or contact with the detected object, X1-X6 The waveforms of Y1-Y6 change uniformly in response to changes in the voltage of the wiring. Meanwhile, when the object to be detected is nearby... Alternatively, at the point of contact, the current value decreases, and therefore the waveform of the corresponding voltage value also changes. ru.

[0477] In this way, by detecting changes in mutual capacitance, the proximity or contact of the object being detected can be detected. It is possible.

[0478] <5-6. Explanation of Sensor Circuits> Furthermore, in Figure 46(A), only a capacitor 2603 is provided at the wiring intersection as a touch sensor. The configuration of a passive touch sensor was shown, but an active touch sensor with transistors and capacitors is also shown. It may also be a type of touch sensor. One of the sensor circuits included in an active type touch sensor. An example is shown in Figure 47.

[0479] The sensor circuit shown in Figure 47 consists of capacitor 2603, transistor 2611, and transistor It has transistor 2612 and transistor 2613.

[0480] Transistor 2613 receives a signal G2 at its gate, and either its source or drain... A voltage VRES is applied, and the other side is one electrode of capacitor 2603 and transistor 2611 It is electrically connected to the gate. Transistor 2611 has either the source or the drain Electrically connect either the source or drain of transistor 2612, and apply a voltage VS to the other side. S is given. Transistor 2612 is given a signal G1 at its gate, and source or The other end of the drain is electrically connected to the wiring ML. The other electrode of the 2603 capacitance has a voltage VS. S is given.

[0481] Next, we will explain the operation of the detection circuit shown in Figure 47. First, as the signal G2, When a potential is applied that turns on transistor 2613, the gate of transistor 2611 A potential corresponding to the voltage VRES is applied to node n to which the signal G2 is connected. Next, the signal G2 and By applying a potential that turns off transistor 2613, the potential at node n becomes It is retained.

[0482] Next, the mutual capacitance of capacitance 2603 changes due to the proximity or contact of a detected object such as a finger. Consequently, the potential of node n changes from VRES.

[0483] The read operation applies a potential to signal G1 that turns on transistor 2612. The current flowing through transistor 2611, i.e., the current flowing through wiring ML, is determined by the potential of the current n. The current changes. By detecting this current, the proximity or contact of the object to be detected can be detected. It is possible.

[0484] Transistors 2611, 2612, and 2613 have been previously implemented. A transistor in the form shown can be applied. In particular, transistor 2613 can be the same as above. By applying the transistor shown in the embodiment, the potential of node n can be maintained over a long period of time. This allows for retention, and the operation of resupplying VRES to node n (refresh operation) is performed. This can reduce the frequency of )

[0485] The configuration shown in this embodiment may be used in appropriate combination with the configurations shown in other embodiments. It is possible.

[0486] (Embodiment 6) In this embodiment, the display element is a transverse electric field mode (also called a horizontal electric field mode) A display device using liquid crystal elements will be explained with reference to Figure 48.

[0487] Figure 48 is a flowchart illustrating the manufacturing process of a display device using transverse electric field mode liquid crystal elements. Yes. Note that in Figure 48, oxide semiconductors (especially CAAC-OS), low-temperature polysilicone (LTPS (Low Temperature Poly-Silicon)), also This refers to the case where hydrogenated amorphous silicon (a-Si:H) is used as the active layer of a transistor. These represent examples of the manufacturing process.

[0488] <6-1.CAAC-OS> This section explains the use of CAAC-OS in transistors. First, sputtering... The gate electrode (GE) is formed using a device (SP). When processing the gate electrode, one mask is used.

[0489] Next, a gate insulating film (GI: Gate In) is applied to the gate electrode using a PECVD apparatus. A sulator is formed. Then, using a sputtering apparatus, An oxide semiconductor (OS) film, which will serve as the active layer, is formed. Furthermore, the oxide semiconductor film is processed into island-like structures. Use one mask when doing so.

[0490] Next, a portion of the gate insulating film is processed to form an opening that reaches the gate electrode. One mask is used when forming the opening.

[0491] Next, a conductive film is formed on the gate insulating film and the oxide semiconductor film using a sputtering apparatus. The conductive film is then processed to form the source electrode and drain electrode (S / D electrode). Yes. Note that one mask is used when forming the source electrode and drain electrode.

[0492] Next, a PECVD apparatus is used to apply a powder to the oxide semiconductor film, source electrode, and drain electrode. It forms a septic film.

[0493] Next, a portion of the passivation film is fabricated to create an opening that reaches the source electrode or drain electrode. Form the mouth area. When forming this opening (contact opening), use one mask. To use.

[0494] Next, on the passivation membrane, so as to cover the openings formed in the passivation membrane, A common electrode is formed by creating a conductive film using a sputtering device and then processing the conductive film. Form the electrode. Note that one mask is used when forming the common electrode.

[0495] Next, an insulating film is formed on the passivation film and the common electrode using a PECVD apparatus. It is then opened in part of the insulating film to form an opening that reaches the source electrode or drain electrode. This forms the insulating film. Furthermore, when forming the insulating film (when forming an opening in part of the insulating film), the mass Use one "Ku" card.

[0496] Next, a conductive film is formed on the insulating film using a sputtering apparatus, and the conductive film is processed. This process forms the pixel electrodes. Note that one mask is used when forming the pixel electrodes.

[0497] By following the above steps, a liquid crystal display device in transverse electric field mode can be manufactured. -When using an OS, the number of masks for a liquid crystal display device in transverse field mode is 8.

[0498] <6-2.LTPS> Let's explain the case of using LTPS in transistors. First, the sputtering equipment... A light-shielding film is formed using this method. Note that one mask is used when processing the light-shielding film.

[0499] Next, a base insulating film is formed on the light-shielding film using a PECVD apparatus. After that, the base insulating film is formed. A silicon (Si) active layer is formed on the film using a PECVD apparatus. Subsequently, the Si is crystallized. To achieve this, excimer laser annealing (ELA) is used. (Nenealing) is performed. Also, after the ELA process, the Si in the active layer is crystallized silicon ( p-Si: This becomes poly-silicon. Note that ELA can be performed over a large area. Large-scale equipment is required. Also, linear irregularities and other issues unique to ELA may occur.

[0500] Next, the p-Si is processed to form island-like structures. Note that when processing the p-Si into island-like structures (p-Si a Use one mask for (Iland formation).

[0501] Next, a gate insulating film (GI) is formed on the p-Si using a PECVD apparatus. Next, the gate electrode (GE) is formed on the gate insulating film using a sputtering apparatus. Oh, when forming the gate electrode, one mask is used. Also, when forming the gate electrode In addition, a portion of the gate insulating film is also removed.

[0502] Next, to form an n+ region in p-Si, ion doping (ID: Ion D Impurities are implanted using an oping apparatus. Note that when forming the n+ region, a mask is used. One sheet is used. Next, an ion doping apparatus is used to form an n-region in p-Si. Impurities are implanted using this method. When forming the n-region, a mask is not used and the entire surface is treated. Doping is performed. Next, to form a p+ region in p-Si, an ion doping device is used. Impurities are implanted using a device. Note that one mask is used to form the p+ region. ru.

[0503] Next, thermal activation is performed. For this thermal activation, an annealing furnace, RTA device, etc., can be used. stomach.

[0504] Next, an interlayer insulating film is formed on the p-Si and the gate electrode using a PECVD apparatus. Subsequently, a portion of the interlayer insulating film and the gate insulating film is processed to form the n+ region and the p+ region. An opening is formed to reach the (GI + interlayer insulating film contact). Use one mask for the opening.

[0505] Next, a conductive film is formed on the interlayer insulating film with the openings using a sputtering apparatus. Then, by processing the conductive film, source electrodes and drain electrodes (S / D electrodes) are formed. One mask is used when forming the source electrode and drain electrode.

[0506] Next, a planar insulating film is formed on the source electrode and drain electrode using a coater device. For example, an organic resin film may be used as the planarizing insulating film. An opening is formed in which the source electrode or drain electrode is formed Use one mask when doing so.

[0507] Next, a conductive film is formed on the planar insulating film using a sputtering apparatus, and on the conductive film A common electrode is formed. Note that one mask is used when forming the common electrode.

[0508] Next, an insulating film is formed on the common electrode using a PECVD apparatus. A portion of it is opened to form an opening that reaches the source electrode or drain electrode. A mask is used when forming the film (when creating an opening in part of the insulating film).

[0509] Next, a conductive film is formed on the insulating film using a sputtering apparatus, and the conductive film is processed. This process forms the pixel electrodes. Note that one mask is used when forming the pixel electrodes.

[0510] By following the above steps, a liquid crystal display device in transverse electric field mode can be manufactured. When using this method, the number of masks for a liquid crystal display device in transverse electric field mode will be 11.

[0511] <6-3.a-Si:H> Let's explain the case where a-Si:H is used in a transistor. First, sputtering equipment Using a mask, the gate electrode (GE) is formed. Note that when processing the gate electrode, Use one of these.

[0512] Next, a gate insulating film (GI) is formed on the gate electrode using a PECVD apparatus. Afterward, a silicon film, which will serve as the active layer, is formed on the gate insulating film using a PECVD apparatus. Furthermore, one mask is used when processing the silicon film into island-like structures.

[0513] Next, a portion of the gate insulating film is processed to form an opening that reaches the gate electrode. One mask is used when forming the opening (contact opening).

[0514] Next, a conductive film is formed on the gate insulating film and the silicon film using a sputtering apparatus. By processing the conductive film, source electrodes and drain electrodes (S / D electrodes) are formed. One mask is used when forming the source electrode and drain electrode.

[0515] Next, a conductive film is formed on the source electrode and drain electrode using a sputtering apparatus. The common electrode is formed by processing the conductive film. Use one mask.

[0516] Next, an insulating film is formed on the common electrode using a PECVD apparatus. A portion of the insulating film is opened to form an opening that reaches the source electrode or drain electrode. When forming the film (when creating an opening in part of the insulating film), one mask is used.

[0517] Next, a conductive film is formed on the insulating film using a sputtering apparatus, and the conductive film is processed. This process forms the pixel electrodes. Note that one mask is used when forming the pixel electrodes.

[0518] By following the above steps, a liquid crystal display device in transverse electric field mode can be manufactured. When using :H, the number of masks for a liquid crystal display device in transverse electric field mode is 7.

[0519] In addition, in the flows shown in CAAC-OS, LTPS, and a-Si:H, common For electrode formation, insulating film formation on common electrodes, and pixel electrode formation, a transverse electric field mode liquid crystal is used. Due to the process related to the display device, the liquid crystal element is in a vertical electric field mode (e.g., VA mode). When using a liquid crystal display device, or when using an organic EL element as a display element: This can be done through different processes.

[0520] As shown in Figure 48, the transistor used in the transverse electric field mode liquid crystal element is CAAC -By using OS, the manufacturing process can be simplified compared to LTPS. Also, By using CAAC-OS, it is possible to manufacture with the same number of masks as with a-Si:H. ru.

[0521] Table 1 summarizes the characteristics of each process.

[0522] [Table 1]

[0523] In Table 1, "Total number of masks" refers to the number of masks caused by the electrode process of the liquid crystal element. This is the total number of masks, including the number of masks caused by the FET process. "Number of masks for T only" refers to the number of masks caused by the FET process, as shown in Table 1, CAA By using C-OS, it is possible to fabricate with the same number of masks as a-Si:H, and also a-Si:H Compared to electrical characteristics (field effect mobility (also simply called mobility), or on / off ratio, etc.) Its performance is high. Therefore, by using CAAC-OS, a display device with high display quality can be created. This becomes possible. Also, as shown in Table 1, CAAC-OS is superior to LTPS. The maximum process temperature is low, and the device cost and plant cost are low. Therefore This makes it possible to create display devices with reduced manufacturing costs.

[0524] Furthermore, transistors using oxide semiconductors, such as CAAC-OS, use silicon. Compared to the transistor used, 1. it has a lower off-current, and 2. it does not have a short-channel effect. 1. Very low, 2. High pressure resistance, or 3. Little change in temperature characteristics are all advantages. It produces a specific effect. Furthermore, transistors using oxide semiconductors are different from transistors using silicon. It has a switching speed equivalent to that of a transistor, or equivalent frequency characteristics (also called frequency response). Therefore, high-speed operation is possible. Thus, transients using oxide semiconductors Display devices with a stand can achieve high display quality and reliable display capabilities. ru.

[0525] The configuration shown in this embodiment can be used in appropriate combination with other embodiments. Cut.

[0526] (Embodiment 7) In this embodiment, a display device having a semiconductor device according to one aspect of the present invention, and the table The method for driving the display device will be explained using Figures 49 to 52.

[0527] Furthermore, one aspect of the present invention includes an information processing unit, a calculation unit, a storage unit, a display unit, and an input It may have departments or divisions.

[0528] Furthermore, in a display device according to one aspect of the present invention, the same image (still image) is displayed continuously. In this case, by reducing the number of times the same image signal is written (also called refreshing), This can reduce power consumption. The refresh rate can be adjusted. This is called the refresh rate (also known as the scan frequency or vertical synchronization frequency). Below, we will discuss the refresh rate in more detail. This section describes a display device that reduces eye strain.

[0529] There are two types of eye strain: nervous system fatigue and muscular system fatigue. Nervous system fatigue is... Prolonged exposure to the device's light-emitting and flashing screen can damage the retina, nerves, and brain due to its brightness. It is something that causes intense fatigue. Muscle fatigue is caused by the ciliary muscle used when adjusting focus. This method involves exhausting the animal by putting it through excessive strain.

[0530] Figure 49(A) shows a schematic diagram representing the display of a conventional display device. In conventional display devices, the image is rewritten 60 times per second. Staring at a screen for extended periods stimulates the user's retina, nerves, and brain, leading to eye strain. There was a risk of it being woken up.

[0531] In one embodiment of the present invention, the pixel portion of the display device is made of an oxide semiconductor. A transistor, for example, a transistor using CAAC-OS, is applied. The off-current of the display is extremely small. Therefore, even if the refresh rate of the display is lowered, the display will still be able to display. This makes it possible to maintain the brightness of the display device.

[0532] In other words, as shown in Figure 49(B), for example, it is possible to rewrite the image once every 5 seconds. Therefore, it becomes possible to view the same image for as long as possible, and the screen that is visible to the user is The stuttering is reduced. This reduces stimulation to the user's retina, nerves, and brain, and the nerves System fatigue is reduced.

[0533] Also, as shown in Figure 50(A), when the size of one pixel is large (for example, when the resolution is 15 If the display is less than 0 ppi, the characters displayed on the display will appear blurry. When you stare at blurry text for a long time, the ciliary muscles constantly move in an attempt to adjust the focus. Despite this, the difficulty in focusing persists, putting a strain on the eyes. There is a risk that this will happen.

[0534] In contrast, as shown in Figure 50(B), in a display device according to one aspect of the present invention, 1 pixel Because the size is small and high-resolution display is possible, it can produce a detailed and smooth display. This makes it easier for the ciliary muscles to focus, thus reducing fatigue in the user's muscular system. The workload is reduced. The resolution of the display device is set to 150 ppi or higher, preferably 200 ppi or higher. More preferably, setting it to 300 ppi or higher effectively reduces fatigue in the user's muscular system. It can be reduced.

[0535] Furthermore, methods for quantitatively measuring eye fatigue are being investigated. For example, assessment of nervous system fatigue. As a valence index, the critical flicker frequency (CFF) is used. Ion frequency, etc., are known. In addition, there are evaluation indicators for muscle fatigue. For example, adjustment time and adjustment distance are known.

[0536] Other methods for evaluating eye fatigue include electroencephalography (EEG), thermography, and blink rate. Measurements of tear volume, evaluation of pupillary constriction response rate, and questionnaires to investigate subjective symptoms. There are things like .

[0537] For example, the driving method of a display device according to one aspect of the present invention can be evaluated by the various methods described above. It is possible.

[0538] <7. Method of driving the display device> Here, a driving method for a display device according to one aspect of the present invention will be explained with reference to Figure 51.

[0539] [Example of image information display] The following example demonstrates how to move and display images containing two different types of image information. .

[0540] Figure 51(A) shows a window 451 on the display unit 450, and the information displayed in window 451. This shows an example where the first image 452a, which is a still image, is displayed.

[0541] In this case, it is preferable to display at the first refresh rate. The refresh rate is 1.16×10 -5 Hz (frequency of approximately once a day) or higher Below Hz, or 2.78 × 10⁻⁶ -4 Hz (frequency of approximately once per hour) to 0.5 Hz , or 1.67 × 10 -2 The frequency should be between Hz (approximately once per minute) and 0.1 Hz. It is possible.

[0542] In this way, the first refresh rate is set to an extremely small value, and the screen refresh rate By reducing the frequency, it is possible to achieve a display that is virtually flicker-free, allowing for more effective use. It can reduce eye strain for the user.

[0543] Note that window 451 is used, for example, to run image display application software. More is displayed, including a display area for displaying images.

[0544] Additionally, at the bottom of window 451, there is a button for switching the display of different image information. It has a button 453. By the user selecting button 453, the image is moved. Commands to activate the display device can be given to the information processing unit.

[0545] The user's operation method can be set according to the input method. For example, the input method can be a table When using the touch panel superimposed on the display unit 450, you can use your finger or stylus to access it. This involves operations such as touching buttons 453 or using gesture input such as sliding images. It can be operated by [this method]. When using gesture input or voice input, it is not always necessary Button 453 does not need to be displayed.

[0546] When the information processing unit of the display device receives a command to move the image, it will be displayed in window 451. The movement of the displayed image begins (Figure 51(B)).

[0547] Note that if the display was set to the first refresh rate at the time shown in Figure 51(A), Before moving the image, it is preferable to change the refresh rate to the second refresh rate. The second refresh rate is the value required to display moving images. For example, The second refresh rate is 30Hz to 960Hz, preferably 60Hz to 960Hz. 60Hz or less, more preferably 75Hz to 960Hz, more preferably 120Hz The frequency can be 960Hz or less, and more preferably 240Hz to 960Hz. .

[0548] Set the second refresh rate to a higher value than the first refresh rate. This allows for smoother and more natural display of moving images. Furthermore, it reduces flickering associated with rewriting. Because the flicker (also known as snoring) is suppressed for the user, eye strain is reduced. It can be reduced.

[0549] At this time, the images displayed in window 451 are the first image 452a and the next displayed This is the combined image of the second image 452b. Within window 451, this combined image is displayed. A portion of the image is displayed so that the combined image moves in one direction (to the left in this case).

[0550] Additionally, along with the movement of the combined images, the brightness of the images displayed within window 451 changes. The brightness decreases in stages compared to the brightness at the time point shown in Figure 51(A).

[0551] Figure 51(C) shows the point in time when the image displayed in window 451 reaches a predetermined coordinate. This indicates that the brightness of the image displayed in window 451 at this point is the highest. low.

[0552] In Figure 51(C), the first image 452a and the second image 452b are defined as predetermined coordinates. Each of these coordinates is shown with half of the coordinates displayed, but this is not limited to this, and users can freely It is preferable to make it configurable.

[0553] For example, the ratio of the distance from the initial coordinates to the distance from the final coordinates of an image is You should set the specified coordinates to be greater than 0 and less than 1.

[0554] Furthermore, the brightness level when the image reaches a predetermined coordinate can also be freely set by the user. This is preferable. For example, the ratio of the brightness when the image reaches a predetermined coordinate to the initial brightness is 0 It is set to less than 1, preferably 0 to 0.8, more preferably 0 to 0.5, etc. That's all you need to do.

[0555] Next, within window 451, the combined image moves while its brightness gradually increases. It will be displayed as shown (Figure 51(D)).

[0556] Figure 51(E) shows the point at which the coordinates of the combined image reach the final coordinates. Within the dome 451, only the second image 452b is displayed with the same brightness as the initial brightness. ru.

[0557] After the image transfer is complete, the refresh rate will be changed to the second refresh rate. Therefore, it is preferable to change to the first refresh rate.

[0558] By displaying this information, even if the user follows the movement of the image with their eyes, the image will still be visible. Because the brightness is reduced, eye strain on the user can be reduced. Therefore, By using this driving method, it is possible to achieve a display that is easy on the eyes.

[0559] [Example of document information display] Next, we'll look at an example of scrolling through document information that is larger than the size of the display window. I will explain about that.

[0560] Figure 52(A) shows a window 455 on the display unit 450, and the information displayed in window 455 is This shows an example where a portion of document information 456, which is a still image, is displayed.

[0561] In this case, it is preferable to display the image at the first refresh rate described above.

[0562] Windows 455 is used, for example, in document display applications and document creation applications. It is displayed when software such as a control program is executed, and includes a display area for displaying document information.

[0563] Document information 456 indicates that the size of its image is larger vertically than the display area of ​​window 455. Yes. Therefore, only a portion of window 455 is displayed. Also, As shown in Figure 52(A), window 455 displays which area of ​​document information 456 is displayed. It may also include a scroll bar 457 that indicates whether it is working or not.

[0564] The input unit sends a command to move the image (also called a scroll command here) to the display device. When given, the movement of document information 456 begins (Figure 52(B)). Also, it is displayed The brightness of the image decreases in steps.

[0565] Furthermore, if the display was set to the first refresh rate at the time shown in Figure 52(A), Before moving document information 456, change the refresh rate to the second refresh rate. It would be preferable if that happened.

[0566] Here, not only the brightness of the image displayed in window 455, but also the display unit 450 displays This shows a decrease in the overall brightness of the displayed image.

[0567] Figure 52(C) shows the point in time when the coordinates of document information 456 reach a predetermined coordinate. The overall brightness of the image displayed on the display unit 450 will be at its lowest.

[0568] Next, document information 456 is displayed within window 455 while moving (Figure 52). (D)). At this time, the overall brightness of the image displayed on the display unit 450 increases in steps.

[0569] Figure 52(E) shows the point at which the coordinates of document information 456 reach their final coordinates. Within Dou 455, there is an area different from the area initially displayed in document information 456, which is the initial bright area. It is displayed with a brightness equal to the degree.

[0570] Furthermore, after the transfer of document information 456 is complete, the refresh rate will be set to the first refresh rate. It is preferable to change it to a saturate.

[0571] By displaying this information, even if the user follows the movement of the image with their eyes, the image will still be visible. Because the brightness is reduced, eye strain on the user can be reduced. Therefore, By using this driving method, it is possible to achieve a display that is easy on the eyes.

[0572] In particular, high-contrast displays, such as those for document information, can cause more noticeable eye strain for users. Therefore, it is preferable to apply such a driving method to the display of document information.

[0573] This embodiment may be implemented in appropriate combination with other embodiments described herein. It is possible.

[0574] (Embodiment 8) In this embodiment, a display module, electronic device, and semiconductor device having a semiconductor device according to one aspect of the present invention are provided. The display device will be explained using Figures 53 to 55.

[0575] <8-1. Explanation of Display Modules> The display module 8000 shown in Figure 53 consists of an upper cover 8001 and a lower cover 8002. In between, the touch panel 8004 connected to the FPC8003 and the FPC8005 are connected. Display panel 8006, backlight 8007, frame 8009, printed circuit board 801 0, has battery 8011.

[0576] An oxide semiconductor film or semiconductor device according to one aspect of the present invention is, for example, a display panel 8006. It can be used.

[0577] The upper cover 8001 and the lower cover 8002 are the touch panel 8004 and the display panel. The shape and dimensions can be appropriately modified to match the size of the 8006.

[0578] The touch panel 8004 is a display panel using either a resistive or capacitive touch panel. It can be used superimposed on 8006. Also, the opposing substrate (sealing substrate) of the display panel 8006 It is also possible to give the board a touch panel function. It is also possible to install a light sensor in each pixel of 006 to create an optical touch panel.

[0579] The backlight 8007 has a light source 8008. Note that in Figure 53, the backlight The example given shows a configuration in which the light source 8008 is placed on the T8007, but it is not limited to this. For example, a light source 8008 is placed at the edge of the backlight 8007, and a light diffuser plate is also used. It may also be made into a component. Furthermore, when using self-emissive light-emitting elements such as organic EL elements, or when using reflection In the case of a display device of this type, a configuration without a backlight 8007 may be used.

[0580] Frame 8009 provides protection for the display panel 8006, as well as the movement of the printed circuit board 8010. It has the function of an electromagnetic shield to block electromagnetic waves generated by the operation. The 8009 may also function as a heat sink.

[0581] The printed circuit board 8010 contains power supply circuits and signals for outputting video and clock signals. It has a power processing circuit. The power supply that provides power to the power supply circuit is an external commercial power supply. Alternatively, a separate power source, the battery 8011, may also be used. This can be omitted when using commercial power.

[0582] Furthermore, the display module 8000 includes components such as polarizing plates, phase difference plates, and prism sheets. They may also be provided.

[0583] <8-2. Explanation regarding electronic equipment> Figures 54(A) to 54(G) show electronic devices. These electronic devices are enclosed in a housing. Body 9000, display unit 9001, speaker 9003, operation keys 9005 (power switch, or (including the operating switch), connection terminal 9006, sensor 9007 (force, displacement, position, velocity, Acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electricity To measure fields, currents, voltages, power, radiation, flow rates, humidity, gradients, vibrations, odors, or infrared radiation. It may have a microphone 9008 (including functions), etc.

[0584] The electronic devices shown in Figures 54(A) to 54(G) can have a variety of functions. For example, a function that displays various information (still images, videos, text images, etc.) on the display unit, Panel function, calendar, date or time display function, various software ( The program controls processing, provides wireless communication, and uses wireless communication to perform various tasks. Features include the ability to connect to computer networks and transmit various types of data using wireless communication. Alternatively, it can perform receiving functions, or read programs or data recorded on a recording medium and display them. It can have a function to display on the display unit, etc. Note that Figures 54(A) to 54(G) The functions that the electronic devices shown may have are not limited to these, and may have a variety of functions. This is possible. Also, although not shown in Figures 54(A) to 54(G), electronic devices include: The configuration may have multiple display units. Furthermore, the electronic device may be equipped with a camera or the like to capture still images. Functions for taking photos, recording videos, and recording images on a storage medium (external or built into the camera). It may also have a function to save the image to the display unit, a function to display the captured image on the display unit, etc.

[0585] Details of the electronic equipment shown in Figures 54(A) to 54(G) will be explained below.

[0586] Figure 54(A) is a perspective view showing the personal digital assistant 9100. The display unit 9001 has flexibility. Therefore, it can be used on the curved surface of the curved housing 9000. The display unit 9001 can be incorporated accordingly. Furthermore, the display unit 9001 is a touch sensor. It features a stylus that allows you to operate it by touching the screen with your finger or a stylus. For example, the display By touching the icon displayed on the display unit 9001, you can launch the application. can.

[0587] Figure 54(B) is a perspective view showing the personal digital assistant 9101. The personal digital assistant 9101 is It has one or more functions selected from, for example, a telephone, a notebook, or an information viewing device. Physically, it can be used as a smartphone. Furthermore, the mobile information terminal 9101 is... The speaker 9003, connection terminal 9006, sensor 9007, etc. are omitted from the diagram, but It can be installed in the same position as the portable information terminal 9100 shown in 54(A). The information terminal 9101 can display text and image information on its multiple surfaces. For example, Three operation buttons 9050 (also called operation icons or simply icons) are on the display unit 900. It can be displayed on one side of 1. Also, the information 9051 shown by the dashed rectangle is displayed on the display unit 90 It can be displayed on other sides of 01. For example, information 9051 is an email. A display that notifies you of incoming calls from social networking services (SNS) or phone calls. Subject of email or social media post, sender's name, date and time, time, This includes battery level, antenna signal strength, etc. Alternatively, information 9051 may be displayed. Instead of displaying information 9051, you may also display an operation button 9050 or the like at that location.

[0588] Figure 54(C) is a perspective view showing the personal digital assistant 9102. The personal digital assistant 9102 is The display unit 9001 has the function of displaying information on three or more sides. Here, information 9052, This shows an example where information 9053 and information 9054 are displayed on different sides. For example, The user of the mobile information terminal 9102 stores the mobile information terminal 9102 in the breast pocket of their clothing. In this state, you can check the display (information 9053 in this case). Specifically, when an incoming call is received... The phone number or name of the caller can be observed from above the mobile information terminal 9102. The information is displayed on the device. The user can view the information without taking the portable information terminal 9102 out of their pocket. This allows you to check and decide whether or not to answer the call.

[0589] Figure 54(D) is a perspective view showing the wristwatch-type personal information terminal 9200. Personal information terminal The 9200 is a mobile phone, email, document viewing and creation, music playback, and internet communication. It can run various applications such as computer games. The display unit 9001 has a curved display surface, and displays are performed along the curved display surface. It can do this. Furthermore, the personal information terminal 9200 can perform standardized short-range wireless communication. This is possible. For example, by communicating with a wireless headset, It is also possible to make calls using the free-call function. In addition, the mobile information terminal 9200 has a connection terminal 9006. It has the capability to directly exchange data with other information terminals via a connector. Charging can also be performed via connection terminal 9006. Note that the charging operation is performed via connection terminal 900 This may also be done by wireless power transfer without using 6.

[0590] Figures 54(E),(F), and(G) are perspective views showing a foldable portable information terminal 9201. Furthermore, Figure 54(E) is a perspective view of the mobile information terminal 9201 in an unfolded state, and Figure 54 (F) changes the mobile information terminal 9201 from one state to the other, either unfolded or folded. This is a perspective view of the device in the process of being folded, with Figure 54(G) showing the portable information terminal 9201 in its folded state. This is a perspective view of the device. The 9201 portable information terminal offers excellent portability when folded, and when unfolded... In this configuration, the seamless, wide display area provides excellent readability. (Portable Information Terminal 92) The display unit 9001 of 01 is connected by three housings 9000 via a hinge 9055. It is supported by bending the two housings 9000 via the hinge 9055. Furthermore, the mobile information terminal 9201 can be reversibly transformed from an unfolded state to a folded state. This is possible. For example, the mobile information terminal 9201 can bend with a radius of curvature of 1 mm or more and 150 mm or less. It is possible to do so.

[0591] Furthermore, Figures 55(A) and (B) are perspective views of a display device having multiple display panels. Oh, Figure 55(A) is a perspective view of the configuration in which multiple display panels are rolled up, and Figure 55(B) This is a perspective view with multiple display panels deployed.

[0592] The display device 9500 shown in Figures 55(A) and (B) consists of multiple display panels 9501 and a shaft portion 9 It has 511 and a bearing portion 9512. In addition, the multiple display panels 9501 have a display area It has a region 9502 and a translucent region 9503.

[0593] Furthermore, the multiple display panels 9501 are flexible. Also, two adjacent display panels The 9501 is provided such that parts of them overlap each other. For example, two adjacent The translucent areas 9503 of the display panel 9501 can be superimposed. By using the display panel 9501, a large-screen display device can be created. Depending on the situation, the display panel 9501 can be rolled up, making it a highly versatile display. It can be used as a display device.

[0594] Furthermore, in Figures 55(A) and (B), the display area 9502 is adjacent to the display panel 950 The diagram illustrates the state of separation at point 1, but it is not limited to this; for example, adjacent display panels 9 By overlapping the 501 display area 9502 without any gaps, a continuous display area 9502 and You may do so.

[0595] The electronic device described in this embodiment has a display unit for displaying some kind of information. However, one embodiment of the present invention can also be applied to electronic devices that do not have a display unit. This is possible. Furthermore, in the display unit of the electronic device described in this embodiment, flexibility is A configuration that allows display along a curved display surface, or a foldable display The structure of the part is illustrated as an example, but it is not limited to this, and it does not have flexibility and displays on a flat surface. It can also be used as a composition.

[0596] The configuration shown in this embodiment may be used in appropriate combination with the configurations shown in other embodiments. It is possible. [Explanation of Symbols]

[0597] 100 transistors 100A Transistor 100B transistor 100C Transistor 102 circuit boards 104 Conductive film 104a Conductive film 104b Conductive film 106 Insulating film 107 Insulating Film 10⁸ Oxide semiconductor film 108a Oxide semiconductor film 108a_0 Oxide semiconductor film 10⁸b oxide semiconductor film 108b_ Oxide semiconductor film 108b_0 Oxide semiconductor film 10⁸c oxide semiconductor film 112 Conductive film 112a Conductive film 112b Conductive film 112c conductive film 112d Conductive film 112e Conductive film 114 Insulating Film 116 Insulating film 118 Insulating Film 120 oxide semiconductor film 120a Oxide Semiconductor Film 120b oxide semiconductor film 120b_d Drain area 120b_i channel region 120b_s Source area 120°C oxide semiconductor film 132 Opening 150 transistors 150A Transistor 150B transistor 152 Insulating film 152_0 Insulating film 152a opening 152d opening 154 Conductive film 154_0 Conductive film 156 Insulating film 158_0 Conductive film 158a Conductive film 158b Conductive film 158c conductive film 162 Insulating film 171a opening 171b opening 173a opening 173b opening 191 Target 192 Plasma 193 Target 194 Plasma 195 masks 450 Display section 451 windows 452a Image 452b image 453 buttons 455 windows 456 Document Information 457 Scroll bar 501 Pixel Circuit 502 pixel section 504 Drive Circuit Section 504a Gate Driver 504b Source Driver 506 Protection circuit section 507 Terminal section 508 Sensor Circuit Section 510 transistors 512 Resistor elements 532 circuit boards 542a electrode 542b electrode 544 insulating film 546 Insulating film 548 Insulating film 550 Oxide semiconductor film 552 transistors 554 transistors 556 transistors 558 Resistor element 562 Capacitance element 572 Light-emitting element 572m light-emitting element 702 circuit board 704 Conductive film 706 Insulating film 707 Insulating film 708 Oxide Semiconductor Film 712a Conductive film 712b Conductive film 712c conductive film 714 Insulating Film 716 Insulating film 718 Insulating Film 720 oxide semiconductor film 722 Insulating film 724a Conductive film 724b Conductive film 726 Structure 728 EL layer 730 Conductive film 752a opening 752b opening 752c opening 802 circuit board 803 circuit board 806 Insulating film 807 Insulating film 814 Insulating film 816 Insulating film 819a Oxide semiconductor film 820 Oxide Semiconductor Film 820d Drain area 820i channel area 820s Source Area 824 Conductive film 829 Conductive film 832 Insulating film 834 Insulating film 836 Insulat...

Claims

[Claim 1] A semiconductor device having a first transistor and a second transistor, The first transistor described above is The first gate electrode and The first insulating film on the first gate electrode, The first oxide semiconductor film on the first insulating film, A source electrode electrically connected to the first oxide semiconductor film, A drain electrode electrically connected to the first oxide semiconductor film, The second insulating film on the first oxide semiconductor film, A second oxide semiconductor film that functions as a second gate electrode on the second insulating film, The invention comprises a third insulating film on the second oxide semiconductor film, The second transistor described above is A third oxide semiconductor film on the second insulating film, including a channel region, a source region and a drain region, The fourth insulating film on the channel region, The third gate electrode on the fourth insulating film, The third insulating film is located on the source region and the drain region, A semiconductor device characterized by the following features.

Images