μ-LEDs, μ-LED arrangement structures, displays, and methods related thereto

Abstract

We provide μ-LEDs for augmented reality or optical applications, particularly in the automotive sector. [Solution] The present invention relates to various embodiments of μ-LEDs or μ-LED arrangement structures for augmented reality or optical applications, particularly in the automotive field. In particular, the μ-LEDs are characterized by having very small dimensions of a few micrometers.

Description

[Technical Field]

[0001] This patent application is the same as the following German applications: German Patent Application Publication No. 102019201114.4 dated January 29, 2019; German Patent Application Publication No. 102019111766.6 dated May 7, 2019; German Patent Application Publication No. 102019112124.8 dated May 9, 2019; German Patent Application Publication No. 102019116313.7 dated June 14, 2019; German Patent Application Publication No. 102019131506.9 dated November 21, 2019; German Patent Application Publication No. 102019118251.4 dated July 5, 2019. German Patent Application Publication No. 102019118082.1 dated July 4, 2019; German Patent Application Publication No. 102019108260.9 dated March 29, 2019; German Patent Application Publication No. 102019125349.7 dated September 20, 2019; German Patent Application Publication No. 102019112490.5 dated May 13, 2019; German Patent Application Publication No. 102019112604.5 dated May 14, 2019; German Patent Application Publication No. 102019112609.6 dated May 14, 2019; German Patent Application Publication No. 102019112609.6 dated January 31, 2019 Specification No. 102019102509.5, German Patent Application Publication No. 102019115479.0 dated June 7, 2019, German Patent Application Publication No. 102019112616.9 dated May 14, 2019, German Patent Application Publication No. 102019113791.8 dated May 23, 2019, German Patent Application Publication No. 102019110499.8 dated April 23, 2019, German Patent Application Publication No. 102019110523.4 dated April 23, 2019, German Patent Application Publication No. 10201 Specification No. 9130934.4, German Patent Application Publication No. 102019114321.7 dated May 28, 2019, German Patent Application Publication No. 102019127425.7 dated October 11, 2019, German Patent Application Publication No. 102019112639.8 dated May 14, 2019, German Patent Application Publication No. 102019112605.3 dated May 14, 2019, German Patent Application Publication No. 102019113636.9 dated May 22, 2019, German Patent Application Publication No. 102019103365 dated February 11, 2019.Specification No. 9, German Patent Application Publication No. 102019116312.9 dated June 14, 2019, German Patent Application Publication No. 102019115991.1 dated June 12, 2019, German Patent Application Publication No. 102019125875.8 dated September 25, 2019, German Patent Application Publication No. 102019127424.9 dated October 11, 2019, German German Patent Application Publication No. 102019118085.6, German Patent Application Publication No. 102019125336.5 dated September 20, 2019, German Patent Application Publication No. 102019113793.4 dated May 23, 2019, German Patent Application Publication No. 102019110500.5 dated April 23, 2019, German Patent Application Publication No. 102019111767.4 dated May 7, 2019 Specification, German Patent Application Publication No. 102019121672.9 dated August 12, 2019, German Patent Application Publication No. 102019118084.8 dated July 4, 2019, German Patent Application Publication No. 102019113768.3 dated May 23, 2019, German Patent Application Publication No. 102019113792.6 dated May 23, 2019, German Patent Application Publication No. 102019113792.6 dated April 23, 2019 Application Publication No. 102019110497.1, German Patent Application Publication No. 102019114442.6 dated May 29, 2019, German Patent Application Publication No. 102019129209.3 dated October 29, 2019, German Patent Application Publication No. 102019130821.6 dated November 14, 2019, and German Patent Application Publication No. 102019130866 dated November 15, 2019.This document claims priority to Specification No. 6, the disclosures of which are incorporated herein by reference, and also claims priority to the following Danish applications: Specification No. 201970059 (DK PA201970059) dated January 29, 2019, and Specification No. 201970061 (DK PA201970061) dated January 29, 2019, the disclosures of which are incorporated herein by reference, and also claims priority to the following U.S. application: U.S. Patent Application No. 62 / 937,552 dated November 19, 2019, the disclosures of which are incorporated herein by reference.

[0002] Background technology Ongoing developments in the fields of the Internet of Things and communications are opening up a variety of new applications and concepts. These concepts and applications enhance effectiveness and efficiency for development, service, and manufacturing purposes.

[0003] One aspect of the new concept is based on augmented reality or virtual reality. The general definition of augmented reality is "an interactive experience of a real environment in which objects from the real world are augmented with computer-generated perceptible information."

[0004] Information is primarily conveyed through visualization, but it is not limited to vision. Sometimes, touch and other senses are used to augment reality. In visualization, overlaid sensory-visual information can be constructive, adding to the natural environment, or destructive, such as obscuring part of it. Furthermore, in some applications, it is possible to interact with the overlaid sensory information in some way. In this way, augmented reality enhances the user's continuous perception of the real environment.

[0005] In contrast, "virtual reality" replaces the user's real environment with a completely simulated environment. In other words, while a user in an augmented reality environment can perceive the real world at least partially, the virtual reality environment is completely simulated and may differ significantly from reality.

[0006] Augmented reality can be used to enhance the natural environment, enrich the user experience, and support users when performing specific tasks. For example, users can use a display with augmented reality capabilities to assist them in performing specific tasks. Users are supported by additional information as hints are provided by overlaying information about real objects. This allows for faster, safer, and more effective actions during manufacturing, repair work, or other services. In the medical field, augmented reality can be used to guide and support doctors in diagnosing and treating patients. In development, engineers can directly experience experimental results, making it easier to evaluate outcomes. In the tourism and events industry, augmented reality can provide users with additional information such as landmarks and history. Augmented reality can also be used to support learning activities and tasks.

[0007] overview The following overview describes various aspects of μ-displays in the fields of automotive and augmented reality applications. These include devices, displays, drive control units (Ansteuerungen), process engineering techniques, and other aspects suitable for augmented reality and automotive applications. These include aspects related to light generation using display units (Anzeigen) and displays. Furthermore, control circuits, current supply circuits, and aspects of light extraction, light guidance, and light focusing, as well as applications of such devices, are described and explained with various examples.

[0008] Due to the various limitations and challenges arising from the small size of photogenerating structural elements, combining various embodiments is not only advantageous but is often actually provided. For ease of discussion, this disclosure is divided into several sections of similar subject matter. However, this should not be explicitly understood as meaning that the functions of one subject matter should not be combined with those of another. Rather, combining embodiments of different subjects is necessary to create displays in the automotive field, as well as for augmented reality or other applications.

[0009] To consider the following solutions, it is necessary to explain several terms and expressions in order to define a common and equivalent understanding. In this document, the terms described are used generally based on this understanding. However, interpretations may differ in individual cases, and in such cases, these differences are made recognizable.

[0010] "Active Matrix Display" The term "active matrix display" was originally used for liquid crystal monitors in which thin-film transistors used to control LCD pixels are arranged in a matrix. Each pixel has a circuit with an active component (mainly a transistor) and a current supply terminal. However, this technology is now applied not only to liquid crystals but also to the control and driving units of μ-LEDs and μ-displays in particular.

[0011] "Active matrix carrier substrate" An "active matrix carrier substrate" or "active matrix backplane" refers to the drive control unit for the light-emitting diodes of a display equipped with a thin-film transistor circuit. In this case, the circuit may be incorporated into the backplane or applied to the backplane. The "active matrix carrier substrate" has one or more interface contacts that form electrical terminals to the μ-LED display structure. Therefore, the "active matrix carrier substrate" can be a component of an active matrix display or hold an active matrix display.

[0012] "Active layer" The active layer is the layer in a photoelectronic device and / or light-emitting diode where charge carriers recombine. In its simplest form, the active layer can be characterized by a region of two adjacent semiconductor layers of different conductivity types. More complex active layers include quantum wells (see relevant entry), multiple quantum wells, or other structures with additional properties. Similarly, the band gap of the active layer (see relevant entry) can be tuned by the structure and material system, which determines the wavelength and therefore the color of the light.

[0013] "Alvarez lens arrangement structure" A pair of Alvarez lenses can be used to adjust the beam path of video eyewear. The adjustment optical system (Verstelloptik) includes a rotatable variant with an Alvarez lens arrangement, particularly a moiré lens arrangement. In this case, the beam deflection is measured in terms of the radial direction z and the transverse directions x,y, for example z=ax 2 +by 2 It is determined by the first derivative of each phase plate relief, approximated by +cx+dy+e, and the offset of the two pairs of phase plates in the transverse x,y directions. In another configuration, a rotatable prism is intended for the adjustment optical system.

[0014] Augmented Reality (AR) Augmented reality (AR) is an interactive experience of the real world in which visual objects exist in the real world and are augmented with computer-generated perceptible information. Augmented reality means precisely this computer-assisted augmentation of reality perception using computer-generated perceptible information. This information can correspond to all human sensory modalities. However, augmented reality is often understood as merely the visual representation of information, that is, supplementing images and videos with additional computer-generated information or virtual objects through fade-in / overlay. The uses and explanations of augmented reality operating modes can be found in the introduction and the following examples.

[0015] "Automotive" The term "automotive" generally refers to the automobile or automotive industry. Therefore, this term should cover not only this field but also all other industrial sectors, including μ-displays or light displays and μ-LEDs, which generally have very high resolution.

[0016] "Band gap" The band gap is the energy distance between the valence band and conduction band of a solid, and is also called the band distance or forbidden band. Its electrical and optical properties are greatly influenced by the size of the band gap. The size of the band gap is usually expressed in electron volts (eV). Therefore, the band gap is also used to distinguish between metals, semiconductors, and insulators. The band gap can be adapted, or changed, by various measures such as spatial doping, deformation of the crystal lattice structure, and even changes in the material system. In material systems with a so-called direct band gap, where the maximum value of the valence band and the minimum value of the conduction band overlap in momentum space, electron-hole pair recombination becomes possible during light emission.

[0017] "Bragg Grating" A fiber Bragg grating is a special optical interference filter etched into an optical waveguide. Wavelengths within the filter bandwidth near λB are reflected. Periodic modulation of the refractive index occurs in various ways within the fiber core of the optical waveguide. This creates regions of high and low refractive index that reflect light of specific wavelengths (band stops). The center wavelength of the filter bandwidth in a single-mode fiber is due to the Bragg condition.

[0018] "Directivity" Directivity (i.e., the characteristic of indicating directionality) refers to the radiation pattern of a μ-LED or other light-emitting structural element. High directivity means high radiation directivity, i.e., a small radiation cone. Generally, the goal is to obtain high radiation directivity in order to avoid crosstalk (Uebersprechen) of light to adjacent pixels as much as possible. Therefore, the brightness of a light-emitting structural element varies depending on the viewing angle, and thus it differs from a Lambert emitter.

[0019] The directivity can be altered, for example, on the surface from which light emission is intended, by mechanical or other means. These means include, in addition to lenses, the placement of photonic crystals or pillar structures (columnar structures) on the emission surface of a pixelation array, and especially on an array of μ-LEDs. These create a virtual bandgap, reducing or preventing the propagation of light vectors along the emission surface.

[0020] "Distant world" The terms "near-field" and "far-field" describe the spatial regions surrounding an element that emits electromagnetic radiation, and they have different characteristics. Typically, the spatial region is divided into three areas: the reactive near-field, the transition region, and the far-field. In the far-field, electromagnetic radiation propagates as a plane wave, independent of the emitting element.

[0021] "Screen door effect" The screen door effect (SDE) is a permanently visible image artifact in digital video projectors. The term "screen door effect" refers to an undesirable black gap between individual pixels or their projected information, appearing as a mesh pattern, due to technical reasons. This gap is structural, as conductor tracks for drive control pass between each segment of the LCD, causing light to be absorbed and not reach the screen. When using small optoelectronic illumination devices, particularly μ-LEDs, or when the spacing between individual light-emitting diodes is too large, the resulting low packing density can make the difference between spot-illuminated and dark areas visible when viewing individual pixel regions. This so-called screen door effect is particularly noticeable at short viewing distances, especially in applications such as VR glasses. Subpixel structures are typically perceived and perceived as distracting when illuminance differences within a pixel periodically occur across a matrix arrangement structure. Therefore, the screen door effect in automotive and augmented reality applications should be avoided as much as possible.

[0022] "Flip Chip" Flip-chip assembly is an assembly and bonding technology process that brings unpackaged semiconductor chips into contact using contact protrusions, also known as convex protrusions. In flip-chip assembly, the chips are assembled directly via the protrusions toward the substrate / circuit carrier with the active contact surface facing downwards, without the need for further connecting wires. This results in particularly small package dimensions and shorter conductor lengths. Thus, flip-chips are electronic semiconductor elements that are contacted, especially on the back. Furthermore, this assembly may require special transfer techniques, such as those using auxiliary carriers. The radiation direction in a flip-chip is typically opposite the contact surface.

[0023] "flip flop" A flip-flop is an electronic circuit whose output signal has two stable states, and is sometimes called a bistable flip-flop or bistable multivibrator. In this case, the current state depends not only on the input signal present at that moment, but also on the state prior to that point in time. It is dependent only on events, not on time. This bistableness allows a flip-flop to store 1 bit of data for an unlimited amount of time. However, unlike other memory devices, the power supply circuit must be continuously guaranteed. As a fundamental component of sequential circuits, flip-flops are essential elements in digital technology and are fundamental components of many electronic circuits, from crystal clocks to microprocessors. In particular, as a rudimentary 1-bit memory, it is a fundamental element of static memory chips in computers. In some configurations, state information can be stored using various types of flip-flops and other buffer circuits. Each input and output signal is digital, meaning that it alternates between logically "false" and logically "true". These values ​​are also called "low" 0 and "high" 1.

[0024] "Head-up display" A head-up display (HMD) is a display system or projection device that projects information into the user's field of vision, allowing the user to maintain head position and gaze direction. A HMD is an augmented reality system. Some HMDs may also be equipped with sensors to determine gaze direction and spatial orientation.

[0025] "Horizontal light-emitting diode" In horizontal LEDs, the electrical terminals are located on a common surface of the LED. This is often the back surface, which is not facing the light-emitting surface of the LED. Therefore, horizontal light-emitting diodes have contacts that are shaped on only one side of the surface.

[0026] "Interference filter" An interference filter is an optical element that uses the effect of interference to filter light by frequency (or by color in the case of visible light).

[0027] "Collimation" In optics, the parallelization of the directions of diverging light beams is called collimation. Lenses associated with this are called collimators or focusing lenses. A collimated light beam has a high proportion of parallel rays, thus minimizing its spread during propagation. In this sense, it refers to the spread of light emitted from a light source. A collimated beam radiated from a surface is highly dependent on the beam angle. In other words, the radiance of a collimated light source (power per unit angle per unit area of ​​the projected light source region) changes as the angle increases. There are several ways to collimate light, for example, by using a special lens placed in front of the light source. Therefore, collimated light can also be considered to be highly directionally dependent.

[0028] "Conversion material" Conversion materials are materials suitable for converting light of a first wavelength to a second wavelength. In this case, the first wavelength is shorter than the second wavelength. These materials particularly include a variety of stable inorganic and organic dyes and quantum dots. These conversion materials can be applied to and patterned in various processes.

[0029] "Lambert Radiator" In many applications, a so-called Lambertian radiation pattern is required. This means that, ideally, the light-emitting surface has uniform irradiance across its surface, resulting in a circular distribution of radiant intensity in the vertical direction. Because the human eye only perceives luminance (which is the optical equivalent of radiance), such a Lambertian material appears to have the same brightness regardless of the viewing direction. This angle-independent uniform brightness can be a crucial quality factor, especially for curved and flexible display surfaces, but it is difficult to achieve with currently available displays due to structural and LED technology limitations.

[0030] LEDs and μ-LEDs are similar to Lambert emitters, emitting light with a large solid angle. Depending on the application, further measures are taken to improve the emission pattern or achieve higher directivity (see relevant section).

[0031] "Conductive type" "Conductivity type" refers to the dominant charge carrier (n-type or p-type) in a given semiconductor material. That is, a semiconductor material doped to the n-type is considered to have an n-type conductivity type. Therefore, if a semiconductor material is n-type, it is doped to the n-type. The "active" region of a semiconductor refers to the boundary region between the n-type doped layer and the p-type doped layer of the semiconductor. In this region, p-type and n-type charge carriers recombine radially. In some configurations, the active region is further patterned and includes, for example, quantum well structures and quantum dot structures.

[0032] "Light Field Display" A virtual retinal display (VNA), also known as a light field display, is a display technology that projects raster images directly onto the retina of the eye. This technology gives the user the impression that a screen is floating in front of their eyes. Light field displays can be provided as glasses that project raster images directly onto the user's retina. By projecting directly onto the retina, a virtual retinal display creates an image within the user's eye. A light field display is an augmented reality system.

[0033] "Lithography" or "Photolithography" Photolithography is one of the central techniques in semiconductor and microsystem technology for manufacturing products such as integrated circuits. In this technique, an image of a photomask is transferred to a photosensitive photoresist by exposure. Subsequently, the exposed areas of the photoresist are dissolved (or, if the photoresist is cured with light, the unexposed areas are also dissolved). This creates a lithography mask that can be further processed by chemical and physical processes, such as applying material to the exposed areas or etching recesses in the exposed areas. After that, any remaining photoresist can be removed.

[0034] "μ-LED" μ-LEDs are optoelectronic structures with edge lengths of less than 70 μm, especially below 20 μm, particularly in the range of 1 μm to 10 μm. A further range is 10 to 30 μm. This results in an area of ​​several hundred μm. 2 ~Several tens of μm 2 For example, a μ-LED has an edge length of approximately 8 μm, so the total length is approximately 60 μm. 2 It has an area of ​​30 μm. The edge length of the μ-LED is 5 μm or less, and as a result, 30 μm 2 The size can also be smaller than this. The typical height of such a μ-LED is, for example, in the range of 1.5 μm to 10 μm.

[0035] In addition to conventional lighting applications, displays are considered a primary application for μ-LEDs. In this case, μ-LEDs form pixels or subpixels, emitting light of a defined color. Because μ-LEDs have small pixel sizes and high density can be achieved with small spacing, they are particularly suitable for small monolithic displays for augmented reality (AR) applications.

[0036] As mentioned above, μ-LEDs are extremely small, making their manufacturing, processing, and handling significantly more difficult compared to conventional large LEDs. This also applies to additional elements such as contacts, packages, and lenses. There are aspects that are achievable with large optoelectronic structures but are either impossible with μ-LEDs or can only be achieved through other methods. In this respect, μ-LEDs differ significantly from conventional LEDs, i.e., light-emitting structures with edge lengths of 200 μm or more.

[0037] "μ-LED array" Please refer to the section on μ-displays.

[0038] "μ-display" A μ-display, or μ-LED array, is a matrix in which numerous pixels are arranged in fixed rows and columns. Functionally, it often consists of a matrix of μ-LEDs of the same type and color. Therefore, a larger illumination area can be obtained. On the other hand, the purpose of a μ-display is primarily to transmit information, and often requires different colors or addressable drive controls for each individual pixel or subpixel. A μ-display can be formed by arranging multiple μ-LED arrays on a backplane or other carrier. However, similarly, a μ-LED array can also form a μ-display.

[0039] The size of each pixel is on the order of a few micrometers, similar to that of a μ-LED. As a result, the overall dimensions of a μ-display with 1920 x 1080 pixels and a μ-LED with a pixel size of 5 μm, and adjacent pixels, are several tens of millimeters. 2 This is the order of magnitude. In other words, a μ-display or μ-LED array is a small array configuration realized using μ-LEDs.

[0040] A μ-display or μ-LED array can be formed from the same material, i.e., from a single workpiece. The μ-LEDs in a μ-LED array may be formed monolithically. Such a μ-display or μ-LED array is called a monolithic μ-LED array or μ-display.

[0041] Alternatively, two assemblies can be formed by individually growing μ-LEDs on a substrate and then using a so-called pick-and-place process to position them individually or in groups on a carrier at desired intervals from each other. Such μ-displays or μ-LED arrays are called non-monolithic. In non-monolithic μ-displays or μ-LED arrays, other spacings can be provided between individual μ-LEDs. These spacings can be flexibly selected depending on the application and design. Therefore, such μ-displays or μ-LED arrays can also be called pitch-expanded. In pitch-expanded μ-displays or μ-LED arrays, it means that when transferred to a carrier, the μ-LEDs are spaced further apart than on the growth substrate. In non-monolithic μ-displays or μ-LED arrays, individual pixels may each contain a blue-emitting μ-LED, a green-emitting μ-LED, and a red-emitting μ-LED.

[0042] To leverage the different advantages of monolithic and non-monolithic μ-LED arrays in a single module, a μ-display can be constructed by combining monolithic and non-monolithic μ-LED arrays. This allows the μ-display to implement different functions and / or applications. Such a display is called a hybrid display.

[0043] "μ-LED nanocolumn" A μ-LED nanocolumn is generally a stack of semiconductor layers having an active layer, thus forming a μ-LED. A μ-LED nanocolumn has an edge length smaller than the pillar height. For example, the edge length of a μ-LED nanocolumn is approximately 10 nm to 300 nm, and the device height can range from 200 nm to over 1 μm.

[0044] "μ-rod" A μ-rod, or rod in particular, refers to a geometric structure, especially a pole or bar, or generally a longitudinally extending structure, such as a cylindrical one. μ-rods are produced in spatial dimensions ranging from micrometers to nanometers. Therefore, nanorods are also included herein.

[0045] "Nano Rod" In nanotechnology, nanorods are designs of nanoscale objects. Their dimensions range from approximately 10 nm to 500 nm. They can be synthesized from metallic or semiconductor materials. Their aspect ratio (length divided by width) is between 3 and 5. Nanorods are manufactured directly through chemical synthesis. Ligand combinations act as shape-controlling agents, adhering to various facets of the nanorod with varying strengths. This allows for various designs of nanorods at different growth rates, resulting in the production of elongated objects. μLED nanocolumns are examples of such nanorods.

[0046] "Miniature Light-Emitting Diode" The dimensions of miniature light-emitting diodes range from 100 μm to 750 μm, and are particularly large in the range exceeding 150 μm.

[0047] "Moire effect" and "Moire lens arrangement structure" The moiré effect is an effect that occurs when a regular, relatively fine raster is overlaid, resulting in a raster that appears coarse at first glance. As a result, a pattern with an appearance similar to interference patterns is obtained, which is a special case of aliasing effect due to subsampling. In the field of signal analysis, the error that occurs when the sampled signal contains frequency components higher than half the sampling frequency is called the "aliasing effect." In image processing and computer graphics, the aliasing effect is when a pattern that was not present in the original image appears when an image is sampled. The moiré lens arrangement structure is a special case of the Alvarez lens arrangement structure.

[0048] "Monolithic element" A monolithic element is an element made from a single piece. A typical example of such an element is a monolithic pixel array, where the array is made from a single piece, and the μ-LEDs of the array are fabricated together on the carrier.

[0049] "Optical mode" A mode represents the characteristics of a wave that is stationary at a specific time. In this case, the wave is represented as the sum of different modes. Modes have different spatial distributions of intensity. The shape of a mode is determined by the boundary conditions as the wave propagates. Analysis using vibrational modes can be applied to both standing waves and continuous waves. Electromagnetic radiation such as light, lasers, and radio waves has modes such as TEM or transverse electromagnetic modes, TE or H modes, and TM or E modes. TEM or transverse electromagnetic mode: Both the electric field component and the magnetic field component are always perpendicular to the direction of propagation. This mode can only propagate when there are two conductors that are insulated from each other (equipotential surfaces), such as in a coaxial cable, or when there are no electrical conductors, such as in a gas laser or optical waveguide. TE or H mode: Only the electric field component is perpendicular to the direction of propagation, while the magnetic field component is oriented in the direction of propagation. TM or E mode: Only the electric field component is perpendicular to the direction of propagation, while the electric field component is oriented in the direction of propagation.

[0050] "Photoelectronic structure elements" Optoelectronic structures are semiconductor bodies that generate and emit light through the recombination of charge carriers during operation. The generated light can range from infrared to ultraviolet, and its wavelength depends on various parameters, particularly the material system and doping used. Optoelectronic structures are also known as light-emitting diodes (LEDs).

[0051] For the purposes of this disclosure, the terms optoelectronic structure and light-emitting structure are used synonymously. Therefore, a μ-LED (see the relevant section) is a special optoelectronic structure with respect to its geometric shape. In displays, optoelectronic structures typically exist either monolithically or as individual elements arranged on a matrix.

[0052] "Passive matrix backplane" or "Passive matrix carrier substrate" A passive matrix display is a matrix display in which individual pixels are passively driven and controlled (without using additional electronic components for each pixel). The light-emitting diodes in a display can be driven and controlled using an IC circuit. In contrast, monitors in which pixels are actively driven and controlled by transistors are called "active matrix displays." A passive matrix carrier substrate is a component of a passive matrix display and holds it in place.

[0053] "Photonic crystal" or "photonic structure" The photonic structure may be a photonic crystal, a quasi-periodic photonic structure, or a deterministic aperiodic photonic structure. The photonic structure generates a band structure of photons by periodically changing the refractive index of light. This band structure may have a band gap in a certain frequency range. This prevents photons from propagating through the photonic structure in all spatial directions. In particular, propagation parallel to the surface is often hindered, while propagation perpendicular to it is possible. In this way, the photonic structure or photonic crystal determines propagation in a specific direction. By blocking or reducing propagation in one direction, the photonic structure or photonic crystal generates a beam or beam of light directed, if necessary, towards a spatial or radiating region prepared for this purpose.

[0054] Photonic crystals are photonic structures that occur or form within transparent solids. While not necessarily crystals, their name derives from the similarity of X-ray diffraction and reflection effects within crystals, based on the crystal's lattice constant. The dimensions of these structures are more than a quarter of the relevant photon wavelength, ranging from a fraction of a micrometer to several micrometers. They are produced by classical lithography, but can also be generated by self-assembly processes.

[0055] Alternatively, similar or identical properties to those of photonic crystals can be produced in any structure that is aperiodic but nevertheless ordered. Such structures are particularly quasi-periodic or deterministically aperiodic structures. These include, for example, spiral photonic arrays.

[0056] In particular, a so-called two-dimensional photonic crystal is given as an example, which has a periodic change in the refractive index in two mutually orthogonal spatial directions, especially two mutually orthogonal spatial directions extending parallel to the light-emitting surface.

[0057] However, one-dimensional photonic structures, particularly one-dimensional photonic crystals, also exist. One-dimensional photonic crystals have a periodic change in refractive index along one direction. In particular, this direction can extend parallel to the light-emitting surface. A beam can be formed in a first spatial direction by a one-dimensional structure. In this case, the photonic effect can be obtained within a few periods of the photonic structure. For example, the photonic structure may be configured such that the electromagnetic radiation is at least approximately collimated with respect to the first spatial direction. Thus, a collimated beam can be produced, at least with respect to the first spatial direction.

[0058] "Pixels" A pixel, image cell, or image element refers to an area element necessary for acquiring or displaying color values ​​on a screen via an image sensor or raster-driven control, in addition to the individual color values ​​of digital raster graphics. Therefore, a pixel is an addressable element of a display device and has at least one light-emitting device. Pixels have a fixed size, and adjacent pixels are separated by a defined interval (pixel space). In displays, especially μ-displays, a single pixel is often formed by combining three (or four or more, if there is additional redundancy) subpixels of different colors.

[0059] "Prana Array" A planar array is essentially a flat surface. Often, it is smooth and lacks protruding structures. Typically, surface roughness is undesirable and does not provide the desired functionality. A planar array is, for example, a monolithic planar array with several optoelectronic structural elements.

[0060] "Pulse width modulation" Pulse width modulation (PWM) is a type of modulation used to drive and control elements, in this case, μ-LEDs. In this case, the PWM signal controls switches configured to turn the current flowing through each μ-LED on or off, resulting in either the μ-LED emitting light or not. PWM outputs a square wave signal with a constant frequency f. The brightness of the light emitted by the μ-LED is determined by the relative amount of the switch-on time to the switch-off time in each period T (=1 / f). The longer the switch-on time, the brighter the light.

[0061] "Quantum well" A quantum well (or quantumtopf) is a potential profile in the band structure of one or more semiconductor materials that restricts the freedom of particle movement in one spatial dimension (usually the z-direction). This means that only a planar region (x,y plane) is occupied by charge carriers. The width of the quantum well critically determines the quantum mechanical states that a particle can take, leading to the formation of energy levels (subbands). In other words, a particle can only take on discrete (potential) energy values.

[0062] "Recombination" Generally, radiative recombination and non-radiative recombination are distinguished. In the latter case, photons are generated, which can detach from the element. Non-radiative recombination generates phonons, which heat the element. The ratio of radiative to non-radiative recombination is a relevant parameter and depends particularly on the size of the element. Generally, the smaller the element, the smaller the ratio, and therefore non-radiative recombination increases compared to radiative recombination.

[0063] "Refreshment time" "Refresh time" refers to the time it takes for cells in displays and other devices to be rewritten to prevent information loss, or the time during which refresh is predetermined by the external environment.

[0064] "Die (Rohchip)" or "luminescent body" A light-emitting element or die is a semiconductor structure that is separated from a wafer after manufacturing and is suitable for generating light after electrical contact during operation. Therefore, the die referred to here is a semiconductor structure that includes an active layer for generating light. Typically, dies are separated into individual pieces after contact, but they can also be post-processed into an array.

[0065] "Slot antenna" A slot antenna is a special type of antenna in which, instead of surrounding a metal structure in space with air (as an insulator), a section of the metal structure (e.g., a metal plate, waveguide, etc.) is provided. This section causes the emission of electromagnetic radiation that is wavelength-dependent to the geometric shape of the section. In many cases, the section follows the principle of dipole, but theoretically other geometric shapes are also possible. Thus, a slot antenna includes a metal structure with a cavity resonator having a length on the order of the wavelength of visible light. The metal structure may be placed in or surrounded by insulating material. Typically, the metal structure is grounded to set a constant potential.

[0066] "Visual field" The field of view (FOV) is the range within the angle of view of an optical instrument, solar sensor, camera (film or recording sensor), or transparent display screen that can perceive and record events or changes. In particular, the field of view is the range that a person can see without moving their eyes. For augmented reality and apparent objects placed in front of the eye, the field of view includes the range indicated by the degree of the field of view angle when the eye is stable and fixed.

[0067] "Subpixels" A subpixel (or subpixel) represents the internal structure of a pixel. Typically, the term subpixel is associated with a higher resolution than what might be expected based on an individual pixel. A single pixel can consist of multiple smaller subpixels, each emitting a single color. The overall color impression of a pixel is created by the mixing of individual subpixels. Therefore, a subpixel is the smallest addressable unit in a display device. Similarly, a subpixel contains a fixed size that is smaller than the size of the pixel to which it is assigned.

[0068] "Vertical Light-Emitting Diode" In contrast to horizontal LEDs, vertical LEDs have one electrical terminal on the front side and one on the back side. One of the two sides also forms the light-emitting surface. Therefore, vertical light-emitting diodes have contacts on two opposing main surfaces. Consequently, it is necessary to deposit a conductive yet transparent material so that electrical contact is guaranteed on one side and light can pass through on the other.

[0069] "Virtual reality" Virtual reality (VR) is the representation and simultaneous perception of reality and its physical characteristics within a computer-generated, interactive virtual environment. Virtual reality can replace the operator's real environment with an environment that perfectly simulates it.

[0070] The following sections describe various embodiments of the semiconductor structure of μ-LEDs. These include structures and material systems for generating light. However, these embodiments are also related to considerations regarding processing.

[0071] Not only in the field of augmented reality, but also in automotive displays or other display arrangements using μ-LEDs, an essential aspect is that adjacent μ-LEDs in the arrangement are placed at such an interval as a μ-display or μ-array that individual μ-LEDs of this arrangement cannot be resolved or distinguished by the human eye. In particular, individual rows or columns in which μ-LEDs are arranged in row units or column units cannot be resolved or distinguished by the human eye. In addition, the distance between μ-LEDs or the pixel density and pixel pitch of the μ-LED array are appropriately adapted to the distance of the viewer from the μ-LED array so that the viewer's eyes cannot resolve individual μ-LEDs of the μ-LED array for each application.

[0072] The μ-LED array has the advantage that it consumes relatively less energy compared to arrays using organic light-emitting diodes (OLEDs) and liquid crystal displays (LCDs), and can achieve a maximum brightness of 10 6 Cd / m 2 Moreover, the μ-LED array realizes a very high pixel density of up to 5000 pixels per inch (PPI) and a very high refresh rate in the nanosecond range when used for displays. In addition, compared to OLEDs and LCDs, the μ-LED array has a very long service life and very excellent stability against environmental influences. Furthermore, by using the μ-LED array, it is possible to adjust values related to the contrast range and resolution to desired values of these parameters, for example, according to the application.

[0073] Furthermore, the array of μ-LEDs can adapt the irradiation surface formed by the μ-LEDs to a desired shape. Therefore, in this application, not only in ordinary displays, but also by using the array of μ-LEDs in the automotive field, for example, a curved surface can be utilized as a display or a light-emitting array. In this case, it can be used not only for displaying information but also as a simpler irradiation surface for lighting or illumination.

[0074] In one embodiment, the generation of different colors in a monolithic display is involved. In a monolithic μ-LED array, each individual pixel may include a μ-LED array that emits, for example, blue light, and furthermore, each μ-LED has a conversion material that converts the blue light partially or completely into secondary light, which, together with the primary blue light, can provide mixed light, such as white light. Because monolithic μ-LED arrays can achieve a high-brightness illumination surface, they can be advantageously used as a light source for automotive lights, such as automotive headlights.

[0075] On the other hand, in non-monolithic μ-displays or μ-LED arrays, the space between adjacent pixels or μ-LEDs can be used to arrange other components, such as electronic components for operating the μ-LEDs, or sensors or detectors. Non-monolithic μ-LED arrays can be advantageously used, for example, in displays, displays with integrated sensors, especially touchscreens, and even control elements.

[0076] Some embodiments relate to the principle that conductive structures can be forced to emit electrical radiation at a specific frequency. Accordingly, a concept is proposed here in which a slot-type antenna structure is used to induce light emission and increase the ratio of radiative recombination to non-radiative recombination in the active region of a semiconductor device. This is because, generally, this ratio changes unfavorably for radiative recombination as the μ-LED is miniaturized and / or the active region is reduced.

[0077] Such a structure offers further advantages beyond improving the ratios mentioned above, because the emitted wavelengths depend primarily on the geometric parameters of the slot-type antenna, which are tailored to the physical properties of the environment. As a result, various mechanical structures can be used to generate light of various colors. Furthermore, slot-type antenna structures enable directional emission, which can be beneficial for applications requiring strong collimation.

[0078] In one configuration, the light-emitting device includes a conductive structure. This conductive structure forms a slot-type antenna structure and has an upper main surface and a lower main surface positioned opposite the upper main surface and separated by a layer thickness. A cavity is located within the conductive structure. This cavity has a width and a specific length, and the wavelength of light generated by the device further depends on this specific length. This width is smaller than the length of the corresponding cavity.

[0079] In some modifications, the slot-type antenna structure includes a metal plate of a certain thickness, the metal plate having slots or cavities. As above, the slots have a width and a specific length. The light-emitting device also includes a semiconductor layer stack positioned within the cavity and extending at least beyond the upper principal surface along a first principal direction. The semiconductor layer stack may be an LED nanocolumn and includes a first electrical contact, a second electrical contact, and an active region. In some modifications, the active region of the semiconductor layer stack may be located between the first and second contacts. The active region of the semiconductor layer stack may be implemented not only by a single pn junction, but also by a quantum well, a multiquantenwell (Multiquantentopf), or a combination thereof. The semiconductor layer stack may have a length greater than its corresponding width. For example, the semiconductor layer stack may have a length of at least twice its width. The semiconductor layer stack may also have a length of five to ten times its width.

[0080] To define the light and promote radiative recombination over non-radiative recombination of the semiconductor layer stack in operation, the cavity length is substantially based on n / 2 (where n is a natural number) of the wavelength of the light emitted during operation. In this regard, it should be noted that various physical parameters change the emission behavior and emission center wavelength, so it may be necessary to slightly adjust the actual cavity length. These parameters can be summarized as a so-called shortening factor, which can be measured and / or calculated from the physical parameters. In this application, the shortening factor is considered in light of the fact that the cavity length is substantially based on n / 2 of the wavelength of the light emitted during operation.

[0081] In some modifications, the conductive structure has a distance (referred to as thickness) between the upper and lower main surfaces that is greater than the thickness of the active region of the semiconductor layer stack. The active region may be located within the cavity, particularly between the levels defined by the upper and lower main surfaces. In such a configuration, the active region is located within the cavity, facilitating the need for radiative recombination within the active region. With respect to the length of the cavity, the semiconductor layer stack may be positioned substantially in the center of the cavity. Accordingly, the center of the semiconductor layer stack is positioned substantially at half the length of the cavity. In this implementation example, the semiconductor layer stack and the slot-type antenna form a dipole structure, and the main emission wavelength is given to approximately twice the cavity length matched to the shortening factor.

[0082] In some other implementation examples, the semiconductor layer stack is positioned toward the end face of the cavity, for example, along the edge of the cavity length. In yet another implementation example, the light-emitting device may have two semiconductor layer stacks positioned at each end of the cavity as described herein.

[0083] The semiconductor layer stack may extend beyond the conductive structure. Therefore, the first and second electrical contacts of the semiconductor layer stack will also be located above the upper main surface, or correspondingly below the lower main surface. Thus, the semiconductor layer stack can be a so-called vertical layer stack. Depending on the application, the first contact may be a p-type contact and the second contact an n-type contact, or vice versa. Making the semiconductor layer stack contact outside the cavity not only simplifies mounting but also reduces undesirable effects.

[0084] To form a cavity that promotes the emission of visible light, a cavity length of several hundred nanometers is required. Since the semiconductor layer stack and active region may be located within the cavity, the diameter of the base plane of the semiconductor layer stack and active region is smaller than the wavelength emitted from the device, especially during operation. The slot is generally preferable to be longer than its width. In some embodiments, the ratio of length to width can be 30:1 to 5:1, and particularly 15:1 to 5:1. Even with ratios other than 5:1, and of course when the ratio is less than 5:1, a reflective but insulating layer can be provided along the sidewalls of the semiconductor layer stack to reflect light with a component perpendicular to the cavity length. This suppresses light that would otherwise propagate perpendicular to the cavity length.

[0085] In some variations, the cavity extends through the conductive structure, further forming a slot. The slot is rectangular in shape, but due to the manufacturing process, its edges may be rounded. In other variations, the cavity is more of a notch, with a through-hole where the semiconductor layer stack is located. In other words, the cavity is partially closed on the lower main surface, except for the hole through which the stack is located and which extends through the conductive structure.

[0086] In some embodiments, the slot may have a rectangular shape in which a semiconductor layer stack is positioned at the common endpoint of two sub-slots.

[0087] Another aspect relates to insulating a conductive structure and separating the structure from the stack. A transparent insulating layer is provided on at least the upper main surface of the conductive structure. However, the contacts of the semiconductor layer stack are not covered by the insulating material, but rather extend across the insulating material or reach the level of the surface of the insulating material facing the conductive structure. In this implementation example, the light-emitting device also has a contact layer provided on the transparent insulating layer and in contact with the first electrical contacts. The contact layer may be insulated by another layer provided on top of the contact layer. This layer (or contact layer) may be patterned to improve the light-emitting properties of the device. In addition to coating or roughening the surface to enhance light extraction, a periodic structure such as a photonic crystal may be placed on the top surface. Further optical systems such as microlenses may be utilized.

[0088] In some other embodiments, the transparent insulating layer also covers the lower main surface, and by covering the lower main surface, the other contact of the semiconductor layer stack and the transparent insulating layer form a substantially flat surface. However, this conductive structure is not completely covered by the insulating layer because it needs to be connected to a reference potential in order to function as a slot-type antenna. Therefore, the conductive structure has at least one contact. The conductive structure may be at the same potential as the connection point of the semiconductor layer stack. In that case, the layer stack will be connected to the conductive structure. However, conversely, it is also possible to apply a different potential to the conductive structure.

[0089] The light emitted by such a device can have a broad spectrum; that is, the emission spectrum includes other frequency components, while being centered around the central wavelength (as described above). Furthermore, the spectrum of light emitted from elements with nominally the same cavity will be broader. To reduce the spectrum and provide light of a specific central wavelength with a narrow spectrum, a color filter may be placed on the upper main surface corresponding to the light-emitting surface. The filter may be a narrow color bandpass. In some modifications, a converter may be placed on the upper main surface to convert light of a first wavelength to a second, longer wavelength color. By utilizing the converter, the light-emitting device can be optimized for a given wavelength and then converted to another desired wavelength.

[0090] Another aspect relates to the implementation of a number of such light-emitting devices, in conjunction with appropriate driver and control circuits, particularly for manufacturing a μ-LED display. Such an array has at least two light-emitting devices, as described above. At least two devices may then share a common conductive structure. The common conductive structure may contain several cavities, each cavity contained within a corresponding light-emitting device. Additionally or alternatively, the μ-LED array may have a common transparent insulating layer applied to at least the upper main surface of the conductive structure. If the conductive structure is independent for each light-emitting device, the insulating layer may fill the spaces between the conductive structures of each device.

[0091] In some variations, a common filter or other structure can be provided that is applied to at least two light-emitting devices. This ensures redundancy in case one light-emitting device fails, and reduces implementation complexity by allowing the color filter to be applied over a wider area (compared to applying it to only one stack and one cavity).

[0092] To control light-emitting devices individually, at least one of the p-type or n-type contacts is not connected to each other, allowing the light-emitting devices to be addressed and controlled separately.

[0093] In the above-described type of μ-LED array, some light-emitting devices may have color filters for setting the color of the corresponding light-emitting device. These color filters may have different properties. For example, the color filters of at least two light-emitting devices may have different bandpass or filtering properties with respect to the color filter of the other of the two light-emitting devices. Thus, different colors can be obtained. This may be useful when the light-emitting devices have a very broad emission spectrum spanning two or more target regions. For example, a light-emitting device may have an emission spectrum covering green and blue components. Corresponding color filters may be used to filter out undesirable components of the spectrum. A similar solution is presented when each light-emitting device has a converter.

[0094] Of the at least two light-emitting devices, the transformer of one light-emitting device may be different from the transformer of the other light-emitting device. Therefore, different colors can be obtained even with cavities of the same length, and pixels can be easily constructed from three, six, or nine subpixels within the same cavity, with corresponding transformers placed on top of those cavities. Each pixel thus manufactured can share the same conductive structure.

[0095] Beyond the above-described form of μ-LED, further designs are conceivable. These designs primarily possess aspects suitable for light generation. RGB modules are fabricated by combining such light-emitting diodes. This applies not only to large LED designs but also to modules using small components. However, in the field of μ-LEDs, manufacturing and transferring such micro-LEDs individually can be extremely time-consuming.

[0096] Therefore, monolithic μ-LEDs, i.e., μ-LEDs grown in rows and columns on a carrier, may enable the manufacture of μ-display modules without the need for μ-LED component transfer.

[0097] However, for some applications, it is necessary to configure μ-LEDs that emit light in different colors. In this case, μ-LEDs emitting light in the blue, green, and red spectrums each form a μ-pixel. Three, or four or more such μ-pixels if there is redundancy, form a single pixel. Here, to create an RGB μ-display or corresponding module, the μ-LEDs that emit colored light during operation can be fabricated from different material systems. This makes monolithic design difficult.

[0098] Another approach is described in the following embodiments and methods. Thus, as a method for manufacturing a pixel μ-LED array, it has been proposed to form various combinations of polyhedral or prism-shaped coated material volumes (Materialvolumina) on a growth substrate. A material volume is understood as a semiconductor body created on the surface of a carrier. The coated material volume is configured to have an active layer suitable for emitting light. In this respect, such a coated material volume can also be called a μ-LED due to its size. In a second step, a conversion material matched to a defined color is introduced between a pair of material volumes. These colors may be, for example, red and green. In some embodiments, the material volume, or the μ-LED thus manufactured, is configured to emit blue light, in which case the conversion between the two material volumes can be omitted.

[0099] In this way, blue, green, and red light can be generated individually using a total of four material volumes or μ-LEDs in a series of ingots. The conversion material is located at least midway between two material volumes that can be electrically driven and controlled simultaneously. In some embodiments, the conversion material is also partially spread across the surface of the material volumes. Furthermore, increasing the material volumes provides redundancy, allowing the emission of light of the desired wavelength even if one volume fails. The material volumes have the shape of a rectangular parallelepiped or ingot extending in the longitudinal direction. However, other regular polyhedra (regelmaessige Polyeder), such as parallelepipeds, right prisms, or similar shapes, such as truncated pyramids, obelisks, wedges, or regular polyhedra (regulaere Polyeder), are also conceivable.

[0100] Furthermore, according to a second embodiment, a μ-LED arrangement structure is proposed, particularly for pixels, having each combination of coated material volumes contained in the shape of polyhedra or prisms on a carrier substrate. Between such a set of material volumes, a conversion material is introduced that converts light emitted from the material volumes into light of a further wavelength. This conversion is often complete.

[0101] To manufacture the material volume, an ingot-shaped core is first formed on a carrier substrate, and multiple epitaxial layers are overgrown on top of it. Appropriate photostructures are used for this purpose. Examples of material systems for the core and each layer include GaN-based Group III-V semiconductor systems. Because the material volume is defined by the geometric shape through epitaxial growth, RGB pixels can be arranged in a very small area. By placing transformers within cavities, redundancy is provided, facilitating manufacturing by jetting or dispensing methods. In this way, a μ-display can be created as an RGB display based on a redundant 3D ingot arrangement structure.

[0102] Electrical connections are possible without further wiring techniques, particularly using through-hole vias that pass through the carrier. In this way, surface-mounted (SMT) components can be formed. Alternatively, a monolithic material volume can be formed with conductive structures present within the carrier.

[0103] As described above, a first doping layer and a second doping layer are applied to the core. An active layer is positioned between the first and second layers. The latter may include one or more quantum well structures. Furthermore, the first and / or second layers include current diffusion layers, doping gradients, or further means to enable minimal resistance to the active layer and high current density. Further means, such as current constriction to keep the current away from the edges of the material volume, are described in this disclosure and can be used in the fabrication of the material volume. These include, but are not limited to, quantum well intermixing. Each combination is electrically in contact with p-type and n-type contact regions via metallization. In some embodiments, one or both regions may be configured in common, i.e., the material volume shares one or two common contact regions.

[0104] In a further configuration, a growth layer may be formed on a growth carrier having an unmasked region, and a certain volume of material may be grown thereon. In a further configuration, the growth layer may contain n-type doping, particularly GaN. The masking may contain SiO2 or SiN. The growth layer may be formed from the same material as the core of the material volume (e.g., GaN), or it may be doped depending on the application.

[0105] In a further configuration, material volumes can be produced with their longitudinal axes parallel to each other and having the same geometric shape. In a further configuration, p-type contacts, particularly strip-type p-type contacts, can be formed by depositing a mirror-like first metallization, particularly providing solder, on the surface of the material volume covered with an active layer and further layers that do not face the growth carrier. In a further embodiment, a solder metallization layer can be deposited on the main surface of a planar carrier, thereby connecting, particularly bonding, this solder metallization layer to the first metallization of the material volume forming the p-type contact.

[0106] In some configurations, the growth layer is removed region by region, particularly by etching (RIE (reactive ion etching) or ICP (inductively coupled plasma etching)) in each case. Passivation is then deposited on the thus exposed growth region to completely cover the surface of the exposed region. In this process, some regions are left exposed, or the passivation is reopened. In some embodiments, the latter reopening is performed along the longitudinal axis of the material volume on the surface not facing the substrate. A second metallization is then performed on the exposed region of the material volume to form strip-like n-type contacts.

[0107] Depending on the configuration, metallization is also applied to at least a portion of the passivated sidewalls. This is reflective, and light is reflected back from it. In the case of two adjacent coated material volumes, these sidewall mirror metallizations can be created alternately with some facing away from each other and others facing each other. In such a configuration, for two adjacent coated material volumes where the sidewall mirror metallizations are created with their backs to each other, the free space is intended to be filled with the conversion material.

[0108] Electrical connections can be formed from the n-type contact, sidewall mirror metallization, and metallic intermediate connection areas deposited as a third metallization on and along the passivation layer, particularly from the n-type contact area deposited as a fourth metallization, which is strip-shaped. These may be on the same side of the carrier. Alternatively, through-hole vias are provided that contact the contact area not facing the metal volume. These through-hole vias are electrically insulated from the solder metallization layer and the carrier by the passivation layer. Of course, it is also possible to swap the p-type and n-type areas.

[0109] Depending on the further configuration, p-type contact-through-hole vias may be formed in the respective regions of the conversion material. Suitable materials such as Al or Ag can be used for metallization.

[0110] By shortening the length of the ingot, so-called μ-rods are obtained. These have a pillar-like structure and similarly include an active layer covering the surface along the longitudinal axis, and are designed to emit light in virtually all directions during operation. Such μ-rods can be generated repeatedly on a carrier by self-assembly or orientation-dependent crystal growth. Because they are fairly small structures, μ-LEDs, especially for μ-displays, can be fabricated simply by changing the parameters of the epitaxial process. The μ-rods of the above type exhibit spatial dimensions ranging from sub-μm to nanometers.

[0111] Light generated by a μ-rod is radiated in virtually all spatial directions, but due to its small base, the portion of light radiated directly upward is rather small. Therefore, it may be intended to surround the μ-rod with one of the reflective structures disclosed below. Thus the μ-rod is placed in some kind of cavity, the walls of which are beveled and formed reflectively. Similarly, in some embodiments, a cover electrode disclosed below may be provided.

[0112] Another possibility can be explained as follows. This is based on the principle of separating the μ-rods into individual pieces and then arranging them parallel to the substrate and bringing them into contact. In this way, μ-rods are arranged horizontally, each forming a subpixel.

[0113] According to a first embodiment, an electronic device, particularly a μ-LED, is proposed in which a μ-rod extending substantially parallel to the carrier is connected to the carrier. For this purpose, the μ-rod has an elongated core having a first doping, the core being coated outward by a layer sequence from a first longitudinal end to a second longitudinal end without a layer sequence. Here, the layer sequence includes an active layer, which in some embodiments may include a quantum well structure, etc. Furthermore, measures such as special doping as described herein may be taken to narrow the current to a low-defect region of the active layer. The first longitudinal end of the μ-rod is electrically and mechanically connected to a first contact region of the carrier by the layer sequence and a first contact, and the second longitudinal end is electrically and mechanically connected to a second contact region of the carrier by the core and a second contact. Finally, the layer sequence is electrically isolated from the second contact by masking. Thus, the μ-rod is elongated and positioned substantially parallel to the carrier. Although this increases the space required, this structure allows for high light output (Lichtausbeute) with a small current.

[0114] In the case of such electronic structural elements and methods for fabricating μ-LEDs electrically connected on carriers, a μ-rod can be fabricated in the first step and brought into contact at its first and second ends, each of which is in contact with a differently doped layer. This fabrication may be carried out in the basic step of epitaxial deposition of material. Thus, the μ-rod has an elongated core with first doping, which is grown particularly epitaxially outward from the first longitudinal end to the second longitudinal end without a layer sequence by one or more layer sequences.

[0115] Next, the μ-rod thus fabricated is positioned along a carrier substantially parallel to it. At the first longitudinal end of the μ-rod, a layer sequence having a first contact is electrically and mechanically connected to the first contact region of the carrier. At the second longitudinal end, the core is electrically and mechanically connected to the second contact region of the carrier by a second contact. In this case, the layer sequence is electrically insulated from the second contact by an insulating layer.

[0116] The increased degree of freedom in μ-rod manufacturing allows for the tuning of its emission to a desired wavelength range or specific wavelength. In some embodiments, the geometric shape of the μ-rod is formed to match one of a given wavelengths of light. In addition to varying lengths and / or diameters, the geometric shapes may also vary in the thickness of the individual layers. Varying the diameter allows for the creation of μ-rods that emit light of different wavelengths during operation. The active layer may contain quantum wells (quantenwells / quantentoepfe). The μ-rod may be formed, for example, as a polyhedron, prism, pyramid, or wedge along its longitudinal axis. The cross-section may include four corners or six corners. In some embodiments, the μ-rod may be covered with an additional conversion material so that the emitted light is converted, or may be covered with such material in a further processed state.

[0117] In some embodiments, when the μ-rods are arranged parallel to their longitudinal axis on a carrier, it may be advantageous to install a reflective layer between the carrier and the μ-rods. In this regard, see other configurations in which the carrier has a reflector structure around the μ-LED, and the light from the μ-LED placed inside is polarized by the reflector structure. Such a reflector structure may be arranged around a group of μ-rods placed on the carrier or around each μ-rod.

[0118] In one embodiment, three μ-rods forming a group are arranged parallel to each other on a carrier and electrically and mechanically connected to the carrier's contact area. Each μ-rod may be configured to emit red, green, or blue light. Thus, these form pixels. By providing multiple such arrays in rows and columns, a μ-display can be formed. As mentioned above, the diameters of the μ-rods may differ for red, green, and blue light; that is, the μ-rods have different sizes. When there are multiple pixels, rearranging the μ-rods can reduce visual artifacts due to periodicity.

[0119] In some embodiments, the manufacturing and fabrication of contacts are involved. For example, the first contacts at the first longitudinal ends of each μ-rod that do not face the insulating layer, particularly p-type contacts, can be manufactured in various ways. These include epitaxial growth, particularly epitaxial growth using a seed layer photopatterned by oxygen plasma etching. Similarly, contacts may be formed by sputtering. In some embodiments, at least one contact surface is formed on the first contact as a contact surface for the first contact region of the carrier. In the same manner, a second contact is fabricated.

[0120] As briefly explained earlier regarding μ-rods, these can be generated by a kind of self-assembly. In this case, directional crystal growth is induced by utilizing crystal orientation. When constructing three-dimensional light-emitting heterostructures, such as those for photoelectron semiconductor arrays or μ-LEDs, especially in a small size, controlled 3D design and the fabrication of stress-free active layers where the surface cross-sections form angles with each other are difficult. Nitrides such as GaN grown on sapphire, and In x Ga1- xIn μ-LEDs using an active layer containing N quantum wells, it has already been proposed to fabricate triangular profile shapes perpendicular to the <11-00> or <112-0> directions, or to adopt hexagonal shapes. In GaN-based semiconductor structures, lateral epitaxial overgrowth is performed using a mask with hexagonal openings aligned with the <11-00> or <112-0> direction of GaN. In AlInGaP-based semiconductor structures on GaAs, (001)n-GaAs <110> It has been proposed to apply the orientation of the opposing corners of the hexagonal openings of the mask with an angular error of less than 10° relative to the direction. In ZnSe-based semiconductor structures, (111)n-GaAs as the epitaxial substrate <112> The angular error with respect to the direction must be less than 15°. However, these approaches used are limited or not available at all, especially for very small structures with edge lengths in the range of less than 70 μm.

[0121] The method disclosed below can provide a compact μ-LED or optoelectronic semiconductor arrangement structure that has high efficiency with respect to the ratio of luminous flux to absorbed power. Accordingly, such μ-LEDs can form part of a μ-display in a monolithic form, or they can be formed as individual pixels.

[0122] The starting point of the concept proposed herein is a photoelectron semiconductor arrangement structure including a three-dimensional light-emitting heterostructure comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, wherein the first conductive semiconductor layer and the second conductive semiconductor layer have different dopants. According to the proposed principle, the light-emitting heterostructure is aluminum gallium arsenide (Al x Ga 1-xThe material comprises As) and / or aluminum indium gallium phosphide (AlInGaP) and / or aluminum gallium indium phosphide arsenide, and is formed three-dimensionally by growing on a formschicht. The formschicht includes sides with a {110} orientation. A flat top surface {111} may be optionally provided. To achieve a high conversion rate and reduce non-radiative recombination, particularly at the edges of μm-sized luminescent heterostructures, it is necessary to form a stress-free three-dimensional layer structure with few lattice defects. Here, it was recognized that the formschicht forming the base layer for manufacturing the three-dimensional luminescent heterostructure should be selectively epitaxially deposited on a gallium arsenide (111)B epitaxial substrate.

[0123] In this specification, a gallium arsenide(111)B epitaxial substrate is understood to be a carrier substrate for selective epitaxy, consisting of gallium arsenide having a surface oriented (111) according to Miller indices, used for epitaxial growth, with the surface plane terminations formed by arsenic atoms. Gallium arsenide(111)B epitaxial substrates can be used doped or undoped. Compared to gallium arsenide(111)A with gallium terminations, the controllability of selective epitaxy is improved, which is thought to be due to the higher volatility of the arsenic atoms. The arsenic terminations of gallium arsenide(111)B are expected to contain a sufficient number of uniformly distributed arsenic defects to enhance nucleation, and thus the initial stages of epitaxial layer formation can be favorably controlled by externally adjustable epitaxial process parameters such as temperature and raw material supply.

[0124] For the profile layer selectively epitaxially grown on a gallium arsenide(111)B epitaxial substrate, it is preferable to use gallium arsenide and / or aluminum gallium arsenide and / or aluminum gallium indium phosphide as the material. Here, the material of the profile layer may be undoped, n-type doped, or p-type doped. As a further design, SiO2 may be added within or on the profile layer. x and SiN xFurthermore, there are plans to epitaxially deposit Bragg mirror stacks having continuous layers.

[0125] On the gallium arsenide(111)B epitaxial substrate, SiO x SiN x or SiO x N y A dielectric layer patterned by lithography is used as a mask. The openings of the mask are selected such that the base plane of the shaped layer has an edge length of preferably 50 nm to 100 μm. In one configuration, the formation of the mask structure and its orientation relative to the crystal direction of the gallium arsenide(111)B epitaxial substrate facilitate the formation of at least one side of the shaped layer having a {110} orientation. In some embodiments, the shaped layer takes the form of a triangular pyramid having sides with orientations (-1-10), (-10-1), and (0-1-1). In a further preferred configuration, the shaped layer has a top surface with orientation (-1-1-1) in addition to sides with orientations (-1-10), (-10-1), and (0-1-1), so that in a further preferred configuration, there is a shaped layer placed as a frustum of three sides.

[0126] The proposed method yields a precisely epitaxially grown molded body with a clear outline, low internal crystal distortion, and a low number of lattice defects, and aluminum gallium arsenide (Al) is applied to this molded body. x Ga 1-x A light-emitting heterostructure based on As) and aluminum indium gallium phosphide (AlInGaP) is epitaxially grown. Three-dimensionalization increases the area of ​​the active layer, improving the photoextraction of photons emitted parallel to the layer. Furthermore, the present invention also leads to the enclosure of the peripheral region of the light-emitting heterostructure, allowing at least the active layer to extend to a mask for selective epitaxy that functions as an electrical insulator. In this case, the mask is SiO x SiN x or SiO x N yThis may include the following: This allows for the formation of a closed luminescent heterostructure without incorporating additional passivation in the peripheral region, and this luminescent heterostructure reduces non-radiative recombination, thereby increasing the efficiency of light generation. This boundary effect (Umrandungseffekt) occurs because the sides of the profile layer with a {110} orientation taper toward the mask, extending at least to the edge of the mask. Thus, the profile layer can be formed flat with the top layer with a (111) orientation parallel to the substrate. Preferably, a profile layer is formed with a transverse extent of less than 20 μm parallel to the epitaxial substrate and a longitudinal extent of less than 5 μm perpendicular to the epitaxial substrate. To adjust the desired contour, the profile layer can be post-treated by wet chemical treatment after selective epitaxial growth. In a preferred configuration, contour control of the profile layer is performed solely by selective epitaxial growth.

[0127] Aluminum gallium arsenide (Al x Ga 1-x A light-emitting heterostructure based on As) and / or aluminum indium gallium phosphide (AlInGaP) can generate wavelengths in the range of 560 nm to 1080 nm. To complete the μ-LED, a light guide layer, a contact layer, and a passivation layer are added to the optoelectronic semiconductor structure. This allows the main emission direction to be either in the growth direction of the semiconductor array layer stack or in the opposite direction. Furthermore, it is possible to extract light on the p-side or n-side of the light-emitting heterostructure. Further measures for light guidance, collimation, or conversion to other colors are disclosed in this application.

[0128] In a modified configuration where the growth direction of the layer stack of the light-emitting heterostructure is the primary emission direction, a layer sequence having a transparent contact layer for a second conductive semiconductor layer, such as an ITO (indium tin oxide) layer, is located above it. In one possible configuration, the ITO layer is deposited across the entire upper surface of the light-emitting heterostructure. Furthermore, a Bragg mirror stack (DBR) may be provided beneath the light-emitting heterostructure.

[0129] The simplest way to electrically contact the first conductive semiconductor layer of a light-emitting heterostructure from below is to use a conductive gallium arsenide(111)B epitaxial substrate to which appropriate doping has been applied, and a similarly doped profile layer selectively epitaxially grown on the substrate.

[0130] If the matrix arrangement structure of light-emitting heterostructures is processed in parallel, it can be used as the matrix for a μ-LED display, depending on the processing method used. In this case, the structures are fabricated in a monolithic arrangement of rows and columns.

[0131] Alternatively, the heterostructures can be separated into groups or individually by methods such as laser separation, without damaging the active layer whose edges are protected by a masking layer. These separated light sources can form μ-LEDs with extended contact surfaces, which in the simplest case can be mounted on the complementary contact surfaces of an IC chip without separate wire bonding.

[0132] In another modification where the primary emission direction is the growth direction, the active layer with the quantum well is applied locally confined to a region of the side surface with a {110} orientation or the upper surface with a (111) orientation. Opaque metallization can be provided on the non-emitting portion of the heterostructure, for example, to form annular contacts. Furthermore, additional passivation and carrier layers may be present. Additionally, a light guide structure may be provided at the exit window, and in the simplest case, the surface is roughened to increase the extraction rate. Furthermore, general treatments can be used to construct additionally treated surfaces to form elements that further improve the emission pattern, such as collimators or photonic crystals.

[0133] To achieve light emission with the main emission direction opposite to the growth direction, first, at least a portion of the gallium arsenide(111)B epitaxial substrate and the profile layer are removed, and in a further step, a transparent contact layer is applied beneath the light-emitting heterostructure. The light source configured in this way is suitable for IC chip assembly by bonding.

[0134] In a further alternative configuration, transient carriers on the three-dimensional luminescent heterostructure are used for the removal of the gallium arsenide(111)B epitaxial substrate and profile layer. These lower layers are replaced with metallization and carrier substrate. Subsequently, the transient carriers can be replaced with passivation and light guide structure on the upper surface. Such a configuration is suitable for a configuration that involves two bonding and contact on an IC chip.

[0135] In addition to various aspects of the crystal's geometric shape or orientation, it was found that the smaller the active layer region, the lower the radiative recombination compared to non-radiative recombination. This is thought to be due to defects in the active layer. These defects are mainly formed in the peripheral region of the μ-LED because processing there (fragmentation or etching) changes the crystal structure, resulting in a higher defect density. Generally, the larger the area of ​​the peripheral region is compared to the area of ​​the active layer, the more defects there are, and consequently, the more non-radiative recombination occurs. Furthermore, it was recognized that defect density affects the efficiency of the light-emitting diode at both high and low current densities, and is an important factor in aging degradation (and consequently, the decrease in the efficiency of the light-emitting diode) along with current density.

[0136] A prerequisite for applications in the automotive sector is that the μ-display and its individual pixels must have sufficient brightness, meaning they must be able to handle relatively high current densities. On the other hand, for augmented reality applications, a high contrast range is important, meaning the μ-LEDs in the display must be able to handle both high and low current densities equally well. Accordingly, they need to be highly efficient, or even more so, at low currents.

[0137] Therefore, considering these requirements on the one hand and the effects of defects on the other, it is desirable to reduce the defect density in the active layer, especially in the peripheral region, or to move charge carriers away from the peripheral region.

[0138] One measure to improve low-current operation is quantum well intermixing, which is used in various ways in the manufacturing of active semiconductor components. In this case, the band gap of a region is changed by exchanging lattice atoms between an active layer configured as a quantum well and the surrounding barrier material. This exchange process can be carried out particularly efficiently when appropriate impurity atoms, especially doping atoms, are introduced into the semiconductor. This changes the band gap of the region targeted by the exchange process, and thus the charge carriers begin to sense a repulsive force. For this purpose, for example, a dopant can be used that moves into the active layer by a diffusion process and there causes quantum well intermixing. This method has also been successfully tested in optoelectronic structures based on Group III-V semiconductors such as Ga, In, Al, P, and As.

[0139] However, it was also observed that light-emitting diodes made from this material system, particularly μ-LEDs, showed a rapid decrease in brightness as their size decreased. This degradation occurred as early as the load current was significantly lower compared to components without quantum well intermixing. In other words, quantum well intermixing reduces the brightness of μ-LEDs even at low currents, a phenomenon not particularly observed in larger light-emitting diodes.

[0140] This time, a method has been found that not only significantly reduces this effect, but also prevents, as much as possible, the decrease in luminous efficiency caused by impurities, at least over a long period of time. For this reason, this method is particularly suitable for the manufacture of μ-LEDs.

[0141] For this purpose, a method has been proposed for manufacturing semiconductor components, particularly μ-LEDs, in which a semiconductor structure is provided in a first step. This semiconductor structure can be fabricated in particular by growing layers of different doping layers and / or layers of different material compositions, in particular having a first n-type doped layer, a second p-type doped layer, and an active layer having at least one quantum well positioned between them. The p-type doped layer was supplied with a first dopant for doping.

[0142] In the second step, a patterned mask is applied to the semiconductor structure, particularly on the p-type doped layer. This mask protects a portion of the active layer intended for electromagnetic radiation generation from the intrusion of a second dopant. In this case, the mask material may be formed from a dielectric (such as silicon oxide or silicon nitride), a metal (such as Ti), or a semiconductor material.

[0143] Next, a second dopant is doped into the p-type doped layer not covered by the patterned mask by a diffusion process using the first process parameters. The process parameters and mask material are selected so that quantum well intermixing occurs in the region of the active layer not covered by the patterned mask. This masking creates a relatively sharp lateral transition region in at least one quantum well intermixing, and the degree of quantum well intermixing is abruptly reduced at the mask-defined boundary. This results in a relatively abrupt change in the quantum well's band gap.

[0144] According to the proposed principle, a diffusion process is followed by a final heat treatment step, during which a second process parameter different from the first process parameter is set. Without further supply of the second dopant, the semiconductor is subjected to an annealing step with this second process parameter.

[0145] This downstream annealing step is configured to use different process parameters and not use a second dopant, so that the significant improvement in low-current efficiency achieved in the first step is maintained over a longer operating period.

[0146] The inventors recognized that the process of supplying the second dopant with first process parameters is important in that it is causally related to both the occurrence of quantum well intermixing and subsequent degradation. In this case, atoms of the second dopant can diffuse into the semiconductor layer stack and the active layer (or quantum well), where they can replace atoms of the original crystal lattice. These are both atoms of the first dopant and atoms of the actual lattice material. Atoms displaced to interstitial sites are mobile, and it is hypothesized that they play an important role in the degradation of the optoelectronic structure. Simultaneously, by changing the process parameters and performing an additional annealing step that does not supply further dopants, the subsequent decrease in efficiency can be suppressed. In another embodiment, appropriate environmental conditions are provided for the annealing step by providing support pressure with elements that form the crystal lattice (for example, by providing a suitable precursor).

[0147] By appropriately selecting this element, the lattice atoms displaced by the second dopant are provided with the ability to react on the semiconductor surface, thereby preventing the free movement of these atoms. If the displaced lattice atoms are, for example, group III atoms, this process can be initiated by support pressure using preferably group V elements. Consequently, the interstitial atoms generated in the diffusion process diffuse to the surface during the annealing step according to the present invention and bond there. Reducing the number of interstitial atoms involved in the degradation mechanism significantly extends the lifespan of the component.

[0148] In the annealing step, the precursor may be added from the beginning or only after the second process parameter has been reached. Furthermore, the concentration of the precursor may be varied during the annealing step to ensure that sufficient precursor material is available to saturate the lattice atoms displaced by the dopant.

[0149] In another embodiment, the precursor may particularly contain the element phosphorus or arsenic, mainly in compounds such as PH3, AsH3, TBA, or TBP.

[0150] From another perspective, first and second process parameters are involved. In one embodiment, the parameters include at least one of the following parameters, or a combination thereof: temperature, temperature change over a defined period, pressure, pressure change over a defined period, gas, in particular the composition and flow rate of the precursor, and the duration of the annealing step. For example, the second process parameter includes a defined second temperature that is higher than the temperature at which the second dopant is supplied. In other words, the temperature during the annealing step is higher than the temperature at which quantum well intermixing occurs. The durations of doping and annealing may also be different.

[0151] In other embodiments, a second dopant different from the first dopant is used. For example, Zn may be used as the second dopant. As a material system for the semiconductor structure, for example, a Group III-V semiconductor material is used. This may have at least one of the following material systems: InP, AlP, GaP, GaAlP, InGaP, InAlP, GaAlP, or InGaAlP. Similarly, combinations with other Group III-V semiconductors, such as As, may also be considered as material systems.

[0152] In another embodiment, a photoelectronic structure is provided, which comprises a semiconductor structure having a group III-V semiconductor material. This semiconductor structure has an n-type doped layer, a p-type doped layer, and an active layer having at least one quantum well disposed between them. The p-type doped layer contains a first dopant. Furthermore, this component has a photogenerating region, in particular a central region of the active layer, which is laterally surrounded by a second region of the active layer. This is because a second dopant has been introduced into the second region, and this dopant has caused quantum well intermixing in at least one quantum well of the active layer located in the second region, so that the band gap of the second region is larger than the band gap of the central region.

[0153] In another embodiment, a patterned mask is placed on the p-type doped layer so as to cover a first sub-region of the p-type doped layer. A second dopant is introduced into the sub-region of the p-type doped layer not covered by the mask, causing quantum well intermixing in the active layer located beneath this sub-region. In this case, the size of the mask is substantially the same as that of the first sub-region. By selecting a support pressure during the annealing step according to the present invention, the material displaced by the second dopant is converted into a layer covering a portion of the surface. The diffusion process during annealing removes the material from interstitial sites, preventing the formation of non-radiative recombination centers in the quantum well, and consequently preventing a decrease in the efficiency of the optoelectronic structure over long periods. Accordingly, a layer is formed on the surface of the mixed sub-region of the p-type doped layer, consisting of the trivalent material of the group III-V semiconductor material and elements of the precursor material, particularly P or As.

[0154] Further embodiments for improving quantum well intermixing are presented in the following method. For this purpose, a method for fabricating semiconductor components, in particular optoelectronic structures or μ-LEDs, is proposed, in which a semiconductor structure is provided in a first step. This semiconductor structure can be fabricated in particular by growing layers of different doping layers and / or layers of different material compositions, in particular having a first n-type doped layer, a second p-type doped layer, and an active layer having at least one quantum well disposed between them. In this regard, the p-type doped layer was supplied with a first dopant for doping.

[0155] In the second step, a patterned mask is applied to the semiconductor structure, particularly on the p-type doped layer. This mask protects a portion of the active layer intended for electromagnetic radiation generation from the intrusion of a second dopant. In this case, the mask material may be formed from a dielectric (such as silicon oxide or silicon nitride), a metal (such as Ti), or a semiconductor material.

[0156] Next, doping the p-type doped layer not covered by the patterned mask with a second dopant induces quantum well intermixing in the region of the active layer not covered by the patterned mask. In this regard, doping the p-type doped layer with the second dopant may be carried out by vapor-phase diffusion using a precursor containing the second dopant. Alternatively, in this case, the precursor is thermally decomposed in a vapor-phase reaction, the dopant is absorbed at the semiconductor surface and diffuses into the semiconductor, and quantum well intermixing occurs. Since all these subprocesses have different temperature dependencies, the temperature range in which efficient quantum well intermixing can be achieved is very limited (typically 520 ± 20°C for InP or GaAs-based semiconductors).

[0157] Therefore, according to the proposed principle, the step of applying a dopant using a precursor and allowing it to diffuse into the interior is defined. In this way, a process sequence for efficiently performing quantum well intermixing by vapor phase diffusion is constructed, and it becomes possible to expand the process window and optimize the process sequence toward realizing optoelectronic structural elements that are resistant to aging degradation.

[0158] This prescribed process sequence has the following steps: - A step of depositing a second dopant on the surface of a p-type doped layer, wherein the precursor is decomposed at a first temperature selected such that the second dopant substantially diffuses into the p-type doped layer; and - A step of diffusing the deposited second dopant into the p-type doped layer at a second temperature higher than the first temperature.

[0159] The inventors have recognized that process control, specifically doping with a second dopant, significantly impacts the reduction of charge carrier concentration in regions where impurity-induced luminescence efficiency degradation occurs over long periods. This is particularly due to the fact that an increase in the dopant barrier in the active layer beneath the mask edge can be achieved through process control.

[0160] In the case of process control according to the concept proposal, the step of diffusing the dopant-containing precursor in the gas phase is explicitly divided into the following steps: - A step of depositing a decomposition product containing a second dopant onto the surface of the semiconductor structure; and - A step of diffusing the second dopant into the semiconductor structure.

[0161] This separation allows for free selection of temperature during the diffusion step involving quantum well intermixing, and in particular, the temperature can be raised to a value (above 520°C) where excessive desorption makes surface occupation by the second dopant no longer possible. This can be advantageously used to improve the aging behavior of optoelectronic structures.

[0162] Here, the second dopant is of the same dopant type as the first dopant, and is formed from, for example, Zn, Mg, etc. Here, the amount of the deposited second dopant may be selected so that it diffuses substantially completely into the p-type doped layer during the diffusion process at the second temperature. In this way, only a sufficient amount is provided for the occurrence of diffusion and quantum well intermixing, and no more.

[0163] In another embodiment, the amount of the second dopant deposited is selected such that, for example, a barrier is formed against the lateral diffusion of charge carriers in the region of the active layer not covered by the region of the patterned mask, and this barrier consists of a barrier generated by the second dopant and a barrier caused by quantum well intermixing.

[0164] In an advanced form of this embodiment, the amount of the second dopant is selected such that, in the region of the active layer not covered by the patterned mask, the barrier to lateral diffusion of charge carriers generated by the second dopant is greater than the barrier caused by quantum well intermixing. Furthermore, the amount of the second dopant may be selected such that the band gap of the active layer in the region beneath the patterned mask is smaller than the band gap of the active layer not covered by the patterned mask.

[0165] In another embodiment, a final heat treatment step is performed at a third temperature higher than the second temperature after the doping process. Without further supply of the second dopant, the semiconductor is subjected to an annealing step at this third temperature. This downstream annealing step is configured at a higher temperature and without the use of the second dopant so that the significant improvement in low current efficiency achieved in the doping process is maintained over a longer operating period.

[0166] The inventors recognized that the process of supplying a second dopant at a first temperature and diffusing the second dopant at a second temperature is important because it has a causal relationship with both the occurrence of quantum well intermixing and subsequent degradation. In this case, atoms of the second dopant diffuse into the semiconductor layer stack and the active layer (or quantum well), where they can replace atoms of the original crystal lattice. These are atoms of the first dopant and also atoms of the actual lattice material. Atoms displaced to interstitial sites are mobile, and it is presumed that they have a significant impact on the degradation of the optoelectronic structure. Simultaneously, by performing an additional annealing step at a higher third temperature and not supplying any more dopants during that time, the subsequent decrease in efficiency can be suppressed.

[0167] In another embodiment, suitable environmental conditions are provided for the annealing step by providing support pressure with elements that form the crystal lattice (for example, by providing suitable further precursors). By appropriately selecting these elements, the lattice atoms displaced by the second dopant are provided with the ability to react on the semiconductor surface, thereby preventing the free movement of these atoms. If the displaced lattice atoms are, for example, Group III atoms, this process can be initiated by support pressure using preferably Group V elements. Consequently, interstitial atoms generated in the diffusion process diffuse to the surface during the annealing step according to the present invention and bond there. By reducing the number of interstitial atoms involved in the degradation mechanism, the lifespan of the component is significantly extended.

[0168] Therefore, according to this embodiment, the annealing process includes the steps of: providing a further precursor comprising a Group 5 element, particularly P or As; and / or forming a layer of Group III-V semiconductor material on the surface of the p-type doped layer.

[0169] In the annealing step, the precursor may be added from the beginning or only after the second process parameter has been reached. Furthermore, the concentration of the precursor may be varied during the annealing step to ensure that sufficient precursor material is available to saturate the lattice atoms displaced by the dopant.

[0170] In another embodiment, this further precursor may particularly contain the element phosphorus or arsenic, mainly in compounds such as PH3, AsH3, TBA, or TBP.

[0171] From another perspective, process parameters that can be selected in various ways in each of the deposition, diffusion, and annealing steps are relevant. In one embodiment, the parameters include at least one of the following parameters, or a combination thereof: temperature during one of the aforementioned steps, temperature change over a defined period, pressure during one of the aforementioned steps, pressure change over a defined period, gas, in particular the composition and flow rate of the precursor, and the duration of the annealing step.

[0172] For example, process parameters include a defined first temperature at the time of supplying the second dopant, selected so that the second dopant does not substantially diffuse into the p-type dope layer when it is deposited onto the p-type dope layer; a second temperature during the diffusion process of the second dopant, which is higher than the first temperature; and a third temperature during the annealing step, which is higher than the second temperature. In other words, the temperature during the annealing step is higher than the two temperatures at which quantum well intermixing occurs. The durations of the supply of the second dopant, the diffusion process, and the annealing may also differ.

[0173] In other embodiments, a second dopant different from the first dopant is used. For example, Zn or Mg may be used as the second dopant. As a material system for the semiconductor structure, for example, Group III-V semiconductor materials are used. This may have at least one of the following combinations of materials: InP, AlP, GaP, GaAlP, InGaP, InAlP, GaAlP, or InGaAlP. Similarly, combinations with other Group III-V semiconductors, such as As, are also considered as material systems.

[0174] In another embodiment, a photoelectronic structure is provided, which comprises a semiconductor structure having a group III-V semiconductor material. This semiconductor structure has an n-type doped layer, a p-type doped layer, and an active layer having at least one quantum well disposed between them. The p-type doped layer contains a first dopant. Furthermore, this component has a photogenerating region, in particular a central region of the active layer, which is laterally surrounded by a second region of the active layer. This is because a second dopant has been introduced into the second region, which has caused quantum well intermixing in at least one quantum well of the active layer located in the second region, and the band gap of the second region is larger than the band gap of the central region.

[0175] Because this localized quantum well intermixing due to impurities occurs in the second region rather than the first region, a barrier is formed in the active layer, and the lateral movement of charge carriers within the quantum wells of the active layer of the photoelectronic structure is restricted to this first region of the active layer. This prevents, for example, the current required to operate the photoelectronic structure from flowing into the peripheral region of the photoelectronic structure, i.e., from flowing through the second region surrounding the first region, as much as possible. This reduces non-radiative recombination of charge carriers caused by non-radiative recombination centers or high non-radiative surface recombination in the second region, and therefore, this leads to improved performance of the structure.

[0176] In another embodiment, a patterned mask is placed on the p-type doped layer so as to cover a first sub-region of the p-type doped layer. A second dopant is introduced into the sub-region of the p-type doped layer not covered by the mask, causing quantum well intermixing in the active layer located beneath this sub-region. In this case, the size of the mask is substantially the same as the size of the first sub-region.

[0177] By selecting the support pressure during the annealing step according to the present invention, the material displaced to the interstitial sites by the second dopant is converted into a layer covering a portion of the surface. Due to the diffusion process during annealing, the material is removed from the interstitial sites, which is thought to prevent the formation of non-radiative recombination centers in the quantum well, thus preventing a decrease in the efficiency of the optoelectronic structure even over long periods of time. Consequently, a layer is formed on the surface of the mixed subregion of the p-type doped layer, consisting of the trivalent material of the group III-V semiconductor material and elements of the precursor material, particularly P or As.

[0178] As already mentioned in the above concept, the effects of quantum well intermixing and impurity intrusion affect the aging behavior of μ-LEDs. While the measures disclosed herein can certainly mitigate these effects, it has been found that measurable, and sometimes significant, effects remain, especially when the load current density is relatively high, particularly in the case of very small devices such as μ-LEDs with edge lengths of only a few μm. This is clearly due to the location and position-dependent concentration gradient of the diffusive material, which is determined by the arrangement and structure of the photomask.

[0179] Accordingly, in one embodiment, a photoelectronic structure is proposed comprising an n-type doped first layer, a p-type doped second layer to which the first dopant is added, and an active layer. The latter is positioned between the n-type doped first layer and the p-type doped second layer and has at least one quantum well. According to the present invention, the active layer can be divided into at least two regions, which are particularly adjacent to each other. In this case, the second region is arranged concentrically around the first region (particularly the optically active region) and has quantum well intermixing.

[0180] In this embodiment, the concentric arrangement of quantum well intermixing around the optically active region means that the first region, particularly the optically active region, is completely surrounded by the second region, and the two regions are arranged around a common central point of their respective areas. However, within the limits of manufacturing tolerances, slight deviations or intentional variations between the central points are possible.

[0181] The inventors hypothesized that impurity intrusion and quantum well intermixing depend on providing open areas to introduce diffusing material. Impurities located at the corners of a square or rectangular active layer (or in areas corresponding to angular structures defined by a photomask) can diffuse from multiple sides, so chamfered regions will have higher impurity concentrations and / or quantum well intermixing than, for example, regions midway along the side lengths. This effect is undesirable depending on the circumstances and can be avoided by choosing a concentric arrangement, because in such an arrangement, the absence of corners prevents such large diffusion.

[0182] Quantum well intermixing can be achieved by doping a second region with a second dopant, such as magnesium, zinc, or cadmium (Mg, Zn, Cd). However, this is not intended to limit the selection of dopants, and any other similar dopants that a person skilled in the art could devise could be used for doping.

[0183] A diffusion mask is locally applied to the semiconductor structure, and, for example, a diffusion process is used to allow the second dopant to enter the active layer region by region, and quantum well intermixing occurs in the corresponding unmasked regions where quantum wells exist. The regions where quantum well intermixing occurs form a second region. Therefore, according to this embodiment, the optoelectronic structure element includes a second dopant substantially uniformly distributed in the second region.

[0184] In another embodiment, quantum well intermixing is prevented as much as possible in the first region, particularly the optically active region. More precisely, according to this embodiment, quantum well intermixing does not occur in the first region. Accordingly, after the diffusion process, the second dopant is not placed in the first region as much as possible. This embodiment can also be achieved by the measures described above.

[0185] Because this local quantum well intermixing due to impurities occurs in the second region rather than the first region, a barrier is formed in the active layer, restricting the lateral movement of charge carriers within the quantum wells of the active layer of the photoelectronic structure to this first region of the active layer. This prevents, for example, the current required to operate the photoelectronic structure from flowing into the peripheral region of the photoelectronic structure, i.e., from flowing through the second region surrounding the first region, as much as possible. This reduces non-radiative recombination of charge carriers caused by non-radiative recombination centers or high non-radiative surface recombination in the second region, and therefore leads to improved performance of the structure.

[0186] To further improve the design, in another embodiment, the two regions are at least nearly circular in shape. The absence of corners ensures uniform diffusion of impurities into the second region, preventing the formation of local maxima caused by corners. Thus, the circular or nearly circular shape of the two regions has the effect of making the concentration of impurities introduced along the circumference of the two regions as homogeneous as possible. As a result, performance degradation due to surface recombination in the second region is also suppressed.

[0187] In this context, "circular" can refer to polygons with six or more sides; that is, polygons with eight, ten, or more sides are also possible. This is because the positive effect of improving the performance of optoelectronic structural elements has already been recognized for these shapes. Similarly, the term "circular" can include not only ellipses but also oblong or other rounded convex shapes.

[0188] In another embodiment, the diffusion process for generating quantum well intermixing in the second region may mean that the second dopant is formed at least partially not only in the active layer of the second region, but also in the second p-type doped layer and even in the n-type doped layer adjacent to the active layer. However, this should not necessarily be understood as the regions of the second p-type doped layer and the first n-type doped layer on which the second dopant is formed coinciding with the second region of the active layer, although such a coincidence is possible.

[0189] In another embodiment, a photoelectronic structure, particularly a μ-LED, is proposed in which a second region has a substantially uniform band gap that has been altered by quantum well intermixing. The second region is arranged concentrically around the first region. That is, within this region the band gap energy is as constant as possible, and the band gap only increases or decreases, or the band gap energy increases or decreases, towards the periphery of the region.

[0190] On the other hand, at least one quantum well in the first region, particularly in the optically active region, has a smaller band gap than the second region. Accordingly, a barrier generated according to one of the above embodiments occurs between the first and second regions. In this case, the transition between the two band gaps can be a step with a sharp edge or a smoothly flowing transition.

[0191] Furthermore, at least one quantum well in the first region, particularly in the optically active region, substantially lacks quantum well intermixing, and therefore substantially does not contain the second dopant in this region.

[0192] Beyond geometric considerations to improve the performance of individual μ-LEDs within their respective ranges, measures are provided to bring about improvements in quantum well intermixing at the wafer level. Typically, μ-LEDs are manufactured at the wafer level as a large number of such structures. In this case, manufacturing can be done monolithically, or the μ-LEDs can be pieced at a later point in time. In the former case, quantum well intermixing also functions as a barrier against electrical crosstalk, and in the latter case, quantum well intermixing can be used during manufacturing to modify the range that later forms the edges.

[0193] In one embodiment, a semiconductor structure is presented comprising an n-type doped first layer, a p-type doped second layer to which a first dopant is added, and an active layer. The latter is positioned between the n-type doped first layer and the p-type doped second layer and has at least one quantum well. According to the present invention, the active layer can be divided into a plurality of first regions, in particular optically active regions, and at least one second region. In this case, in particular, the plurality of first optically active regions and at least one second region are adjacent to each other. Furthermore, the plurality of first regions are spaced apart from each other in a hexagonal pattern and are surrounded by at least one second region having a QWI.

[0194] Here, each of the multiple first, particularly optically active, regions of the semiconductor structure can form, for example, each of the parts of a photoelectronic structure element. Thus, the semiconductor structure may be formed from a number of individual photoelectronic structure elements, which may be subsequently separated by, for example, an etching process or laser cutting through an epitaxial layer followed by removal of the substrate.

[0195] For example, multiple first regions have a circular shape. Compared to a square μ-LED structure, the absence of corners results in more uniform impurity intrusion and quantum well intermixing along the boundaries of subsequent μ-LEDs. This means that non-radiative recombination in the peripheral regions of the second region can be reduced, and consequently, the performance of each individual optoelectronic structure element can be improved.

[0196] In this context, "circular" can refer to polygons with six or more sides; that is, polygons with eight, ten, or more sides are also possible. This is because these shapes have already been shown to have a positive effect on improving the performance of optoelectronic structural elements. Similarly, the term "circular" can include not only ellipses but also oblong or other rounded convex shapes.

[0197] By locally masking the semiconductor structure and, for example, using a diffusion process, a second dopant enters the active layer region by region, and QWI occurs in the corresponding regions where quantum wells exist. The regions where quantum well intermixing occurs form at least one second region. Thus, the semiconductor structure contains a second dopant, in particular a dopant different from the first dopant located in the p-type doped second layer, and this dopant is substantially uniformly distributed in at least one second region.

[0198] On the other hand, in multiple first regions, QWI is prevented as much as possible by the application of masks. More precisely, quantum well intermixing does not occur in multiple first regions. Accordingly, after the diffusion process, there are virtually no second dopants in multiple first regions, and consequently, no second dopants are present in each of the first regions within the quantum well of the active layer.

[0199] By dividing the region into first and second regions, and the resulting QWI, the first region can be used as an optically active region in the operation of subsequent end devices, particularly μ-LEDs. Therefore, hereafter, the first region will be referred to as the first optically active region.

[0200] Because this localized quantum well intermixing due to impurities occurs in the second region rather than the multiple first optically active regions, it forms an electron barrier within the active layer through a change in band structure, restricting the lateral movement of charge carriers in quantum wells within the active layer of the semiconductor structure to the multiple first optically active regions of the active layer. This prevents, for example, the current required to operate the photoelectronic structure from flowing to the peripheral region of the photoelectronic structure, i.e., from flowing through the second region surrounding the first region, as much as possible. Since non-radiative recombination centers are often present in the peripheral region of the fragmented μ-LED structure, charge carriers are kept away from the peripheral region, and therefore this leads to improved performance of the structure.

[0201] However, in reality, the intrusion of impurities and, consequently, quantum well intermixing, depends on the size of the open area into which the diffusing substance is introduced. Therefore, when multiple first optically active regions are arranged in a hexagon on a semiconductor structure, the spaces between three first optically active regions arranged in a triangle form larger areas, i.e., local maxima with higher impurity concentrations, than the areas between two adjacent first optically active regions. These maxima result from the fact that the diffusion process proceeds more efficiently in the larger areas where the second dopant is added than, for example, in the small space between two first optically active regions covered by a mask. This effect is undesirable depending on the situation, because achieving a very homogeneous diffusion pattern within the semiconductor structure is crucial for improving the low-current efficiency of optoelectronic devices.

[0202] Accordingly, in another embodiment, a semiconductor structure is presented comprising an n-type doped first layer, a p-type doped second layer to which a first dopant is added, and an active layer. The latter is located between the n-type doped first layer and the p-type doped second layer and has at least one quantum well. According to the present invention, the active layer can be divided into a plurality of first regions, in particular optically active regions, and at least one second region. In this case, in particular, the plurality of first optically active regions and at least one second region are adjacent to each other. Furthermore, the plurality of first optically active regions are spaced apart from each other in a hexagonal pattern and are surrounded by at least one second region having a QWI. Furthermore, at least one third region is located in the space between the plurality of first optically active regions and the second regions, in this case, in particular, adjacent to at least one second region.

[0203] Unlike the embodiments described above, in this case the active layer is divided into a plurality of first optically active regions, at least one second region, and at least one third region.

[0204] Here, at least one third region is configured such that, according to the previously described embodiment, a local maximum with a high impurity concentration occurs, and the quantum well intermixing cannot be accessed, for example, by applying a mask. In these regions as well, quantum well intermixing is configured to occur as little as possible, similar to the multiple first optically active regions. Therefore, after the diffusion process, the second dopant is not positioned in at least one third region as much as possible, similar to the multiple first optically active regions.

[0205] Furthermore, at least one second region surrounds a number of first optically active regions such that each of the multiple first optically active regions is individually concentrically surrounded by a portion of at least one second region or by one of the multiple second regions. Thus, at least one second region results from, for example, a series of annular segments arranged around one of the multiple first optically active regions, or from a number of annular patches arranged concentrically around one of the multiple first optically active regions. Similarly, the term annular may also include circular, elliptical, oblong, or other rounded convex shapes that are substantially concentrically arranged around and completely enclose the multiple first optically active regions.

[0206] In this regard, at least one third region is adjacent to at least one second region. Thus, at least one third region may have a continuous mesh-like area arranged around a plurality of annular second regions. However, in another embodiment, each of the plurality of third regions may at least substantially replicate the shape of a deltoid curve. This can be formed, for example, by exactly three second regions arranged in a triangle, where these regions are at least substantially circular or annular in shape. Similarly, the plurality of third regions may be circular in shape and may be located at the centers of three first regions arranged in a triangle, where these regions are at least substantially circular in shape.

[0207] In arranging at least one third region, the key is to reduce local maxima with higher impurity concentrations in the second region during the diffusion process by, for example, applying a mask such as a dielectric or a photoresist mask, thereby achieving a diffusion pattern of the semiconductor structure that is as homogeneous as possible.

[0208] Quantum well intermixing can be achieved by doping a second region with a second dopant, such as magnesium, zinc, or cadmium (Mg, Zn, Cd). However, this is not intended to limit the selection of dopants, and any other similar dopants that a person skilled in the art could devise could be used for doping.

[0209] In another embodiment, as a result of a diffusion process to generate quantum well intermixing in at least one second region, the second dopant may be formed not only in the active layer of the second region, but also at least partially in the second p-type doped layer and even in the n-type doped layer adjacent to the active layer. However, this should not necessarily be understood as the regions of the second p-type doped layer and the first n-type doped layer on which the second dopant is formed coinciding with at least one second region of the active layer, although such a coincidence is possible.

[0210] In another embodiment, a semiconductor structure is proposed in which at least one second region has a substantially uniform band gap generated by quantum well intermixing. That is, in this region the band gap energy is as constant as possible, and the band gap only increases or decreases towards the periphery of the region.

[0211] On the other hand, at least one quantum well in the plurality of first optically active regions and at least one third region has a smaller band gap than the quantum well in at least one second region. Accordingly, barriers generated according to one of the above embodiments occur between the plurality of first optically active regions and the second region, and between at least one third region and the second region. In this case, the transition between band gaps can be a step with a sharp edge or a smoothly flowing transition.

[0212] In another embodiment, the plurality of first optically active regions and at least one third region have substantially the same band gap. This is because, in particular, at least one quantum well of the plurality of first optically active regions and at least one third region substantially do not have quantum well intermixing, and consequently, substantially no second dopant is generated in these regions.

[0213] In another embodiment, a semiconductor structure that may be formed from a number of individual optoelectronic elements is fragmented into a plurality of optoelectronic elements by, for example, an etching process or laser cutting via an epitaxial layer followed by substrate removal. In this case, each cutout of the plurality of optoelectronic elements is, for example, circular and includes at least one of a plurality of first optically active regions and a portion of at least one second region, where the first optically active region and the second region are arranged concentrically in particular within the circular cutout. Thus, at least one third region of the semiconductor structure is not part of the plurality of individual optoelectronic elements and, in particular, represents a rejection from the fragmentation process.

[0214] In the case of small light-emitting diodes, especially red light-emitting diodes, non-radiative recombination occurs at the outer edge of the chip, making further miniaturization of the chip size, particularly to less than 50 μm, difficult. Until now, in the case of AlGaInP-based red light-emitting diodes, the chip size has been approximately 100 μm. 2 Because this issue is not insignificant, it has not received much attention. As mentioned above, the rate of non-radiative recombination is reduced using quantum well intermixing. In the following embodiment, we present the concept of moving charge carriers away from the edge of the chip by a magnetic current constriction.

[0215] According to the first embodiment, a photoelectronic structure element, particularly a vertical μ-LED for monolithic μ-displays, is proposed. This has a layer stack in which the active layer extends in a planar direction. The main directions of motion of charge carriers, i.e., electrons and holes, extend perpendicular to this plane and pass through the active layer. In the latter, desirable radiative recombination occurs. However, since the defect density is higher at the periphery of the active layer, these defects can cause non-radiative recombination. Therefore, a magnetization element is provided. This is to provide magnetic field lines that penetrate at least a portion of the layer stack so that the moving charge carriers move away from the peripheral region of the XY cross-section of the layer stack.

[0216] According to a second embodiment, a method is proposed to reduce non-radiative recombination, particularly in the active layer region of a μ-LED. A vertical μ-LED includes a layer stack in which layers extending along the XY plane are stacked on top of each other along the Z axis perpendicular to the XY plane, and the main direction of movement of charge carriers is along the Z axis, and in particular extending around the XY cross-section of the layer stack. The method includes the step of generating magnetic field lines to move charge carriers away from the peripheral region of the XY cross-section of the layer stack.

[0217] The proposed configuration utilizes magnetic effects to effectively influence the lateral distribution of current induction within the μ-LED. This is intended to keep charge carriers (i.e., electrons, and possibly holes) away from the peripheral regions of the active layer. Thus, a kind of electron lens is realized. In this way, scalability to smaller chip sizes can be achieved. Non-radiative recombination at the chip edge is thus reduced.

[0218] In a further configuration, the magnetizing element can supply magnetic field lines in the region in front of the active layer and / or in the opposite direction to the main direction of movement of charge carriers, tapering toward the magnetic poles of the magnetic dipole, or extending along the Z-axis. It is advantageous that the magnetizing element is positioned to supply magnetic field lines only to the peripheral region of the XY cross-section of the layer stack.

[0219] In one configuration, the magnetizing element includes numerous current lines, particularly strip-like current lines, extending along the outer surface of the layer stack, with the current flow of each current line supplied antiparallel to the current flow flowing through the photoelectronic structure element. Alternatively, the magnetizing element may be constructed using numerous permanent magnetic dipoles circulating along the XY plane of the layer stack, particularly positioned in the region of the active layer and / or in the region prior to the active layer in the opposite direction to the main direction of movement of charge carriers. Electromagnets may be used instead of permanent magnetic dipoles, and the current flow of these electromagnets may be supplied, particularly by the current flow passing through the photoelectronic structure element.

[0220] In a further configuration, the magnetizing element may be a magnetic material, particularly manganese, circulating in the layer stack along the XY plane, deposited on the outer surface of the layer stack in the region in front of the active layer and / or in the opposite direction to the main direction of movement of charge carriers, and magnetized by an external magnetic field.

[0221] In a further configuration, the layer stack may have an electrically insulating passivation coating, particularly on the outer surface of the layer stack. In this context, the layer stack is a pillar-shaped μ-LED. Simply put, it includes a p-type doped layer, an n-type doped layer, and an active layer positioned between them. The latter can be configured as a quantum well or multiple quantum well. Corresponding structural forms of μ-LEDs with further measures are part of this application. Of course, the layer stacks described herein and the μ-LEDs used herein can be replaced or supplemented with structural forms disclosed herein. For example, light may not be emitted from the sides by simultaneously providing reflective properties to the magnetic current constriction. In one embodiment, two opposing sides can be formed reflective and used for current transport, while dielectric mirrors can be placed on the other two sides. In another embodiment, the extraction layer on the surface may have a photonic structure.

[0222] In addition to measures to improve semiconductor manufacturing and light generation, another aspect is the direction of light irradiation. Particularly in the case of μ-displays and polyhedral displays, it is necessary to achieve a defined emission pattern. The light generated by μ-LEDs must, on the one hand, not interact with adjacent μ-LEDs, and on the other hand, it is desirable to extract the light in order to optimize the optical efficiency at a given current intensity. In the following embodiments, various measures are presented to improve the emission pattern of the optoelectronic structure element or μ-LED by using a reflective layer or mirror surrounding the active layer or μ-LED.

[0223] Some μ-LEDs emit light laterally. This effect is often undesirable because it can cause crosstalk and interference between adjacent pixels, or other effects that worsen the visual impression. Furthermore, the light output is also reduced. Similarly, many applications require a Lambertian emission pattern for displays; that is, it is particularly desirable that the display has the same brightness regardless of the viewing direction. A non-Lambertian emission pattern can be achieved through strong edge-side emission of the chip.

[0224] Ultra-small μ-LED chips can be realized with a vertical design, that is, a design with one contact each on the top and bottom surfaces of the chip. To electrically connect a vertical μ-LED to a substrate, a so-called "top contact" must be deposited and patterned on the second contact of the μ-LED (the one not facing the substrate or on the top side). In this case, a planarization layer and / or passivation layer are similarly used around the chip.

[0225] According to a first aspect, a method is proposed for manufacturing an array having at least one light-emitting element. The light-emitting element may be, in particular, a μ-LED, a μ-rod already presented herein, a μ-LED pillar, or other elements in which light also emerges laterally with a component parallel to the active layer. In this method, a first contact region and a second contact region are patterned on one side of a substrate. The light-emitting element is similarly applied to the structure or generated thereby by patterning from multiple semiconductor layers.

[0226] Next, a first metal mirror layer and a second metal mirror layer are provided. The first metal mirror layer electrically connects a contact layer provided on the second contact of the light-emitting element to the second contact region, and the second metal mirror layer is formed on a reflector structure disposed on a substrate. The reflector structure can be obtained from a later patterned planarization layer. In some embodiments, the reflector structure surrounds the light-emitting element at a distance from it. In other embodiments, a portion of the planarization layer may be patterned to surround the light-emitting element.

[0227] The optoelectronic structural element comprises a light-emitting element that is electrically in contact with the light-emitting element, particularly by a first metal mirror layer, and a microreflector structure coated with a second metal mirror layer that particularly surrounds the light-emitting element.

[0228] According to a second embodiment, an array is proposed having at least one light-emitting element, wherein a first contact of a vertical light-emitting element is connected to a first contact region on one side of a substrate. On the same side of the substrate, a second contact of a vertical light-emitting element not facing the substrate is connected to a second contact region by a contact layer, particularly a translucent contact layer and a first metallic mirror layer. Furthermore, a reflector structure is formed that has a second metallic mirror layer on its side flanks (Seitenflanken) and surrounds the light-emitting elements at a distance from each other. In some embodiments, the reflector structure includes reflective sidewalls, which can be angled to change the direction of light. In other embodiments, the sidewalls may have a nonlinear gradient, for example, a square or parabolic gradient.

[0229] By utilizing the processing of the second contact or top contact, a light extraction structure can be created on the substrate in the same steps. In this case, the top contact is formed by the second contact of the light-emitting element, a contact layer, a first metal mirror layer, and a second contact region. Here, the contact layer provided on the second contact of the light-emitting element is electrically connected to the second contact region by the first metal mirror layer.

[0230] Here, a light extraction structure is formed by a reflector structure, particularly a microreflector structure, coated with a second metal mirror layer.

[0231] To create the top contact, the light-emitting element is first embedded in the planarization layer. This can then be exposed by photolithography in the second contact or second contact region for the top contact (upper contact) on the substrate. This patterning process is used in the same step to form a reflector, particularly a μ-reflector structure, on the substrate from the planarization layer. After depositing the transparent contact layer, a patterned metal mirror layer can be applied as a metal bridge between the second contact and the second contact region.

[0232] This is necessary because the contact layer is not suitable for filling in large height differences. This metallization process can be used to simultaneously mirror-coat the reflector structure.

[0233] In this way, a separate lithography process for forming the reflector, as in conventional methods, is unnecessary, resulting in cheaper and faster display manufacturing. By preparing the reflector from a planarization layer with a top-contact metal mirror layer, efficiency and contrast are improved, and the display's radiation pattern can be enhanced without the need for additional processing.

[0234] In some other embodiments, the arrangement structure and contacts of vertical μ-LEDs with a transparent electrical cover layer are the main focus. The objective here is to improve display characteristics, particularly when the number of pixels per unit area is high. Since the spatial position of the electrical contacts of the vertical μ-LEDs is on the upper side away from the carrier substrate, it is conceivable to use a transparent or at least partially transparent conductive material, as already described in this application. A material known for this purpose is, for example, ITO (indium tin oxide), a semiconductor mixed oxide that is transparent or partially transparent to visible light, but this material has a relatively high sheet resistance.

[0235] Therefore, a pixel element in the form of one or more μ-LEDs for generating pixels on a display has been proposed, which has a flat carrier substrate. Here, the carrier substrate can be understood as a backplane or support surface that provides a mechanically stable holding function and also supplies electrical connections for the μ-LEDs. As for the material of the carrier substrate, insulating compounds are one example, but semiconductors such as silicon or group III-V semiconductor materials can also be considered. In one embodiment, the carrier substrate is configured to be flexible or bendable.

[0236] At least one μ-LED is positioned on a carrier substrate and configured to emit light across the carrier substrate plane and away from the carrier substrate. Here, at least one μ-LED may be mounted on the carrier substrate, for example, by bonding, fusing, or as a result of an epitaxial layer process. The μ-LED is configured as a so-called vertical chip, with at least one contact located in a spatial region of the μ-LED that is away from the carrier substrate. Thus, at least one μ-LED has an electrical contact on its upper side facing away from the carrier substrate. Here, the upper surface refers to the lateral or external surface region of the μ-LED, with at least a portion of the upper surface being parallel to the carrier substrate plane.

[0237] This section describes the configuration of a vertical μ-LED. This configuration includes, but is not limited to, a set of ingots with the aforementioned conversion material placed between them, μ-rods arranged vertically or horizontally, or an antenna structure. Quantum well intermixing may be proposed to supply charge carriers from the edge or margin of the active layer.

[0238] The electrical contacts may be, for example, metallic or generally conductive surfaces. The idea here is that these surfaces contact a layer on the carrier substrate plane. The pixel element has a flat contact layer on the upper surface of the emitter chip that is at least partially conductive. This is electrically connected to the electrical contacts of the emitter chip.

[0239] In other words, for example, an additional layer that directly contacts the electrical contacts of at least one μ-LED may be processed on top of at least one μ-LED. For example, this flat contact layer may spread integrally over multiple μ-LEDs and pixel elements. According to one embodiment, this contact layer forms a common cathode or common anode. According to one embodiment, the thickness of this contact layer is 80 to 150 nm.

[0240] The planar contact layer is configured to be at least partially transparent to light emitted by at least one μ-LED. That is, light emitted by at least one μ-LED can at least partially pass through the contact layer. For this purpose, for example, a known ITO material can be used. The contact layer is provided with a conductor track that is electrically and planarly connected to the contact layer. In this case, the electrical conductivity of the conductor track is greater than the electrical conductivity of the contact layer. The conductor track may be configured, for example, planarly, or as a flat surface or strip.

[0241] The material of the conductor track is selected to have, for example, better electrical conduction characteristics than ITO materials. In other words, the conductor track should bridge a space region with low conductivity of the contact layer and bring about an overall reduction in the electrical resistance (also called improvement in lateral conductivity) across the entire contact layer. For this purpose, the conductor track is connected to the contact layer at at least two points spaced apart from each other, so that the conductivity of the conductor track increases, and this increase should reduce the overall resistance of the layout structure formed by the conductor track and the contact layer between these two points.

[0242] For example, the conductor track can be understood as a bus bar, a distributor bar or a similar conductive structure. According to one embodiment, the conductor track is implemented as a spatially separated structure as part of the contact layer itself. That is, for example, it means that regions with variously patterned areas having improved conductivity or regions provided with a combination of modified materials or substances are provided within the contact layer. The material of the conductor track can have, for example, silver, aluminum, gold, chromium or nickel - vanadium.

[0243] According to one embodiment, the contact layer may be arranged in the space between two adjacent μ - LEDs. In other words, due to the configuration and layout structure of the μ - LEDs, a space is created between each μ - LED, and this space can advantageously be provided for receiving the contact layer. According to one embodiment, the electrical contact of at least one μ - LED is arranged on the side surface of at least one μ - LED. In other words, the contact layer contacts the contact of at least one μ - LED, for example, in the region of the space between two μ - LEDs.

[0244] In one aspect, the conductor track is arranged outside the primary emission region of the μ-LED between two μ-LEDs arranged adjacent to each other on the carrier substrate. What needs to be considered here is that due to its structure, the μ-LED emits most of its light in a direction lateral to the carrier substrate plane and in a direction opposite to the carrier substrate plane. Here, it can be considered desirable that as high a proportion of the light as possible is emitted perpendicularly, that is, emitted by a conical emission pattern or ideally a Lambertian emission pattern.

[0245] For this reason, in order to avoid crosstalk, leakage and unwanted reflections, it is necessary to suppress the unwanted light components outside this advantageous primary emission region. For these reasons, the conductor track, which is mostly light-transmissive, must not block or limit this primary emission region and thus is preferably arranged outside this primary emission region or the emission path. This can be made possible, in particular, by constructing a suitable spatial region for this purpose with the space between the μ-LEDs.

[0246] In one aspect, the conductor track is configured to absorb and / or reflect light components of the light emitted by at least one μ-LED outside the primary emission region for beam shaping of at least one μ-LED. That is, in other words, it means that in addition to the function of improving conductivity, the absorption function or reflection function of the conductor track with respect to the light emitted by the μ-LED can be utilized.

[0247] That is, the conductor track is intentionally arranged around the primary emission region of at least one μ-LED so that a beam shaping effect can be obtained. For example, the conductor track may be implemented as a flat conductor structure extending annularly around the region of at least one μ-LED. When three μ-LEDs are used as sub-pixels and each forms a pixel, the conductor structure may extend around each pixel. In another example, beam shaping can be performed by providing an opening in the conductor track through which the emitted light can pass.

[0248] In one embodiment, to improve the absorption of undesirable light components outside the primary emission region of the μ-LED, the conductor track has a light-absorbing layer on the side facing the carrier substrate. According to one embodiment, this can be a separately applied layer of absorbing material, or it can be performed as a surface texture on the conductor track.

[0249] In one embodiment, the conductor track extends planarly across multiple μ-LEDs. Furthermore, notches are provided on the conductor track in the region of the primary radiating portion of each μ-LED to allow the light emitted by each μ-LED to pass through. These notches may be structures such as openings, holes, or gaps through which the light emitted by the μ-LEDs can pass. In other words, the conductor track may be provided as a continuous layer or as a continuous element. This makes it possible to make the shape of the beam-shaping openings or notches more complex, in particular.

[0250] In one embodiment, the conductor track is provided on the side of the contact layer that is away from the carrier substrate. In other words, the conductor track is positioned above the contact layer, for example, as an element that is added sequentially at a later point in the manufacturing process. In another embodiment, the conductor track is provided on the side of the contact layer that faces the carrier substrate. In other words, with respect to the carrier substrate, the conductor track is located below the ITO contact layer.

[0251] In a further embodiment, the conductor tracks are provided on the carrier substrate. Multiple μ-LEDs are arranged adjacent to each other, creating corresponding spaces. These spaces may extend to the height or level of the carrier substrate itself. In this case, instead of continuously mounting the planarization layer, it may be possible to leave it in this space. A manufacturing advantage here is that the conductor tracks are manufactured directly on the carrier substrate, and the contact layer is applied vertically on these conductor tracks.

[0252] In one embodiment, at least one μ-LED is placed within a cavity of a carrier substrate, and the conductor track is placed outside the cavity. That is, the carrier substrate can be understood as, for example, a patterned surface that is not continuously flat or planar, but has depressions. The μ-LED is placed in these depressions or pits, and the side walls of the depressions can be used as reflective surfaces for beam shaping. To avoid light shielding and absorption, one or more conductor tracks are placed outside the depressions.

[0253] In one embodiment, a junction element for electrically connecting a contact layer to a terminal element of a carrier substrate is provided on the pixel element. The consideration here is that the contact layer, which is placed on the carrier substrate, needs to form, for example, a common anode or common cathode, and as a result be electrically connected. This can be done by a terminal element, one end of which is electrically attached to the contact layer and the other end of which is attached to the conductive structure of the carrier substrate. This terminal element may be placed, for example, in the outer edge region of one or more pixel elements.

[0254] In other embodiments, the fabrication of one or more pixel elements for a display is involved. For this purpose, in a first step, a flat carrier substrate is prepared, and a plurality of light-emitting structural elements are fabricated on the carrier substrate. These structural elements can be fabricated by conventional methods of applying, doping, and patterning various semiconductor layers. Typical material systems are GaN-based, including, for example, GaN, GaNP, GaNInP, and GaNAlP. The plurality of light-emitting structural elements have their main emission direction facing away from the carrier substrate. Furthermore, electrical contacts are provided on the surfaces of the plurality of light-emitting structural elements that do not face the carrier substrate. In addition, a planar contact layer that is at least partially conductive is applied, and this layer is electrically connected to the electrical contacts of the plurality of light-emitting structural elements. In one embodiment, the contact layer can extend across the carrier substrate and cover the structural elements. The contact layer is configured to be at least partially transparent to light emitted by the semiconductor components during operation. On the contact layer, there is provided at least one conductive track that is electrically connected to the contact layer and planarly connected to the contact layer, in which case the electrical conductivity of the conductive track is greater than the electrical conductivity of the contact layer.

[0255] The embodiments of the reflective layer or mirror presented above can also be applied to other μ-LED implementation designs, such as the vertical μ-LED design with the circulating structure shown below. Various designs based on vertical or horizontal μ-LED architectures are suitable for the manufacture of μ-LED displays. In this case, short switching time and sufficient current carrying capability are particularly important. At the same time, the emitted light should be collimated as much as possible before emission.

[0256] When horizontal μ-LEDs are used, the anode and cathode contacts are typically realized using separate metal lead frames (Zuleitungsbahnen), and both contacts are located on the underside of the chip. Both the cathode and anode have metal lead frames wired to each pixel. When vertical μ-LED chips are used, the anode contacts located on the underside of the chip are realized using separate metal lead frames, while the cathode contacts located on the upper side of each chip are realized by a common cathode. In either case, the lead wires must be as short as possible to minimize parasitic capacitance.

[0257] As explained earlier, μ-LEDs are manufactured monolithically or individually and then post-processed on a substrate. The backplane (in the case of a backplane assembly; in a monolithic structure, this may also serve as the substrate, or the growth substrate may replace the backplane) contains the drive and control elements. Regarding drive and control, a distinction is made between passive matrix backplanes with integrated IC circuits and active matrix backplanes with integrated TFT circuits. In passive matrix backplanes with integrated IC circuits for driving and controlling the light-emitting diodes, the cathode and anode leads are typically wired directly to the pixels or to subpixels. Control of the pixels or subpixels is performed via a microintegrated circuit.

[0258] When an active matrix backplane is implemented, individual pixels are driven and controlled using integrated TFT circuits (TFTs = thin-film transistors).

[0259] Therefore, an arrangement structure has been proposed that allows for shorter lead wires to obtain high switching times. Furthermore, a common connection between the cathode and anode is realized. This arrangement structure is particularly suitable for generating pixels for μ-display modules, and these pixels can also be individually addressable and driven. Furthermore, it can be supplemented with other measures such as the aforementioned mirror-wrap structure. This also reduces optical crosstalk to adjacent pixels in some embodiments.

[0260] According to a first embodiment, a device is proposed comprising a substrate and a μ-LED die fixed to one side of the substrate. This device has electrical contacts electrically connected to electrical control contacts by a mirror coating on the side not facing the substrate, and the mirror coating at least partially covers the substrate surface facing the die.

[0261] Thus, the mirror coating serves two functions: on the one hand, directing light in the direction of emission, and on the other hand, transporting current. A common cover contact or common cover electrode enables high-speed switching times for the μ-display. This allows for the provision of pulse-width modulation dimmer concepts that improve panel efficiency, along with improvements in optical parameters such as the angle dependence of light emission and contrast.

[0262] In a method for manufacturing such an array, first, a substrate having numerous contacts on its surface is prepared, and a μ-LED die is mounted on one of these contacts. Conventional transfer and mounting techniques, partially presented in this disclosure, can be used for this mounting. The μ-LED die is mounted as a vertical die, and one of the substrate surfaces similarly includes contacts. A mirror coating layer is formed on the substrate surface, which is electrically connected to the electrical control contacts on the substrate surface and covers the surface at least partially. In the final step, a transparent cover electrode, which is electrically in contact with the mirror coating layer, is formed on an additional contact.

[0263] Furthermore, the use of mirror coatings, combined with the cavity structure, can achieve improved current diffusion, increased current transport capability, and reduced switching time. In this case, such cavities also play a role in improving extraction efficiency, angle dependence of light emission, and contrast. For this purpose, in some embodiments, the substrate includes protrusions surrounding the μ-LED die. Alternatively, instead of protrusions, cavities may be provided on the substrate surface on which the μ-LED die is placed. In addition to one μ-LED die, three μ-LED dies may also be surrounded or arranged to collectively form a pixel as subpixels.

[0264] In all cases, the optionally chamfered sides of the cavity or protrusion are provided with a mirror coating. This structure is the same as described above. The angles of these sides with respect to the substrate surface can take different values ​​depending on the desired characteristics. In particular, this structure can also be modified so that the side flanks are parabolic or other nonlinear slopes. In some embodiments, the mirror-circumferential structure disclosed herein can be used. The height of the protrusion or the depth of the cavity is selected so that the μ-LED die is at the same height as the top surface of the protrusion or cavity. This allows the cover electrode to be closed. This is particularly advantageous when the mirror coating is located on the top surface and the cover electrode rests on the mirror coating layer.

[0265] In some embodiments, the space between the μ-LED dies, or the region within the protrusion or cavity, is filled with a transparent insulating layer, so that this insulating layer surrounds the die. In particular, the transparent insulating layer is closed at the height of the contacts opposite the die, so that the cover electrodes rest on the insulating material.

[0266] In some embodiments, the mirror surfaces disposed on the substrate surface and optionally on the circumferential structure surround not only one but also multiple dies. These dies may be configured as redundant dies so that other chips can take over each time one chip fails. The circumferentially disposed mirror surfaces generate more uniform radiation. Similarly, multiple dies for generating light of different wavelengths may be disposed inside the circumferentially disposed mirror surfaces. The mirror circumferential surface can separate different pixels from each other and reduce light leakage between pixels.

[0267] The mirror coating is connected in series with the cover electrode and the control contact of the substrate and includes a highly reflective material composed of, in particular, Al, Ag, AgPdCu, Nd, Nb, La, Au, Cu, Pd, Pt, Mg, Mo, Cr, Ni, Os, Sn, Zn and alloys or combinations thereof. These also effectively conduct current. The cover electrode may have a material composed of a transparent conductive oxide layer, particularly ITO, IGZO. Other examples of cover electrode materials include, for example, metal oxides, zinc oxide, tin oxide, cadmium oxide, indium-doped tin oxide (ITO), aluminum-doped (AZO), Zn2SnO4, CdSnO3, ZnSnO3, In4Sn3O 12 such transparent conductive oxides, or mixtures of different transparent conductive oxides can be mentioned.

[0268] The transparent insulating layer may include SiO or other insulating transparent materials described herein.

[0269] In a further configuration, direct electrical contact between the cover electrode and the mirror coating may be established by overlapping the surface of the cover electrode and the mirror coating surface, particularly at the surface of a protrusion or the edge of a recess or cavity. In this way, a reliable low-impedance contact can be provided. In particular, if multiple such cavities or protrusions are arranged in series, the cover electrode may rest on multiple mirror coating layers. This allows current to be introduced to the cover electrode over a wide area and at multiple locations.

[0270] In some embodiments, the mirror coating layer extends along the surface of the substrate, particularly partially around one or more μ-LED dies. This enhances reflectivity over a wide area of ​​the substrate surface.

[0271] To ensure contact, direct electrical contact between the cover electrode and the mirror coating is provided by through-hole vias or vias in the mirror coating material via a planarization layer and / or insulating layer. Additional process steps to achieve metallic contact between the conductive oxide of the cover electrode and the contact area on the backplane / substrate are omitted. For example, a simple bridge can be constructed from the ITO cover contact to the CrAl contact area for ACF bonding. This allows for further cost reduction. These through-hole vias may also be implemented as openings. However, in other configurations, structures such as trenches may be provided in the transparent insulating layer, with a conductive reflective layer for contact on its inner wall. This provides good electrical contact on the one hand, and on the other hand, a reflective structure is formed, resulting in good light reflection in some areas, as well as reduced optical crosstalk.

[0272] The insulating layer may be chamfered at the edge of the pixel, exposing the mirror coating layer. The cover electrode extends along this inclined surface and contacts the mirror coating layer. In this way, a more compact structural mode can be provided. The flank or inner wall of the opening has an angle corresponding to the desired radiation pattern. These may correspond to those disclosed herein. In this way, further material damage at the transition edge can be avoided.

[0273] In other embodiments, the manufacture of pixels or μ-LED modules containing multiple such μ-LED dies arranged in rows and columns is involved. Each pixel may be embedded in a cavity or surrounded by a protrusion. Thus, the cover electrode can be used as a common connection for multiple such μ-LED dies. Furthermore, the cover electrode may be provided with a projection structure. In particular, it is necessary to mention the photonic structure disclosed herein, which is suitable for further collimating light. The cover electrode may also be provided with a converter. In this way, for example, a type of μ-LED die that produces blue light can be used, and this light can be converted in the conversion layer. In this case, a further reflective structure can be assembled on the cover electrode to avoid optical crosstalk to other pixels. Furthermore, a photonic structure that collimates the converted light is also conceivable.

[0274] Nano-emitting diode arrays, including nanocolumns or nanorods applied in a matrix and stacked vertically, have already been described in the context of stimulated emission in slot-type antenna structures of this application. A characteristic of nanocolumns is their high aspect ratio; that is, their height relative to their base plane is typically 1 μm. 2 This means it falls within the following range.

[0275] Compared to light-emitting diodes with planar extended semiconductor layer stacks, the quasi-one-dimensionality of nanocolumns and the resulting relaxation of lattice matching requirements offer the advantage of more flexible material compositions for forming the active layer. This results in improved spectral tuning capabilities for emission and can also influence the targeted introduction of strain and the determination of active layer expansion. This, in turn, leads to the aforementioned possibility of stimulated emission. However, columns emitting light of different colors can also be created using different material systems and / or strain or doping.

[0276] Depending on the manufacturing variation, nanocolumns are fabricated starting from a planar semiconductor layer system having layers of different conductivity types (n-type or p-type doping). The active layer of the semiconductor layer system typically has a quantum well structure. Photolithography techniques are then used to pattern the nanocolumn, reaching at least to the depth of the active layer, which helps to create a nanocolumn with a laterally restricted, disk-shaped active zone from the planar semiconductor layer system.

[0277] A second fabrication variation of nanolight-emitting diode arrays starts with an n-type gallium nitride layer patterned on a carrier substrate such as Al2O3, SiC, or ZnO, and then uses a group III-V semiconductor, particularly (Al x In y Ga 1-x-y This is achieved by epitaxially growing a nanolayer structure in the form of an upright nanocolumn of )N. This nanocolumn has a core-shell structure consisting of an elongated core, an active layer covering the core, and a shell layer having a charge carrier polarity different from that of the core material.

[0278] The region between adjacent nanocolumns is filled with an insulating material used as the base for a transparent contact layer. Alternatively, the upper contact layer can form a bridge structure that spans the air-filled area between the nanocolumns.

[0279] The starting point for the following considerations for improving nanolight-emitting diode arrays is an array having a carrier substrate and nanocolumns connected at least indirectly to the carrier substrate and extending longitudinally from the carrier substrate. Preferably, there is a matrix arrangement having multiple nanocolumns on the carrier substrate. In this case, each nanocolumn has a semiconductor sequence having at least one active layer that generates electromagnetic radiation, and is configured such that at least a portion of the radiation emission occurs transversely to the longitudinal direction. According to the proposed concept, a reflector device is placed on the carrier substrate transversely to the nanocolumns, which at least partially changes the radiation emission transverse to the longitudinal direction to the direction of the main radiation direction extending parallel to the longitudinal direction. This reduces the radiation angle of the nanolight-emitting diode array, and the pre-collimation thus achieved facilitates beam coupling to optical components following the beam path.

[0280] In one advantageous configuration, the reflector device includes a first reflective optical element and a second reflective optical element positioned on different sides of the associated nanocolumn. Advantageously, an additional reflector device is provided between each of two adjacent nanocolumns.

[0281] Nanocolumns that emit electromagnetic radiation may be part of the pixels of an illumination unit or display device. In one possible configuration, each pixel includes a single nanocolumn and a reflector device associated with and surrounding the nanocolumn. In further configurations, according to some embodiments, a pixel may include multiple nanocolumns, and the reflector devices assigned to the pixel may surround the nanocolumns of the pixel. In an alternative configuration, multiple reflector devices exist within a single pixel, and each nanocolumn of the pixel is provided with a separate reflector device.

[0282] The pixels may be designed, for example, as RGB pixels, taking into account the spectral adaptability of emission. In configurations with multiple nanocolumns per pixel, these may be proposed in different colors. It is also conceivable to adjust the color by adapting the active layer of each nanocolumn or by locally embedding the nanocolumns in different photoconversion materials. Furthermore, the n-type contacts and / or p-type contacts are patterned and formed so that energy can be individually supplied to the pixels and / or parts of the pixels, in particular to individual nanocolumns or groups of nanocolumns.

[0283] In one configuration, the nanolight-emitting diode array has layers of nanocolumn semiconductor sequences and monolithically formed profile layers. These layers are designed integrally and may be obtained from a common manufacturing method or from manufacturing steps carried out sequentially using the same substrate.

[0284] In some embodiments, to improve reflectivity, the reflector device has a metallic reflective layer and / or Bragg mirrors. In another embodiment, the configuration includes a Fresnel lens array incorporated into the reflector device to further enhance the collimation effect. Furthermore, as a further design, wavelength conversion elements are placed in the beam path between the nanocolumns and the reflector device, with a first wavelength conversion element assigned to a first nanocolumn being applied to emit electromagnetic radiation spectrally different from the radiated beam of a second wavelength conversion element assigned to a second nanocolumn. In an alternative configuration of the nanolight-emitting diode array, at least a portion of the nanocolumns has a lateral direction where no reflector device is located. Instead, an optical isolator may be provided in this direction between adjacent nanocolumns.

[0285] Methods for fabricating nanolight-emitting diode arrays according to these principles include patterning at least one profile layer of the reflector device and / or a layer of semiconductor sequences in the nanocolumn by photolithography. Furthermore, in addition to patterning the reflector device using an anisotropic etching process, the application of etching stop layers to form nanocolumns with high aspect ratios is also proposed. A further preferred fabrication method involves epitaxial growth of the profile layer and / or the layer of semiconductor sequences in the nanocolumn of the reflector device. Further fabrication variations include nanostamping processes (Nanostempelverfahren).

[0286] As has been repeatedly stated, the direction of light emitted from the sidewall is changed by the reflector layer to reduce light loss. Another approach proposes a reflective interface directly positioned on the side of the optoelectronic structure element. Therefore, this approach can be implemented not only in monolithic structures but also in single optoelectronic structures. Similarly, this approach can also be provided for μ-LED nanocolumns or semiconductor layer stacks, as has been proposed for antenna structures, for example.

[0287] In one embodiment, the optoelectronic device includes at least one photoelectron light source, particularly in the form of a μ-LED, which is based on a semiconductor material and has an active zone for generating light, wherein a light-emitting surface for the generated light is formed on the upper surface of the light source, and the light source has at least one further interface in addition to this upper surface that divides the light source laterally and / or downward, and a dielectric reflector is disposed at the interface, which is formed to reflect the generated light.

[0288] In contrast to, or complementing, other measures using reflective mirrors, a dielectric reflector is applied directly to the interface here. Without a dielectric reflector, light generated by the light source would leak laterally and / or downwards, potentially penetrating the carrier material of the device surrounding the light source. In contrast, a dielectric reflector reflects, at least partially, the light incident on the interface and returns it to the interior of the light source. Thus, by using an dielectric reflector, the lateral and / or downward leakage of light from the light source can be prevented at least partially. Ideally, the reflected and returned light would leak through the light-emitting surface after further reflection, for example. In this way, a dielectric reflector can increase the amount of light. At the same time, the element is very small.

[0289] The interface can have a side surface that circumferentially surrounds the light source and a bottom surface of the light source, with the bottom surface facing the top surface. The dielectric reflector may be placed only on the side surface, or only on the bottom surface, or it may be placed on both the side surface and the bottom surface. Therefore, the dielectric reflector may be placed on the entire interface separating the light source, except for the top surface. Thus, since the dielectric reflector can surround the entire light source except for the top surface, the amount of light can be made relatively large.

[0290] A dielectric reflector may have a sequence of overlapping material layers, particularly periodic or aperiodic, where at least two directly consecutive material layers have different refractive indices. In particular, a dielectric reflector may consist of a periodic sequence of alternating dielectric material layers having different refractive indices. The thickness of the material layers may be matched to the wavelength of light emitted from the light source in order to achieve the highest possible reflection.

[0291] A non-periodic sequence of material layers can produce an equivalent mirror effect with thinner layers compared to a periodic layer sequence, at least in some configurations. In particular, dielectric reflectors may be formed as Bragg mirrors. Bragg mirrors are known by themselves. They are also called dispersed Bragg reflectors and are abbreviated as DBRs.

[0292] A Bragg mirror may be formed from a periodic arrangement of two thin films with different refractive indices, alternating between them. Most layers consist of a dielectric material based on a semiconductor material. At the interface between the two material layers, a portion of the incident light is reflected according to the so-called Fresnel law. Constructive interference occurs between the reflected beams when the wavelength is nearly four times the wavelength of light of each material layer.

[0293] The stopband is the wavelength range in which the reflectivity of a Bragg mirror is very high, especially for normally incident light, and can theoretically reach 100% in the case of a very large number of alternating layers. Light whose wavelength falls within the Bragg mirror's stopband is reflected to a high degree, and ideally cannot propagate through the Bragg mirror.

[0294] Therefore, it is preferable that the reflector formed as a Bragg mirror is formed such that the wavelength of light emitted from the light source is located within the stopband, particularly at its center. In this case, the thickness of the material layer of the Bragg reflector is matched to the wavelength of the emitted light. In this regard, it is advantageous that the optical thickness of the layer is 1 / 4 of the wavelength of the emitted light. The optical thickness corresponds to the product of the layer thickness and the optical refractive index.

[0295] Some aspects of this concept also relate to optoelectronic devices such as display arrangement structures or monolithic arrays, or to headlights such as matrix headlights, where the optoelectronic device has a plurality of proposed optoelectronic devices, and the light sources of the optoelectronic devices are arranged in an array. Each light source can form a pixel of the display arrangement structure or monolithic array. Each light source may be proposed to emit light of one of a plurality of predetermined colors, such as red, green, and blue. Each light source can form a subpixel of a pixel, and a pixel is formed by a plurality of light sources, each light source emitting light of one of each color.

[0296] The light source of the optoelectronic device may be embedded in the carrier, such that only the light-emitting surface of the light source is an open outer surface, while each interface of the light source is surrounded by the carrier material. In this regard, the dielectric reflector of the optoelectronic device may be positioned between the interface of the light source and the carrier material. For example, the carrier may consist of one or more layers of semiconductor material. Each layer may contain electronic circuits, for example, in the form of one or more planar conductive tracks. Similarly, there may be electronic circuits for supplying or driving and controlling the light source. For example, the current supply to the light source may be performed by conductive tracks.

[0297] Further embodiments of the presented concept also relate to a method for manufacturing optoelectronic devices, particularly display devices or headlights, in which a photoelectronic light source based on a semiconductor material is provided, the light source having an active zone for generating light and, on its upper surface, a light-emitting surface for the generated light, and a dielectric reflector is placed at at least one interface of the light source, the dielectric reflector being formed to reflect the generated light, and the interface demarcates the light source laterally and / or downward.

[0298] The interface may form the remaining outer surface excluding the top surface of the light source. The reflector may cover all or at least part of the interface.

[0299] Similarly, methods for manufacturing optoelectronic devices, such as display arrangement structures or headlight arrays, will also be presented. In some embodiments, in this method, the light sources of a plurality of optoelectronic devices according to the present invention are arranged in an array, with only the emission surfaces of the light sources exhibiting an open outer surface, while the carrier material is embedded in the carrier so as to surround the interface of the light sources. Dielectric reflectors may also be placed between the respective interfaces of the carrier material and the light sources. This step may be performed before embedding the light sources in the carrier.

[0300] The concept also relates to a method for manufacturing optoelectronic devices, such as monolithic arrays or headlights, using several proposed optoelectronic devices or μ-LEDs. In this method, a number of semiconductor material-based optoelectronic light sources are arranged in an array on a carrier such that each light source has an active zone for generating light and an open outer top surface as a light-emitting surface for the light, and for each light source, a dielectric reflector is placed on at least one interface that separates the light source laterally and / or downward with respect to the carrier material, and is formed to reflect the generated light.

[0301] The arrangement of dielectric reflectors may involve depositing the dielectric reflector material using atomic layer deposition (ADD). ADD is also known as "atomic layer deposition." Here, the material for forming the dielectric reflector may be deposited in extremely thin layers. A layer thickness equivalent to a single layer of atoms can be achieved. This allows for the deposition of layers of precisely defined thickness even on non-planar (e.g., curved) surfaces. ADD makes it possible to easily manufacture reflectors, particularly Bragg mirror type reflectors.

[0302] For the dielectric layer of a reflector with a high refractive index, for example, Nb2O5, TiO2, ZrO2, HfO2, Al2O3, Ta2O5, or ZnO can be used. For the dielectric layer with a low refractive index, for example, SiO2, SiN, SiON, or MgF2 can be used.

[0303] The arrangement of a dielectric reflector may involve applying the material for at least one layer of the dielectric reflector by a first method and arranging the material for the other layers by a second method. In particular, the layer directly in contact with the interface of the light source may be arranged by the first method. The first method can be a vapor phase growth method such as CVD (chemical vapor deposition) or PE-CVD (plasma-assisted chemical vapor deposition). This allows for covering the unevenness of the interface, such as a rough surface created by an etching process, with a more conformal deposition. Subsequently, further layers of dielectric mirrors can be fabricated on the smooth surface.

[0304] A second method can be atomic layer deposition. This allows for the formation of dielectric reflector layers with a defined thickness.

[0305] Further embodiments also relate to optoelectronic devices, or more specifically, methods for manufacturing a number of optoelectronic devices as presented herein, wherein photoelectron light sources based on a semiconductor material are arranged in an array on a carrier such that each light source has an active zone for generating light and an open outer upper surface on its upper surface as a light-emitting surface for the light, the light sources are arranged such that there is at least a small gap between adjacent light sources on the upper surface and a space behind them, and for each light source, a dielectric reflector is placed on at least one interface separating the light source laterally and / or downward with respect to the carrier material, the dielectric reflectors of the light sources are formed such that the material for the dielectric reflector is introduced from the upper surface, for example by atomic layer deposition, into the respective gaps between adjacent light sources, and the dielectric reflectors are formed in the respective spaces located behind the gaps.

[0306] At least the light-emitting surface of the light source may be covered, in particular with a photomask, and a dielectric reflector may be formed in space at the same time. The photomask can be removed after the reflector is completed. The example headlamp may be a matrix headlamp. Therefore, the headlight assembly may be a matrix headlight assembly.

[0307] Another aspect involves improving the radiation pattern of a μ-LED by attaching a dielectric filter with an added reflective surface. The optoelectronic structure element, in particular a μ-LED, according to the first aspect of this disclosure includes at least a semiconductor element, a dielectric filter, and a reflective material. Furthermore, the optoelectronic structure element may include, for example, the components described in this application.

[0308] At least one semiconductor element includes an active zone formed to generate light. In particular, this may be configured as a vertical or horizontal μ-LED. Measures such as quantum well intermixing can already be taken to increase the efficiency of the element. Furthermore, at least one semiconductor element has a first main surface, a second main surface opposite the first main surface, and sides extending between the two main surfaces. For example, at least one semiconductor element may have three or four or more sides. However, it is also conceivable that at least one semiconductor element has a circular main surface and therefore only has one embodiment.

[0309] The dielectric filter is placed on the first main surface of at least one semiconductor element and is configured to transmit or pass through only light incident on the dielectric filter in a predetermined direction.

[0310] For example, a dielectric filter may be configured to transmit light only at a predetermined cone angle (Winkelkegel). The cone angle is oriented such that its axis is perpendicular to the first principal surface of at least one semiconductor element. The angle between the outer surface or matrix of the cone and the axis of the cone, i.e., half of the cone's aperture angle, may have a predetermined value. For example, half of the cone's aperture angle can be at most 5°, at most 15°, at most 30°, or at most 60°. Light components incident from the semiconductor element to the dielectric filter at an angle within the predetermined cone angle range are transmitted, while the remaining light components are substantially not transmitted and are reflected back, for example, to the semiconductor element. This enables high directivity of the light emitted from the optoelectronic device.

[0311] The dielectric filter may be configured to have an aperture angle with a very small cone angle, so that only light emitting from the semiconductor element perpendicular to the first main surface is transmitted through the dielectric filter.

[0312] A dielectric filter may be composed of a stack of dielectric layers, which is applied to a semiconductor device by coating and has particularly high transmittance. For example, the dielectric layers in the stack may alternate between low and high refractive indices. Examples of materials that can be used for the high refractive index dielectric layer include Nb2O5, TiO2, ZrO2, HfO2, Al2O3, Ta2O5, or ZnO. Examples of materials that can be used for the low refractive index dielectric layer include SiO2, SiN, SiON, or MgF2. A stack of dielectric layers with alternating high and low refractive indices may be configured as a Bragg filter. Furthermore, the dielectric filter may be a photonic crystal.

[0313] A reflective material is deposited on at least one semiconductor element and one or more sides of the dielectric filter. The reflective material may be arranged to cover at least one or all sides of the at least one semiconductor element. Similarly, the reflective material may cover at least one or all sides of the dielectric filter. In one configuration, the reflective material completely surrounds both the at least one semiconductor element and the dielectric filter in the lateral direction.

[0314] The reflective material may be reflective to light emitted from at least one semiconductor element, or to at least a portion of the wavelength range of this light. As a result, light emitted through the side of at least one semiconductor element or dielectric filter is reflected back, improving the efficiency of the optoelectronic structure element.

[0315] Multiple structural elements may be proposed. These also have one or more semiconductor elements having the characteristics described above. A dielectric filter is placed on each semiconductor element. Furthermore, the semiconductor elements are surrounded by a reflective material. Additionally or alternatively, multiple structural elements having semiconductor elements may be surrounded by such mirrors. For example, such a configuration can provide redundancy so that if one semiconductor element fails, a redundant semiconductor element can take over its function. For example, the semiconductor elements may be arranged in an array, i.e., in a regularly arranged structure.

[0316] The optoelectronic structural elements may be incorporated into a display, i.e., a display device. Each semiconductor element can represent or constitute one pixel of the display. Furthermore, each semiconductor element can represent a subpixel of a pixel, and each pixel is formed from multiple subpixels that emit light having, for example, red, green, and blue light.

[0317] High contrast can be obtained between adjacent pixels by reflective material that laterally surrounds each semiconductor element and its respective dielectric filter. Furthermore, high pixel density is also possible. In one configuration, the semiconductor elements are configured as μ-LEDs. μ-LEDs have a small lateral spread of the light-emitting surface, especially in the μm range. In contrast to monolithic array μ-LEDs, isolated μ-LEDs each form a self-contained unit and can be individually installed and moved with a large gap between them. The light emitted by the semiconductor elements can be, for example, visible light, ultraviolet (UV) light, and / or infrared (IR) light.

[0318] In addition to displays, the optoelectronic structure elements according to the first aspect of this application can also be used, for example, in augmented reality (AR) applications and other applications of pixelated arrays or pixelated light sources.

[0319] In one configuration, at least one or all sides of at least one semiconductor element extend inclined at the height of the active zone. That is, at least a portion of each side forms an angle with the first main surface of at least one semiconductor element, and this angle is not 90°, but in particular less than 90°. At least one semiconductor element may be chamfered over its entire height or only partially, but in either case, the active zone is preferably in the chamfered region. The fully or partially chamfered sides may form an interface with a low refractive index insulating layer. Light emitted horizontally is reflected toward the surface of the component by the chamfered sides.

[0320] At least one semiconductor element may have a first electrical terminal and a second electrical terminal. For example, one terminal may represent the cathode and the other terminal may represent the anode. Furthermore, the reflective material may be conductive and electrically coupled to the first terminal of at least one semiconductor element. In particular, the first terminal may be connected to an n-type doped region of at least one semiconductor element. As a result, the reflective material provides optical separation between adjacent pixels while simultaneously providing electrical contact to at least one semiconductor element.

[0321] When multiple optoelectronic structures comprising numerous semiconductor elements are proposed, the reflective and conductive materials surrounding each semiconductor element may be interconnected, thereby enabling the first terminals of the semiconductor elements to be controlled collectively from the outside. In this case, the second contacts of the semiconductor elements may be individually driveable and controllable, for example, via the underside of the semiconductor element. This configuration is advantageous from a manufacturing perspective because only one contact needs to be defined with good resolution, and it facilitates the manufacture of very small pixels where there would be insufficient area if two mutually isolated contacts were provided on the underside of the chip. The reflective material may be, for example, a metal, contain a metal, or be electrodeposited.

[0322] The reflective layer may be located beneath the second main surface of at least one semiconductor element. This allows light that passes through the second main surface to be reflected back to the semiconductor element and completely exit the photoelectronic structure through the top surface. Furthermore, the reflective layer may be conductive and electrically coupled to the second terminal of at least one semiconductor element. For example, the second terminal may be connected to a p-type doped region of at least one semiconductor element. As a result, in addition to its reflective properties, the reflective layer also plays a role in establishing an electrical contact with at least one semiconductor element. It may also be proposed to allow individual drive control of the second terminal of each semiconductor element.

[0323] The reflective layer may be made of the same material as the reflective material, but it does not have to be. For example, a metal can be used for the reflective layer.

[0324] Alternatively, the reflective layer may be electrically insulated, and one or more conductive layers may be placed above and / or below the reflective layer, particularly coupled to the second contact of at least one semiconductor element. In this case, the reflective layer may be, for example, a dielectric mirror, and may be placed on a metal layer. Electrical contact is then made through a feedthrough penetrating the dielectric layer or through the sides of the dielectric layer. Furthermore, a conductive and transparent layer may be placed above the reflective layer, i.e., between at least one semiconductor element and the reflective layer. As the material for the conductive and transparent layer, for example, indium tin oxide (ITO) can be used.

[0325] In one configuration, for example, a silver mirror is placed beneath a conductive and transparent layer of indium tin oxide and a dielectric mirror. Alternatively, only a conductive and transparent layer of indium tin oxide and a silver mirror may be placed beneath at least one semiconductor element.

[0326] A first electrically insulating material may be placed between the reflective material and the reflective layer. Furthermore, the first electrically insulating material may be in direct contact with one or more sides of at least one semiconductor element, particularly with the chamfered portion of the side. Furthermore, the first electrically insulating material may have a lower refractive index than at least one semiconductor element, particularly in the region of the interface with the first electrically insulating material. As a result, the first electrically insulating material causes electrical insulation between the first terminal and the second terminal of at least one semiconductor element. Furthermore, due to the refractive index contrast, light can be reflected back at the interface between at least one semiconductor element and the first electrically insulating material.

[0327] The first electrically insulating material is, for example, SiO2 and may be deposited by vapor deposition using, for example, TEOS (tetraethyl orthosilicate) or another method based on, for example, silane, so as to satisfy a high aspect ratio.

[0328] A layer having a roughened surface configured to change the direction of light to other spatial directions or to scatter light may be placed between at least one semiconductor element and a dielectric filter, i.e., on the first main surface of at least one semiconductor element. This layer may have a Lambert radiation pattern. Furthermore, the layer may be formed so that light components at angles exceeding the critical angle of total internal reflection are redirected, so in principle all components can be extracted and not remain "confined" within the component.

[0329] The aforementioned layers may consist, for example, of a randomly or deterministically patterned semiconductor surface. The surface may have a roughened structure with inclined flanks, the height of which is up to several hundred nanometers in the case of a μ-LED. The roughened structure can be created, for example, by etching.

[0330] Furthermore, it is also possible to roughen the first main surface of at least one semiconductor device without using the aforementioned layers. For this purpose, for example, a random or deterministic topology can be etched onto the first main surface, particularly to realize a Lambert radiation pattern. The roughened first main surface of at least one semiconductor device can have the same properties as the roughened surface of the aforementioned layers.

[0331] A further layer, for example made of SiO2, having a refractive index different from that of the underlying layer and having a flat top surface, may be deposited on the roughened surface of at least one semiconductor element or a layer disposed on such semiconductor element. This additional layer can be used as a dielectric filter by its flat top surface, while simultaneously maintaining the functionality of the roughened surface of the underlying layer due to the refractive index difference.

[0332] Because the lateral spread of the pixels is small, at most 50 μm, it is possible to reduce the height of at least one semiconductor element within the μm range. In particular, at least one semiconductor element may have a lateral spread or edge length of up to 50 μm and / or a height of up to 1 μm to 2 μm.

[0333] As described above, the device may include a plurality of optoelectronic structural elements that may have the configurations described in this application. Each semiconductor element of the structural element may be completely surrounded laterally by a reflective material, together with an associated dielectric filter and a reflective layer disposed beneath each semiconductor element. In one configuration, the semiconductor elements are arranged in an array, and adjacent semiconductor elements are separated from each other by the reflective material. As a result, the reflective material forms a lattice, and adjacent semiconductor elements are separated from each other only by the lattice.

[0334] If the reflective material is also conductive, the first terminals of all semiconductor elements may be connected to a common external terminal via the reflective material. The second terminals of the semiconductor elements may be individually driveable and controllable.

[0335] In the alternative configuration, multiple semiconductor elements, each laterally surrounded by a reflective material, are arranged side by side, with a second electrically insulating material placed between adjacent semiconductor elements. For example, the second electrically insulating material may be a potting material.

[0336] In this configuration, the reflective material may be conductive. To connect the first terminal of the semiconductor element to a common external terminal, a conductive track connecting the first terminal of the semiconductor element to the common external terminal may extend above and / or below and / or inside the electrically insulating second material. The second terminal of the semiconductor element may be individually driveable and controllable.

[0337] A method according to a second aspect of this application is used for manufacturing a photoelectronic structure element. The method includes providing at least one semiconductor element having an active zone configured to generate light, and placing a dielectric filter on a first main surface of the at least one semiconductor element. The dielectric filter is configured to transmit only light in a predetermined direction. Furthermore, a reflective material is placed or deposited on at least one side surface of the at least one semiconductor element and at least one side surface of the dielectric filter.

[0338] A method for manufacturing an optoelectronic device according to a second aspect of this application may have the above-described configuration of the optoelectronic structural element according to a first aspect of this application.

[0339] The following sections will examine in detail aspects of processes and methods for manufacturing μ-LEDs or μ-displays or modules. As already explained, these processes include processing of semiconductor structures or materials, and vice versa. In this regard, the following points can be easily combined with those discussed previously.

[0340] Due to the manufacturing process and the extremely small dimensions of individual optical elements, individual pixel elements can become defective among the many pixels in a display. This problem has a greater impact in monolithic μ-display modules because manufacturing defects and variations quickly lead to pixel failure due to their small size. In particular, with monolithic displays, it is not possible to replace defective pixels individually, so if the defect density becomes high, the entire module must be replaced.

[0341] For example, known solutions attempt to compensate for the missing light from a defective pixel by setting the brightness of surrounding or adjacent pixels to a higher level. In many cases, replacing or repairing these defective pixels does not seem economically or process-wise worthwhile, so it is desirable that the manufactured display can be used with sufficient quality even if there are individual defective pixels.

[0342] The following embodiments relating to a pixel element having electrically isolated and optically coupled subpixels can compensate for such small defects, thereby improving yield while maintaining the quality of the μ-display or μ-display module.

[0343] These embodiments take into account the use of measures suitable for preventing optical crosstalk, and the means proposed below are not only suitable for the above-mentioned problems, but the reduction of optical crosstalk has further advantages, especially in monolithic structures where μ-LEDs are in very close proximity to each other and good optical separation needs to be achieved. In the case of very densely arranged monolithic arrays or μ-displays or μ-display modules, clean optical separation between pixels is necessary so that the light emitted from μ-LEDs does not radiate into the region of adjacent pixels. To prevent optical crosstalk, trenches (more generally, optically separating structures) are often provided between two μ-LEDs. On the one hand, it is necessary to suppress optical crosstalk in order to achieve sufficiently good high-contrast image quality, but this can sometimes make pixel failures more noticeable.

[0344] Therefore, an optical pixel element for generating display pixels, formed by at least two subpixels, is proposed. In one embodiment, a single pixel element is provided with 2, 4, 6, 9, 12, or 16 subpixels. In other words, here, two subpixels receive the same drive control information and are implemented to match the same wavelength, for example, providing redundancy. Therefore, even if one of these at least two subpixels fails, the pixel element can still emit light of that wavelength. In one embodiment, the amount of light deficiency from the failed subpixel can be compensated for by adjusting the brightness of the subpixel. In one embodiment, the subpixels are implemented as so-called fields. For example, if the pixel element is implemented in a rectangular structure, the subpixels within the structure of the pixel element are formed by dividing it again into fields. Each of these subpixels can be driven and controlled independently of the subpixels in other fields.

[0345] Each subpixel has an optical emitter region. This is intended to allow each subpixel to be individually driveable and function autonomously. The emitter region includes a pn junction, one or more quantum well structures, or other active layers provided for generating light. Contacts are mounted on the underside of the emitter region for connection to a control unit or drive control electronic circuit (Ansteuerelektronik).

[0346] The drive control electronic circuit is configured to electrically control individual pixel elements and individual subpixels. For example, the drive control electronic circuit or control device may be configured to detect defects in subpixels and subsequently prevent the use of defective subpixels. Furthermore, according to one embodiment, the drive control electronic circuit may be configured to drive adjacent subpixels to increase their brightness so that the brightness of adjacent faulty subpixels is compensated. For this purpose, for example, a memory unit for storing the operating state of subpixels may be provided in the drive control electronic circuit. In other words, in this case, subpixels detected as defective can be centrally detected in order to adjust brightness or compensate for defects by turning adjacent subpixels or pixel elements on / off as needed. In other configurations, for example, the time a subpixel is active may be extended to compensate for a faulty subpixel. On the other hand, when all subpixels are functioning, the drive control circuit can also drive all subpixels individually by reducing their brightness, shortening their duration, or multiplexing them. By utilizing functional subpixels with low current and / or duration, it is possible to extend the lifespan of subpixels.

[0347] A subpixel isolation element is provided to separate two adjacent subpixels within a pixel element. This has the effect of electrically isolating the drive control of each emitter chip or the drive control of the subpixels. In other words, this subpixel isolation element may be configured to prevent electrical interaction between the emitter chips of adjacent subpixels.

[0348] In particular, because semiconductors are used and the distance between the emitter regions of individual subpixels is short (in the μm range), driving and controlling the emitter chip can potentially cause secondary electrical or electromagnetic effects on spatially adjacent or surrounding regions. This means that, depending on the situation, driving and controlling the primary emitter chip may also activate adjacent emitter chips. Therefore, subpixel isolation elements are configured to prevent electrical crosstalk to adjacent subpixels and potential activation of adjacent subpixels.

[0349] On the other hand, subpixel separators are configured to optically couple to light emitted from the emitter chips of adjacent subpixels, thereby canceling the visual impression that individual subpixels are turned off. Optical coupling means that light generated by the primary emitter chip or primary subpixel can penetrate adjacent subpixels through optical crosstalk. In this way, it is advantageously possible to prevent the formation of black dots or black spots due to defects in subpixels. Alternatively, light can penetrate from adjacent subpixels and radiate in the direction of emission, starting from the defective subpixel. This can advantageously compensate for the visible effect of the defective subpixel. Therefore, subpixel separators have no optical separation effect, nor is it achieved.

[0350] This is advantageous in the event of a failure in one subpixel. Because they are not optically separated, the pixels are still perceived as a whole and do not give a different visual impression than when both subpixels are active. In one embodiment, the subpixel separator may be electrically separated but not optically separated, or optically facilitate crosstalk. In one variation, the subpixel separator is only retracted to just before or into the active layer of the two subpixels. In other words, the subpixel separator electrically separates two subpixel elements connected via a common layer.

[0351] In one embodiment, subpixels have a common epitaxial layer. Often, the pixel element or the entire display is configured such that a common layer or multiple superimposed layers grow, connecting multiple subpixels and / or pixel elements to each other. This can also be used, for example, to provide a common electrical contact or connection. According to one embodiment, the epitaxial layer has a group III element gallium, indium, or aluminum and a group V element nitrogen, arsenic, or phosphorus, or a combination thereof, or a material system having the aforementioned elements. This can, in particular, affect the color and wavelength of the light emitted by the light-emitting diode. The epitaxial layer may also have an active semiconductor layer, i.e., a p-type doped region and an n-type doped region including an active boundary region.

[0352] For example, an emitter chip is positioned on the first surface of the epitaxial layer, which is lateral to the longitudinally extending portion of the epitaxial layer plane. In this case, the light from the emitter chip is emitted lateral to the epitaxial layer toward the second opposing surface of the epitaxial layer and radiated from there. The subpixel separator element extends in a trench-like manner lateral to the epitaxial layer plane, starting from the first surface of the epitaxial layer on which the emitter chip or μ-LED is located.

[0353] In other words, the subpixel isolation element is implemented here as a structure such as a recess, gap, or slot, and may be further filled with an electrically insulating material. The insulating material is also preferably optically transparent to facilitate optical crosstalk. According to one embodiment, the trench length is selected so that a drive control signal to one subpixel does not electrically crosstalk with a second adjacent subpixel of the same pixel. In particular, such a trench-like structure causes electrical decoupling due to increased electrical resistance resulting from a significantly extended current flow path.

[0354] The optical effects of the emitted light are also related to the region of the epitaxial layer that is located further in the center of the epitaxial layer or to the region of the epitaxial layer that is directed toward a second, more distant surface. That is, the depth of the trench is selected so as to ensure electrical decoupling, while the trench terminates before reaching the region of the epitaxial layer from which light can travel between two adjacent subpixels. The emission direction of the emitter chip is, for example, extended across the epitaxial layer, allowing light to exit from a second, opposing surface.

[0355] In one embodiment, the trench extends perpendicular to the epitaxial layer plane. Assuming the trench extends in this way, in another example, the trench length d1 is less than the total thickness of the epitaxial layer. In this case, the epitaxial layer is assumed to have at least approximately the same total thickness across multiple pixel elements and subpixels. In another example, the trench length d1 between pixel elements is the same as the thickness of the epitaxial layer. In other words, the trench extends continuously from the first surface to the second surface of the epitaxial layer. In yet another example, the trench extends continuously obliquely into the epitaxial layer at an angle of 0 to 90° with respect to the epitaxial layer plane.

[0356] In one embodiment, each pixel element or its sub-pixel elements includes a plurality of semiconductor layers in the form of a layer sequence, and further provided is an active layer for generating light. The active layer may include structures such as quantum wells prepared for generating light. In one embodiment, one or more layers extend across a plurality of pixels or sub-pixels. For example, it may be proposed that the active layer extends across a plurality of sub-pixels of color.

[0357] In one embodiment, subpixels or pixel elements are electrically contactable and / or driveable independently of each other. For this purpose, for example, contacts may be provided on the surface of the subpixel away from the epitaxial layer. These may be, for example, mechanical contacts, solder connections, or clamp connections. The important point here is that each subpixel is contactable and electrically operable without substantially interacting with adjacent subpixels of the adjacent subpixel. This is particularly advantageous for detecting the functional or operating state of subpixels, because diagnostic information can be generated individually for each individual subpixel. Similarly, it is also convenient to turn individual subpixels on / off without going through adjacent subpixels. This allows multiple subpixels to operate simultaneously at lower luminosities, thereby reducing thermal or other stress on the subpixels even at higher luminosities.

[0358] In a further embodiment, individual subpixels are in contact via a carrier substrate. The carrier substrate is intended to provide mechanical stability on the one hand, and to incorporate a fine conductive structure for individually contacting the individual subpixels on the other hand. Further elements, such as drive control electronic circuits or driver circuits, can also be incorporated into the carrier substrate, particularly the silicon wafer. These may have the same material system, or they may have different material systems separated by a matching layer. Thus, silicon can be used as the carrier material. This allows for easy implementation of drive control circuits, in particular, on this carrier.

[0359] In one embodiment, the brightness of a pixel element can be adjusted by turning individual subpixels on or off. An advantage here is that effective brightness control is already possible with a single on / off switch. This significantly simplifies, for example, the drive control electronic circuit or control unit. In another example, the brightness of one or more subpixels of a pixel element can be additionally adjusted. This allows for finer gradation of brightness and more accurate adjustment or calibration of the color spectrum through interaction between different wavelengths of subpixels in the same pixel element. Brightness adjustment can be performed using PWM drive control. Even if a subpixel fails, equivalent brightness can be maintained by appropriately extending the PWM drive control. Conversely, if there are no problems with the subpixels, adjusting the PWM drive control allows the subpixels to operate at their maximum efficiency, reducing thermal stress and potentially extending their lifespan.

[0360] For example, if eight subpixels are patterned on one pixel element, without further changing control parameters such as current or on-time, 2 3 (2^3) levels of luminance dynamic range can be achieved. In other words, in this modified configuration, the dynamic range is 2 3 It can be increased by (2^3) times. This, in turn, can reduce the complexity of electronically controlled devices and the associated costs.

[0361] In another embodiment, a μ-display having multiple pixel elements as described above and below is proposed. According to one embodiment, such a μ-display may be an optical semiconductor display for applications in the augmented reality field or the automotive field, for example, where a small display with very high resolution is used. Similarly, such a display can be used in wearable devices such as smartwatches or wearables.

[0362] A pixel element isolation layer is provided between two adjacent pixel elements. This is configured to electrically isolate adjacent pixel elements for the purposes of driving and controlling each pixel element. Furthermore, the pixel element isolation layer is configured to optically isolate the light emitted from the pixel elements. Abstractly, a pixel element isolation layer can be understood as any structure or material that separates two pixel elements from each other. Typically, a number of such pixel elements are arranged side by side on a plane, such as a support surface, and connected to the driving and control electronic circuit via contacts. In this way, a display can be formed as a whole.

[0363] Electrical and electromagnetic isolation ensures that pixel elements can be driven and controlled independently of adjacent pixel elements, guaranteeing minimal or no electrical or electromagnetic interaction, and especially no optical interaction. This is crucial for the sole reason that each pixel can be generated independently of the others to display specific image content on the display. This optical isolation is also necessary for individual pixels on the display to obtain sufficient sharpness, contrast, or detail from each other.

[0364] In one embodiment, multiple pixel elements share a common epitaxial layer. The pixel element isolation layer is configured in a trench-like manner and extends laterally to the epitaxial layer surface in the direction of light emission from the emitter chip. In other words, the pixel element isolation layer is configured as a recess such as a trench, slit, or slot and does not contain a solid material, or contains a material that is, for example, reflective or absorptive. In one example, the pixel isolation element is filled with an insulating material incorporating a mirror layer. The insulating material electrically isolates two adjacent pixels, and the mirror element prevents optical crosstalk. In some configurations, the mirror element also provides for or facilitates optical collimation.

[0365] The pixel element isolation layer is intended to prevent electrical or electromagnetic signals from being transmitted from one pixel element to another. At the same time, the pixel element isolation layer is intended to minimize, or eliminate, the emission of light from one pixel element to an adjacent pixel element. In one example, the pixel element isolation layer can only be formed by positioning two isolated pixel elements adjacent to each other during configuration, thereby creating a corresponding insulating or reflective interface layer. In one embodiment, the trench is perpendicular to the epitaxial layer plane, and the length of the pixel element isolation layer is less than or equal to the thickness of the epitaxial layer.

[0366] In a further embodiment, the trench depth of the pixel element isolation layer is greater than the trench depth of the sub-pixel isolation layer. This has the advantage that, in particular, the longer length of the pixel element isolation layer allows for both electrical and optical isolation. On the other hand, if the trench depth between sub-pixels is shallow, while optical crosstalk is certainly desirable, only electrical isolation can be obtained. In some embodiments, the depth of the pixel element isolation layer extends through the active layer of a second adjacent pixel to isolate it. Furthermore, the pixel element isolation layer may extend to the radiating surface or just below it.

[0367] In another embodiment, a method for calibrating pixel elements has been proposed. This method is based on the idea that optimal drive control should be possible when the display is powered on. That is, for example, a defective subpixel is detected as such, and then no further drive control is performed as necessary. This can avoid, for example, error messages or malfunctions. Depending on the structure of the pixel element having subpixels, each subpixel can be individually driven and tested.

[0368] Therefore, in the first step, the subpixels of the pixel element are driven and controlled, for example, by a drive control electronic circuit or control unit. In the next step, defect information of the subpixels is detected. In other words, the drive control electronic circuit may be designed and configured to detect malfunctions or defects. For this purpose, for example, current strength may be measured or other electrical parameters may be evaluated.

[0369] In a further step, defect information is stored in the control unit's memory unit. This information can be used, for example, to perform optimal drive control by the drive control electronic circuit. For example, if a specific brightness is to be achieved and it is known that a specific subpixel has a defect, the drive control electronic circuit can appropriately distinguish and drive adjacent subpixels to correct the brightness. As a result, even if a subpixel has a defect, the intensity of light emitted from the pixel element does not change at all, or changes very little, and goes unnoticed by the viewer.

[0370] In another aspect of this method, drive control, detection, and storage are performed sequentially for all individual subpixels of the pixel element. In other words, the drive control electronic circuit may be configured to sequentially check all subpixels available by individually addressable emitter chips in order to detect the functional state of the entire pixel element. According to one embodiment, this may be performed only once when the display is powered on, or after a certain period of time has elapsed.

[0371] Extensions to pixelated emitters or other emitters that reduce optical and electrical crosstalk are presented in the following concepts:

[0372] In conventional monolithic pixel arrays, in some embodiments, it is common practice to etch the active zone to isolate individual pixels and make them individually addressable. However, the etching process of the active layer can introduce defects that can lead to increased leakage current at the edges or further non-radiative recombination. The smaller the pixel, the larger the relative damaged area becomes. Traditionally, the edges of etched active zones have been passivated in various ways. These methods include regrowth, deposition of in situ passivation layers, diffusion of seeds to shift the pn junction and increase the band gap around the active zone, and wet etching and washing to remove as much damage as possible.

[0373] According to the proposed principle, a pixel structure having a material bridge including at least an active layer is proposed. This makes it possible to suppress the increase in defect density in the active layer region.

[0374] Thus, an array of photoelectron pixels or subpixels, particularly a micropixel-emitter array, a micropixel-detector array, or a combination of micropixel-detector-emitter arrays, includes each pixel or subpixel that forms an active zone between the n-type doped layer and the p-type doped layer. According to the proposed principle, between two adjacently formed pixels, the material of the layer sequence is interrupted or removed from the n-type doped side and the p-type doped side to or within the cladding layer, or to or at least partially within the active zone. In this way, the maximum thickness d c A material transition zone is formed, which reduces the electrical and / or optical conductivity in the material transition zone.

[0375] According to a second embodiment, a method for manufacturing an array of photoelectron pixels or subpixels is proposed, in which, in a first step, an overall planar layer sequence having n-type doped layers and p-type doped layers is provided along the array, and an active zone suitable for light emission is formed between these layers. Subsequently, between adjacent pixels, the material of the layer sequence is removed from the n-type doped side and p-type doped side to or within the undoped cladding layer, or to just before or within the active zone. This removal may be performed by an etching process. However, even after removal, a material transition region remains between adjacent pixels, which includes the active zone and optionally small regions on the upper, lower, or both sides. This is the maximum thickness d in which the electrical and / or optical conductivity is effectively reduced by the material transition region. c Includes.

[0376] In the proposed concept, on the one hand, an array of pixels can be generated in a planar manner. Although the material is removed by the etching process, a material transition zone containing the active layer remains between adjacent pixels or subpixels. Therefore, the etching process does not increase the defect density in the active layer region, especially in the pixel region. Nevertheless, individual pixels or subpixels are optically and electrically isolated from each other. Thus, it is proposed to manufacture micropixel-emitter arrays and micropixel-detector arrays formed by micropixels without etching through the active zone, in order to avoid optical and electrical crosstalk and a decrease in the performance and reliability of the etched active zone. In this way, etching defects are avoided or the number of defects is effectively reduced.

[0377] In this context, a pixel or subpixel refers to a μ-LED that emits light during operation. In principle, multiple subpixels of different colors are combined to form a single pixel, which is also called an image element.

[0378] According to one configuration, the removed material may be replaced at least partially with a filler material. In other words, a planar surface is obtained by partially removing a material, particularly an n-type dope or p-type dope layer, and then refilling the resulting space. This can provide mechanical support, bonding, and / or electrical insulation functions.

[0379] In a further configuration, the removed material may be at least partially replaced with a material having a relatively small band gap and thus absorbing light in the active zone. This effectively reduces optical crosstalk. Alternatively, at least a portion of the removed material may be replaced with a material having a high refractive index, particularly one higher than the refractive index of the cladding layer or the active zone. This effectively creates a high refractive index interface that hinders the propagation of fundamental modes. Furthermore, alternatively, in one embodiment, a light-absorbing material and / or a high refractive index material may be applied to each material transition. In this way, crosstalk can be prevented by such materials influencing the waveguide (Wellenleitung) of the material transition.

[0380] According to further configurations, materials with a high refractive index can be formed by diffusing or injecting a material that enhances the refractive index into the filler material, particularly into each cladding layer. In this way, the array can be effectively improved with respect to crosstalk in a simple manner that does not require etching.

[0381] Another perspective concerns the reduction of electrical crosstalk. Based on this, materials that increase light absorption and / or electrical resistance can be introduced into the active zones of the respective material transition zones. The corresponding methods can be carried out relatively easily. Thus, the array can be effectively improved in terms of crosstalk using a simple method that does not require etching.

[0382] Depending on the further configuration, at least one optical structure, in particular a photonic crystal and / or Bragg mirror, may be fabricated along, on, or within the material transition zone. These are particularly effective elements for reducing optical crosstalk. Such photonic crystals or structures can also be used to improve optical collimation.

[0383] In other embodiments, an electrical bias may be applied to the two main surfaces of the material transition zone by two opposing electrical contacts, generating an electric field through each material transition zone. This is an effective element for reducing optical crosstalk. In this case, the electric field is generated by applying a bias. This bias may originate from, for example, the voltage used to operate the pixels. However, in some embodiments, such a field may be determined by the inherent material properties. Thus, in one embodiment, it is proposed to generate an electric field in each material transition zone by applying or growing an n-type doped material and / or p-type doped material on at least one of the two main surfaces of the material transition zone. In this way, since the electric field is incorporated into the corresponding array, there is no need to apply a voltage.

[0384] In a further configuration, the exposed main surface of the material transition region and / or the exposed surface region of the pixel may be electrically insulated and passivated by their respective passivation layers, particularly those having silicon dioxide. In this way, current flow through selected regions of the array, particularly current flow through material transitions that function as waveguides (Wellenleiter), can be effectively and specifically prevented. A vertical optical structure element can be fabricated by electrically contacting the main surfaces of the pixels with a contact layer, where one main surface may be electrically connected to the other via a shared layer. In a further configuration, the material and / or material transition regions between one pixel and its adjacent pixels may be formed differently from each other, particularly depending on the direction.

[0385] For the manufacturing of μ-LED displays, it is advantageous to incorporate μ-LED subunits during processing, separate them, and then perform post-processing. This allows for individual testing of subunits. If a μ-LED in a subunit fails, only the subunit needs to be replaced, rather than the entire μ-display. On the other hand, by adjusting the process steps, manufacturing flexibility is increased, making it possible to produce displays of different sizes. This approach is particularly well-suited as a modular architecture for μ-LEDs.

[0386] According to one embodiment of a modular architecture, a method for manufacturing a μ-LED module has been proposed, comprising the following steps: - A step of creating at least one layer stack that provides a base module on a carrier; - A step of applying a first contact to a surface region of the layer stack that is not facing the carrier; - A step of applying a second contact to a surface area of ​​the first layer that is not facing the carrier.

[0387] Alternatively, you can follow these steps: - A step of fabricating at least one layer stack that provides a base module, having a first layer formed on a carrier, an active transition layer formed on the first layer, and a second layer formed on the active transition layer; - A step of exposing the surface area of ​​the first layer that is not facing the carrier; - A step of connecting the first contact to the surface region of the second layer that is not facing the carrier; - A step of connecting a second contact to a surface area of ​​a first layer that is not facing the carrier.

[0388] Therefore, the μ-LED module includes at least one layer stack providing a base module having a first layer formed on a carrier, an active transition layer formed on the first layer, and a second layer formed on the active transition layer, wherein a first contact is connected to the surface region of the second layer that does not face the carrier, and a second contact is connected to the surface region of the first layer that does not face the carrier.

[0389] In this way, a base module, particularly one with a contact surface, can be created as a basic element of a μ-LED module. The base module is part of a larger system, but in its simplest form, it can contain μ-LEDs. In one embodiment, the base module contains multiple, at least two, μ-LEDs. These can be controlled individually or constructed with redundancy. Therefore, according to the principle of modularity, the whole can be divided into parts, which are called modules. With a common function of emission and rectangular or any other shape, modules can be easily assembled.

[0390] The starting point for this is the μ-LED, which has a horizontal architecture. The size of this optoelectronic structure element meets the requirements of the display field, where an ultra-small chip size is required due to the extremely narrow pixel pitch, and the light-emitting area (approximately 300 μm²) 2 The architecture is configured to satisfy the following requirements. Furthermore, to similarly satisfy the requirements of other applications such as video walls, the μ-LED architecture is configured to allow the production of light-emitting diodes composed of multiple subunits of this ultra-miniature μ-LED by simply adjusting one process step, specifically using different masks for the layer stack or mesa structure.

[0391] For example, the basic size of the base module is 15 μm × 10 μm. With this mask and appropriate contact or individualization, components of similar size, such as 15 μm × 20 μm or 30 μm × 30 μm, can also be easily manufactured, which are also suitable for various μ-LED display applications. As mentioned above, the component includes one or more base modules, and these base modules may also include one or more μ-LEDs.

[0392] Modular design, which uses a currently required ultra-small chip as a base unit or base module and allows it to be processed into a component twice the size of the base unit (base module) with only slight adjustments to the processing, saves development resources and provides a certain degree of flexibility in the manufacturing of such components. For example, if there is a need for applications in the μ-LED region with different brightness and pixel pitch, the necessary chips can be manufactured relatively easily.

[0393] In one embodiment, not only the mesa (layer stack) but also the contact surface is patterned differently. This requires two steps to be modified, but it eliminates the need to ensure that all contact pads are connected. By using a lateral chip architecture, it is possible to avoid the additional process steps for n-type contact connection that are required after assembly on the target substrate, as is the case with a vertical chip. This simplifies manufacturing compared to other manufacturing technologies and, consequently, reduces costs.

[0394] In a further embodiment, the second contact can be electrically insulated from the transition layer and the second layer by a dielectric and can be formed to extend over a surface region of the second layer that is not facing the carriers.

[0395] Depending on the application requirements, the base modules are configured as a matrix along at least one row and at least one column in the XY plane, with the base modules in each row oriented in the same direction. Two adjacent columns of base modules are oriented in the same direction as needed. In this way, an electrical series circuit of the base modules can be easily realized.

[0396] Alternatively, the orientation of the base modules in two adjacent rows can be reversed to place the same contacts adjacent to each other. In this way, an electrical parallel circuit of the base modules can be easily realized. Since both n-type and p-type contacts are located on the underside of the lateral μ-LED, it is advantageous to arrange the chips alternately. This minimizes the risk of potential short circuits, as in the case of a 2×X chip configuration, the p-side contacts of both base elements are located in the center of the chip, while the n-side contacts are located on the outside.

[0397] In some embodiments, the separation of at least one light-emitting diode module from multiple base modules is performed by deeply patterning the sides, particularly from the side of the second layer, through a first layer. This can be done by laser lift-off, particularly from the side of the carrier not facing the module. Similarly, an etching process is also conceivable.

[0398] In other embodiments, the question arises as to whether, and if so, sensors can be incorporated into such subunits, and to what extent. Particularly in the field of augmented reality, but also in the case of μ-displays envisioned for automotive applications, it may be effective to include sensors that detect user responses and other parameters. For example, in augmented reality applications, one or more photosensors may be provided to detect the direction of gaze and changes in gaze direction. Similarly, the amount of light can be detected to, for example, brighten or darken the image. The same sensors can also be used in displays for automotive applications. Likewise, sensors that detect driver attention are also possible, and if drowsiness is detected, appropriate measures can be taken as needed.

[0399] The inventors recognize that future displays may no longer have sensors located outside the display. Rather, sensor functionality needs to be implemented behind or inside the entire micro-display, as an alternative to the separate solutions used so far.

[0400] Herein, the subdivision of the μ-LED module disclosed herein is for this purpose. In this case, sensors may be mounted in place of μ-LEDs at redundant positions of subpixels. Accordingly, according to a first embodiment, a μ-display is proposed having a target matrix formed on a first carrier or end carrier. The matrix or μ-display has locations that μ-LEDs can occupy. Furthermore, by forming a number of structural elements, in particular μ-LEDs, on a second carrier or replacement carrier, a start matrix is ​​obtained in which locations that structural elements can occupy are arranged at equal intervals relative to the target matrix. Furthermore, the μ-LEDs are grouped on the replacement carrier to form a number of modules, which are separated from the second carrier, in which case the modules are electrically connected on the first carrier in the target matrix such that a number of locations not occupied by structural elements remain on the latter, and at least partially each of these locations is electrically connected to at least one sensor element. In some embodiments, the locations that the target matrix can occupy correspond to the locations of subpixels or pixels.

[0401] Furthermore, a module or subunit of μ-LEDs disclosed in this application is provided. Its size and spacing correspond to the corresponding parameters of the occupyable space on the target matrix. The subunits are assembled into a module and electrically connected to the target matrix, with a number of spaces remaining that are not occupied by structural elements, and at least partially each of these spaces is electrically connected to at least one sensor element. By arranging the module or subunit on a display module or display in this way, some spaces can be left free, where sensors can be implemented. This makes the sensors part of the display. This has several advantages. For example, the light hitting the display can be measured directly, and then the illuminance of the module or individual μ-LEDs can be adjusted according to their position.

[0402] According to a second aspect, a method for manufacturing a μ-display is proposed, which has a target matrix that can be occupied by μ-LEDs formed on a first carrier or end carrier and arranged in rows and columns. The occupable locations may correspond to subpixels. Furthermore, the locations have a size and spacing that substantially corresponds to the modules disclosed herein. In other words, the target matrix includes locations arranged in rows and columns that can be occupied by modules of μ-LEDs.

[0403] Thus, the modules are manufactured by, for example, performing shallow and deep mesa etching as disclosed herein, and assembling them into modules. The modules thus manufactured are removed from the replacement carrier and placed in empty spaces in the target matrix on the end carrier and electrically connected to the end carrier. However, in this process, the previously defined spaces remain empty. Each of these spaces is occupied by at least one sensor element, which is placed and electrically connected.

[0404] The end carrier may have wiring connections between the module and individual μ-LEDs. Furthermore, in some embodiments, the end carrier includes at least one power supply and / or drive control electronic circuit for the applied module or μ-LEDs. In other embodiments, the end carrier also further includes electronic equipment for reading at least one sensor element. The at least one sensor element may include a photosensor. Further examples are given below.

[0405] The prepared μ-LED module or subunit and the corresponding region of the target matrix on the end carrier must be rasterized in the same way, or have the same size and, in some cases, the same periodicity. In particular, when transferring large modules with multiple rows or columns and applying them to the end carrier, it is desirable that they be spaced the same.

[0406] In one embodiment, one or more contact areas of a module or subunit coincide with the corresponding contact areas of an occupable location on the end carrier. Thus, the module can be incorporated into the target matrix on the end carrier. In this way, the module can be inserted into or integrated into the target matrix on the end carrier.

[0407] This makes it possible to construct a display in which modules, particularly μ-LED modules, are arranged at equal intervals from one another in all structural elements. Thus, in one embodiment, the target matrix of the display is implemented with very small spacing between occupyable locations. In this embodiment, each occupyable location can be fitted with an ultra-small module to be manufactured. This allows for very high resolution due to the small size and narrow spacing of the pixels, and enables the display to be brought very close to the user's eye.

[0408] Alternatively, the occupable locations of the target matrix can be further spaced apart from each other. Similarly, in some embodiments, multiple subunits disclosed herein may be placed in such occupable locations. In some embodiments, the locations of the target matrix arranged in rows and / or columns may be spaced apart from each other by a distance b. The μ-LED modules are all the same size and have a distance a from each other. Distance a may be the same as distance b, which substantially corresponds to the above configuration. However, distance b may be several times the distance a. Since the occupable locations are also the contact surfaces of the μ-LED modules or subunits, the larger the distance b between occupable locations, the greater the available space. In this way, larger modules can be used or multiple modules can be combined. For example, if distance b is 2.5 times distance a, one module consisting of four individual modules can be placed in an occupable location, and distance still remains between modules located in adjacent locations.

[0409] This configuration allows for consideration of differences in eye sensitivity and resolution. The smaller the distances a and b, the higher the resolution, but this may decrease the viewer's eye sensitivity. Therefore, it is possible to realize displays with different pixel sizes, sub-pixel sizes, or pixel pitches using the same μ-LED module. This is advantageous because the μ-LED module can be manufactured independently of the target matrix, its carriers, and their wiring.

[0410] The previously disclosed shallow mesa etching is used for electrical contact of pixels and for forming μ-LED modules and target matrices, and etching is performed on the μ-LED grid. By combining this with so-called deep etching, chip grids and modules can be defined. This chip grid may differ from the pixel chip grid depending on the application. For example, a large 2x2 chip (four base units) with four subpixels can be manufactured. Each base unit is a μ-LED. Similarly, by cleverly configuring the mask for the second mesa etching, it is possible to create pixels with one less base unit each. When these pixels are arranged, a display is formed with "holes" the size of a base unit or multiples thereof. Various sensors can then be housed beneath these "holes" or "missing subpixels." Combining these allows for redundant subpixels, which can be replaced by some of the sensors.

[0411] For this purpose, it is appropriate to provide μ-LEDs for display manufacturing having a uniform chip architecture and chip sizes that are the same or easily changeable. For this purpose, the techniques described herein can be used. For example, when manufacturing modules of the type disclosed, cover electrodes and circumferential structures disclosed herein can be used to increase the light output. In some embodiments, the module can then be further processed, for example, by applying a photoelectric structure. However, it should also be noted that such structures may be present in the μ-LED module at the time of its manufacturing process.

[0412] In some embodiments, μ-LEDs are assembled into rectangular or square modules, which can also be combined in any way, particularly in rows. By manufacturing using shallow and deep etching, wafers can be prepared from such modules and then sliced ​​to fit the target matrix as needed. In this way, modules of various sizes can be realized. Free positioning allows certain locations to be left empty. Similarly, entire groups of cells, rows, or columns may also be left empty. Finally, these modules can be implemented in displays where the target matrix has different arrangements of occupyable locations, i.e., not in rows and columns, for example.

[0413] In one configuration, at least one module may have four pixel elements arranged in a 2x2 matrix. Each pixel element may contain one or more subpixels. In another configuration, one module has four subpixel elements, which are also arranged in a 2x2 matrix. This is an easy-to-manage configuration. In a further configuration, at least one module may have a 2x2 matrix, but may only have three structural elements. This is an easy-to-manage configuration in which unused spaces are already prepared within the module.

[0414] In a further configuration, at least seven modules, each having four pixel elements, and at least two modules, each having three pixel elements, may be arranged and electrically connected on a target matrix on an end carrier, creating at least two locations not occupied by pixel elements, each of which may be arranged and electrically connected to at least one sensor element. Here again, the modules can be arbitrarily configured and connected or arranged on the end carrier to create specific unoccupied locations. Here again, the pixel elements either consist of multiple sub-pixel elements and their corresponding μ-LEDs, or each pixel element itself is a μ-LED.

[0415] In a further configuration, the area occupied by the sensor element may be surrounded by a structural element. In this way, a clearly defined location, i.e., an area not occupied by a structural element, can be explicitly used for the sensor element.

[0416] In some embodiments, the modules may be generated as subpixels. Modules emitting different colors may be generated with different second carriers or interchangeable carriers.

[0417] In various configurations, multiple sensor elements may be formed as part of a sensor device formed on a first carrier or end carrier to receive electromagnetic radiation incident on the first face of the first carrier. In this way, different light spectra can be detected depending on the application. In further configurations, the sensor element may take the form of a photodiode, a phototransistor, a photoresistor, an ambient light sensor, an infrared sensor, an ultraviolet sensor, a proximity sensor, or an infrared structural element. Similarly, the sensor may be a vital sign sensor that detects vital sign parameters. Thus, the display device can be used in a variety of ways. For example, the vital sign may be body temperature.

[0418] In a further configuration, vital signs monitoring sensors may be located inside or behind the display screen, and the sensors are set to measure one or more of the user's parameters. These parameters may include, in addition to body temperature, for example, gaze direction, pupil size, and skin resistance.

[0419] In a further configuration, the structural element may have a first layer formed on a carrier, an active transition layer formed on the first layer, and a second layer formed on the active transition layer. The first contact is connected to a surface region of the second layer that does not face the carrier, and the second contact is connected to a surface region of the first layer that does not face the carrier. This configuration corresponds to a vertical μ-LED. In this way, the structural element can be made to contact from only one side. In another embodiment relating to this, the second contact is electrically insulated from the transition layer and the second layer by a dielectric and extends over a surface region of the second layer that does not face the carrier.

[0420] In addition to manufacturing monolithic pixel arrays, μ-LEDs can also be applied to a carrier board and then contacted. Due to their large size, individual transfer and contacting of μ-LEDs is difficult. Therefore, in some applications in the automotive sector, video walls, and even in specialized cases of augmented reality applications, μ-LEDs are first applied to a somewhat larger carrier, and then contacted to leads on the board. The board may also be a screen layout, such as a video wall or pixel matrix. Such layouts sometimes require special connection techniques, which vary depending on the layout, technique, or manufacturing process. Therefore, providing a variety of μ-LEDs or modules is quite complex.

[0421] Therefore, there is a need to develop pixel modules for various assemblies that meet various requirements and are particularly suitable for the manufacturing processes of different generations of video wall NPPs, that is, LED matrices for AR or VR applications and flexible displays in the automotive sector.

[0422] In one configuration, the μ-LED module includes a body having a first main surface and four sides. At least three contact pads are arranged on the first main surface. These are configured to be electrically connected to a photoelectronic structural element. For example, three or a subset thereof are connected to a μ-LED with an edge length of 10 μm or less. According to the present invention, a plurality of contact webs are further provided. Each contact web electrically connects to one of the at least three contact pads. Furthermore, the contact webs on the first main surface are wired to at least one of the four sides. In other words, the contact webs are arranged on the first main surface and at least one of each side. On the sides, the contact webs form contact tabs, i.e., they are configured to make contact from the outside.

[0423] Thus, because the proposed μ-LED module allows for rewiring, it can be easily connected to predefined connection points on the carrier or matrix. In particular, by pre-positioning significantly miniaturized μ-LEDs on the module, the module can free up space for electrical connections. This increases the flexibility of such modules, allowing them to be used in a variety of applications.

[0424] For example, in addition to modules that combine three μ-LEDs to form a single pixel, it is also possible to combine multiple μ-LEDs in this way to form larger modules. Since individual μ-LEDs can be manufactured separately, the most suitable technique can be used for each μ-LED. Furthermore, individual μ-LEDs can be configured with redundancy. Larger modules are also called segments. In addition to individual μ-LEDs, special modules with the shallow and deep mesa etching disclosed herein can also be used. Similarly, ingot-like designs or the proposed antenna structure designs are also conceivable. The wiring modifications proposed here allow modules and μ-LEDs to be manufactured individually and adapted to their respective applications.

[0425] In one configuration, the contact web extends only along the sidewall, while in another configuration, it is also connected to a contact pad on the underside of the μ-LED module, which is a second primary surface. Thus, contact pads are present on both the top (for the μ-LED) and bottom surfaces of the μ-LED module. This allows the μ-LED module to be used in both SMT-based (surface mount technology) manufacturing processes and contact web processes that bring the contact web on the carrier to the sides of the module. This configuration increases the module's flexibility and allows for better compensation of carrier manufacturing tolerances (e.g., contact web length or size).

[0426] In a further configuration, it has been proposed that the second of the four sides has only the fourth contact web. This contact web can be distinguished, for example, by receiving a specific potential during operation. Furthermore, this contact web can also be distinguished from the other contact webs visually, for example by the size of its side. This allows the module to be positioned in the correct orientation during transfer. In other configurations, two of the three contact webs are located on different sides. According to one embodiment, four contact webs are provided, each located on a side and advantageously connected to a contact pad on the underside of the module, i.e., the second main surface.

[0427] In another example, contact webs are similarly positioned on the first main surface. These extend towards the corners and then along the side corners toward the second main surface (e.g., the underside of the module).

[0428] Another aspect relates to the design of the module body. In this aspect, the module body has a prism based on a quadrilateral surface, such as a rectangle. In one configuration, a second main surface is provided opposite the first main surface and having a larger area than the first main surface. Alternatively, the first main surface may be provided so as to form an angle of 90° or more with each of the four sides. This forms a prism-like or four-sided truncated pyramid. In other configurations, the sides are not positioned perpendicular to the first main surface.

[0429] In another embodiment, the contact web and / or contact pads include metal tabs, particularly deposited metal tabs, having a thickness of less than 5 μm, especially less than 2 μm, and even less than 1 μm. For example, the thickness of the contact web and contact pads can be in the range of 100 nm to 50 nm. These can be manufactured by a suitable photolithography process. Depending on the configuration, the metal tabs and contact pads may be deposited on the insulating layer of the module body by, for example, MOCVD. The contact pads on the underside may be manufactured in a separate step. In another configuration, the module body includes at least one through-hole via filled at least partially with conductive material, and the conductive material on the first main surface is connected to or forms one of at least three contact pads located on the first main surface.

[0430] The module body may be configured to have a continuous main surface. In other configurations, the body may include a recess on a first or second main surface through which at least one contact web extends. The contact web on the second main surface may be connected to a through-hole via and wired to a contact pad. Similarly, the contact web may be connected to a through-hole via to at least one μ-LED located on the first main surface.

[0431] The main body may contain silicon or be formed from silicon. The main body may be surrounded by an insulating layer, such as silicon dioxide, to prevent short circuits. The silicon material may be exposed where the reference potential is connected. Similarly, the through-hole vias of the main body are lined with insulating material. Contact webs and contact pads are applied on the insulating layer. The module body may have a thickness of less than 30 μm, particularly in the range of 5 μm to 15 μm. In this way, a very low overall height of only a few tens of μm can be achieved. The overall height of the module can be further reduced by adding recesses into which optical structural elements are inserted.

[0432] Another aspect relates to a method for manufacturing a μ-LED module, in particular to patterning a membrane wafer to have a plurality of substantially V-shaped trench-like recesses. The recesses are configured such that the first main surface of the patterned membrane wafer, partitioned by trenches, is at an angle of 90° or more with the flanks of the trenches. Then, a plurality of contact pads are fabricated on the first main surface of the membrane wafer. Optionally and / or additionally, lead wires, contact tabs, and webs may also be fabricated on the first main surface and sides. Next, at least one optoelectronic structure element, in particular a μ-LED, is applied to the module and conductively connected to the contact pads. In the next step, a transient carrier is prepared, the membrane wafer is rebonded with the transient carrier, and then etched back to the trenches or just before the trenches. Finally, back contacts are applied and optionally separated.

[0433] As explained earlier, in monolithic arrays, pixel defects can be reduced by providing redundant subpixels. Electrical crosstalk is avoided, but optical crosstalk between redundant subpixels can occur. Similar problems exist even when pixels are isolated. While it may be possible to test functionality before isolation, the small size of the μ-LEDs can lead to positioning or connection errors when transferring them to the backplane during fabrication. In addition to continuous improvements in process steps, one approach is to provide each pixel in the pixel array with a redundant μ-LED, or more precisely, to have redundancy where μ-LEDs can be placed. This means, for example, that each RGB subpixel of a pixel has two or more μ-LED chips instead of just one for each color, resulting in an excessive number of subpixels per pixel for most pixels. Another approach is to repair the subpixels of defective pixels. According to the functional text, the defective subpixel is turned off and replaced with a functional subpixel.

[0434] A method for manufacturing pixel fields according to the present invention particularly includes arranging pixels in a field-like manner on a substrate and preparing a substrate for electrically contacting the pixels, wherein the substrate provides a set of primary contacts for the pixels, the set of primary contacts for the pixels is provided for electrically contacting sub-pixel groups of the pixels, and the substrate provides a set of replaceable contacts for the pixels.

[0435] Next, a group of μ-LEDs is mounted on the primary contact of the pixel, but a set of replacement contacts for the pixel is not mounted. Then, a defective μ-LED is identified from the group of μ-LEDs, and a replacement subpixel for the defective μ-LED is mounted on one of the possible replacement contacts of the set of replacement contacts for the pixel. In this regard, a single pixel may contain one or more subpixels. Also, pixels may be configured to connect vertical or horizontal μ-LEDs. Thus, the primary contact may contain at least one contact area (in the case of vertical μ-LEDs) or two contact areas (when horizontal μ-LEDs are mounted). One of the two contact areas can be used by multiple μ-LEDs, including redundant ones. When expanding vertical μ-LEDs, one of the cover electrodes presented here may be provided. The pixel field may be surrounded by a mirror layer.

[0436] In addition to separate μ-LEDs, the μ-LED modules or base modules disclosed herein may also be implemented. For example, a μ-LED module may include two base modules, with one base module provided as a redundant unit.

[0437] Therefore, in the method according to the present invention, a specified group of subpixels can be implemented in the primary contact of each pixel in the pixel field. In each case, the subpixels are implemented in the primary contact. In this case, a defective subpixel can be determined on the primary contact for each pixel. For the identified defective subpixel in the pixel, in a subsequent step, a replacement subpixel is implemented in the replacement contact of the pixel. In this way, a subpixel is implemented in only one replacement contact within a single pixel, and the subpixel identified as functionally defective on the primary contact is replaced.

[0438] Therefore, there is no need to implement redundancy by mounting multiple subpixels of the same color in a pixel. Compared to the redundancy concept known from prior art, the number of subpixels used in the pixel field that need to be manufactured is significantly reduced because additional subpixels are only added after defective subpixels have been identified. This reduces manufacturing costs.

[0439] Furthermore, in this invention, the functionality of the μ-LEDs can be tested on the one hand, and in the event of a failure, particularly in the case of a "SHORT" failure, the drive control technology can be used to safely isolate the defective μ-LED by measures such as blowing a fuse. This allows the defective LED to remain on the pixel, thus eliminating the need for additional process steps.

[0440] Furthermore, if a defective subpixel is identified, the replacement contacts for that pixel can be individually reattached. As a result of further functional testing during the ongoing process, it is also possible to implement replacement contacts for pixels that still have several slots available. This increases the probability of a successful attachment process. Additionally, it may be possible to reattach subpixels, for example, in the form of μ-LED chips, that possess selected characteristic data, in order to perform precise color calibration for each pixel.

[0441] In one configuration, the steps of identifying a defective subpixel within a group of subpixels and implementing a replacement contact for the identified subpixel may be repeated until a replacement subpixel is present in each subpixel identified as defective. In this way, replacement subpixels can be implemented on the substrate in subsequent process steps for all defective subpixels of a given pixel.

[0442] In another embodiment, if a defective pixel is declared as "OPEN," i.e., if no error current is flowing through the damaged or destroyed pixel, it is not necessary to remove the subpixel identified as defective. Similarly, circuit-related measures can be provided to disconnect the electrical contact of the identified defective subpixel. This prevents current from flowing to the defective subpixel during the operation of the pixel field. A corresponding concept is disclosed herein and can be used for this purpose.

[0443] Compared to the repair concept, the process of removing defective subpixels can be omitted. This speeds up the manufacturing process and improves cost efficiency. There is no risk of damaging the pixel field when removing defective subpixels. Certainly, in repairs where defective subpixels are removed, the empty primary contact surface can be used further. However, if there is residue or damage, the probability of a successful second mounting or bonding process is lower. On the other hand, the replacement contacts provided are free from residue and damage.

[0444] The defective subpixel and the replacement subpixel may be configured to emit light of the same color. In this way, the defective subpixel is replaced with a replacement subpixel that emits at least approximately the same color as the defective subpixel would have if it were functioning.

[0445] Each subpixel group can contain one or more sets of RGB subpixels, where RGB stands for red, green, and blue. Therefore, a subpixel group can have, for example, three subpixels. Some subpixels may be formed to emit red light, others green light, and still others blue light. It is well known that all, or nearly all, arbitrary colors can be produced by additive color mixing of the three primary colors: red, green, and blue.

[0446] A subpixel group may contain two or more subpixels for each primary color. For example, a subpixel group may contain six subpixels, each with two subpixels for generating red, green, or blue.

[0447] In one configuration, it is proposed that if no defective subpixels are found within a pixel, no replacement subpixels are implemented in any of the pixel's replacement contacts. Therefore, a pixel field may have pixels in which (multiple) replacement contacts are not implemented.

[0448] In another aspect, the design of the primary contact configuration is relevant. These are intended to bring subpixels of a given pixel into contact with the anode and / or cathode. For example, the contacts may be configured such that a so-called flip chip is placed on them and electrically connected. A flip chip is an optoelectronic chip on which electrical p-type and n-type contacts lie on the same surface. Similarly, replacement contacts may be formed to contact replacement subpixels of pixels on the anode and / or cathode side. The redundancy of the contact surfaces of each pixel's subpixels obtained by the replacement contacts may relate to both the cathode and anode of the subpixel, or to only one of the two terminals.

[0449] In this regard, subpixels or replacement subpixels are formed by μ-LEDs mounted on their respective contacts and electrically and mechanically connected. Mounting a replacement subpixel on a replacement contact for a subpixel identified as defective can be done independently of the color of light emitted by the replacement subpixel. In principle, each primary contact is mounted, and only the replacement contact for the μ-LED declared as defective is mounted. However, primary and secondary contacts do not need to differ in terms of circuitry or their surface structure. Therefore, in this respect, mounting can be done in combination. In this regard, it can also be said that the first contact on which a μ-LED of a certain color is mounted is the primary contact.

[0450] The proposed concept also relates to a pixel array having a substrate on which pixels are arranged in a field and which electrically contacts the pixels, wherein the substrate provides a set of primary contacts for the pixels. This set of primary contacts is provided to electrically contact groups of subpixels. Furthermore, the substrate is provided with replacement contacts for the pixels. According to the proposed principle, a set of subpixels is mounted on the primary contacts, and this set of subpixels has defective, inactive subpixels, and replacement subpixels are mounted on the replacement contacts of the set of replacement contacts for the pixels in place of the defective, inactive subpixels.

[0451] At least two pixels in a pixel field may occupy a different number of replacement contacts. This is because replacement subpixels are implemented in replacement contacts within a single pixel only if a defective subpixel is identified on the primary contact.

[0452] As described above, the concept of reducing defects and crosstalk improves the yield of functional elements during manufacturing. In some aspects, measures to improve the transfer of μ-LEDs are involved. For this purpose, development is underway on μ-LEDs with edge lengths typically less than 100 μm, often between 70 μm and 20 μm. For special applications in the augmented reality field, dimensions are also less than 20 μm, for example, in the range of 1 μm to 10 μm, or even 1 μm to 5 μm.

[0453] One of the technical challenges associated with μ-LEDs is the manufacturing process in particular, because it is necessary not only to produce large quantities of μ-LEDs but also to integrate them into matrices or modules. To manufacture such modules and even larger displays, the manufactured μ-LEDs are transferred to the support surface of the module or display, either as individual chips or already assembled, as in the modules presented herein, where they are fixed and electrically connected. Because millions of LEDs are being transferred, this process is critically important in terms of speed and accuracy.

[0454] Various processes are known for this purpose, such as the transfer printing process. This process involves simultaneously picking up multiple μ-LEDs from a wafer using a flat stamp, moving them to the support surface of a subsequent display, and then precisely assembling them to form a large-area, fully arranged structure. For this purpose, elastomer stamps can be used, and due to their appropriate surface texture and material properties, individual μ-LEDs adhere to the stamp without being mechanically or electrically damaged. Depending on the process technology, problems can arise when peeling off μ-LEDs, as they may tilt, shift, or twist. Therefore, it is desirable to enable the pickup of μ-LEDs with good retention and minimal damage.

[0455] The embodiments and concepts described below are based on the following considerations: When using mass production transfer printing, that is, a process that moves a large number of semiconductor chips locally at the same time, μ-LEDs are picked up or lifted from the wafer using appropriate tools. For this to work, the chips must be in a precise and definite position on the wafer in order to position tools, such as elastomer stamps with a cushioning structure, as accurately as possible on each μ-LED. At the same time, it is desirable that the surface texture is always in a homogeneous and uniform spatial position so that the transfer tool can adhere to the chip surface with the highest possible success rate.

[0456] According to a first embodiment, a method for providing a μ-LED is proposed, in which a first conductive contact layer is located on the first main surface side of a functional layer stack that is not facing the substrate. The layer stack is configured as an optically active layer stack, and accordingly, a μ-LED is formed. Then, at least one support structure is formed which is mounted on a substrate and supports the μ-LED. This support structure allows the contacted functional layer stack to be separated when lifted up. Subsequently, a sacrificial layer, particularly having AlGaAs or InGaAlP, provided between the second main surface side of the functional layer stack facing the substrate and the substrate is at least partially removed. After partial removal, a second conductive contact layer may be provided on the second main surface side of the functional layer stack in the region of the removed sacrificial layer.

[0457] In particular, the method presented herein avoids the need for additional rebonding as needed, as the lithography of the functional layer stack is performed on only one side of the substrate. This support structure can also be lithographically adjusted to the size of the layer stack and other parameter needs. Simultaneously, the contact of the layer stack on both sides forms a vertical μ-LED.

[0458] In a second embodiment, a μ-LED having a functional layer stack is proposed. A first conductive contact layer is provided on the first main surface side of the functional layer stack not facing the substrate, and a second conductive contact layer is provided on the second main surface side of the functional layer stack facing the substrate. In this case, the contacted functional layer stack is supported without particular constraint by at least one support structure attached to the substrate. This support structure allows the contacted functional layer stack to be separated in a further process step during lift-up. Therefore, the layer stack or μ-LED will have a broken edge after lift-up and in all subsequent process steps.

[0459] The measures proposed herein eliminate the need for rebonding and allow for easy alignment of the lithography mask. It enables the formation of both vertical and horizontal μ-LEDs. Absorption is suppressed, light extraction from the horizontal plane is increased, and thinning of epitaxially generated layers is possible. Without bonding, the epitaxial structure of the layer sequence is less susceptible to mechanical stress. Furthermore, the inclusion of a sacrificial layer allows for a more precise etching process, as the etching process on the sacrificial layer can be highly selective. Therefore, the contact layer can be formed more thinly.

[0460] In some embodiments, the support structure may have in particular InGaAlP or AlGaAs or BCB, or an oxide, such as SiO2, or a nitride, or a combination of such materials, and may be particularly nonconductive. In this case, it may also be configured to passivate the layer stack. The support structure can be fabricated by at least partially epitaxial growth, or by vapor deposition or electroplating. In contrast, the sacrificial layer may have AlGaAs or InGaAlP and may be removed by wet chemical etching. The first and second conductive contact layers can be performed by sputtering, vapor deposition, electroplating, or epitaxially. The contact layers may be transparent and may have ITO, ZnO, or a metal. In some embodiments, the flanks of the contacted functional layer stack may be covered with a passivation layer to prevent oxidation or degradation. Alternatively, a metal, particularly Zn, may be diffused from one flank of the contacted functional layer stack to the outer edge region of the functional layer stack. This alters the band structure of the outer edge region, and charge carriers are moved away from the region with increased defect density.

[0461] To ensure secure attachment of the support structure, it may extend into the substrate from the first main surface side of the functional layer stack.

[0462] In a further configuration, a first support layer having InGaAlP and / or AlGaAs may be formed on the first main surface side of the functional layer stack, and a first conductive contact layer may be provided on this support layer, and the first support layer and the first conductive contact layer can be provided on the substrate at least one location and together provide a support structure.

[0463] From another perspective, it relates to how to avoid the fractured edge and improve lift-up.

[0464] Here, a solution is proposed in which a crystalline dielectric support structure is used to maintain a mechanical connection between the μ-LED and the surrounding or underlying substrate. However, this mechanical connection, while mechanically and securely holding the μ-LED chip in place, is configured to break when subjected to the smallest possible bending or tensile force, thereby releasing and removing the chip.

[0465] In particular, a carrier structure for picking up planar microchips or μ-LEDs is proposed. Here, the carrier structure refers to an arrangement structure capable of picking up a large number of such μ-LEDs, for example, with edge lengths in the range of 5 μm to 20 μm or less. The objective here is to provide mechanically stable fixation to, for example, a grid or matrix, while making maximum use of available space. Furthermore, this carrier structure is considered suitable for providing multiple microchips for transfer using a transfer tool.

[0466] Furthermore, the carrier structure has at least two pickup elements (Aufnahmeelemente) connected to the carrier substrate. Here, pickup elements should be understood as mechanisms or functional elements suitable for mechanically contacting and spatially fixing a μ-LED, or holding it in a defined spatial position, by interacting with further pickup elements as needed. The diameter of the pickup elements may be, for example, in the range of 1 μm. According to one embodiment, a microchip is mounted on two pickup elements.

[0467] In some embodiments, the carrier structure includes a flat carrier substrate. Such a carrier substrate may be, for example, a wafer, sheet (folie), or frame used in the field of semiconductor manufacturing. In this regard, for example, a wafer can provide support or assistance functions for preparing subsequent mass production transfers, in addition to its function as a base plate or base material for semiconductor manufacturing processes. Other suitable carrier substrates include flexible materials such as sheets.

[0468] In one embodiment, the pickup elements have a columnar, pillar-like, or pole-like shape starting from the carrier substrate. In one configuration, the microchip is partially, but not completely, mounted on at least two pickup elements at its corners or edges. The pickup elements are connected to the carrier substrate and are configured to detachably hold the microchip between at least two pickup elements so that the μ-LED can move with the minimum force defined in a direction perpendicular to the surface of the carrier structure.

[0469] In other words, it is necessary to securely hold the μ-LED with the pickup element on the one hand, while intentionally creating the possibility of removing the μ-LED with minimal force, for example, to supply it to a transfer tool. For this reason, it may be proposed that the contact area of ​​each pickup element be less than 1 / 20 of the chip area of ​​the μ-LED, especially less than 1 / 40, and especially within the range of 1 / 80 to 1 / 50. In alternative configurations, the edge length of the μ-LED is at least 10 times, especially 20 times, the edge length of the pickup element.

[0470] "Removable" should be understood as a non-destructive and removable connection between the microchip and the pickup element, without any permanent material bonding such as fusion or adhesive. This attachment may be based on physical connections, such as van der Waals forces or electron bridges (Elektronenbruecken). A similar effect can be achieved by using different materials between the μ-LED and the pickup element and appropriately selecting the connection between the μ-LED and the pickup element. This is intended to avoid processes such as the destruction of the material structure and the corresponding breakage with fragments, particles, or chips. Alternative adhesion mechanisms utilizing mechanical friction or delamination are used here. In particular, known limited or restricted adhesion properties of materials or combinations of materials are utilized. According to one embodiment, a μ-LED is placed between two or more pickup elements.

[0471] For example, an adhesive or other tacky force is generated on the contact surface that allows the μ-LED to be mechanically fixed in space. Here, if a defined minimum force is applied to the μ-LED, for example by an attached transfer tool, a peeling force is consequently effective at the contact surface between the μ-LED and the pickup element. This defined minimum force can be influenced by the appropriate selection of the material or combination of materials at these contact surfaces.

[0472] The contact surface or overlapping surface is, for example, 0.05 μm. 2 ~1μm 2The dimensions may be within the range of the following. Here, on the one hand, it is desirable to securely hold the μ-LED on the carrier structure. On the other hand, for effective and rapid mass production transfer of the μ-LED, it is important that the μ-LED can be lifted and pulled away with the smallest possible force. To this end, it may be proposed that the ratio of the contact area between each element and the chip to the total chip area be less than 1 / 20, especially less than 1 / 40, and especially within the range of 1 / 80 to 1 / 50 of the chip area. In an alternative configuration, the edge length of the μ-LED is at least 10 times, especially 20 times, the edge length of the pickup element. Even if the area of ​​the pickup element is larger, the μ-LED will only be placed on a portion of it. Therefore, the contact area of ​​the chip is at least 1 / 20, especially at least 1 / 40, of the total chip area.

[0473] For example, in addition to materials or combinations of materials, it is necessary to find an appropriate compromise by appropriately selecting the dimensions and arrangement of the contact surfaces. Similarly, the size and shape of these contact surfaces can influence the defined minimum force. A larger contact surface results in a larger minimum force required to separate the μ-LED from the carrier structure. In addition to retention principles based on friction or stacking, retention forces based on magnetism or electricity can also be considered.

[0474] In another example, the carrier structure may have only one pickup element to hold the μ-LED. Because semiconductor structures are lightweight, it is conceivable that sufficient holding force can be obtained if there is a contact surface between the single pickup element and the μ-LED that has the appropriate shape and size, combined with a minimum force of the appropriate height to detach the μ-LED.

[0475] In one configuration, the substrate used to fabricate the μ-LED may be used as the carrier structure. In such a case, a sacrificial layer may be provided. In connection with this, the μ-LED is connected to the growth substrate during the manufacturing process. To expose the completed μ-LED, a space is created between the μ-LED and the wafer by removing the intervening sacrificial layer, for example, by a gas or plasma-based etching process. The thickness of the sacrificial layer is, for example, 100 nm to 500 nm. This is intended so that by removing the sacrificial layer, the pickup element takes on the function of holding the μ-LED on the carrier structure. In one configuration, the pickup element may have the shape of an anchor.

[0476] Typically, a μ-LED is pulled away from the carrier substrate by a force vector that is at least partially perpendicular to the carrier substrate plane (understood as the xy direction). Therefore, the pickup element remains on the carrier substrate and is not particularly damaged. This prevents any residue of the pickup element from remaining on the μ-LED, which could cause problems in subsequent processing.

[0477] In one embodiment, at least one pickup element is configured to simultaneously hold and / or support another adjacent, positioned μ-LED. Considerations for this feature can be summarized as follows: Support structures for μ-LEDs often take up space, and minimizing this is ideal to achieve high yield on the wafer. Due to the manufacturing process, μ-LEDs are also arranged in a regular, parallel structure on the wafer.

[0478] Due to the process, gaps are created between them. Therefore, the inventors propose positioning a pickup element between two adjacent μ-LEDs, so that this single pickup element supports or picks up multiple adjacent μ-LEDs. Herein lies the advantage of realizing an overall support structure of arithmetic less than one per component. This reduces the total number of pickup elements, resulting in space savings and, consequently, cost reductions. Furthermore, since there is no need to sacrifice the number of μ-LEDs by adding space for support structures on the wafer, the overall chip yield remains substantially constant.

[0479] For example, the pickup elements may have contact surfaces that are positioned opposite each other, with each mechanically contacting an adjacent μ-LED in this direction. In this case, the pickup elements can be distributed and arranged on the surface of the carrier substrate so that a minimum number of pickup elements are used to reliably hold the μ-LED. This may be advantageous, for example, to enable effective and rapid pickup of the μ-LED using an effective transfer tool. In one embodiment, the pickup elements are arranged on the carrier substrate such that one μ-LED is held by exactly three pickup elements. In this case, selecting three pickup elements may be an advantageous compromise in that it allows for both good spatial stability and a favorable distribution of holding force. Here, in particular, lateral displacement and tilting on the carrier substrate can be effectively prevented. In this regard, the pickup elements can engage with the microchip in different lateral regions in the X and Y directions, e.g., at the center, off-center, or at the edges or corners. Multiple pickup elements may be arranged on the exact same face of the μ-LED.

[0480] In one embodiment, a delamination layer is provided on the μ-LED or pickup element to move the μ-LED from the carrier structure. In this specification, the term delamination is intended to describe the delamination process that occurs when two surfaces come into contact, or more generally, when two layers become connected. This can apply not only to surfaces of the same type of material, but also to material connections or surfaces of different materials.

[0481] The purpose of intentionally creating a so-called delamination layer is to prevent a failure process, material fracture process, or structural change process, and instead to non-destructively separate layers or surfaces from each other. Here, specific combinations of materials can be used, for example, not only the combination of SiO2 and Al2O3, but also non-oxidizing metals such as silver, gold, or similar materials can be used in combination with dielectrics such as SiO2. Thus, in one embodiment, a delamination layer is formed between the μ-LED and the pickup element, as the surface of the pickup element is surrounded by the delamination layer. The thickness of the delamination layer is only a few nanometers, for example, in the range of 5 nm to 50 nm. In one embodiment, the delamination layer may be formed as an etching stop layer, or it may also optionally extend to cover further portions of the carrier structure.

[0482] In one embodiment, the pickup element is positioned in a mesa trench on a semiconductor wafer. As mentioned above, in principle, it is desirable to make optimal use of space on the wafer in order to improve yield. Support structures for μ-LEDs often require additional space. In the manufacturing process, a three-dimensional structure is created through various process steps, in which case, for example, the μ-LED is formed last as a convex or mesa. So-called mesa trenches are formed between these individual μ-LEDs.

[0483] The term "mesa trench" refers to a relatively steep, sloping shape on the side of a μ-LED, where the trench, or epitaxy-free region, refers to the deep structure between them. For example, a mesa trench may have a flank steepness in the range of 30° to 75°, particularly 45°. This is intended to precisely position the pickup element within any of the available regions without taking up additional space on the wafer. In this way, the available space on the wafer can be utilized more efficiently.

[0484] In one embodiment, the carrier structure and the pickup element are integrally formed. That is, for example, the pickup element is part of the carrier substrate. Here, the carrier substrate may be a wafer itself, or it may be a structure such as a PCB board, sheet, or frame. In the latter case, it means that the pickup element itself is made of a different material and / or structure from the carrier substrate. This can be achieved, for example, in the manufacturing process by locally limiting and specifically maintaining the wafer structure that was present from the beginning through various process steps, and not removing them, for example, by an etching process. In that case, these structures function as the pickup element and support structure of the completed μ-LED.

[0485] In one embodiment, the pickup element is configured to hold the μ-LED laterally and from below. In one embodiment, on the one hand, it may be useful to create a partial contact surface or contact surface that provides mechanical stopping in the Z direction, i.e., in the direction of the carrier substrate, in order to hold the μ-LED on the underlying carrier substrate. At the same time, by providing additional lateral holding, spatial fixing in the lateral direction, i.e., in the X and Y directions, can be achieved. In this way, on the one hand, stable spatial fixing is possible in the direction of the carrier substrate and in the lateral direction, and on the other hand, in the Z direction away from the carrier substrate, the μ-LED can be easily lifted up by a transfer process or transfer tool.

[0486] In one embodiment, the pickup element has a μ-LED holding surface that tilts away from the carrier substrate plane, and the holding force on the μ-LED decreases as the μ-LED moves away from the pickup element. In other words, the further the μ-LED moves away from the carrier substrate, the further the holding surface moves away from the μ-LED. This can also be understood as the holding force progressively decreasing when the μ-LED is lifted away from the carrier structure by a transfer tool. This is primarily intended to advantageously reduce the force required to detach the μ-LED, in particular to shorten the execution time of process steps and improve the quality of the transfer process.

[0487] Traditionally, there have been various methods for transferring a chip from a carrier wafer to a suitable target substrate.

[0488] Prior art includes known transfer processes such as laser transfer printing, transfer processes that "self-assemble" individual microlight-emitting diode chips from a solution, and electrostatic or diamagnetic transfer processes.

[0489] An extension of these concepts is described in detail using the electrostatic transfer disclosed herein. The aim here is to specify a method for picking up and placing small optoelectronic semiconductor chips, i.e., μ-LEDs, and simultaneously sorting out μ-LEDs with specific defects. Furthermore, the aim is to create a corresponding apparatus for picking up and placing optoelectronic semiconductor chips.

[0490] The proposed concept is based on the idea that electron-hole pairs are generated within μ-LEDs and general optoelectronic semiconductor chips. In each case, the μ-LED may have a semiconductor layer having a photosensitive region, also called an optically active region. In the optically active region, charge carriers or electron-hole pairs can be generated by the corresponding excitation, particularly incident light. An electron-hole pair consists of a defect electron and an electron that has absorbed energy and transitioned from the ground state to an excited state in the crystal.

[0491] If a semiconductor material has the appropriate properties, such as a pn junction with two regions of different dopant concentrations, electron-hole pairs can be separated from each other. This generates a charge in each semiconductor chip and creates a dipole field outside the semiconductor chip. This process is also known as the photovoltaic effect. The strength of the dipole field generated in each semiconductor chip depends on the properties of the semiconductor chip. Semiconductor chips may have defects such as short circuits, shunts, or low efficiency, which accelerate the outflow of the charge generated by excitation and weaken the dipole field.

[0492] Furthermore, the proposed method provides a pickup tool used to pick up μ-LEDs or optoelectronic semiconductor chips and place them in a predetermined position or location, for example, on a circuit board on which the μ-LEDs are mounted. This process is also referred to as "pick and place" in English technical literature. In addition, the pickup tool generates an electric field at least at specific locations, for example, to charge these locations. During or after the generation of electron-hole pairs, the μ-LEDs are picked up by the pickup tool.

[0493] The electric field generated by the pickup tool interacts with the dipole field of the optoelectronic semiconductor chip, generating both attractive and repulsive forces between the pickup tool and the optoelectronic semiconductor chip. Even in the absence of an electric dipole field from electron-hole pairs, electrostatic interactions or forces may overlap with the interactions or forces existing between the pickup tool and the optoelectronic semiconductor chip. For example, even without dipole charges generated by excitation, van der Waals or electrostatic attractive forces may exist between the pickup tool and each optoelectronic semiconductor chip. Additional electrostatic attractive forces can detach the μ-LED from the carrier on which it is located, exceeding the threshold at which it is picked up by the pickup tool.

[0494] The force required to detach the optoelectronic semiconductor chip from the carrier may be greater than the force required to hold the detached optoelectronic semiconductor chip with a pickup tool. Therefore, depending on the situation, electrostatic force may be required only to detach the optoelectronic semiconductor chip and not to hold it. Consequently, the presence of a dipole field may be required only to detach the optoelectronic semiconductor chip and not necessarily to hold it afterward.

[0495] μ-LEDs with specific defects, such as short circuits, shunts, or low efficiency, have lower dipole field fields when excited than μ-LEDs without such defects. Consequently, the electrostatic interaction between the pickup tool and the defective μ-LED is very small, and the defective μ-LED cannot be picked up by the pickup tool and remains on the carrier. In other words, the electrostatic interaction between the pickup tool and the μ-LED is selected so that the force acting on it is sufficiently strong only in functional μ-LEDs. In other words, the electric field generated by the pickup tool is selected so that a sufficient electrostatic force is obtained to lift the μ-LED only in interaction with functional μ-LEDs. In the case of defective μ-LEDs with weak dipole fields, the interaction is not sufficiently large.

[0496] The concept presented herein makes it possible to avoid picking up and therefore mounting defective μ-LEDs, significantly reducing repair work resulting from the assembly of defective optoelectronic semiconductor chips. In this regard, it should be noted that this interaction also depends on the mass or size of the μ-LED, and therefore, the nominal size must be appropriately selected to ensure that functional μ-LEDs are accurately attached.

[0497] With an appropriate configuration, alternatively, μ-LEDs or optoelectronic semiconductor chips with specific defects that weaken the dipole field can be picked up by the pickup tool, while "good" μ-LEDs with stronger dipole fields can be repelled by the pickup tool and remain on the carrier. This configuration also separates good and defective μ-LEDs and optoelectronic semiconductor chips.

[0498] The pickup tool may be made of a material suitable for generating an electric field. For example, the pickup tool may have polydimethylsiloxane (PDMS) with embedded metal contacts. The metal contacts may be connected to a voltage source to properly charge the PDMS material in order to generate an electric field. Furthermore, the pickup tool may be made of a suitable charging material that generates an electric field on its own.

[0499] Another option for generating an electric field is, for example, to generate an electric field via a voltage between a contact in or on the surface of the pickup tool. The electric field also extends between the pickup tool and the electrical contact, and a μ-LED may be placed between the pickup tool and the electrical contact. The electrical contact may be, for example, a carrier on which a μ-LED or optoelectronic semiconductor chip is placed, or which is incorporated into these.

[0500] μ-LEDs can be manufactured on a semiconductor wafer and then separated into individual pieces, for example, by sawing. The separated μ-LEDs can then be mounted on a circuit board or other carrier in the manner described herein. Similarly, not only individual μ-LEDs, but also μ-LED modules or smaller arrays to which μ-LEDs are connected can be transferred in this manner. In this regard, please refer to the μ-LED modules or structures described herein that can be easily transferred using the proposed transfer method.

[0501] In the case of μ-LEDs, their small size and, in some cases, large number make it economically impractical to first test the LEDs and then mount them on a circuit board, as has been done in the past. The method described in this application differs from the conventional method in that it is possible to select defective μ-LEDs before assembly.

[0502] Excitation of a μ-LED for generating electron-hole pairs can be performed by irradiating the μ-LED with light, particularly UV light. The light spectrum must have a wavelength or wavelength range that enables excitation, especially photoluminescent excitation. In particular, the excitation light must have higher energy than the light emitted from the optoelectronic semiconductor chip so that electron-hole pairs can be directly generated. As a result, the wavelength of the excitation light must be shorter than the wavelength of the light emitted by the optoelectronic semiconductor chip. For example, a blue μ-LED emits light at approximately 460 nm. In this case, it is desirable that the excitation light has a wavelength of 440 nm or less, for example, a wavelength of approximately 420 nm.

[0503] Light used to generate electron-hole pairs can pass through a pickup tool and strike the μ-LED. To enable this, the pickup tool may be made of a material that is at least partially transparent or transparent to light. Furthermore, the pickup tool may incorporate an aperture or light guide for the light to reach the μ-LED.

[0504] The μ-LED or semiconductor chip may be positioned on a carrier or substrate before being picked up by a pickup tool. Light for generating electron-hole pairs can pass through the carrier or substrate and strike the μ-LED. For this purpose, at least a portion of the carrier or substrate may be made from a material that is at least partially transparent or transparent to light, or apertures or light guides may be incorporated into the carrier or substrate.

[0505] Alternatively, light may be shone on the μ-LED or any optoelectronic semiconductor chip from the side or at an oblique angle.

[0506] It may be specified that electron-hole pairs are not generated in all μ-LEDs or optoelectronic semiconductor chips, but rather selectively generated in only some structural elements. For example, a number of μ-LEDs manufactured on a wafer may be provided, and electron-hole pairs may be generated only in selected μ-LEDs from among the number of optoelectronic semiconductor chips. These selected μ-LEDs, excluding any defective ones, are then picked up by a pickup tool. Selective excitation of the μ-LEDs can be achieved, for example, by passing light for generating electron-hole pairs through a mask.

[0507] Another possibility for picking up only selected μ-LEDs is for the pickup tool to generate an electric field only in a predetermined area. This can be achieved, for example, by allowing metal contacts embedded in the pickup tool to be driven and controlled at least partially individually. This choice makes it possible to create appropriate spacing for the μ-LEDs to be picked up (e.g., every two, every three, every nine, etc.). This spacing can be selected so that the picked-up μ-LEDs can be placed directly onto the target matrix.

[0508] In one configuration, the pickup tool has a number of protrusions or stamps on the surface facing the μ-LED. When the pickup tool is lowered, only the protrusions come into contact with the semiconductor optoelectronic chip, and therefore only the protrusions can pick up the μ-LED. The areas between the protrusions and the areas outside the protrusions do not pick up the optoelectronic semiconductor chip. In this case as well, the protrusions may be arranged at predetermined intervals corresponding to the space occupied by the target matrix. Further concepts that further develop this embodiment are disclosed in this application.

[0509] Alternatively, the pickup tool may have a continuous flat surface designated for picking up μ-LEDs in at least one region. This provides greater flexibility, as it allows for the pickup of μ-LEDs or optoelectronic semiconductor chips arranged in different patterns and / or spacings.

[0510] Furthermore, the pickup tool ma...

Claims

[Claim 1] It is a configuration structure, At least one light-emitting device, in particular at least one μ-LED, wherein the light-emitting device is - A conductive structure having an upper main surface and a lower main surface separated from the upper main surface by a gap, - A cavity having width and length provided within the conductive structure, - A semiconductor layer stack arranged within the cavity and extending at least beyond the upper main surface along the first main direction The semiconductor layer stack includes, • The active layer and • The first electrical contact and • Second electrical contact and It has, - The length of the cavity is substantially based on n / 2 of the wavelength of light emitted during operation, where n is a natural number. At least one light-emitting device, in particular at least one μ-LED; and / or - A three-dimensional light-emitting heterostructure comprising a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, comprising at least one μ-LED or photoelectron semiconductor arrangement structure, - The luminescent heterostructure comprises aluminum gallium arsenide and / or aluminum gallium indium phosphate and / or aluminum gallium indium phosphate arsenide, - The light-emitting heterostructure is formed three-dimensionally by growth on a shaped layer having sides with a {110} orientation, which is selectively epitaxially deposited on a gallium arsenide (111) B epitaxial substrate, and can be provided with an arbitrarily flat upper surface {111}(10). At least one μ-LED or optoelectronic semiconductor device; and / or - At least two μ-LEDs, in particular an array of μ-LEDs, wherein each μ-LED forms an active layer suitable for light emission between an n-type doped layer and a p-type doped layer, - Between two adjacently formed μ-LEDs, the material of the layer sequence is interrupted or removed from the n-type doped side and the p-type doped side to the cladding layer or within the cladding layer, or to the active zone or at least partially within the active zone, thereby forming a material transition region with a maximum thickness dC, and as a result, the electrical and / or optical conductivity in the material transition region is reduced. At least two μ-LEDs, especially an array of μ-LEDs; and / or - A μ-LED module having at least one layer stack providing a base module, wherein the layer stack has a first layer formed on a carrier, particularly a growth carrier, an active layer formed on the first layer, and a second layer formed on the active layer, wherein a first contact is connected to a surface region of the second layer that does not face the carrier, and a second contact is connected to a surface region of the first layer that does not face the carrier. - Optionally, the device includes an overall planar target matrix formed on a first carrier having rows and columns of μ-LEDs in occupyable locations. - One or more μ-LED modules include at least two components of a size corresponding to the occupyable space, The μ-LED module is positioned and electrically connected to the first carrier such that a number of spaces remain unoccupied by components in the target matrix, and at least one sensor element is positioned and electrically connected to these spaces at least partially each time. μ-LED module; and / or - A μ-LED arrangement structure comprising a combination of coated material volumes having the shape of a polyhedron or prism, with an active layer placed inside, and A μ-LED arrangement structure characterized in that, for emission of a specific color, a color-matched conversion material is formed between the volumes of a single combination of materials. A configuration including, - The active layer of the μ-LED has at least one quantum well, the central region of the active layer is laterally surrounded by a second region of the active layer, the band gap of the second region is larger than the band gap of the central region, a dopant is introduced into the second region, the dopant generates quantum well intermixing in at least one quantum well of the active layer located in the second region, and / or - The μ-LED is at least part of an array having the μ-LED, the μ-LED is manufactured in a vertical orientation, and a first contact of the light-emitting element on one side of the substrate is connected to the first contact area. - On the same side as the substrate, the second contact of the light-emitting element that does not face the substrate is connected to the second contact region by a transparent contact layer and a first metal mirror layer. - The reflector structure surrounds the light-emitting element, and the reflector structure is provided with a second metal mirror layer. and / or - At least a μ-LED is placed on a flat carrier substrate of the pixel element, and is configured to emit light across the carrier substrate plane in a direction away from the carrier substrate. - The μ-LED has an electrical contact on the upper side facing away from the carrier substrate. - The pixel element has a flat contact layer on the upper surface of the at least one μ-LED that is at least partially conductive and electrically connected to the electrical contact of the at least one μ-LED. - The contact layer is configured to be at least partially transparent to the light emitted by the at least one μ-LED, and a conductor track is provided on the contact layer that is electrically and planarly connected to the contact layer. - The electrical conductivity of the conductor track is greater than the electrical conductivity of the contact layer. and / or The μ-LED is fixed to one side of the substrate. - The substrate has a first electrical contact on the surface opposite to the substrate, and the first contact is electrically connected to an electrical control contact on the surface of the substrate by a mirror coating. - The mirror coating covers at least partially the substrate surface facing at least one die, and / or - The μ-LED is a subpixel of a pixel element for generating pixels of a display, and the pixel element is formed from at least two subpixels emitting the same color, particularly by the μ-LED and further μ-LEDs. - A sub-pixel separator is provided between two adjacent sub-pixels of the same pixel element. - The sub-pixel separation element is configured to separate the electrically driven control of each sub-pixel, and in each case is configured to be optically coupled with respect to the light emitted by the sub-pixel. and / or - The device has a pixel field having a substrate for electrically contacting the pixels and arranging pixels in a field manner on the substrate. - The substrate provides a set of primary contacts for at least one pixel, the set of primary contacts for the pixel is provided to electrically connect a group of subpixels, and the substrate has a set of replacement contacts for the at least one pixel. - The primary contact of the aforementioned pixel is equipped with the aforementioned sub-pixel group. - The aforementioned subpixel group has defective, inactive subpixels, - A replacement subpixel is implemented in one of the replacement contacts of the set of replacement contacts for the aforementioned pixel, in place of a defective, inactive subpixel. To improve the transfer of the light-emitting device, the at least one μ-LED or the at least two μ-LEDs, the μ-LED arrangement structure or the μ-LED module, - At least two pickup elements are provided on a flat carrier substrate, and the pickup elements are, - Since the μ-LED, the μ-LED arrangement structure, the μ-LED module, or the light-emitting device are configured to be detachably held between the at least two pickup elements, the μ-LED can be moved with a minimum force defined in a direction perpendicular to the carrier structure surface. - At least one of the two pickup elements is configured to simultaneously hold and / or support a second μ-LED positioned adjacent to it. and / or - A μ-LED is generated on the carrier substrate at a first density, - The first transfer step is performed by a first transfer stamp that transfers the μ-LED onto the intermediate substrate at the first density, - The second transfer step is performed by a second transfer stamp that transfers from the intermediate carriers to a target substrate at a second density which is 1 / n of the first density, wherein the target substrate provides a common array region to each of the arrays, in particular to all three colors, the size of the intermediate carriers is the same as or larger than the size of the second transfer stamp, and the size of the second transfer stamp is the same as or 1 / k of the array region. Here, the aforementioned arrangement structure is - In particular, including a pixel array for display in polar coordinates, the pixel array is - Having multiple light-emitting devices, μ-LEDs, μ-LED arrangement structures, or μ-LED modules, - Arranged in at least one row, starting from a starting point on the axis and passing through that starting point. - The plurality of pixel elements have a height and a variable width, and the width of the pixel elements increases substantially as they move away from the starting point. The aforementioned arrangement structure further includes, - It has multiple pixel structures arranged in rows and columns, and the pixel structures are - A first substrate structure (I) having a first substrate structure (I) in which a μ-LED, a μ-LED arrangement structure, a μ-LED module, or a light-emitting device is arranged in or on the substrate structure, wherein the edge length of the first substrate structure is less than 50 μm, particularly less than 20 μm, and forms a pixel structure arranged in rows and columns, - The μ-LED, the μ-LED arrangement structure, the μ-LED module, or the light-emitting device can be individually driven and controlled, Multiple contacts are arranged on the surface of the first substrate structure facing the direction of light irradiation. - A second substrate structure (III) having a plurality of contacts on its surface corresponding to the contacts of the first substrate structure, and a plurality of digital circuits for addressing the photoelectronic structural elements, The first substrate structure and the second substrate structure are connected to each other, and a plurality of contacts are electrically connected to the corresponding contacts. The first substrate structure is formed from a first material system, and the second substrate structure is formed from a second material system, which is different from the first material system. Furthermore, the second substrate structure is - In particular, it includes a device for electronically driving and controlling μ-LED pixel cells created using NMOS technology, and the device is - Including data signal lines, threshold lines and select signal lines, - The contact between the second substrate structure and the μ-LED, the μ-LED arrangement structure, the μ-LED module, or the light-emitting device is made in series with the dual-gate transistor and electrically connected together between the first potential terminal and the second potential terminal, the current line contacts of the dual-gate transistor are located between the terminals and potential terminals of the μ-LED, the μ-LED arrangement structure, the μ-LED module, or the light-emitting device, and the first control gate of the dual-gate transistor is connected to the threshold line. - Select-Hold Circuit Having a second control gate of the dual-gate transistor and a charge storage unit coupled to the current line contact of the dual-gate transistor, and a control transistor whose control terminal is connected to the select signal line Includes, and / or Includes a supply circuit, the supply circuit is - An error correction detector having a reference signal input, an error signal input, and a correction signal output, - A controllable current source having a current output and a control signal terminal, wherein the control signal terminal is connected to a correction signal output to form a control loop for the controllable current source, and the current source is configured to supply current to the current output in response to a signal from the control signal terminal, - A backup source having an output configured to supply a backup signal, - A switching device configured to supply either a signal derived from the current of the current output or a backup signal to an error signal input, with the current output of the current source further isolated in response to a switching signal (VPWM). It has, and / or - Includes a driver circuit for driving multiple μ-LEDs, μ-LED arrangement structures, μ-LED modules, or light-emitting devices, the driver circuit is - It has a plurality of first memory cells, each containing a set input, a reset input, and an output, - Each first memory cell is triggered to a first state at the output by the set signal of the set input, and maintains the first state until it is reset to a second state by the reset input. - The output of each first memory cell is configured to control one of the μ-LEDs, the μ-LED arrangement structure, the μ-LED module, or the light-emitting device. And / or the arrangement structure includes: An IC substrate component having a monolithic integrated circuit and IC substrate contacts arranged as a matrix, A monolithic pixelated optochip comprising a semiconductor layer sequence having a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, wherein the polarity of the charge carriers in the first semiconductor layer is different from the polarity of the charge carriers in the second semiconductor layer, and the semiconductor layer sequence defines the stacking direction. It is equipped with, Within the aforementioned monolithic pixelated optochip, there are μ-LEDs arranged as a matrix. Each μ-LED has a μ-LED back surface facing the IC substrate component and a first light source contact adjacent to it in contact with the first semiconductor layer and electrically connected in each case to one of the IC substrate contacts. The projected area of ​​the first light source contact onto the back of the μ-LED is at most half the area of ​​the back of the μ-LED, and the first light source contact is surrounded by a back-side absorber in a lateral direction perpendicular to the stacking direction. The arrangement structure comprises a plurality of μ-LEDs, μ-LED arrangement structures, μ-LED modules, or light-emitting devices, wherein the size of each μ-LED, μ-LED arrangement structure, μ-LED module, or light-emitting device along at least one spatial direction is 70 micrometers or less.

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